ATE537556T1 - Verfahren zum füllen von lücken und verfahren zur abscheidung von materialien unter verwendung einer hochdichten chemischen plasma- gasphasenabscheidung - Google Patents
Verfahren zum füllen von lücken und verfahren zur abscheidung von materialien unter verwendung einer hochdichten chemischen plasma- gasphasenabscheidungInfo
- Publication number
- ATE537556T1 ATE537556T1 AT04784663T AT04784663T ATE537556T1 AT E537556 T1 ATE537556 T1 AT E537556T1 AT 04784663 T AT04784663 T AT 04784663T AT 04784663 T AT04784663 T AT 04784663T AT E537556 T1 ATE537556 T1 AT E537556T1
- Authority
- AT
- Austria
- Prior art keywords
- sub
- deposition
- filling gaps
- layer
- vapor deposition
- Prior art date
Links
- 239000000463 material Substances 0.000 title abstract 5
- 238000000034 method Methods 0.000 title abstract 4
- 238000005229 chemical vapour deposition Methods 0.000 title 1
- 238000000151 deposition Methods 0.000 title 1
- 230000008021 deposition Effects 0.000 abstract 5
- 239000007789 gas Substances 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- 239000000203 mixture Substances 0.000 abstract 2
- -1 heavy-hydrogen compound Chemical group 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/401—Oxides containing silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31608—Deposition of SiO2
- H01L21/31612—Deposition of SiO2 on a silicon body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31625—Deposition of boron or phosphorus doped silicon oxide, e.g. BSG, PSG, BPSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/669,671 US7056833B2 (en) | 2003-09-23 | 2003-09-23 | Methods of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition |
PCT/US2004/030875 WO2005031841A2 (en) | 2003-09-23 | 2004-09-20 | Methods of filling gaps and methods of depositing materials using high density plasma chemical vapor deposition |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE537556T1 true ATE537556T1 (de) | 2011-12-15 |
Family
ID=34313738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT04784663T ATE537556T1 (de) | 2003-09-23 | 2004-09-20 | Verfahren zum füllen von lücken und verfahren zur abscheidung von materialien unter verwendung einer hochdichten chemischen plasma- gasphasenabscheidung |
Country Status (8)
Country | Link |
---|---|
US (3) | US7056833B2 (de) |
EP (1) | EP1665354B1 (de) |
JP (1) | JP4356747B2 (de) |
KR (1) | KR100759649B1 (de) |
CN (1) | CN100454497C (de) |
AT (1) | ATE537556T1 (de) |
TW (1) | TWI248638B (de) |
WO (1) | WO2005031841A2 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7279770B2 (en) * | 2004-08-26 | 2007-10-09 | Micron Technology, Inc. | Isolation techniques for reducing dark current in CMOS image sensors |
US8021992B2 (en) * | 2005-09-01 | 2011-09-20 | Taiwan Semiconductor Manufacturing Co., Ltd. | High aspect ratio gap fill application using high density plasma chemical vapor deposition |
US20130288485A1 (en) * | 2012-04-30 | 2013-10-31 | Applied Materials, Inc. | Densification for flowable films |
US20140070225A1 (en) * | 2012-09-07 | 2014-03-13 | Apple Inc. | Hydrogenation and Crystallization of Polycrystalline Silicon |
US9401423B2 (en) * | 2013-07-16 | 2016-07-26 | Globalfoundries Inc. | Enhancing transistor performance and reliability by incorporating deuterium into a strained capping layer |
CN105825906B (zh) * | 2016-03-30 | 2017-12-08 | 中国科学院上海应用物理研究所 | 一种放射性含氟废液水泥固化方法 |
US11508584B2 (en) | 2019-06-17 | 2022-11-22 | Applied Materials, Inc. | Deuterium-containing films |
CN114761612A (zh) * | 2019-12-02 | 2022-07-15 | 朗姆研究公司 | 原位pecvd覆盖层 |
US20240087882A1 (en) * | 2022-09-09 | 2024-03-14 | Applied Materials, Inc. | Fluorine-doped silicon-containing materials |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2933177B2 (ja) * | 1991-02-25 | 1999-08-09 | キヤノン株式会社 | 非単結晶炭化珪素半導体、及びその製造方法、及びそれを用いた半導体装置 |
US6106678A (en) * | 1996-03-29 | 2000-08-22 | Lam Research Corporation | Method of high density plasma CVD gap-filling |
US6232216B1 (en) * | 1996-04-16 | 2001-05-15 | Nippon Telegraph And Telephone Corporation | Thin film forming method |
US6077791A (en) | 1996-12-16 | 2000-06-20 | Motorola Inc. | Method of forming passivation layers using deuterium containing reaction gases |
JP3599513B2 (ja) * | 1996-12-27 | 2004-12-08 | 松下電器産業株式会社 | 薄膜トランジスタの製造方法 |
US6025280A (en) | 1997-04-28 | 2000-02-15 | Lucent Technologies Inc. | Use of SiD4 for deposition of ultra thin and controllable oxides |
US6023093A (en) * | 1997-04-28 | 2000-02-08 | Lucent Technologies Inc. | Deuterated direlectric and polysilicon film-based semiconductor devices and method of manufacture thereof |
US5872058A (en) | 1997-06-17 | 1999-02-16 | Novellus Systems, Inc. | High aspect ratio gapfill process by using HDP |
US5972765A (en) | 1997-07-16 | 1999-10-26 | International Business Machines Corporation | Use of deuterated materials in semiconductor processing |
US6156653A (en) | 1997-11-03 | 2000-12-05 | Zilog, Inc. | Method of fabricating a MOS device |
US6395150B1 (en) | 1998-04-01 | 2002-05-28 | Novellus Systems, Inc. | Very high aspect ratio gapfill using HDP |
US6200911B1 (en) * | 1998-04-21 | 2001-03-13 | Applied Materials, Inc. | Method and apparatus for modifying the profile of narrow, high-aspect-ratio gaps using differential plasma power |
US6030881A (en) | 1998-05-05 | 2000-02-29 | Novellus Systems, Inc. | High throughput chemical vapor deposition process capable of filling high aspect ratio structures |
US6255197B1 (en) * | 1998-06-10 | 2001-07-03 | Jim Mitzel | Hydrogen annealing method and apparatus |
US6129819A (en) * | 1998-11-25 | 2000-10-10 | Wafertech, Llc | Method for depositing high density plasma chemical vapor deposition oxide in high aspect ratio gaps |
KR20000057747A (ko) * | 1999-01-14 | 2000-09-25 | 루센트 테크놀러지스 인크 | 실리콘 집적 회로의 제조 방법 |
JP2000315791A (ja) * | 1999-05-06 | 2000-11-14 | Nec Corp | 半導体装置およびその製造方法 |
US6368988B1 (en) | 1999-07-16 | 2002-04-09 | Micron Technology, Inc. | Combined gate cap or digit line and spacer deposition using HDP |
KR20010036046A (ko) * | 1999-10-05 | 2001-05-07 | 윤종용 | 중수소 가스를 포함하는 분위기를 사용하는 반도체 소자의 절연막 형성방법 |
US6331494B1 (en) | 1999-12-30 | 2001-12-18 | Novellus Systems, Inc. | Deposition of low dielectric constant thin film without use of an oxidizer |
JP3723085B2 (ja) * | 2001-03-15 | 2005-12-07 | 株式会社東芝 | 半導体装置の製造方法及び製造装置 |
US6614977B2 (en) | 2001-07-12 | 2003-09-02 | Little Optics, Inc. | Use of deuterated gases for the vapor deposition of thin films for low-loss optical devices and waveguides |
US6670241B1 (en) | 2002-04-22 | 2003-12-30 | Advanced Micro Devices, Inc. | Semiconductor memory with deuterated materials |
US6768828B2 (en) * | 2002-11-04 | 2004-07-27 | Little Optics Inc. | Integrated optical circuit with dense planarized cladding layer |
US6982207B2 (en) * | 2003-07-11 | 2006-01-03 | Micron Technology, Inc. | Methods for filling high aspect ratio trenches in semiconductor layers |
-
2003
- 2003-09-23 US US10/669,671 patent/US7056833B2/en not_active Expired - Fee Related
-
2004
- 2004-09-20 EP EP04784663A patent/EP1665354B1/de not_active Expired - Lifetime
- 2004-09-20 WO PCT/US2004/030875 patent/WO2005031841A2/en active Application Filing
- 2004-09-20 AT AT04784663T patent/ATE537556T1/de active
- 2004-09-20 KR KR1020067005493A patent/KR100759649B1/ko active IP Right Grant
- 2004-09-20 CN CNB2004800275649A patent/CN100454497C/zh not_active Expired - Lifetime
- 2004-09-20 JP JP2006528102A patent/JP4356747B2/ja not_active Expired - Lifetime
- 2004-09-22 TW TW093128729A patent/TWI248638B/zh active
-
2005
- 2005-04-25 US US11/115,854 patent/US7273793B2/en not_active Expired - Lifetime
-
2006
- 2006-01-27 US US11/341,199 patent/US7202183B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1856870A (zh) | 2006-11-01 |
KR100759649B1 (ko) | 2007-09-17 |
US20060134924A1 (en) | 2006-06-22 |
JP4356747B2 (ja) | 2009-11-04 |
US20050064729A1 (en) | 2005-03-24 |
EP1665354A2 (de) | 2006-06-07 |
TW200524008A (en) | 2005-07-16 |
WO2005031841A2 (en) | 2005-04-07 |
US7202183B2 (en) | 2007-04-10 |
EP1665354B1 (de) | 2011-12-14 |
KR20060095972A (ko) | 2006-09-05 |
TWI248638B (en) | 2006-02-01 |
CN100454497C (zh) | 2009-01-21 |
JP2007507111A (ja) | 2007-03-22 |
WO2005031841A3 (en) | 2005-09-01 |
US7056833B2 (en) | 2006-06-06 |
US20050196976A1 (en) | 2005-09-08 |
US7273793B2 (en) | 2007-09-25 |
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