ATE536634T1 - Verfahren zur herstellung eines halbleiterbauelements - Google Patents

Verfahren zur herstellung eines halbleiterbauelements

Info

Publication number
ATE536634T1
ATE536634T1 AT03813688T AT03813688T ATE536634T1 AT E536634 T1 ATE536634 T1 AT E536634T1 AT 03813688 T AT03813688 T AT 03813688T AT 03813688 T AT03813688 T AT 03813688T AT E536634 T1 ATE536634 T1 AT E536634T1
Authority
AT
Austria
Prior art keywords
region
gate
semiconductor
source
drain
Prior art date
Application number
AT03813688T
Other languages
English (en)
Inventor
Vincent Venezia
Charles Dachs
Jacob Hooker
Dal Marcus Van
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE536634T1 publication Critical patent/ATE536634T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D64/0112—
    • H10D64/0132—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/015—Manufacture or treatment removing at least parts of gate spacers, e.g. disposable spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/258—Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259—Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H10P30/222—

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Die Bonding (AREA)
AT03813688T 2002-12-20 2003-12-15 Verfahren zur herstellung eines halbleiterbauelements ATE536634T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP02080508 2002-12-20
PCT/IB2003/006009 WO2004057659A1 (en) 2002-12-20 2003-12-15 Method of manufacturing a semiconductor device and semiconductor device obtained with such a method

Publications (1)

Publication Number Publication Date
ATE536634T1 true ATE536634T1 (de) 2011-12-15

Family

ID=32668807

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03813688T ATE536634T1 (de) 2002-12-20 2003-12-15 Verfahren zur herstellung eines halbleiterbauelements

Country Status (8)

Country Link
US (1) US20060152086A1 (de)
EP (1) EP1579488B1 (de)
JP (1) JP2006511083A (de)
KR (1) KR20050084382A (de)
CN (1) CN100390939C (de)
AT (1) ATE536634T1 (de)
AU (1) AU2003303273A1 (de)
WO (1) WO2004057659A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100481185B1 (ko) 2003-07-10 2005-04-07 삼성전자주식회사 완전 게이트 실리사이드화 공정을 사용하여 모스트랜지스터를 제조하는 방법
US7235472B2 (en) 2004-11-12 2007-06-26 Infineon Technologies Ag Method of making fully silicided gate electrode
JP4473741B2 (ja) * 2005-01-27 2010-06-02 株式会社東芝 半導体装置および半導体装置の製造方法
US7399702B2 (en) * 2005-02-01 2008-07-15 Infineon Technologies Ag Methods of forming silicide
US7183169B1 (en) * 2005-03-07 2007-02-27 Advanced Micro Devices, Inc. Method and arrangement for reducing source/drain resistance with epitaxial growth
US7737019B1 (en) * 2005-03-08 2010-06-15 Spansion Llc Method for containing a silicided gate within a sidewall spacer in integrated circuit technology
US7544553B2 (en) 2005-03-30 2009-06-09 Infineon Technologies Ag Integration scheme for fully silicided gate
JP2007027727A (ja) * 2005-07-11 2007-02-01 Interuniv Micro Electronica Centrum Vzw フルシリサイド化ゲートｍｏｓｆｅｔの形成方法及び該方法により得られるデバイス
EP1744351A3 (de) 2005-07-11 2008-11-26 Interuniversitair Microelektronica Centrum ( Imec) Verfahren zur Herstellung von einem MOSFET mit vollsilizidiertem Gatter und dadurch hergestelle Bauelemente
US7723176B2 (en) * 2005-09-01 2010-05-25 Nec Corporation Method for manufacturing semiconductor device
US7297618B1 (en) * 2006-07-28 2007-11-20 International Business Machines Corporation Fully silicided gate electrodes and method of making the same
KR20140131671A (ko) * 2013-05-06 2014-11-14 에스케이하이닉스 주식회사 병렬 구조의 가변 저항 소자
CN105244276B (zh) * 2014-06-12 2018-08-21 中芯国际集成电路制造(上海)有限公司 一种FinFET及其制造方法、电子装置
CN113690134A (zh) * 2020-05-19 2021-11-23 中国科学院微电子研究所 一种金属硅化物的制备方法、半导体器件、电子设备

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KR920002350B1 (ko) * 1987-05-21 1992-03-21 마쯔시다덴기산교 가부시기가이샤 반도체장치의 제조방법
US5352631A (en) * 1992-12-16 1994-10-04 Motorola, Inc. Method for forming a transistor having silicided regions
JP2848757B2 (ja) * 1993-03-19 1999-01-20 シャープ株式会社 電界効果トランジスタおよびその製造方法
JPH07135317A (ja) * 1993-04-22 1995-05-23 Texas Instr Inc <Ti> 自己整合型シリサイドゲート
KR100206878B1 (ko) * 1995-12-29 1999-07-01 구본준 반도체소자 제조방법
US5753557A (en) * 1996-10-07 1998-05-19 Vanguard International Semiconductor Company Bridge-free self aligned silicide process
JP3827839B2 (ja) * 1997-11-27 2006-09-27 富士通株式会社 半導体装置の製造方法
TW418448B (en) * 1998-02-03 2001-01-11 United Microelectronics Corp A method of preventing side metal silicide growth to avoid short-circuit device and its gate structure
US6348390B1 (en) * 1998-02-19 2002-02-19 Acer Semiconductor Manufacturing Corp. Method for fabricating MOSFETS with a recessed self-aligned silicide contact and extended source/drain junctions
US6074922A (en) * 1998-03-13 2000-06-13 Taiwan Semiconductor Manufacturing Company Enhanced structure for salicide MOSFET
US6284612B1 (en) * 1998-03-25 2001-09-04 Texas Instruments - Acer Incorporated Process to fabricate ultra-short channel MOSFETs with self-aligned silicide contact
JPH11284179A (ja) * 1998-03-30 1999-10-15 Sony Corp 半導体装置およびその製造方法
US6069044A (en) * 1998-03-30 2000-05-30 Texas Instruments-Acer Incorporated Process to fabricate ultra-short channel nMOSFETS with self-aligned silicide contact
US6204103B1 (en) * 1998-09-18 2001-03-20 Intel Corporation Process to make complementary silicide metal gates for CMOS technology
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Also Published As

Publication number Publication date
CN100390939C (zh) 2008-05-28
EP1579488B1 (de) 2011-12-07
EP1579488A1 (de) 2005-09-28
KR20050084382A (ko) 2005-08-26
US20060152086A1 (en) 2006-07-13
WO2004057659A1 (en) 2004-07-08
JP2006511083A (ja) 2006-03-30
CN1726582A (zh) 2006-01-25
AU2003303273A1 (en) 2004-07-14

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