ATE531129T1 - Konfigurierbare parallele berechnung von crc- codes (cyclic redundancy check) - Google Patents
Konfigurierbare parallele berechnung von crc- codes (cyclic redundancy check)Info
- Publication number
- ATE531129T1 ATE531129T1 AT07732413T AT07732413T ATE531129T1 AT E531129 T1 ATE531129 T1 AT E531129T1 AT 07732413 T AT07732413 T AT 07732413T AT 07732413 T AT07732413 T AT 07732413T AT E531129 T1 ATE531129 T1 AT E531129T1
- Authority
- AT
- Austria
- Prior art keywords
- error detection
- crc error
- computation
- cyclic redundancy
- redundancy check
- Prior art date
Links
- 238000001514 detection method Methods 0.000 abstract 8
- 238000000034 method Methods 0.000 abstract 5
- 125000004122 cyclic group Chemical group 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
- H03M13/091—Parallel or block-wise CRC computation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6508—Flexibility, adaptability, parametrability and configurability of the implementation
- H03M13/6516—Support of multiple code parameters, e.g. generalized Reed-Solomon decoder for a variety of generator polynomials or Galois fields
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6575—Implementations based on combinatorial logic, e.g. Boolean circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- Logic Circuits (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0607976.8A GB0607976D0 (en) | 2006-04-22 | 2006-04-22 | Apparatus and method for computing an error detection code |
| PCT/GB2007/001371 WO2007122384A1 (en) | 2006-04-22 | 2007-04-13 | Configurable parallel computation of cyclic redundancy check (crc) codes |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE531129T1 true ATE531129T1 (de) | 2011-11-15 |
Family
ID=36581070
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT07732413T ATE531129T1 (de) | 2006-04-22 | 2007-04-13 | Konfigurierbare parallele berechnung von crc- codes (cyclic redundancy check) |
Country Status (10)
| Country | Link |
|---|---|
| US (1) | US8321751B2 (https=) |
| EP (1) | EP2013975B1 (https=) |
| JP (1) | JP2009534895A (https=) |
| KR (1) | KR20090008263A (https=) |
| CN (1) | CN101461140A (https=) |
| AT (1) | ATE531129T1 (https=) |
| GB (1) | GB0607976D0 (https=) |
| IL (1) | IL194807A0 (https=) |
| RU (1) | RU2008145087A (https=) |
| WO (1) | WO2007122384A1 (https=) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8161365B1 (en) * | 2009-01-30 | 2012-04-17 | Xilinx, Inc. | Cyclic redundancy check generator |
| CN101702639B (zh) * | 2009-11-23 | 2012-12-19 | 成都市华为赛门铁克科技有限公司 | 循环冗余校验的校验值计算方法及装置 |
| CN101795175B (zh) * | 2010-02-23 | 2014-03-19 | 中兴通讯股份有限公司 | 数据的校验处理方法及装置 |
| CN101847999B (zh) * | 2010-05-28 | 2012-10-10 | 清华大学 | 一种用循环冗余校验码进行并行校验的方法 |
| CN102546089B (zh) * | 2011-01-04 | 2014-07-16 | 中兴通讯股份有限公司 | 循环冗余校验crc码的实现方法及装置 |
| CN102891685B (zh) * | 2012-09-18 | 2018-06-22 | 国核自仪系统工程有限公司 | 基于fpga的并行循环冗余校验运算电路 |
| CN105099466B (zh) * | 2015-08-17 | 2018-04-17 | 中国航天科技集团公司第九研究院第七七一研究所 | 一种用于128位并行数据的crc校验矩阵生成方法 |
| US10838799B2 (en) * | 2018-08-20 | 2020-11-17 | Micron Technology, Inc. | Parallel error calculation |
| JP6807113B2 (ja) * | 2019-06-07 | 2021-01-06 | ソナス株式会社 | 通信システム、通信方法及び通信装置 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4712215A (en) * | 1985-12-02 | 1987-12-08 | Advanced Micro Devices, Inc. | CRC calculation machine for separate calculation of checkbits for the header packet and data packet |
| JPH0795096A (ja) * | 1993-09-20 | 1995-04-07 | Fujitsu Ltd | プログラマブル並列crc生成装置 |
| JP3256517B2 (ja) * | 1999-04-06 | 2002-02-12 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 符号化回路、回路、パリティ生成方法及び記憶媒体 |
| US6631488B1 (en) * | 2000-06-30 | 2003-10-07 | Agilent Technologies, Inc. | Configurable error detection and correction engine that has a specialized instruction set tailored for error detection and correction tasks |
| US7171604B2 (en) * | 2003-12-30 | 2007-01-30 | Intel Corporation | Method and apparatus for calculating cyclic redundancy check (CRC) on data using a programmable CRC engine |
-
2006
- 2006-04-22 GB GBGB0607976.8A patent/GB0607976D0/en not_active Ceased
-
2007
- 2007-04-13 JP JP2009505948A patent/JP2009534895A/ja not_active Abandoned
- 2007-04-13 WO PCT/GB2007/001371 patent/WO2007122384A1/en not_active Ceased
- 2007-04-13 AT AT07732413T patent/ATE531129T1/de not_active IP Right Cessation
- 2007-04-13 EP EP07732413A patent/EP2013975B1/en active Active
- 2007-04-13 CN CNA2007800208084A patent/CN101461140A/zh active Pending
- 2007-04-13 US US12/298,017 patent/US8321751B2/en active Active
- 2007-04-13 KR KR1020087025838A patent/KR20090008263A/ko not_active Withdrawn
- 2007-04-13 RU RU2008145087/09A patent/RU2008145087A/ru not_active Application Discontinuation
-
2008
- 2008-10-22 IL IL194807A patent/IL194807A0/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| GB0607976D0 (en) | 2006-05-31 |
| EP2013975B1 (en) | 2011-10-26 |
| EP2013975A1 (en) | 2009-01-14 |
| IL194807A0 (en) | 2009-09-22 |
| JP2009534895A (ja) | 2009-09-24 |
| KR20090008263A (ko) | 2009-01-21 |
| CN101461140A (zh) | 2009-06-17 |
| WO2007122384A1 (en) | 2007-11-01 |
| US20100058154A1 (en) | 2010-03-04 |
| RU2008145087A (ru) | 2010-05-27 |
| US8321751B2 (en) | 2012-11-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE531129T1 (de) | Konfigurierbare parallele berechnung von crc- codes (cyclic redundancy check) | |
| CY1124321T1 (el) | Mεθοδος και διαταξη για εγκωδικευση και αποκωδικευση καναλιου σε συστημα επικοινωνιας που χρησιμοποιει κωδικες εξελεγχου ισοτιμιας χαμηλης πυκνοτητας | |
| ATE535865T1 (de) | Halbleiterspeichervorrichtung und steuerungsverfahren dafür | |
| EP2309426A4 (en) | PROCESS FOR CODING A TWO-DIMENSIONAL BARCODE, DECODING METHOD AND DEVICE AND FINAL DEVICE | |
| CY1120897T1 (el) | Μεθοδος και αποκωδικοποιηση πληροφοριων κινησης | |
| DK2237514T3 (da) | Fremgangsmåde og apparat til indkodning og afsendelse af styreinformation i et kommunikationssystem | |
| EP3917220A4 (en) | TERMINAL AND ITS AWAKENING METHOD, LOGISTICS SYSTEM DATA REPORTING METHOD AND ASSOCIATED SYSTEM | |
| ATE371926T1 (de) | Audiocodierung mit verschiedenen codierungsmodellen | |
| MX386333B (es) | Dispositivo de procesamiento de datos y método de procesamiento de datos. | |
| ATE516540T1 (de) | Datenvalidierung mittels prozessorbefehlen | |
| ATE536584T1 (de) | Fehlerbeständige berechnungen auf elliptischen kurven | |
| MX2015009838A (es) | Dispositivo para el procesamiento de datos y metodo para el procesamiento de datos. | |
| DK3307982T3 (da) | Forankringsmodul, af et hus omsluttet spydarrangement og fremgangsmåde til betjening af et af et hus omsluttet spydarrangement i et borehul | |
| RU2010135817A (ru) | Реконфигурируемый декодер кодов бчх | |
| DE502006003845D1 (de) | Verfahren zum betreiben eines feldgerätes der automatisierungstechnik mit sonderfunktionalitäten | |
| JP2009534895A5 (https=) | ||
| WO2014113219A3 (en) | Systems and methods for locating a public facility | |
| MX2020004656A (es) | Transmisor y metodo de acortamiento del mismo. | |
| ATE403185T1 (de) | Redundanzkontrollverfahren und vorrichtung für sichere rechnereinheiten | |
| MX2015009939A (es) | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. | |
| SE0200639D0 (sv) | Alarm path monitoring | |
| ATE370596T1 (de) | Datenausgabesystem | |
| SG131921A1 (en) | Method and device for generating image code and method and device for decoding image code | |
| DK2226501T4 (da) | Fremgangsmåde og anordning til måling af et vindenergianlæg | |
| RU2013109295A (ru) | Устройство для конфигурирования по меньшей мере одного прибора системотехники здания или связи с дверной станцией |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |