MX386333B - Dispositivo de procesamiento de datos y método de procesamiento de datos. - Google Patents
Dispositivo de procesamiento de datos y método de procesamiento de datos.Info
- Publication number
- MX386333B MX386333B MX2016016986A MX2016016986A MX386333B MX 386333 B MX386333 B MX 386333B MX 2016016986 A MX2016016986 A MX 2016016986A MX 2016016986 A MX2016016986 A MX 2016016986A MX 386333 B MX386333 B MX 386333B
- Authority
- MX
- Mexico
- Prior art keywords
- data processing
- ldpc
- bits
- information
- ldpc code
- Prior art date
Links
- 238000003672 processing method Methods 0.000 title abstract 2
- 239000011159 matrix material Substances 0.000 abstract 7
- 230000002349 favourable effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1177—Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
- H03M13/615—Use of computational or mathematical techniques
- H03M13/616—Matrix operations, especially for generator matrices or check matrices, e.g. column or row permutations
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- General Physics & Mathematics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Multimedia (AREA)
- Algebra (AREA)
- Computing Systems (AREA)
- Error Detection And Correction (AREA)
Abstract
Esta tecnología pertenece a un dispositivo de procesamiento de datos y método de procesamiento de datos que son capaces de proporcionar un código de LDPC que tiene una tasa de error favorable. Este codificador de LDPC codifica en una longitud de código de 64,800 bits y una tasa de codificación de LDPC de 2/30, 3/30, 4/30, 5/30, o 6/30. El código de LDPC contiene bits de información y bits de paridad y una matriz de comprobación (H) se configura a partir de una sección de matriz de información que corresponde a los bits de información del código de LDPC y una sección de matriz de paridad que corresponde a los bits de paridad. La sección de matriz de información de la matriz de comprobación (H) se representa por una tabla de valores iniciales de matriz de comprobación de paridad que expresa la posición de un elemento de la sección de matriz para cada 360 columnas. Esta tecnología puede aplicar en casos cuando se lleva a cabo codificación de LDPC y descodificación de LDPC.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2013023879 | 2013-02-08 | ||
| PCT/JP2014/051620 WO2014123014A1 (ja) | 2013-02-08 | 2014-01-27 | データ処理装置、及びデータ処理方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MX386333B true MX386333B (es) | 2025-03-18 |
Family
ID=51299611
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2016016986A MX386333B (es) | 2013-02-08 | 2014-01-27 | Dispositivo de procesamiento de datos y método de procesamiento de datos. |
| MX2015009839A MX2015009839A (es) | 2013-02-08 | 2014-01-27 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2015009839A MX2015009839A (es) | 2013-02-08 | 2014-01-27 | Dispositivo de procesamiento de datos y metodo de procesamiento de datos. |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US20160043737A1 (es) |
| EP (1) | EP2955852A4 (es) |
| JP (1) | JPWO2014123014A1 (es) |
| KR (1) | KR102092172B1 (es) |
| CN (1) | CN104969477B (es) |
| BR (1) | BR112015018430B1 (es) |
| CA (1) | CA2900007C (es) |
| MX (2) | MX386333B (es) |
| WO (1) | WO2014123014A1 (es) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102091562B1 (ko) * | 2013-02-08 | 2020-04-14 | 소니 주식회사 | 데이터 처리 장치, 및 데이터 처리 방법 |
| EP3442128B1 (en) * | 2013-02-08 | 2023-08-02 | Saturn Licensing LLC | Ldpc codes of length 64800 suitable for dvb-s2x transmission systems |
| CA2868419C (en) * | 2013-02-08 | 2023-03-14 | Sony Corporation | Data processing apparatus and data processing method |
| JPWO2014123016A1 (ja) * | 2013-02-08 | 2017-02-02 | サターン ライセンシング エルエルシーＳａｔｕｒｎ Ｌｉｃｅｎｓｉｎｇ ＬＬＣ | データ処理装置、及びデータ処理方法 |
| KR20160060026A (ko) * | 2013-09-20 | 2016-05-27 | 소니 주식회사 | 데이터 처리 장치 및 데이터 처리 방법 |
| CN109155635A (zh) * | 2016-06-14 | 2019-01-04 | 华为技术有限公司 | 一种信号传输的方法、发射端及接收端 |
| US11163565B2 (en) | 2017-03-20 | 2021-11-02 | Intel Corporation | Systems, methods, and apparatuses for dot production operations |
| CN107172386B (zh) * | 2017-05-09 | 2018-06-29 | 西安科技大学 | 一种基于计算机视觉的非接触式数据传输方法 |
| CN110516713A (zh) * | 2019-08-02 | 2019-11-29 | 阿里巴巴集团控股有限公司 | 一种目标群体识别方法、装置及设备 |
| CN111464188B (zh) * | 2020-03-19 | 2023-10-24 | 中科南京移动通信与计算创新研究院 | 一种dvb-s2 ldpc编译码校验矩阵的存储结构及方法 |
| CN116596284B (zh) * | 2023-07-18 | 2023-09-26 | 益企商旅(山东)科技服务有限公司 | 基于客户需求的差旅决策管理方法及系统 |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1418675B1 (en) * | 2002-10-29 | 2019-12-25 | Samsung Electronics Co., Ltd. | Method and apparatus for deinterleaving interleaved data stream in a communication system |
| JP4224777B2 (ja) | 2003-05-13 | 2009-02-18 | ソニー株式会社 | 復号方法および復号装置、並びにプログラム |
| US7234098B2 (en) * | 2003-10-27 | 2007-06-19 | The Directv Group, Inc. | Method and apparatus for providing reduced memory low density parity check (LDPC) codes |
| KR20060097503A (ko) * | 2005-03-11 | 2006-09-14 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널인터리빙/디인터리빙 장치 및 그 제어 방법 |
| CN100558026C (zh) * | 2005-12-16 | 2009-11-04 | 清华大学 | 一种信号交织图案的生成方法 |
| EP2405584B1 (en) * | 2007-10-30 | 2016-04-06 | Sony Corporation | Data processing apparatus and methods |
| TWI390856B (zh) * | 2007-11-26 | 2013-03-21 | Sony Corp | Data processing device and data processing method |
| TWI410055B (zh) * | 2007-11-26 | 2013-09-21 | Sony Corp | Data processing device, data processing method and program product for performing data processing method on computer |
| PL2509270T3 (pl) * | 2007-11-26 | 2017-09-29 | Sony Corporation | Urządzenie do dekodowania i sposób dla kodu LDPC 64K o współczynniku 2/3 |
| TWI459724B (zh) * | 2007-11-26 | 2014-11-01 | Sony Corp | Data processing device and data processing method |
| TWI538415B (zh) * | 2007-11-26 | 2016-06-11 | Sony Corp | Data processing device and data processing method |
| TWI497920B (zh) * | 2007-11-26 | 2015-08-21 | Sony Corp | Data processing device and data processing method |
| EP2093887B1 (en) * | 2008-02-18 | 2013-08-28 | Samsung Electronics Co., Ltd. | Apparatus and method for channel encoding and decoding in a communication system using low-density parity-check codes |
| KR101027873B1 (ko) * | 2008-12-16 | 2011-04-07 | 윤일식 | 엘리베이터 도어의 유리판 고정장치 |
| US8726137B2 (en) * | 2009-02-02 | 2014-05-13 | Telefonaktiebolaget L M Ericsson (Publ) | Encoding and decoding methods for expurgated convolutional codes and convolutional turbo codes |
| JP2011176782A (ja) * | 2010-02-26 | 2011-09-08 | Sony Corp | データ処理装置、及びデータ処理方法 |
| JP5505725B2 (ja) * | 2010-09-16 | 2014-05-28 | ソニー株式会社 | データ処理装置、及びデータ処理方法 |
| KR101702358B1 (ko) * | 2011-01-06 | 2017-02-03 | 삼성전자주식회사 | 저밀도 패리티 검사 코드를 사용하는 통신 시스템에서의 채널 부호화/복호화 방법 및 장치 |
| JP2012147197A (ja) * | 2011-01-11 | 2012-08-02 | Panasonic Corp | 通信装置、通信方法、及び通信プログラム |
| CA2868419C (en) * | 2013-02-08 | 2023-03-14 | Sony Corporation | Data processing apparatus and data processing method |
-
2014
- 2014-01-27 BR BR112015018430-8A patent/BR112015018430B1/pt active IP Right Grant
- 2014-01-27 MX MX2016016986A patent/MX386333B/es unknown
- 2014-01-27 US US14/762,966 patent/US20160043737A1/en not_active Abandoned
- 2014-01-27 CA CA2900007A patent/CA2900007C/en active Active
- 2014-01-27 CN CN201480007093.9A patent/CN104969477B/zh active Active
- 2014-01-27 EP EP14748905.8A patent/EP2955852A4/en not_active Withdrawn
- 2014-01-27 WO PCT/JP2014/051620 patent/WO2014123014A1/ja not_active Ceased
- 2014-01-27 KR KR1020157020666A patent/KR102092172B1/ko active Active
- 2014-01-27 JP JP2014560718A patent/JPWO2014123014A1/ja active Pending
- 2014-01-27 MX MX2015009839A patent/MX2015009839A/es not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| WO2014123014A1 (ja) | 2014-08-14 |
| BR112015018430A2 (pt) | 2017-07-18 |
| KR20150116831A (ko) | 2015-10-16 |
| US20160043737A1 (en) | 2016-02-11 |
| CN104969477B (zh) | 2019-06-04 |
| CA2900007C (en) | 2023-01-24 |
| MX2015009839A (es) | 2015-12-01 |
| KR102092172B1 (ko) | 2020-04-14 |
| BR112015018430B1 (pt) | 2022-02-15 |
| CN104969477A (zh) | 2015-10-07 |
| EP2955852A4 (en) | 2016-08-24 |
| CA2900007A1 (en) | 2014-08-14 |
| EP2955852A1 (en) | 2015-12-16 |
| JPWO2014123014A1 (ja) | 2017-02-02 |
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