ATE515029T1 - Gestapelte speichervorrichtung und verfahren dafür - Google Patents
Gestapelte speichervorrichtung und verfahren dafürInfo
- Publication number
- ATE515029T1 ATE515029T1 AT09172675T AT09172675T ATE515029T1 AT E515029 T1 ATE515029 T1 AT E515029T1 AT 09172675 T AT09172675 T AT 09172675T AT 09172675 T AT09172675 T AT 09172675T AT E515029 T1 ATE515029 T1 AT E515029T1
- Authority
- AT
- Austria
- Prior art keywords
- memory
- address information
- circuit unit
- active circuit
- stacked
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0023—Address circuits or decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/70—Resistive array aspects
- G11C2213/71—Three dimensional array
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020080099778A KR20100040580A (ko) | 2008-10-10 | 2008-10-10 | 적층 메모리 소자 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE515029T1 true ATE515029T1 (de) | 2011-07-15 |
Family
ID=41572366
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT09172675T ATE515029T1 (de) | 2008-10-10 | 2009-10-09 | Gestapelte speichervorrichtung und verfahren dafür |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8547719B2 (de) |
| EP (2) | EP2357653A3 (de) |
| JP (1) | JP2010092580A (de) |
| KR (1) | KR20100040580A (de) |
| AT (1) | ATE515029T1 (de) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010263211A (ja) | 2009-05-04 | 2010-11-18 | Samsung Electronics Co Ltd | 積層メモリ素子 |
| JP2011134405A (ja) * | 2009-12-25 | 2011-07-07 | Samsung Electronics Co Ltd | 不揮発性メモリ |
| JP5289353B2 (ja) | 2010-02-05 | 2013-09-11 | 株式会社東芝 | 半導体記憶装置 |
| TW201207852A (en) * | 2010-04-05 | 2012-02-16 | Mosaid Technologies Inc | Semiconductor memory device having a three-dimensional structure |
| KR101738533B1 (ko) * | 2010-05-24 | 2017-05-23 | 삼성전자 주식회사 | 적층 메모리 장치 및 그 제조 방법 |
| US8582373B2 (en) | 2010-08-31 | 2013-11-12 | Micron Technology, Inc. | Buffer die in stacks of memory dies and methods |
| US8730754B2 (en) * | 2011-04-12 | 2014-05-20 | Micron Technology, Inc. | Memory apparatus and system with shared wordline decoder |
| US8996822B2 (en) | 2011-07-29 | 2015-03-31 | Micron Technology, Inc. | Multi-device memory serial architecture |
| KR20130059912A (ko) * | 2011-11-29 | 2013-06-07 | 에스케이하이닉스 주식회사 | 반도체 장치 |
| US9558791B2 (en) * | 2013-12-05 | 2017-01-31 | Taiwan Semiconductor Manufacturing Company Limited | Three-dimensional static random access memory device structures |
| US10446193B2 (en) * | 2014-04-14 | 2019-10-15 | HangZhou HaiCun Information Technology Co., Ltd. | Mixed three-dimensional memory |
| EP3985861A1 (de) | 2015-05-01 | 2022-04-20 | Blackburn Energy, Inc. | Verfahren und system zur notstromerzeugung |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06167958A (ja) | 1991-03-28 | 1994-06-14 | Texas Instr Inc <Ti> | 記憶装置 |
| KR19990034768A (ko) | 1997-10-30 | 1999-05-15 | 윤종용 | 프리디코더를 구비한 반도체 메모리장치 |
| KR100301047B1 (ko) | 1998-10-02 | 2001-09-06 | 윤종용 | 2비트프리페치용칼럼어드레스디코더를갖는반도체메모리장치 |
| JP2000268561A (ja) | 1999-03-18 | 2000-09-29 | Toshiba Microelectronics Corp | 半導体記憶装置 |
| KR100295598B1 (ko) | 1999-05-03 | 2001-07-12 | 윤종용 | 반도체 메모리 장치 및 그 장치의 디코더 |
| US6567287B2 (en) | 2001-03-21 | 2003-05-20 | Matrix Semiconductor, Inc. | Memory device with row and column decoder circuits arranged in a checkerboard pattern under a plurality of memory arrays |
| KR100387527B1 (ko) | 2001-05-23 | 2003-06-27 | 삼성전자주식회사 | 레이아웃 사이즈가 감소된 로우 디코더를 갖는 불휘발성반도체 메모리장치 |
| KR100408720B1 (ko) | 2001-06-28 | 2003-12-11 | 주식회사 하이닉스반도체 | 반도체 메모리 소자의 디코더회로 |
| JP2003037170A (ja) | 2001-07-23 | 2003-02-07 | Niigata Seimitsu Kk | 集積回路 |
| US6504742B1 (en) | 2001-10-31 | 2003-01-07 | Hewlett-Packard Company | 3-D memory device for large storage capacity |
| KR100481857B1 (ko) | 2002-08-14 | 2005-04-11 | 삼성전자주식회사 | 레이아웃 면적을 줄이고 뱅크 마다 독립적인 동작을수행할 수 있는 디코더를 갖는 플레쉬 메모리 장치 |
| JP4419049B2 (ja) * | 2003-04-21 | 2010-02-24 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
| US7262463B2 (en) | 2003-07-25 | 2007-08-28 | Hewlett-Packard Development Company, L.P. | Transistor including a deposited channel region having a doped portion |
| EP2204813B1 (de) | 2004-05-03 | 2012-09-19 | Unity Semiconductor Corporation | Nicht-flüchtiger programmierbarer Speicher |
| KR100587168B1 (ko) | 2004-09-23 | 2006-06-08 | 삼성전자주식회사 | 스택뱅크 구조를 갖는 반도체 메모리 장치 및 그것의워드라인 구동 방법 |
| US7327600B2 (en) * | 2004-12-23 | 2008-02-05 | Unity Semiconductor Corporation | Storage controller for multiple configurations of vertical memory |
| US7554873B2 (en) * | 2005-03-21 | 2009-06-30 | Macronix International Co., Ltd. | Three-dimensional memory devices and methods of manufacturing and operating the same |
| JP4850457B2 (ja) | 2005-09-06 | 2012-01-11 | キヤノン株式会社 | 薄膜トランジスタ及び薄膜ダイオード |
| EP2037461A3 (de) | 2007-09-12 | 2009-10-28 | Samsung Electronics Co., Ltd. | Mehrschichtige Speichervorrichtungen |
| JP5489445B2 (ja) | 2007-11-15 | 2014-05-14 | 富士フイルム株式会社 | 薄膜電界効果型トランジスタおよびそれを用いた表示装置 |
| KR20100038986A (ko) * | 2008-10-07 | 2010-04-15 | 삼성전자주식회사 | 산화물 박막 트랜지스터를 포함하는 적층 메모리 장치 |
| KR101566407B1 (ko) * | 2009-03-25 | 2015-11-05 | 삼성전자주식회사 | 적층 메모리 소자 |
-
2008
- 2008-10-10 KR KR1020080099778A patent/KR20100040580A/ko not_active Application Discontinuation
-
2009
- 2009-10-09 EP EP11162613A patent/EP2357653A3/de not_active Withdrawn
- 2009-10-09 JP JP2009235198A patent/JP2010092580A/ja active Pending
- 2009-10-09 US US12/588,275 patent/US8547719B2/en active Active
- 2009-10-09 EP EP09172675A patent/EP2175453B1/de active Active
- 2009-10-09 AT AT09172675T patent/ATE515029T1/de not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP2175453A1 (de) | 2010-04-14 |
| US8547719B2 (en) | 2013-10-01 |
| JP2010092580A (ja) | 2010-04-22 |
| EP2357653A2 (de) | 2011-08-17 |
| US20100091541A1 (en) | 2010-04-15 |
| EP2357653A3 (de) | 2012-04-11 |
| EP2175453B1 (de) | 2011-06-29 |
| KR20100040580A (ko) | 2010-04-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |