ATE451767T1 - Verfahren und vorrichtung zur bitfehlerratenanalyse - Google Patents

Verfahren und vorrichtung zur bitfehlerratenanalyse

Info

Publication number
ATE451767T1
ATE451767T1 AT03754944T AT03754944T ATE451767T1 AT E451767 T1 ATE451767 T1 AT E451767T1 AT 03754944 T AT03754944 T AT 03754944T AT 03754944 T AT03754944 T AT 03754944T AT E451767 T1 ATE451767 T1 AT E451767T1
Authority
AT
Austria
Prior art keywords
error rate
bit error
data signal
rate analysis
test instrument
Prior art date
Application number
AT03754944T
Other languages
English (en)
Inventor
Lawrence Salant
Thierry Campiche
Martin Miller
Michael Schnecker
Original Assignee
Lecroy Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lecroy Corp filed Critical Lecroy Corp
Application granted granted Critical
Publication of ATE451767T1 publication Critical patent/ATE451767T1/de

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/24Testing correct operation
    • H04L1/242Testing correct operation by comparing a transmitted test signal with a locally generated replica
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/20Arrangements for detecting or preventing errors in the information received using signal quality detector
    • H04L1/203Details of error rate determination, e.g. BER, FER or WER
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0016Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0334Processing of samples having at least three levels, e.g. soft decisions

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Quality & Reliability (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Dc Digital Transmission (AREA)
AT03754944T 2002-09-30 2003-09-30 Verfahren und vorrichtung zur bitfehlerratenanalyse ATE451767T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US41515502P 2002-09-30 2002-09-30
US10/673,712 US7519874B2 (en) 2002-09-30 2003-09-29 Method and apparatus for bit error rate analysis
PCT/US2003/030544 WO2004032405A1 (en) 2002-09-30 2003-09-30 Method and apparatus for bit error rate analysis

Publications (1)

Publication Number Publication Date
ATE451767T1 true ATE451767T1 (de) 2009-12-15

Family

ID=32073356

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03754944T ATE451767T1 (de) 2002-09-30 2003-09-30 Verfahren und vorrichtung zur bitfehlerratenanalyse

Country Status (7)

Country Link
US (1) US7519874B2 (de)
EP (1) EP1547294B1 (de)
JP (1) JP2006512798A (de)
AT (1) ATE451767T1 (de)
AU (1) AU2003272743A1 (de)
DE (1) DE60330474D1 (de)
WO (1) WO2004032405A1 (de)

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US7519874B2 (en) 2002-09-30 2009-04-14 Lecroy Corporation Method and apparatus for bit error rate analysis
US7437624B2 (en) * 2002-09-30 2008-10-14 Lecroy Corporation Method and apparatus for analyzing serial data streams
US7434113B2 (en) * 2002-09-30 2008-10-07 Lecroy Corporation Method of analyzing serial data streams
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JP5161444B2 (ja) * 2006-08-11 2013-03-13 テクトロニクス・インコーポレイテッド ジッタ特性分析プログラム及びジッタ特性の表又はグラフ表示方法
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JP5154585B2 (ja) * 2010-01-12 2013-02-27 アンリツ株式会社 誤り率測定装置及び方法
JP5290213B2 (ja) * 2010-01-12 2013-09-18 アンリツ株式会社 誤り率測定装置及び方法
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CN104243222A (zh) * 2013-06-06 2014-12-24 鸿富锦精密工业(深圳)有限公司 网络设备性能测试方法及测试装置和测试系统
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CN109859788B (zh) * 2019-02-23 2021-04-16 浙江大学 阻式存储器的误码率测试方法
JP7381532B2 (ja) * 2021-09-08 2023-11-15 アンリツ株式会社 誤り率測定装置及びコードワードエラー表示方法

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Also Published As

Publication number Publication date
US20040123191A1 (en) 2004-06-24
JP2006512798A (ja) 2006-04-13
AU2003272743A1 (en) 2004-04-23
US7519874B2 (en) 2009-04-14
WO2004032405A1 (en) 2004-04-15
EP1547294A4 (de) 2007-09-05
DE60330474D1 (de) 2010-01-21
EP1547294B1 (de) 2009-12-09
EP1547294A1 (de) 2005-06-29

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