ATE276572T1 - Benutzung eines sdram's als speicher zur fehlerkorrektur und spurpufferung in frontend- ic's von optischen aufzeichnungs- oder wiedergabevorrichtungen - Google Patents

Benutzung eines sdram's als speicher zur fehlerkorrektur und spurpufferung in frontend- ic's von optischen aufzeichnungs- oder wiedergabevorrichtungen

Info

Publication number
ATE276572T1
ATE276572T1 AT00985157T AT00985157T ATE276572T1 AT E276572 T1 ATE276572 T1 AT E276572T1 AT 00985157 T AT00985157 T AT 00985157T AT 00985157 T AT00985157 T AT 00985157T AT E276572 T1 ATE276572 T1 AT E276572T1
Authority
AT
Austria
Prior art keywords
sdram
memory
optical recording
error correction
playback devices
Prior art date
Application number
AT00985157T
Other languages
English (en)
Inventor
Marten Kabutz
Richard Rutschmann
Lothar Freissmann
Original Assignee
Thomson Licensing Sa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing Sa filed Critical Thomson Licensing Sa
Application granted granted Critical
Publication of ATE276572T1 publication Critical patent/ATE276572T1/de

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/18Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1866Error detection or correction; Testing, e.g. of drop-outs by interleaving
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10527Audio or video recording; Data buffering arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656Data buffering arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • H01L2924/143Digital devices
    • H01L2924/1434Memory
    • H01L2924/1435Random access memory [RAM]
    • H01L2924/1436Dynamic random-access memory [DRAM]
    • H01L2924/14361Synchronous dynamic random access memory [SDRAM]
AT00985157T 1999-12-17 2000-12-12 Benutzung eines sdram's als speicher zur fehlerkorrektur und spurpufferung in frontend- ic's von optischen aufzeichnungs- oder wiedergabevorrichtungen ATE276572T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP99125206 1999-12-17
PCT/EP2000/012551 WO2001045101A2 (en) 1999-12-17 2000-12-12 USAGE OF AN SDRAM AS STORAGE FOR CORRECTION AND TRACK BUFFERING IN FRONTEND ICs OF OPTICAL RECORDING OR REPRODUCTION DEVICES

Publications (1)

Publication Number Publication Date
ATE276572T1 true ATE276572T1 (de) 2004-10-15

Family

ID=8239645

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00985157T ATE276572T1 (de) 1999-12-17 2000-12-12 Benutzung eines sdram's als speicher zur fehlerkorrektur und spurpufferung in frontend- ic's von optischen aufzeichnungs- oder wiedergabevorrichtungen

Country Status (14)

Country Link
US (1) US7346830B2 (de)
EP (1) EP1245027B1 (de)
JP (1) JP2003517173A (de)
KR (1) KR100751475B1 (de)
CN (1) CN1218314C (de)
AT (1) ATE276572T1 (de)
AU (1) AU776026B2 (de)
DE (1) DE60013904T2 (de)
DK (1) DK1245027T3 (de)
ES (1) ES2228645T3 (de)
MX (1) MXPA02005837A (de)
PL (1) PL356023A1 (de)
PT (1) PT1245027E (de)
WO (1) WO2001045101A2 (de)

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US7395488B2 (en) * 2004-12-29 2008-07-01 Zoran Corporation System and method for efficient use of memory device bandwidth
US7802169B2 (en) * 2005-12-12 2010-09-21 Mediatek Inc. Error correction devices and correction methods
US8074153B2 (en) * 2005-12-12 2011-12-06 Mediatek Inc. Error correction devices and correction methods
TWM299458U (en) * 2006-04-21 2006-10-11 Taiwan Microloops Corp Heat spreader with composite micro-structure
US7689894B2 (en) 2006-05-11 2010-03-30 Mediatek Inc. Decoding apparatus and method therefor
US7916866B2 (en) * 2006-05-19 2011-03-29 Mediatek, Inc. Apparatus for descrambling a data retrieved from an optical storage medium, and method therefor
KR20080036838A (ko) * 2006-10-24 2008-04-29 삼성전자주식회사 광정보저장매체 재생/기록 장치의 에러 정정 방법
US10509577B2 (en) * 2014-06-05 2019-12-17 Pure Storage, Inc. Reliable storage in a dispersed storage network

Family Cites Families (20)

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Publication number Priority date Publication date Assignee Title
GB2276255A (en) * 1993-02-17 1994-09-21 Andor Int Ltd Track buffer with embedded error data
JP3284900B2 (ja) * 1996-10-18 2002-05-20 松下電器産業株式会社 データ復号方法
US5974514A (en) * 1996-11-12 1999-10-26 Hewlett-Packard Controlling SDRAM memory by using truncated burst read-modify-write memory operations
KR100217181B1 (ko) * 1997-01-21 1999-09-01 윤종용 데이타 고속 전송을 위한 시스템 디코더 및 트랙버퍼링 제어방법
KR100233722B1 (ko) * 1997-02-20 1999-12-01 윤종용 디지털 비디오 디스크 재생장치의 디지털신호처리부 테스트장치
JP3834922B2 (ja) * 1997-04-08 2006-10-18 ソニー株式会社 エラー訂正装置および方法
US6278645B1 (en) * 1997-04-11 2001-08-21 3Dlabs Inc., Ltd. High speed video frame buffer
US5896346A (en) * 1997-08-21 1999-04-20 International Business Machines Corporation High speed and low cost SDRAM memory subsystem
JPH1186464A (ja) * 1997-09-05 1999-03-30 Victor Co Of Japan Ltd 信号処理装置
JPH1198462A (ja) * 1997-09-19 1999-04-09 Hitachi Ltd データ再生装置
JPH11110919A (ja) * 1997-09-30 1999-04-23 Victor Co Of Japan Ltd ディジタル信号記録方式及び記録媒体
EP0917143B1 (de) * 1997-11-11 2004-01-02 Deutsche Thomson-Brandt Gmbh Verfahren und Vorrichtung zur Datenstrompuffersteuerung
JP3307579B2 (ja) * 1998-01-28 2002-07-24 インターナショナル・ビジネス・マシーンズ・コーポレーション データ記憶システム
US6587896B1 (en) * 1998-02-27 2003-07-01 Micron Technology, Inc. Impedance matching device for high speed memory bus
CN100447882C (zh) * 1998-05-06 2008-12-31 汤姆森特许公司 重放位流的处理
JPH11328677A (ja) * 1998-05-20 1999-11-30 Sony Corp 再生装置
US6272153B1 (en) * 1998-06-26 2001-08-07 Lsi Logic Corporation DVD audio decoder having a central sync-controller architecture
US6330626B1 (en) * 1999-05-05 2001-12-11 Qlogic Corporation Systems and methods for a disk controller memory architecture
US6754858B2 (en) * 2001-03-29 2004-06-22 International Business Machines Corporation SDRAM address error detection method and apparatus
US6868519B2 (en) * 2001-04-23 2005-03-15 Lucent Technologies Inc. Reducing scintillation effects for optical free-space transmission

Also Published As

Publication number Publication date
CN1218314C (zh) 2005-09-07
EP1245027A2 (de) 2002-10-02
DE60013904D1 (de) 2004-10-21
US7346830B2 (en) 2008-03-18
MXPA02005837A (es) 2005-07-01
JP2003517173A (ja) 2003-05-20
DE60013904T2 (de) 2005-09-29
KR100751475B1 (ko) 2007-08-23
WO2001045101A3 (en) 2001-11-08
ES2228645T3 (es) 2005-04-16
US20020191967A1 (en) 2002-12-19
KR20020059799A (ko) 2002-07-13
AU2166301A (en) 2001-06-25
AU776026B2 (en) 2004-08-26
PL356023A1 (en) 2004-05-31
CN1409856A (zh) 2003-04-09
PT1245027E (pt) 2005-01-31
EP1245027B1 (de) 2004-09-15
DK1245027T3 (da) 2004-11-15
WO2001045101A2 (en) 2001-06-21

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