ATE217987T1 - Seriell zugreifbare speichervorrichtung mit hoher fehlerkorrigierbarkeit - Google Patents

Seriell zugreifbare speichervorrichtung mit hoher fehlerkorrigierbarkeit

Info

Publication number
ATE217987T1
ATE217987T1 AT96104260T AT96104260T ATE217987T1 AT E217987 T1 ATE217987 T1 AT E217987T1 AT 96104260 T AT96104260 T AT 96104260T AT 96104260 T AT96104260 T AT 96104260T AT E217987 T1 ATE217987 T1 AT E217987T1
Authority
AT
Austria
Prior art keywords
correctability
memory device
access memory
row
high error
Prior art date
Application number
AT96104260T
Other languages
German (de)
English (en)
Inventor
Basse Paul-Werner Von
Michael Dr Bollu
Roland Thewes
Doris Dr Schmitt-Landsiedel
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Application granted granted Critical
Publication of ATE217987T1 publication Critical patent/ATE217987T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/86—Masking faults in memories by using spares or by reconfiguring in serial access memories, e.g. shift registers, CCDs, bubble memories
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Dram (AREA)
AT96104260T 1995-04-05 1996-03-15 Seriell zugreifbare speichervorrichtung mit hoher fehlerkorrigierbarkeit ATE217987T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19512791 1995-04-05

Publications (1)

Publication Number Publication Date
ATE217987T1 true ATE217987T1 (de) 2002-06-15

Family

ID=7758876

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96104260T ATE217987T1 (de) 1995-04-05 1996-03-15 Seriell zugreifbare speichervorrichtung mit hoher fehlerkorrigierbarkeit

Country Status (7)

Country Link
US (1) US5751742A (forum.php)
EP (1) EP0738974B1 (forum.php)
JP (1) JP3850484B2 (forum.php)
KR (1) KR100409113B1 (forum.php)
AT (1) ATE217987T1 (forum.php)
DE (1) DE59609221D1 (forum.php)
TW (1) TW312763B (forum.php)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100417450B1 (ko) * 1995-09-13 2004-03-19 지멘스 악티엔게젤샤프트 연속적으로동작하는디지털메모리의특정라인에대한점프형어드레싱장치
TW399219B (en) * 1997-09-26 2000-07-21 Siemens Ag Pointer-circuit with small space requirement, higher speed and smaller power loss
DE602004020887D1 (de) * 2003-05-22 2009-06-10 Nxp Bv Test von ram addressdekodierern auf widerstandsbehaftete leiterunterbrechungen

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812336A (en) * 1972-12-18 1974-05-21 Ibm Dynamic address translation scheme using orthogonal squares
JPS58139399A (ja) * 1982-02-15 1983-08-18 Hitachi Ltd 半導体記憶装置
EP0189699B1 (en) * 1984-12-26 1992-09-30 STMicroelectronics, Inc. Interdigitated bit line rom
JP2852049B2 (ja) * 1987-05-06 1999-01-27 日本電気アイシーマイコンシステム株式会社 シリアル列選択回路
JP2816512B2 (ja) * 1992-07-27 1998-10-27 三菱電機株式会社 半導体記憶装置

Also Published As

Publication number Publication date
US5751742A (en) 1998-05-12
KR100409113B1 (ko) 2004-03-18
JP3850484B2 (ja) 2006-11-29
JPH08287699A (ja) 1996-11-01
KR960038976A (ko) 1996-11-21
EP0738974A2 (de) 1996-10-23
EP0738974A3 (de) 1999-06-02
DE59609221D1 (de) 2002-06-27
TW312763B (forum.php) 1997-08-11
EP0738974B1 (de) 2002-05-22

Similar Documents

Publication Publication Date Title
KR920006997A (ko) 용장회로(冗長回路)
KR900005451A (ko) 반도체메모리장치
TWI318407B (en) Cubic memory array, method of creating a memory circuit, and circuit including a memory device
KR890002886A (ko) 반도체 기억장치
EP0165612A3 (en) Memory circuit having a plurality of cell arrays
MY126198A (en) Memory device with row and column decoder circuits arranged in a checkerboard pattern under a plurality of memory arrays
KR910003515A (ko) 단순화된 동기적 메시 프로세서
EP0398067A3 (en) Combined multiple memories
WO2002061752A3 (en) Mram architecture and system
DE69412230D1 (de) Verfahren zur Programmierung von Redundanzregistern in einer Spaltenredundanzschaltung für einen Halbleiterspeicherbaustein
KR890008836A (ko) 메모리 장치
CA2007312A1 (en) Parallel time slot interchanger matrix and switch block module for use therewith
EP0337433A3 (en) Cell array pattern layout of semiconductor memory device
EP0270028A3 (en) Dual port memory device with improved serial access scheme
EP0290042A3 (en) Memory circuit with improved serial addressing scheme
ATE53271T1 (de) Videosignalspeicher.
TW374178B (en) A semiconductor memory device, and a data reading method and a data writing method therefor
TW342474B (en) Semiconductor IC device
DE3480443D1 (en) Semiconductor memory
KR910008836A (ko) 반도체기억장치
EP0338757A3 (en) A cell stack for variable digit width serial architecture
ATE217987T1 (de) Seriell zugreifbare speichervorrichtung mit hoher fehlerkorrigierbarkeit
KR960019313A (ko) 반도체 메모리 장치
EP0337457A3 (en) Memory device having a plurality of memory cell arrays with different organization
CA2062561A1 (en) Cross-point type switch using common memories

Legal Events

Date Code Title Description
REN Ceased due to non-payment of the annual fee