ATE169766T1 - Verfahren zur programmierung von flash eeprom- zellenmatrizen - Google Patents

Verfahren zur programmierung von flash eeprom- zellenmatrizen

Info

Publication number
ATE169766T1
ATE169766T1 AT92300699T AT92300699T ATE169766T1 AT E169766 T1 ATE169766 T1 AT E169766T1 AT 92300699 T AT92300699 T AT 92300699T AT 92300699 T AT92300699 T AT 92300699T AT E169766 T1 ATE169766 T1 AT E169766T1
Authority
AT
Austria
Prior art keywords
array
cells
flash eeprom
eeprom cell
cell matrices
Prior art date
Application number
AT92300699T
Other languages
German (de)
English (en)
Inventor
Nader Raddy
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE169766T1 publication Critical patent/ATE169766T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits

Landscapes

  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
AT92300699T 1991-03-13 1992-01-27 Verfahren zur programmierung von flash eeprom- zellenmatrizen ATE169766T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/668,608 US5191556A (en) 1991-03-13 1991-03-13 Method of page-mode programming flash eeprom cell arrays

Publications (1)

Publication Number Publication Date
ATE169766T1 true ATE169766T1 (de) 1998-08-15

Family

ID=24683040

Family Applications (1)

Application Number Title Priority Date Filing Date
AT92300699T ATE169766T1 (de) 1991-03-13 1992-01-27 Verfahren zur programmierung von flash eeprom- zellenmatrizen

Country Status (5)

Country Link
US (1) US5191556A (enExample)
EP (1) EP0503756B1 (enExample)
JP (1) JPH0581884A (enExample)
AT (1) ATE169766T1 (enExample)
DE (1) DE69226546T2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5313427A (en) * 1991-09-20 1994-05-17 Texas Instruments Incorporated EEPROM array with narrow margin of voltage thresholds after erase
US5311467A (en) * 1992-04-07 1994-05-10 Sgs-Thomson Microelectronics, Inc. Selective bulk write operation
JPH05326982A (ja) * 1992-05-15 1993-12-10 Nec Corp 不揮発性ｍｏｓ型半導体記憶装置及びデータの書換方法
KR960000616B1 (ko) * 1993-01-13 1996-01-10 삼성전자주식회사 불휘발성 반도체 메모리 장치
US5339279A (en) * 1993-05-07 1994-08-16 Motorola, Inc. Block erasable flash EEPROM apparatus and method thereof
US5802268A (en) * 1994-11-22 1998-09-01 Lucent Technologies Inc. Digital processor with embedded eeprom memory
US5606532A (en) * 1995-03-17 1997-02-25 Atmel Corporation EEPROM array with flash-like core
US5706228A (en) * 1996-02-20 1998-01-06 Motorola, Inc. Method for operating a memory array
US5777923A (en) * 1996-06-17 1998-07-07 Aplus Integrated Circuits, Inc. Flash memory read/write controller
US5687121A (en) * 1996-03-29 1997-11-11 Aplus Integrated Circuits, Inc. Flash EEPROM worldline decoder
US5646890A (en) * 1996-03-29 1997-07-08 Aplus Integrated Circuits, Inc. Flexible byte-erase flash memory and decoder
US5748538A (en) * 1996-06-17 1998-05-05 Aplus Integrated Circuits, Inc. OR-plane memory cell array for flash memory with bit-based write capability, and methods for programming and erasing the memory cell array
JP2000504504A (ja) * 1997-02-12 2000-04-11 ヒュンダイ エレクトロニクス アメリカ インコーポレイテッド 不揮発性メモリ構造
KR100251636B1 (ko) * 1997-04-10 2000-05-01 윤종용 소형컴퓨터시스템인터페이스방식접속을위한메모리장치
US6492675B1 (en) 1998-01-16 2002-12-10 Advanced Micro Devices, Inc. Flash memory array with dual function control lines and asymmetrical source and drain junctions
US6950336B2 (en) * 2000-05-03 2005-09-27 Emosyn America, Inc. Method and apparatus for emulating an electrically erasable programmable read only memory (EEPROM) using non-volatile floating gate memory cells
KR100705221B1 (ko) * 2004-09-03 2007-04-06 에스티마이크로일렉트로닉스 엔.브이. 플래쉬 메모리 소자 및 이를 이용한 플래쉬 메모리 셀의소거 방법
JP4768298B2 (ja) * 2005-03-28 2011-09-07 株式会社東芝 不揮発性半導体記憶装置
JP4910360B2 (ja) * 2005-10-20 2012-04-04 ソニー株式会社 記憶装置、コンピュータシステム、およびデータ書き込み方法
KR100731058B1 (ko) * 2005-12-26 2007-06-22 동부일렉트로닉스 주식회사 이중 터널 산화막을 포함하는 플래시 메모리 셀 및 그 제조방법
US7391659B2 (en) * 2006-01-27 2008-06-24 Freescale Semiconductor, Inc. Method for multiple step programming a memory cell
US7317222B2 (en) * 2006-01-27 2008-01-08 Freescale Semiconductor, Inc. Memory cell using a dielectric having non-uniform thickness
US10566059B2 (en) * 2018-04-30 2020-02-18 Sandisk Technologies Llc Three dimensional NAND memory device with drain select gate electrode shared between multiple strings

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4423432A (en) * 1980-01-28 1983-12-27 Rca Corporation Apparatus for decoding multiple input lines
US4698787A (en) * 1984-11-21 1987-10-06 Exel Microelectronics, Inc. Single transistor electrically programmable memory device and method
US4949309A (en) * 1988-05-11 1990-08-14 Catalyst Semiconductor, Inc. EEPROM utilizing single transistor per cell capable of both byte erase and flash erase
US4958321A (en) * 1988-09-22 1990-09-18 Advanced Micro Devices, Inc. One transistor flash EPROM cell
US5122985A (en) * 1990-04-16 1992-06-16 Giovani Santin Circuit and method for erasing eeprom memory arrays to prevent over-erased cells
US5132935A (en) * 1990-04-16 1992-07-21 Ashmore Jr Benjamin H Erasure of eeprom memory arrays to prevent over-erased cells

Also Published As

Publication number Publication date
EP0503756A3 (enExample) 1994-02-09
DE69226546D1 (de) 1998-09-17
DE69226546T2 (de) 1999-02-04
JPH0581884A (ja) 1993-04-02
EP0503756A2 (en) 1992-09-16
US5191556A (en) 1993-03-02
EP0503756B1 (en) 1998-08-12

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