ATE114213T1 - Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte. - Google Patents

Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte.

Info

Publication number
ATE114213T1
ATE114213T1 AT90907603T AT90907603T ATE114213T1 AT E114213 T1 ATE114213 T1 AT E114213T1 AT 90907603 T AT90907603 T AT 90907603T AT 90907603 T AT90907603 T AT 90907603T AT E114213 T1 ATE114213 T1 AT E114213T1
Authority
AT
Austria
Prior art keywords
chip carrier
grounding
high density
ultra high
density pads
Prior art date
Application number
AT90907603T
Other languages
English (en)
Inventor
Bruce J Freyman
Barry M Miles
Frank J Juskey
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of ATE114213T1 publication Critical patent/ATE114213T1/de

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Classifications

    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/838—Bonding techniques
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    • H01L2924/151—Die mounting substrate
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Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Die Bonding (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Wire Bonding (AREA)
AT90907603T 1989-05-01 1990-04-09 Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte. ATE114213T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/345,280 US5077633A (en) 1989-05-01 1989-05-01 Grounding an ultra high density pad array chip carrier

Publications (1)

Publication Number Publication Date
ATE114213T1 true ATE114213T1 (de) 1994-12-15

Family

ID=23354353

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90907603T ATE114213T1 (de) 1989-05-01 1990-04-09 Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte.

Country Status (6)

Country Link
US (1) US5077633A (de)
EP (1) EP0471003B1 (de)
JP (1) JPH0834225B2 (de)
AT (1) ATE114213T1 (de)
DE (1) DE69014202T2 (de)
WO (1) WO1990013991A1 (de)

Families Citing this family (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5917707A (en) 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US5489804A (en) * 1989-08-28 1996-02-06 Lsi Logic Corporation Flexible preformed planar structures for interposing between a chip and a substrate
US5834799A (en) * 1989-08-28 1998-11-10 Lsi Logic Optically transmissive preformed planar structures
US5504035A (en) * 1989-08-28 1996-04-02 Lsi Logic Corporation Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate
US5299730A (en) * 1989-08-28 1994-04-05 Lsi Logic Corporation Method and apparatus for isolation of flux materials in flip-chip manufacturing
US5175612A (en) * 1989-12-19 1992-12-29 Lsi Logic Corporation Heat sink for semiconductor device assembly
US5399903A (en) * 1990-08-15 1995-03-21 Lsi Logic Corporation Semiconductor device having an universal die size inner lead layout
KR970011619B1 (ko) * 1990-12-21 1997-07-12 모토로라 인코포레이티드 리드레스 패드 배열 칩 캐리어 패키지 및 그 제조방법
WO1992020097A1 (en) * 1991-04-26 1992-11-12 Citizen Watch Co., Ltd. Semiconductor device and manufacturing method therefor
US5249098A (en) * 1991-08-22 1993-09-28 Lsi Logic Corporation Semiconductor device package with solder bump electrical connections on an external surface of the package
JPH05109922A (ja) * 1991-10-21 1993-04-30 Nec Corp 半導体装置
US5434750A (en) * 1992-02-07 1995-07-18 Lsi Logic Corporation Partially-molded, PCB chip carrier package for certain non-square die shapes
US5517752A (en) * 1992-05-13 1996-05-21 Fujitsu Limited Method of connecting a pressure-connector terminal of a device with a terminal electrode of a substrate
US5592025A (en) * 1992-08-06 1997-01-07 Motorola, Inc. Pad array semiconductor device
US5481436A (en) * 1992-12-30 1996-01-02 Interconnect Systems, Inc. Multi-level assemblies and methods for interconnecting integrated circuits
US5479319A (en) * 1992-12-30 1995-12-26 Interconnect Systems, Inc. Multi-level assemblies for interconnecting integrated circuits
US5767580A (en) * 1993-04-30 1998-06-16 Lsi Logic Corporation Systems having shaped, self-aligning micro-bump structures
US5438477A (en) * 1993-08-12 1995-08-01 Lsi Logic Corporation Die-attach technique for flip-chip style mounting of semiconductor dies
US5388327A (en) * 1993-09-15 1995-02-14 Lsi Logic Corporation Fabrication of a dissolvable film carrier containing conductive bump contacts for placement on a semiconductor device package
US5820014A (en) 1993-11-16 1998-10-13 Form Factor, Inc. Solder preforms
WO1995026047A1 (en) 1994-03-18 1995-09-28 Hitachi Chemical Company, Ltd. Semiconductor package manufacturing method and semiconductor package
US5745985A (en) * 1995-06-23 1998-05-05 Texas Instruments Incorporated Method of attaching a semiconductor microchip to a circuit board
US6097099A (en) * 1995-10-20 2000-08-01 Texas Instruments Incorporated Electro-thermal nested die-attach design
US5770889A (en) * 1995-12-29 1998-06-23 Lsi Logic Corporation Systems having advanced pre-formed planar structures
US8033838B2 (en) 1996-02-21 2011-10-11 Formfactor, Inc. Microelectronic contact structure
US5994152A (en) 1996-02-21 1999-11-30 Formfactor, Inc. Fabricating interconnects and tips using sacrificial substrates
JP3928753B2 (ja) 1996-08-06 2007-06-13 日立化成工業株式会社 マルチチップ実装法、および接着剤付チップの製造方法
US6051888A (en) * 1997-04-07 2000-04-18 Texas Instruments Incorporated Semiconductor package and method for increased thermal dissipation of flip-chip semiconductor package
FR2790905A1 (fr) * 1999-03-09 2000-09-15 Sagem Composant electrique de puissance a montage par brasage sur un support et procede de montage correspondant
GB2356737A (en) * 1999-11-26 2001-05-30 Nokia Mobile Phones Ltd Ground Plane for a Semiconductor Chip
WO2005074044A1 (ja) * 2004-01-30 2005-08-11 Ccs Inc. Led及びledの取付構造
US8629539B2 (en) * 2012-01-16 2014-01-14 Allegro Microsystems, Llc Methods and apparatus for magnetic sensor having non-conductive die paddle
US9812588B2 (en) 2012-03-20 2017-11-07 Allegro Microsystems, Llc Magnetic field sensor integrated circuit with integral ferromagnetic material
US10234513B2 (en) 2012-03-20 2019-03-19 Allegro Microsystems, Llc Magnetic field sensor integrated circuit with integral ferromagnetic material
US10991644B2 (en) 2019-08-22 2021-04-27 Allegro Microsystems, Llc Integrated circuit package having a low profile

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57122592A (en) * 1981-01-23 1982-07-30 Tokyo Shibaura Electric Co Method of producing hybrid integrated circuit
JPS59200427A (ja) * 1983-04-28 1984-11-13 Toshiba Corp ハイブリツド集積回路
FR2545312B1 (fr) * 1983-04-29 1986-05-30 Thomson Csf Picot de support de fixation de composant electronique sur circuit imprime et support comportant ces picots
JPS59207645A (ja) * 1983-05-11 1984-11-24 Toshiba Corp 半導体装置およびリ−ドフレ−ム
US4574879A (en) * 1984-02-29 1986-03-11 The Bergquist Company Mounting pad for solid-state devices
US4626309A (en) * 1984-07-02 1986-12-02 Motorola, Inc. Selective bonding interconnection mask
US4700276A (en) * 1986-01-03 1987-10-13 Motorola Inc. Ultra high density pad array chip carrier
US4700473A (en) * 1986-01-03 1987-10-20 Motorola Inc. Method of making an ultra high density pad array chip carrier
JPS62216259A (ja) * 1986-03-17 1987-09-22 Fujitsu Ltd 混成集積回路の製造方法および構造
JPS62229896A (ja) * 1986-03-29 1987-10-08 株式会社東芝 印刷配線基板
JPS63237373A (ja) * 1987-03-26 1988-10-03 キヤノン株式会社 電気的接続部材及びそれを用いた電気回路部材

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DE69014202T2 (de) 1995-06-01
US5077633A (en) 1991-12-31
EP0471003B1 (de) 1994-11-17
JPH0834225B2 (ja) 1996-03-29
DE69014202D1 (de) 1994-12-22
WO1990013991A1 (en) 1990-11-15
JPH04505235A (ja) 1992-09-10
EP0471003A4 (de) 1991-12-06
EP0471003A1 (de) 1992-02-19

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