AT356178B - Halbleiteranordnung mit versenktem muster aus isolierendem material und verfahren zu deren herstellung - Google Patents

Halbleiteranordnung mit versenktem muster aus isolierendem material und verfahren zu deren herstellung

Info

Publication number
AT356178B
AT356178B AT1085073A AT1085073A AT356178B AT 356178 B AT356178 B AT 356178B AT 1085073 A AT1085073 A AT 1085073A AT 1085073 A AT1085073 A AT 1085073A AT 356178 B AT356178 B AT 356178B
Authority
AT
Austria
Prior art keywords
production
insulating material
semiconductor arrangement
recessed pattern
recessed
Prior art date
Application number
AT1085073A
Other languages
English (en)
Other versions
ATA1085073A (de
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of ATA1085073A publication Critical patent/ATA1085073A/de
Application granted granted Critical
Publication of AT356178B publication Critical patent/AT356178B/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821—Combination of lateral and vertical transistors only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
AT1085073A 1972-12-29 1973-12-27 Halbleiteranordnung mit versenktem muster aus isolierendem material und verfahren zu deren herstellung AT356178B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7217783.A NL161301C (nl) 1972-12-29 1972-12-29 Halfgeleiderinrichting en werkwijze voor de vervaar- diging daarvan.

Publications (2)

Publication Number Publication Date
ATA1085073A ATA1085073A (de) 1979-09-15
AT356178B true AT356178B (de) 1980-04-10

Family

ID=19817648

Family Applications (1)

Application Number Title Priority Date Filing Date
AT1085073A AT356178B (de) 1972-12-29 1973-12-27 Halbleiteranordnung mit versenktem muster aus isolierendem material und verfahren zu deren herstellung

Country Status (11)

Country Link
US (1) US3911471A (de)
JP (1) JPS524433B2 (de)
AT (1) AT356178B (de)
CA (1) CA1003577A (de)
CH (1) CH566079A5 (de)
DE (1) DE2361319C2 (de)
FR (1) FR2271666B1 (de)
GB (1) GB1456376A (de)
IT (1) IT1000635B (de)
NL (1) NL161301C (de)
SE (1) SE390852B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3993513A (en) * 1974-10-29 1976-11-23 Fairchild Camera And Instrument Corporation Combined method for fabricating oxide-isolated vertical bipolar transistors and complementary oxide-isolated lateral bipolar transistors and the resulting structures
DE2510593C3 (de) * 1975-03-11 1982-03-18 Siemens AG, 1000 Berlin und 8000 München Integrierte Halbleiter-Schaltungsanordnung
GB1499845A (en) * 1975-03-26 1978-02-01 Mullard Ltd Thyristors
US4063272A (en) * 1975-11-26 1977-12-13 General Electric Company Semiconductor device and method of manufacture thereof
DE2708639A1 (de) * 1977-02-28 1978-08-31 Siemens Ag Transistoranordnung auf einem halbleiterplaettchen
JPS5599722A (en) * 1979-01-26 1980-07-30 Hitachi Ltd Preparation of semiconductor device
JPS6055988B2 (ja) * 1979-01-26 1985-12-07 株式会社日立製作所 半導体装置の製法
JPS55133569A (en) * 1979-04-06 1980-10-17 Hitachi Ltd Semiconductor device
JPS588139B2 (ja) * 1979-05-31 1983-02-14 富士通株式会社 半導体装置の製造方法
US4376664A (en) * 1979-05-31 1983-03-15 Fujitsu Limited Method of producing a semiconductor device
DE3071380D1 (en) * 1979-05-31 1986-03-13 Fujitsu Ltd Method of producing a semiconductor device
JPS5673446A (en) * 1979-11-21 1981-06-18 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
JPS5856434A (ja) * 1981-09-30 1983-04-04 Fujitsu Ltd 半導体装置の製造方法
US5248894A (en) * 1989-10-03 1993-09-28 Harris Corporation Self-aligned channel stop for trench-isolated island
US7981759B2 (en) * 2007-07-11 2011-07-19 Paratek Microwave, Inc. Local oxidation of silicon planarization for polysilicon layers under thin film structures

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL297002A (de) * 1962-08-23 1900-01-01
US3423650A (en) * 1966-07-01 1969-01-21 Rca Corp Monolithic semiconductor microcircuits with improved means for connecting points of common potential
US3502951A (en) * 1968-01-02 1970-03-24 Singer Co Monolithic complementary semiconductor device
NL169121C (nl) * 1970-07-10 1982-06-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een halfgeleiderlichaam, dat aan een oppervlak is voorzien van een althans ten dele in het halfgeleiderlichaam verzonken, door thermische oxydatie gevormd oxydepatroon.
US3648125A (en) * 1971-02-02 1972-03-07 Fairchild Camera Instr Co Method of fabricating integrated circuits with oxidized isolation and the resulting structure
NL173110C (nl) * 1971-03-17 1983-12-01 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting, waarbij op een oppervlak van een halfgeleiderlichaam een uit ten minste twee deellagen van verschillend materiaal samengestelde maskeringslaag wordt aangebracht.
NL7105000A (de) * 1971-04-14 1972-10-17
US3796613A (en) * 1971-06-18 1974-03-12 Ibm Method of forming dielectric isolation for high density pedestal semiconductor devices

Also Published As

Publication number Publication date
AU6389573A (en) 1975-06-26
NL7217783A (de) 1974-07-02
GB1456376A (en) 1976-11-24
CA1003577A (en) 1977-01-11
NL161301B (nl) 1979-08-15
JPS4999286A (de) 1974-09-19
DE2361319A1 (de) 1974-07-04
FR2271666B1 (de) 1976-11-19
SE390852B (sv) 1977-01-24
FR2271666A1 (de) 1975-12-12
US3911471A (en) 1975-10-07
JPS524433B2 (de) 1977-02-03
ATA1085073A (de) 1979-09-15
NL161301C (nl) 1980-01-15
DE2361319C2 (de) 1983-03-03
IT1000635B (it) 1976-04-10
CH566079A5 (de) 1975-08-29

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Legal Events

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ELJ Ceased due to non-payment of the annual fee