AT348023B - Verfahren zum herstellen einer halbleiter- anordnung aus silizium - Google Patents
Verfahren zum herstellen einer halbleiter- anordnung aus siliziumInfo
- Publication number
- AT348023B AT348023B AT774874A AT774874A AT348023B AT 348023 B AT348023 B AT 348023B AT 774874 A AT774874 A AT 774874A AT 774874 A AT774874 A AT 774874A AT 348023 B AT348023 B AT 348023B
- Authority
- AT
- Austria
- Prior art keywords
- silicon
- producing
- semiconductor arrangement
- semiconductor
- arrangement
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 229910052710 silicon Inorganic materials 0.000 title 1
- 239000010703 silicon Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
-
- C—CHEMISTRY; METALLURGY
- C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
- C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
- C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
- C04B41/53—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone involving the removal of at least part of the materials of the treated article, e.g. etching, drying of hardened concrete
- C04B41/5338—Etching
- C04B41/5353—Wet etching, e.g. with etchants dissolved in organic solvents
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Inorganic Chemistry (AREA)
- Materials Engineering (AREA)
- Structural Engineering (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Weting (AREA)
- ing And Chemical Polishing (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2359511A DE2359511A1 (de) | 1973-11-29 | 1973-11-29 | Verfahren zum lokalisierten aetzen von siliciumkristallen |
Publications (2)
Publication Number | Publication Date |
---|---|
ATA774874A ATA774874A (de) | 1978-06-15 |
AT348023B true AT348023B (de) | 1979-01-25 |
Family
ID=5899430
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT774874A AT348023B (de) | 1973-11-29 | 1974-09-26 | Verfahren zum herstellen einer halbleiter- anordnung aus silizium |
Country Status (8)
Country | Link |
---|---|
US (1) | US3977925A (de) |
JP (1) | JPS5086985A (de) |
AT (1) | AT348023B (de) |
CA (1) | CA1036473A (de) |
DE (1) | DE2359511A1 (de) |
FR (1) | FR2252907B1 (de) |
GB (1) | GB1487849A (de) |
IT (1) | IT1025994B (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4132105A1 (de) * | 1990-09-26 | 1992-04-09 | Hitachi Ltd | Struktur und verfahren zu ihrer herstellung |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4143455A (en) * | 1976-03-11 | 1979-03-13 | Siemens Aktiengesellschaft | Method of producing a semiconductor component |
IT1109829B (it) * | 1977-07-05 | 1985-12-23 | Ibm | Processo di fabbricazione di cercuiti integrati |
US4354896A (en) * | 1980-08-05 | 1982-10-19 | Texas Instruments Incorporated | Formation of submicron substrate element |
US4395304A (en) * | 1982-05-11 | 1983-07-26 | Rca Corporation | Selective etching of phosphosilicate glass |
US4681657A (en) * | 1985-10-31 | 1987-07-21 | International Business Machines Corporation | Preferential chemical etch for doped silicon |
US5135607A (en) * | 1986-04-11 | 1992-08-04 | Canon Kabushiki Kaisha | Process for forming deposited film |
DE3879771D1 (de) * | 1987-05-27 | 1993-05-06 | Siemens Ag | Aetzverfahren zum erzeugen von lochoeffnungen oder graeben in n-dotiertem silizium. |
US4943719A (en) * | 1989-01-17 | 1990-07-24 | The Board Of Trustees Of The Leland Stanford University | Microminiature cantilever stylus |
US5021364A (en) * | 1989-10-31 | 1991-06-04 | The Board Of Trustees Of The Leland Stanford Junior University | Microcantilever with integral self-aligned sharp tetrahedral tip |
JPH0690014A (ja) * | 1992-07-22 | 1994-03-29 | Mitsubishi Electric Corp | 薄型太陽電池及びその製造方法,エッチング方法及び自動エッチング装置,並びに半導体装置の製造方法 |
DE4305297C2 (de) * | 1993-02-20 | 1998-09-24 | Telefunken Microelectron | Strukturbeize für Halbleiter und deren Anwendung |
US5484507A (en) * | 1993-12-01 | 1996-01-16 | Ford Motor Company | Self compensating process for aligning an aperture with crystal planes in a substrate |
US5575929A (en) * | 1995-06-05 | 1996-11-19 | The Regents Of The University Of California | Method for making circular tubular channels with two silicon wafers |
JPH09260342A (ja) * | 1996-03-18 | 1997-10-03 | Mitsubishi Electric Corp | 半導体装置の製造方法及び製造装置 |
US5753561A (en) * | 1996-09-30 | 1998-05-19 | Vlsi Technology, Inc. | Method for making shallow trench isolation structure having rounded corners |
JP2000164586A (ja) * | 1998-11-24 | 2000-06-16 | Daikin Ind Ltd | エッチング液 |
US6914009B2 (en) * | 2001-05-07 | 2005-07-05 | Applied Materials Inc | Method of making small transistor lengths |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3173101A (en) * | 1961-02-15 | 1965-03-09 | Westinghouse Electric Corp | Monolithic two stage unipolar-bipolar semiconductor amplifier device |
GB1273150A (en) * | 1968-10-21 | 1972-05-03 | Associated Semiconductor Mft | Improvements in and relating to methods of etching semiconductor body surfaces |
US3680205A (en) * | 1970-03-03 | 1972-08-01 | Dionics Inc | Method of producing air-isolated integrated circuits |
JPS513474B1 (de) * | 1970-06-25 | 1976-02-03 | ||
US3796612A (en) * | 1971-08-05 | 1974-03-12 | Scient Micro Syst Inc | Semiconductor isolation method utilizing anisotropic etching and differential thermal oxidation |
JPS4839339A (de) * | 1971-09-25 | 1973-06-09 | ||
JPS519269B2 (de) * | 1972-05-19 | 1976-03-25 | ||
US3810796A (en) * | 1972-08-31 | 1974-05-14 | Texas Instruments Inc | Method of forming dielectrically isolated silicon diode array vidicon target |
US3839111A (en) * | 1973-08-20 | 1974-10-01 | Rca Corp | Method of etching silicon oxide to produce a tapered edge thereon |
-
1973
- 1973-11-29 DE DE2359511A patent/DE2359511A1/de active Granted
-
1974
- 1974-09-26 AT AT774874A patent/AT348023B/de not_active IP Right Cessation
- 1974-10-16 GB GB44783/74A patent/GB1487849A/en not_active Expired
- 1974-10-31 CA CA212,778A patent/CA1036473A/en not_active Expired
- 1974-11-15 FR FR7437753A patent/FR2252907B1/fr not_active Expired
- 1974-11-26 IT IT29813/74A patent/IT1025994B/it active
- 1974-11-27 US US05/527,894 patent/US3977925A/en not_active Expired - Lifetime
- 1974-11-29 JP JP49138291A patent/JPS5086985A/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4132105A1 (de) * | 1990-09-26 | 1992-04-09 | Hitachi Ltd | Struktur und verfahren zu ihrer herstellung |
Also Published As
Publication number | Publication date |
---|---|
DE2359511C2 (de) | 1987-03-05 |
DE2359511A1 (de) | 1975-06-05 |
GB1487849A (en) | 1977-10-05 |
US3977925A (en) | 1976-08-31 |
CA1036473A (en) | 1978-08-15 |
ATA774874A (de) | 1978-06-15 |
JPS5086985A (de) | 1975-07-12 |
FR2252907B1 (de) | 1982-06-04 |
IT1025994B (it) | 1978-08-30 |
FR2252907A1 (de) | 1975-06-27 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ELJ | Ceased due to non-payment of the annual fee |