Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W40/00—Arrangements for thermal protection or thermal control
  • H10W40/20—Arrangements for cooling
  • H10W40/25—Arrangements for cooling characterised by their materials
  • H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W40/00—Arrangements for thermal protection or thermal control
  • H10W40/20—Arrangements for cooling
  • H10W40/25—Arrangements for cooling characterised by their materials
  • H10W40/251—Organics
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W40/00—Arrangements for thermal protection or thermal control
  • H10W40/20—Arrangements for cooling
  • H10W40/25—Arrangements for cooling characterised by their materials
  • H10W40/258—Metallic materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W40/00—Arrangements for thermal protection or thermal control
  • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W90/00—Package configurations
  • H10W90/10—Configurations of laterally-adjacent chips

Definitions

• the present invention relates to a semiconductor device.
• the semiconductor device includes a laminated substrate in which a metal plate, an insulating layer, and a conductive plate are stacked in this order from the bottom up, and a semiconductor chip arranged on the conductive plate.
• the semiconductor device further includes a heat sink on which the laminated substrate is arranged, a case arranged on the heat sink to house the laminated substrate and the semiconductor chip, and a screw for fixing the case and the heat sink.
• the screw and the metal plate are connected by a conductive connecting member (for example, Patent Documents 1, 2, and 3).
• a conductive plate is placed on the back side of a laminated substrate via a thermal compound containing high-dielectric-constant particles with a relative dielectric constant of 10 or more, and the top of the cooler is sealed with a sealing member (see, for example, Patent Document 4).
• the objective of the present invention is to provide an electrically stable semiconductor device.
• a semiconductor device includes a heat sink including a heat dissipation surface, a cooling module including a cooling surface on which the heat dissipation surface of the heat sink is disposed, and a joining member provided between the heat dissipation surface and the cooling surface, the joining member including a thermally conductive portion that joins the heat dissipation surface and the cooling surface, and a conductive portion that is directly connected to the heat sink and the cooling surface, respectively.
• the heat-conducting portion of the joining member has insulating properties and is bonded to the heat-dissipating surface and the cooling surface.
• the heat-conducting portion of the joining member is made mainly of epoxy resin.
• the conductive portion of the joining member is composed of the same main component as the heat conductive portion, and contains a conductive filler.
• the filler is mainly composed of silver, copper, gold, nickel, chromium, aluminum, or an alloy containing at least one of these elements.
• the conductive portion of the joining member is mainly composed of a conductive material.
• the conductive member is either a solder, a metal particle paste, or a conductive adhesive.
• the metal particles constituting the metal particle paste are made of silver, copper, or an alloy containing either of these.
• the joining member has a shape that matches the heat dissipation surface of the heat dissipation plate in a plan view.
• the joining member also includes the conductive portion along an outer edge of the heat dissipation surface of the heat sink.
• the joining member includes the conductive portion extending annularly along the outer edge of the heat dissipation surface of the heat dissipation plate.
• the heat dissipation surface of the heat dissipation plate has a rectangular shape in a plan view, and the joining member includes the conductive portion along an outer edge of the heat dissipation surface of the heat dissipation plate.
• the joining member includes the heat conductive portion in an area excluding the conductive portion.
• the joining member includes the thermally conductive portion and the electrically conductive portion in contact with each other.
• the joining member includes the thermally conductive portion and the electrically conductive portion with a gap therebetween.
• the semiconductor module also includes a heat sink and a sealing member that seals the heat sink and has the heat sink surface exposed from a lower sealing surface, and the joining member has a shape that is wider than the heat sink surface of the heat sink plate when viewed in a plan view.
• the joining member also includes the conductive portion in the area that contacts the heat dissipation surface of the heat sink in a plan view.
• the heat conduction portion of the joining member has a shape wider than the heat dissipation surface in a plan view, and the conductive portion of the joining member connects the cooling surface and the side of the heat dissipation plate via the portion of the heat conduction portion that protrudes beyond the heat dissipation plate.
• the semiconductor device becomes electrically stable.
• FIG. 1 is a side cross-sectional view of a semiconductor device according to a first embodiment
• 2 is a plan view of a cooling surface of the semiconductor device according to the first embodiment
• FIG. 2 is a flowchart showing a method for manufacturing the semiconductor device according to the first embodiment
• 1A to 1C are diagrams for explaining a semiconductor module assembly process according to the first embodiment
• FIG. 13 is a diagram (part 2) for explaining the semiconductor module assembly process according to the first embodiment
• 1 is a side cross-sectional view of a semiconductor module according to a first embodiment
• FIG. 2 is a rear view of the semiconductor module according to the first embodiment.
• FIG. 1 is a diagram (part 1) for explaining a coating process according to the first embodiment
• FIG. 2 is a second diagram for explaining the coating process according to the first embodiment
• FIG. 4 is a diagram (part 3) for explaining the coating process according to the first embodiment
• FIG. 4 is a diagram for explaining the coating process according to the first embodiment
• FIG. 2 is a side cross-sectional view of a semiconductor device according to a reference example.
• FIG. 13 is a plan view of a cooling surface of a semiconductor device according to a reference example.
• FIG. 11 is a side cross-sectional view of a semiconductor device according to a second embodiment.
• FIG. 13 is a plan view of a cooling surface of a semiconductor device according to a second embodiment.
• FIG. 11 is a diagram (part 1) for explaining a coating process according to the third embodiment;
• FIG. 13 is a second diagram for explaining the coating process according to the third embodiment;
• FIG. 13 is a side cross-sectional view of a semiconductor device according to a third embodiment.
• FIG. 13 is a plan view of a cooling surface of a semiconductor device according to a fourth embodiment.
• FIG. 13 is a side cross-sectional view of a semiconductor device according to a fifth embodiment.
• FIG. 13 is a rear view of the semiconductor module according to the fifth embodiment.
• FIG. 13 is a side cross-sectional view of a semiconductor device according to a sixth embodiment.
• FIG. 23 is a rear view of the semiconductor module according to the sixth embodiment.
• FIG. 13 is a side view of a semiconductor device according to a sixth embodiment.
• FIG. 13 is a diagram (part 1) for explaining the coating process of the sixth embodiment;
• FIG. 23 is a diagram (part 2) for explaining the coating process of the sixth embodiment;
• 13A to 13C are diagrams for explaining the mounting process of the sixth embodiment;
• front surface and “top surface” refer to the X-Y surface facing upward (+Z direction) in the semiconductor device 1 in the figure. Similarly, “top” refers to the upward (+Z direction) direction in the semiconductor device in FIG. 1.
• Back surface and “bottom surface” refer to the X-Y surface facing downward (-Z direction) in the semiconductor device 1 in FIG. 1. Similarly, “bottom” refers to the downward (-Z direction) direction in the semiconductor device 1 in FIG. 1.
• “Higher” and “upper” refer to the upper (+Z direction) position in the semiconductor device 1 in FIG. 1.
• “lower” and “lower” refer to the lower (-Z direction) position in the semiconductor device 1 in FIG. 1.
• “Front surface”, “top surface”, “top” and “back surface”, “bottom surface”, “bottom” and “side surface” are merely convenient expressions for specifying relative positional relationships and do not limit the technical idea of the present invention.
• “up” and “down” do not necessarily mean the vertical direction relative to the ground. In other words, the directions of “up” and “down” are not limited to the direction of gravity.
• “main component” refers to a component that contains 80 vol% or more. "Approximately the same” means within a range of ⁇ 10%.
• “Perpendicular”, “orthogonal” and “parallel” mean within a range of ⁇ 10°.
• FIG. 1 is a side cross-sectional view of the semiconductor device according to the first embodiment.
• Figure 2 is a plan view of the cooling surface of the semiconductor device according to the first embodiment.
• Figure 2 is a cross-sectional view of the semiconductor device 1 in Figure 1 taken along the XY plane indicated by the dashed dotted line. That is, Figure 2 is a plan view of the cooling surface 3a on which the joining members 4 of the cooling module 3 are provided.
• Figure 1 is a cross-section taken along the dashed dotted line I1-I1 in Figure 2, as viewed in the +Y direction.
• the semiconductor chips 10a, 10b, 10d, and 10e may also include a switching element whose main component is silicon.
• the switching element is, for example, an RC (Reverse-Conducting)-IGBT (Insulated Gate Bipolar Transistor).
• the RC-IGBT is a semiconductor element in which an IGBT and an FWD are arranged in inverse parallel within one chip.
• the insulating plate 21 may be, for example, a ceramic substrate.
• the ceramic substrate is made of ceramics with good thermal conductivity.
• the ceramics may be made of a material whose main components are, for example, aluminum oxide, aluminum nitride, or silicon nitride.
• the insulating plate 21 has a rectangular shape in a plan view. Examples of the insulating circuit board 20 that includes an insulating plate 21 having such a configuration include a DCB (Direct Copper Bonding) board and an AMB (Active Metal Brazed) board.
• DCB Direct Copper Bonding
• AMB Active Metal Brazed
• the insulating plate 21 may be made of resin.
• the resin may be a material with low thermal resistance and high insulation.
• a thermosetting resin may be used.
• the thermosetting resin may further contain a filler.
• the insulating plate 21 can further reduce the thermal resistance of the insulating plate 21 by controlling the material and content of the filler.
• the linear expansion coefficient of the insulating plate 21 and the linear expansion coefficient of the heat sink 22 and the conductive circuit patterns 23a and 23b described later can be made approximately equal. By reducing the difference in linear expansion coefficient in this way, the insulating circuit board 20 can reduce the occurrence of warping due to the difference in linear expansion coefficient even if a thermal change occurs. In this case, the difference in linear expansion coefficient may be within an error range of 10% or more and 50% or less.
• Thermosetting resin may be, for example, at least one of epoxy resin, cyanate resin, polyimide resin, benzoxazine resin, unsaturated polyester resin, phenol resin, melamine resin, silicone resin, maleimide resin, acrylic resin, and polyamide resin.
• the filler is composed of at least one of an oxide and a nitride. Examples of oxides include silicon oxide and aluminum oxide. Examples of nitrides include silicon nitride, aluminum nitride, and boron nitride. Furthermore, the filler may be hexagonal boron nitride.
• the thickness of such insulating plate 21 depends on the rated voltage of semiconductor device 1. In other words, the higher the rated voltage of semiconductor device 1, the thicker the insulating plate 21 needs to be. On the other hand, it is necessary to make the insulating plate 21 as thin as possible to reduce thermal resistance.
• the heat sink 22 is made of a metal with excellent thermal conductivity. Examples of such materials include copper, aluminum, or an alloy containing at least one of these. Here, copper is included.
• the surface of the heat sink 22 may be plated to improve corrosion resistance. In this case, the plating material includes nickel. Such plating materials are, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.
• the heat sink 22 includes a heat dissipation surface 22a on its lower surface. This heat dissipation surface 22a may be approximately flat. The heat dissipation surface 22a is also the lower surface of the insulating circuit board 20.
• the heat dissipation surface 22a of the heat sink 22 is exposed from the sealing lower surface 35a of the sealing member 35 described later.
• the heat dissipation surface 22a of the heat sink 22 may protrude outward from the sealing lower surface 35a of the sealing member 35, or may be flush with the sealing lower surface 35a of the sealing member 35.
• the heat dissipation surface 22a of the heat sink 22 is flush with the sealing lower surface 35a of the sealing member 35.
• the conductive circuit patterns 23a and 23b are arranged with the semiconductor chips 10a and 10b and the semiconductor chips 10d and 10e, respectively.
• the conductive circuit patterns 23a and 23b are formed over the entire surface of the insulating plate 21 except for the edges.
• the ends of the conductive circuit patterns 23a and 23b facing the outer periphery of the insulating plate 21 overlap with the ends on the outer periphery side of the heat sink 22. Therefore, the insulating circuit board 20 maintains a stress balance with the heat sink 22 on the back surface of the insulating plate 21. Damage to the insulating plate 21, such as excessive warping and cracking, is further suppressed.
• the conductive circuit patterns 23a and 23b are made of a material with excellent conductivity. Examples of such materials include copper, aluminum, or an alloy containing at least one of these.
• the conductive circuit patterns 23a and 23b can also be plated with a material with excellent corrosion resistance. Examples of such materials include nickel, nickel-phosphorus alloy, and nickel-boron alloy.
• the conductive circuit patterns 23a and 23b for the insulating plate 21 are obtained by forming a metal plate on the front surface of the insulating plate 21 and performing a process such as etching on this metal plate. Alternatively, the conductive circuit patterns 23a and 23b cut out in advance from a metal plate may be bonded to the front surface of the insulating plate 21. Note that the conductive circuit patterns 23a and 23b included in the semiconductor device 1 of this embodiment are merely an example. The number, shape, size, etc. of the conductive circuit patterns may be appropriately selected as necessary.
• the printed circuit board 30 includes an insulating layer and a plurality of upper circuit pattern layers formed on the front surface of the insulating layer.
• the printed circuit board 30 may also include a plurality of lower circuit pattern layers on the back surface of the insulating layer. Such a printed circuit board 30 faces the front surface of the insulating circuit board 20 in a plan view.
• the printed circuit board 30 is also electrically connected to the output electrodes, input electrodes, and control electrodes of the semiconductor chips 10a, 10b, 10d, and 10e.
• the conductive posts 31a, 31b, 31d, and 31e shown in FIG. 1 are only an example, and may further include conductive posts not shown in FIG. 1.
• solder 32 The upper parts of the conductive posts 31a, 31b, 31d, and 31e, together with the conductive posts not shown, are electrically connected to the upper circuit pattern layer and lower circuit pattern layer of the printed circuit board 30, and the lower parts are connected to the output electrodes and control electrodes of the semiconductor chips 10a, 10b, 10d, and 10e by solder 32.
• the solder composition of solder 32 is the same as that of solder 12. Also, the sintered body described above may be used instead of solder 32.
• the printed circuit board 30 is electrically connected to the output electrodes on the front surfaces of the semiconductor chips 10a and 10b through the conductive posts 31a and 31b. It is electrically connected to the output electrodes on the front surfaces of the semiconductor chips 10d and 10e through the conductive posts 31d and 31e.
• the printed circuit board 30 is electrically connected to the input electrodes on the rear surfaces of the semiconductor chips 10a and 10b via the conductive posts 31c and the conductive circuit patterns 23a. It is also electrically connected to the input electrodes on the rear surfaces of the semiconductor chips 10d and 10e via the conductive posts 31f and the conductive circuit patterns 23b.
• the printed circuit board 30 is electrically connected to the control electrodes of the semiconductor chips 10a and 10b via conductive posts (not shown). It is electrically connected to the control electrodes of the semiconductor chips 10d and 10e via conductive posts (not shown).
• the sealing member 35 seals the entire insulating circuit board 20, the semiconductor chips 10a, 10b, 10d, and 10e, and the printed circuit board 30. If necessary, various terminals, for example, for input, output, and control, may protrude from the upper surface of the sealing member 35.
• the sealing member 35 may be, for example, a rectangular parallelepiped, and includes a flat sealing lower surface 35a. The heat dissipation surface 22a of the heat sink 22 of the insulating circuit board 20 is exposed from the sealing lower surface 35a of the sealing member 35.
• Such a sealing member 35 may be a thermosetting resin containing a filler. That is, the sealing member 35 is composed mainly of an insulating filler and a resin (thermosetting resin) described later.
• the thermosetting resin is, for example, an epoxy resin, a phenolic resin, a maleimide resin, or a polyester resin.
• the filler may be mainly composed of an insulating ceramic having high thermal conductivity.
• Such a filler is, for example, silicon oxide, aluminum oxide, boron nitride, or aluminum nitride.
• the content of the filler is 10 volume % or more and 70 volume % or less of the entire sealing member 35.
• the semiconductor module 2 having such a configuration is one example.
• the semiconductor module 2 may be configured such that a DCB substrate and a semiconductor chip are arranged in this order on a heat dissipation base, the DCB substrate and the semiconductor chip are wired, and a case surrounding these is arranged on the heat dissipation base, and the inside of the case is sealed with a sealing member.
• the lower surface of the heat dissipation base corresponds to the heat dissipation surface 22a of the heat sink 22.
• the cooling module 3 has a cooling surface 3a on its upper surface on which the heat dissipation surface 22a of the semiconductor module 2 is disposed.
• the cooling surface 3a is wider than the sealing lower surface 35a, which is the rear surface of the semiconductor module 2, and is generally flat.
• the cooling module 3 may be, for example, a heat dissipation base equipped with heat dissipation fins, or a cooling device in which a refrigerant circulates inside.
• the joining member 4 is provided between the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 and the cooling surface 3a of the cooling module 3.
• the shape and size of the joining member 4 in a plan view in the -Z direction approximately matches the shape and size of the heat dissipation surface 22a of the heat sink 22.
• the joining member 4 may contact the sealing undersurface 35a around the heat dissipation surface 22a of the semiconductor module 2.
• the maximum size of the joining member 4 in a plan view in the -Z direction may correspond to the sealing undersurface 35a of the semiconductor module 2.
• Such a joining member 4 includes a heat conducting portion 4a and a conductive portion 4b.
• the heat conducting portion 4a thermally connects the heat dissipation surface 22a of the heat sink 22 and the cooling surface 3a of the cooling module 3.
• the heat conducting portion 4a is provided on the inside of the cooling surface 3a of the cooling module 3 (and the heat dissipation surface 22a of the semiconductor module 2) in a rectangular shape in plan view, similar to the cooling surface 3a (and the heat dissipation surface 22a).
• the corners of the rectangular heat conducting portion 4a may be rounded.
• the shape of the heat conducting portion 4a in plan view is not limited to a rectangular shape, as long as it is included inside the cooling surface 3a of the cooling module 3.
• the heat conducting portion 4a may be made of a material that has thermal conductivity, insulation, and adhesive properties.
• the thermal conductivity may be 10 W/mK or more.
• a material that can obtain this thermal conductivity may be selected.
• the adhesive strength is, for example, 10 MPa or more. Note that the adhesive strength here refers to tensile adhesive strength.
• Such a material may, for example, contain resin as a main component. This resin may be, for example, epoxy resin. Therefore, the heat conducting portion 4a of the joining member 4 is adhered to the heat dissipation surface 22a of the heat sink 22 and the cooling surface 3a of the cooling module 3, respectively.
• the conductive portion 4b is directly connected to the heat sink 22 and the cooling surface 3a of the cooling module 3, respectively.
• the conductive portion 4b is annular in plan view, continuous with the cooling surface 3a of the cooling module 3, and is provided so as to surround the periphery of the heat conducting portion 4a. That is, the conductive portion 4b is in continuous annular contact along the outer edge of the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2.
• the outer periphery of the conductive portion 4b may approximately coincide with the outer periphery of the heat dissipation surface 22a of the heat sink 22.
• the entire boundary of the conductive portion 4b with respect to the heat conducting portion 4a is in contact with the heat conducting portion 4a.
• the outer corners of the conductive portion 4b may be R-chamfered. In this way, by R-chamfering the corners of the heat conducting portion 4a and the conductive portion 4b of the joining member 4, stress concentration at the corners can be prevented. This prevents the joining member 4 from peeling off the heat dissipation surface 22a and the cooling surface 3a.
• the conductive portion 4b is preferably made of a conductive material and has adhesive properties.
• conductive materials include the above-mentioned solder, metal particle paste, and conductive adhesive.
• the metal particle paste include pastes of silver, copper, or alloys containing at least one of these. The diameter of these particles may be less than 10 ⁇ m.
• the conductive adhesive may be composed of the same main component as the heat conducting portion 4a and includes a conductive filler.
• the conductive filler may be, for example, a metal. Examples of the metal include silver, copper, gold, nickel, chromium, aluminum, or alloys containing at least one of these.
• the base material of the conductive portion 4b is the same base material as the heat conducting portion 4a, the adhesion between the conductive portion 4b and the heat conducting portion 4a is improved.
• the conductive portion 4b has a higher rigidity than the heat conducting portion 4a, the conductive portion 4b surrounds the heat conducting portion 4a, and the heat conducting portion 4a is fixed by the conductive portion 4b. This prevents the heat conducting portion 4a from peeling off.
• heat generated from the semiconductor module 2 is conducted from the heat dissipation surface 22a of the heat sink 22 through the heat conductive portion 4a to the cooling surface 3a of the cooling module 3, where it is cooled. Furthermore, the heat dissipation surface 22a of the heat sink 22 of the semiconductor module 2 is electrically connected to the cooling surface 3a of the cooling module 3 via the conductive portion 4b. In other words, the heat sink 22 of the semiconductor module 2 and the cooling surface 3a of the cooling module 3 are at the same potential due to the conductive portion 4b.
• FIG. 3 is a flow chart showing the manufacturing method of the semiconductor device of the first embodiment.
• a preparation step is performed to prepare the components of the semiconductor device 1 (step S1).
• the components prepared here include, for example, the semiconductor chips 10a, 10b, 10d, and 10e that constitute the semiconductor module 2, the insulating circuit board 20, the printed circuit board 30 on which the conductive posts 31a, 31b, 31c, 31d, 31e, and 31f are provided, the sealing member 35, and the bonding member 4.
• Another example is the cooling module 3.
• Components necessary for manufacturing the semiconductor device 1 that are not listed here may also be prepared.
• Manufacturing equipment used in manufacturing the semiconductor device 1 may also be prepared. Examples of the manufacturing equipment include an application device that applies solder and a molding device that seals with a sealing member.
• step S2 a semiconductor module assembly process is performed to assemble the semiconductor module 2 (step S2).
• the semiconductor module assembly process the following steps are performed.
• the semiconductor chips 10a, 10b, 10d, and 10e are bonded to the insulating circuit board 20 (step S2a).
• step S2a will be explained using FIG. 4.
• FIG. 4 is a diagram for explaining the semiconductor module assembly process of the first embodiment.
• the structure including the cooling module 3 and the semiconductor module 2 arranged on the cooling surface 3a of the cooling module 3 via the bonding member 4 is heated.
• the heating temperature at this time is, for example, 200°C or less. This prevents the solder 12, 32 in the semiconductor module 2 from remelting.
• the semiconductor module 2 is pressed against the cooling module 3 side with a constant pressure. This makes it possible to control the thickness of the bonding member 4. By heating in this manner, the thermally conductive portion 4a of the bonding member 4 hardens, and the semiconductor module 2 and the cooling module 3 are bonded. As a result, the semiconductor device 1 shown in Figures 1 and 2 is obtained.
• Figure 12 is a side cross-sectional view of the semiconductor device of the reference example.
• Figure 13 is a plan view of the cooling surface of the semiconductor device of the reference example. Note that Figures 12 and 13 correspond to Figures 1 and 2. Therefore, Figure 13 is a cross-sectional view of the semiconductor device 100 of Figure 12 in the X-Y plane represented by the dashed dotted line. In other words, Figure 13 is a plan view of the cooling surface 3a of the cooling module 3 to which the bonding member 400 has been applied.
• Figure 12 is a cross-section at the position of the dashed dotted line Y-Y of Figure 13, viewed in the +Y direction.
• the entire joining member 4 may be made of a specific base material, and the conductive portion 4b may be introduced into the joining member 4 by biasing the distribution of the conductive filler material contained in the base material in the joining member 4.
• FIG. 14 is a side cross-sectional view of the semiconductor device according to the second embodiment.
• FIG. 15 is a plan view of the cooling surface of the semiconductor device according to the second embodiment. Note that FIGS. 14 and 15 correspond to FIGS. 1 and 2. Therefore, FIG. 15 is a cross-sectional view of the semiconductor device 1a in FIG. 14 in the XY plane represented by the dashed dotted line. That is, FIG. 15 is a plan view of the cooling surface 3a of the cooling module 3.
• FIG. 14 is a cross-section taken along dashed dotted line I4-I4 in FIG. 15, as viewed in the +Y direction.
• the semiconductor device 1a has a semiconductor module 2, a cooling module 3, and a joint member 4, similar to the semiconductor device 1 of the first embodiment.
• the joint member 4 also includes a heat conducting portion 4a and a conductive portion 4b.
• the heat conducting portion 4a and the conductive portion 4b are not in contact with each other, and a gap is provided between them.
• the conductive portion 4b is provided in a continuous ring shape along the outer edge of the heat dissipation surface 22a of the heat sink 22, similar to the first embodiment.
• a method for manufacturing the semiconductor device 1b of the third embodiment will be described with reference to FIG. 3.
• the semiconductor device 1b of the third embodiment is manufactured in consideration of the downward warping of the insulating circuit board 20, as described below.
• Such a semiconductor device 1b is also formed according to the flow chart shown in FIG. 3 of the first embodiment. The following mainly describes the manufacturing process that differs from the first embodiment.
• a coating step is performed to apply the bonding material 4 (step S3).
• the bonding material 4 may be applied to either the heat dissipation surface 22a of the semiconductor module 2 or the cooling surface 3a of the cooling module 3.
• FIG. 16 and FIG. 17 are diagrams for explaining the coating step of the third embodiment. Note that FIG. 16 and FIG. 17 correspond to FIG. 10 and FIG. 11.
• FIG. 16 is a cross-sectional view taken along dashed line I5-I5 in FIG. 17.
• the conductive portion 4b is applied to the cooling surface 3a of the cooling module 3.
• the thermally conductive portion 4a is applied to the cooling surface 3a of the cooling module 3.
• a syringe is used to apply the thermally conductive portion 4a to the inside of the conductive portion 4b of the cooling surface 3a.
• the thermally conductive portion 4a is applied to the area surrounded by the conductive portion 4b, for example, in three places.
• the spacing between the thermally conductive portions 4a is wider than in the first embodiment, and the total volume of the thermally conductive portions 4a is smaller than in the first embodiment.
• the amount of coating on the heat conductive portion 4a is reduced compared to the first embodiment, and there are many gaps. Therefore, the pressed heat conductive portion 4a does not leak from the conductive portion 4b, and fills the area formed by the heat dissipation surface 22a of the heat sink 22, the cooling surface 3a of the cooling module 3, and the conductive portion 4b, as shown in FIG. 18. That is, the heat conductive portion 4a at this time may be arranged with a gap according to the amount of warping of the insulating circuit board 20 (see FIG. 17). This gap provides an escape for the heat conductive portion 4a that is pressed when the insulating circuit board 20 warps downward.
• the heat conducting portion 4a of the joining member 4 does not leak out, and the heat dissipation surface 22a of the downwardly curved heat sink 22 and the cooling surface 3a of the cooling module 3 can be joined without any gaps, thereby preventing a decrease in heat dissipation.
• Fig. 19 is a plan view of the cooling surface of the semiconductor device of the fourth embodiment.
• Fig. 19 corresponds to Fig. 2.
• the semiconductor device 1a of the fourth embodiment has a semiconductor module 2 (not shown here), a cooling module 3, and a joint member 4, similar to the semiconductor device 1 of the first embodiment.
• the joint member 4 also includes a heat conducting portion 4a and a conductive portion 4b.
• linear conductive portions 4b are provided facing each other on the cooling surface 3a, and the heat conducting portion 4a is provided between the facing conductive portions 4b. That is, the facing linear conductive portions 4b correspond to the facing short sides of the heat dissipation surface 22a of the heat sink 22.
• the heat conducting portion 4a corresponds to the entire surface of the heat dissipation surface 22a between the facing conductive portions 4b in a plan view.
• the case where the heat conducting portion 4a and the conductive portion 4b are in contact with each other is shown. In this case, a gap may be provided between the heat conducting portion 4a and the conductive portion 4b, as in the second embodiment.
• the opposing conductive portions 4b correspond to opposing short sides of the heat dissipation surface 22a. This is not limited to the above case, and the conductive portions 4b may correspond to opposing long sides of the heat dissipation surface 22a, or may correspond to at least one of the short sides and one of the long sides of the heat dissipation surface 22a.
• the thermally conductive portions 4a may correspond to a part or the entire area of the heat dissipation surface 22a excluding the conductive portions 4b in a plan view.
• the joining member 4 includes a heat-conducting portion 4a that joins the heat dissipation surface 22a and the cooling surface 3a, and a conductive portion 4b that is directly connected to the heat dissipation plate 22 and the cooling surface 3a, respectively.
• the semiconductor device of the fourth embodiment is electrically stable, preventing a decrease in reliability.
• FIG. 20 is a side cross-sectional view of the semiconductor device according to the fifth embodiment.
• Fig. 21 is a rear view of the semiconductor module according to the fifth embodiment.
• Fig. 21 is a cross-sectional view of the semiconductor device 1d in Fig. 20 in the XY plane represented by the dashed line. That is, Fig. 21 is a plan view of the sealing lower surface 35a of the semiconductor module 2.
• the dashed line in the heat conduction portion 4a represents the position of the outer periphery of the heat dissipation surface 22a.
• Fig. 20 is a cross-sectional view taken along the dashed line I7-I7 in Fig. 21, as viewed in the +Y direction.
• the semiconductor device 1d of the fifth embodiment has a semiconductor module 2 and a cooling module 3, similar to the semiconductor device 1 of the first embodiment.
• the joint member 4 is provided between the sealing lower surface 35a of the semiconductor module 2 and the cooling surface 3a of the cooling module 3.
• Such a joint member 4 also includes a heat conducting portion 4a and a conductive portion 4b.
• the conductive portion 4b of the joint member 4 in the fifth embodiment is provided on the heat dissipation surface 22a of the heat sink 22 in a plan view.
• the conductive portion 4b may be provided in one or more portions as long as it penetrates the joint member 4 (heat conduction portion 4a) so as to directly connect the heat dissipation surface 22a of the heat sink 22 and the cooling surface 3a of the cooling module 3.
• the conductive portion 4b in Figs. 20 and 21 is, for example, cylindrical and provided in one portion.
• the conductive portion 4b is not limited to a cylindrical shape, and may be, for example, a columnar shape including a rectangular columnar shape, or a truncated cone shape.
• the connection direction between the heat dissipation surface 22a and the cooling surface 3a of the conductive portion 4b is not limited to a vertical ( ⁇ Z direction), and may be inclined with respect to the ⁇ Z direction.
• the heat conducting portion 4a may be provided on the heat dissipation surface 22a excluding the portion where the conductive portion 4b is provided in a plan view.
• the heat conducting portion 4a in Figs. 20 and 21 is provided inside the sealing lower surface 35a, including the heat dissipation surface 22a excluding the portion where the conductive portion 4b is provided in a plan view.
• the heat conducting portion 4a has a shape wider than the heat dissipation surface 22a in a plan view.
• the joining member 4 comes into contact with the sealing lower surface 35a, so that a certain adhesion strength of the joining member 4 (heat conducting portion 4a) to the semiconductor module 2 can be ensured.
• the joining member 4 includes a heat conductive portion 4a that joins the heat dissipation surface 22a and the cooling surface 3a, and a conductive portion 4b that is directly connected to the heat dissipation plate 22 and the cooling surface 3a, respectively.
• This allows the heat dissipation plate 22 and the cooling module 3 to have the same potential, preventing the occurrence of corona discharge.
• the joining member 4 allows the semiconductor module 2 and the cooling module 3 to be reliably joined. This makes the semiconductor device 1d electrically stable, making it difficult for the semiconductor module 2 and the cooling module 3 to separate, and preventing a decrease in reliability.
• Figures 20 and 21 show the case where the conductive portion 4b is in contact with and surrounded by the heat conducting portion 4a. As in the second embodiment, a gap may be provided at the boundary between the conductive portion 4b and the heat conducting portion 4a.
• FIG. 22 is a cross-sectional side view of the semiconductor device according to the sixth embodiment.
• FIG. 23 is a rear view of the semiconductor module according to the sixth embodiment.
• FIG. 24 is a side view of the semiconductor device according to the sixth embodiment.
• FIG. 23 is a cross-sectional view of the semiconductor device 1e in FIG. 22 in the XY plane represented by the dashed line. That is, FIG. 23 is a plan view of the sealing lower surface 35a of the semiconductor module 2.
• FIG. 22 is a cross-section taken along dashed line I8-I8 in FIG. 23, as viewed in the +Y direction.
• FIG. 24 is a side view of the semiconductor device 1e in FIG. 22 as viewed in the -X direction.
• the semiconductor device 1e includes a semiconductor module 2, a cooling module 3, and a joining member 4 that fixes the semiconductor module 2 and the cooling module 3.
• the semiconductor module 2 includes semiconductor chips 10a, 10b, 10d, and 10e, an insulating circuit board 20, a printed circuit board 30, and a sealing member 35 that seals them.
• a groove 35b is formed on the sealing underside 35a of the sealing member 35 included in the semiconductor module 2 of the semiconductor device 1e.
• the cooling module 3 is the same as in the first embodiment.
• the joining member 4 includes a heat conducting portion 4a and a conductive portion 4b.
• the heat conducting portion 4a is provided so as to include the entire heat dissipation surface 22a of the heat sink 22 included in the semiconductor module 2.
• the heat conducting portion 4a may have a shape that is wider than the heat dissipation surface 22a in a plan view.
• the heat conducting portion 4a is shown to be provided on the entire sealing lower surface 35a of the sealing member 35 included in the semiconductor module 2.
• the conductive portion 4b connects the cooling surface 3a of the cooling module 3 and the side of the heat sink 22 through the portion of the heat conducting portion 4a that protrudes from the heat sink 22.
• the conductive portion 4b is L-shaped in a side view and includes a first portion 4b1 and a second portion 4b2 that are each linear.
• the first portion 4b1 is provided in an area (space) that is formed by the groove 35b of the sealing member 35 of the semiconductor module 2, the heat sink 22 of the insulating circuit board 20, and the heat conducting portion 4a described below.
• One inner end of the first portion 4b1 is connected to the side of the heat sink 22.
• the other outer end of the first portion 4b1 extends outward (in the +X direction) from the side of the sealing member 35 (and the heat conducting portion 4a).
• the second portion 4b2 is provided on the side of the heat conducting portion 4a, which will be described later.
• One upper end of the second portion 4b2 is integrally connected to the outer end of the first portion 4b1.
• the other lower end of the second portion 4b2 extends in the -Z direction and is connected to the cooling surface 3a of the cooling module 3.
• semiconductor device 1e is also formed according to the flowchart shown in FIG. 3 of the first embodiment. Below, the manufacturing process that differs from the first embodiment will be mainly described.
• FIG. 25 and FIG. 26 are diagrams for explaining the coating step of the sixth embodiment.
• FIG. 26 is a rear view of the semiconductor module 2 in FIG. 25.
• FIG. 25 is a cross section taken along dashed line I9-I9 in FIG. 26, as viewed in the +Y direction.
• a groove 35b perpendicular to the outside from one short side of the heat dissipation surface 22a may be formed, for example, by cutting, at the end of one short side of the sealing lower surface 35a in a plan view of the semiconductor module 2 formed in step S2.
• the groove 35b may extend from the side of the sealing member 35 to the side of the heat dissipation surface 22a, and the number and location of the groove 35b may be any number, and the width of the groove 35b (in the ⁇ Y direction or ⁇ X direction) may be a predetermined length.
• the groove 35b does not necessarily have to be formed in the semiconductor module 2 in step S3.
• the groove 35b may be introduced by leaving a space in the semiconductor module 2 where the groove 35b is to be formed and sealing it with the sealing member 35.
• the first part 4b1 of the conductive part 4b is applied to the groove 35b of the sealing lower surface 35a of the semiconductor module 2.
• the material applied here may be, for example, a conductive adhesive.
• the outer end of the applied first part 4b1 of the conductive part 4b is exposed from the side of the sealing member 35.
• FIG. 27 is a diagram for explaining the attachment process of the sixth embodiment.
• the attachment process in this case is performed in the same manner as in the first embodiment, and as shown in FIG. 27, a heat conductive portion 4a is provided between the sealing lower surface 35a including the first portion 4b1 of the conductive portion 4b of the semiconductor module 2 and the cooling surface 3a of the cooling module 3.

Landscapes

• Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Priority Applications (3)

Applications Claiming Priority (2)

Related Child Applications (1)

Publications (1)

Family

ID=96471236

Family Applications (1)

Country Status (4)

Citations (7)

• 2024
  • 2024-11-26 DE DE112024002029.1T patent/DE112024002029T5/de active Pending
  • 2024-11-26 WO PCT/JP2024/041777 patent/WO2025154399A1/ja active Pending
  • 2024-11-26 JP JP2025570559A patent/JPWO2025154399A1/ja active Pending
• 2025
  • 2025-12-26 US US19/433,627 patent/US20260123418A1/en active Pending

Patent Citations (7)

Also Published As

Similar Documents

Legal Events