WO2025022898A1 - プリント配線板およびプリント配線板の製造方法 - Google Patents

プリント配線板およびプリント配線板の製造方法 Download PDF

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Publication number
WO2025022898A1
WO2025022898A1 PCT/JP2024/022768 JP2024022768W WO2025022898A1 WO 2025022898 A1 WO2025022898 A1 WO 2025022898A1 JP 2024022768 W JP2024022768 W JP 2024022768W WO 2025022898 A1 WO2025022898 A1 WO 2025022898A1
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WO
WIPO (PCT)
Prior art keywords
region
hole
printed wiring
wiring board
electroless plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2024/022768
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English (en)
French (fr)
Japanese (ja)
Inventor
秀樹 松岡
聡志 木谷
和弘 宮田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Sumitomo Electric Printed Circuits Inc
Original Assignee
Sumitomo Electric Industries Ltd
Sumitomo Electric Printed Circuits Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd, Sumitomo Electric Printed Circuits Inc filed Critical Sumitomo Electric Industries Ltd
Priority to JP2025535650A priority Critical patent/JPWO2025022898A1/ja
Priority to CN202480044112.9A priority patent/CN121420628A/zh
Publication of WO2025022898A1 publication Critical patent/WO2025022898A1/ja
Anticipated expiration legal-status Critical
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Definitions

  • the present disclosure relates to a printed wiring board and a method for manufacturing a printed wiring board.
  • This application claims priority based on Japanese Application No. 2023-119454 filed on July 21, 2023, and incorporates by reference all of the contents of the above-mentioned Japanese application.
  • Patent Document 1 A printed wiring board in which through holes are filled with a hole-filling resin is known.
  • a printed wiring board includes a base film, a first through hole provided in the base film, a hole-filling resin filled in the first through hole, and a pad portion formed on the surface of the base film at the end of the first through hole.
  • the pad portion has an annular first region and a second region disposed outside the outer periphery of the first region. The average height of the first region is greater than the average height of the second region.
  • FIG. 1 is a schematic cross-sectional view showing a printed wiring board according to an embodiment of the present disclosure.
  • FIG. 2 is a schematic plan view of the printed wiring board of FIG.
  • FIG. 3 is a flow diagram showing a method for manufacturing the printed wiring board of FIG. 4A to 4C are schematic cross-sectional views showing a procedure for forming the first through-holes in the step of forming the first through-holes in FIG.
  • FIG. 5 is a schematic cross-sectional view showing a step following FIG. 4 in the process of forming the first through-hole in FIG. 6A to 6C are schematic cross-sectional views showing a procedure for filling the holes with the filling resin in the step of filling the holes with the filling resin shown in FIG.
  • FIG. 7 is a schematic cross-sectional view showing a state when filling of the hole filling resin in the step of filling the hole filling resin in FIG. 3 is completed.
  • 8A to 8C are schematic cross-sectional views showing a procedure for forming the pad portion in the process of forming the pad portion in FIG.
  • FIG. 9 is a schematic cross-sectional view showing a step following FIG. 8 in the process of forming the pad portion in FIG.
  • FIG. 10 is a schematic cross-sectional view showing a state when the formation of the pad portion in the step of forming the pad portion in FIG. 3 is completed.
  • FIG. 11 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring board of FIG. FIG.
  • FIG. 12 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring boards shown in FIGS. 1 and 11.
  • FIG. 13 is a flow diagram showing a method for manufacturing the printed wiring board of FIG. 14A to 14C are schematic cross-sectional views showing a procedure for forming the conductive pattern in the step of forming the conductive pattern in FIG.
  • FIG. 15 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring boards in FIGS. 1, 11, and 12.
  • FIG. 15 is a schematic cross-sectional view showing a printed wiring board according to an embodiment different from the printed wiring boards in FIGS. 1, 11, and 12.
  • Patent Document 1 describes forming a copper plating layer on the entire top and bottom surfaces of a resin panel and on the inner peripheral surface of the through-hole for the through-hole in the resin panel, and then filling the inside of the through-hole.
  • Patent Document 1 describes polishing and removing the filling resin protruding from the copper plating layer together with the copper plating layer to flatten it, and then applying an additional copper plating layer to the entire top and bottom surfaces of the resin panel, and forming a circuit pattern by a subtractive method.
  • This disclosure was made based on the above circumstances, and aims to provide a printed wiring board that makes it easy to form fine conductive patterns.
  • the printed wiring board according to one aspect of the present disclosure makes it easy to form fine conductive patterns.
  • a printed wiring board includes a base film, a first through hole provided in the base film, a hole-filling resin filled in the first through hole, and a pad portion formed on the surface of the base film at an end of the first through hole.
  • the pad portion has an annular first region and a second region disposed outside the outer periphery of the first region. The average height of the first region is greater than the average height of the second region.
  • the average height of the first region is greater than the average height of the second region.
  • the surface of the hole-filling resin and the surface of the plating layer are polished to be flush with each other, and then the conductive pattern is formed using a subtractive method. Therefore, the printed wiring board of the present disclosure is different from conventional printed wiring boards. Since there is no need to use a subtractive method when creating the printed wiring board of the present disclosure, it is possible to form a fine conductive pattern on the base film.
  • the printed wiring board of the present disclosure may have a step between the first region and the second region.
  • a step can be easily formed between the first region and the second region.
  • the first region and the second region may each have a plurality of plating layers, and the number of plating layers in the first region may be different from the number of plating layers in the second region. Furthermore, the number of plating layers in the first region may be greater than the number of plating layers in the second region. This makes it easy to make the average height of the first region greater than the average height of the second region.
  • the first region may have a first electroless plating layer disposed directly or indirectly on the base film, a first electroless plating layer laminated on the first electroless plating layer, a second electroless plating layer laminated on the first electroless plating layer, and a second electroless plating layer laminated on the second electroless plating layer. This makes it easy to make the average height of the first region greater than the average height of the second region.
  • the second region may have the first electroless plating layer, the second electroless plating layer laminated on the first electroless plating layer, and the second electroplating layer laminated on the second electroless plating layer.
  • the pad portion may have a third region that closes the region within the inner periphery of the first region, and the third region may have the second electroless plating layer and the second electroplating layer laminated on the second electroless plating layer. This makes it easy to form a pad-on-via structure.
  • the arithmetic mean roughness Sa of the surface of the hole-filling resin may be 1.0 ⁇ m or more and 10.0 ⁇ m or less. This makes it easier to improve the anchor effect on the member placed on the surface of the hole-filling resin.
  • the printed wiring board of the present disclosure may further include a second through hole that is not filled with resin.
  • the average thickness of the second through hole may be greater than the average thickness of the first through hole.
  • the printed wiring board of the present disclosure may include a circuit disposed on the surface of the base film.
  • the etch factor of the circuit may be 8 or more. Fine circuits can be formed on the printed wiring board of the present disclosure.
  • a method for manufacturing a printed wiring board includes the steps of forming a first through-hole in a base film, filling the first through-hole with a hole-filling resin, and, after the step of filling the hole-filling resin, forming a conductive pattern on the surface of the base film by a semi-additive method.
  • the method of manufacturing a printed wiring board disclosed herein includes a step of forming a conductive pattern on the surface of the base film by a semi-additive method after the step of filling the holes with a filling resin, making it easy to form a fine conductive pattern on the base film.
  • the "average height” is the average value of the heights at any 10 points.
  • the height of the pad portion and the height of each region are heights based on the surface of the base film.
  • the "height of the first region” is the distance from the surface of the base film to the surface of the first region, or the distance from a plane extending from the surface of the base film to the surface of the first region.
  • the “height of the second region” is the distance from the surface of the base film to the surface of the second region.
  • “Arithmetic mean roughness Sa” is a value measured in accordance with ISO25178.
  • the "etch factor of a circuit” is the ratio of the etching depth in the thickness direction of the circuit to the etching depth in the width direction of the circuit.
  • the etch factor of a circuit is calculated as follows: A cross section is observed at any five points of the circuit, and the top width, bottom width, and thickness of the circuit at each cross section are measured. From these measurements, the etch factor at each cross section is calculated. The average value of the etch factors of these cross sections is the etch factor of the circuit.
  • the printed wiring board 10 in FIG. 1 and FIG. 2 includes a base film 1, a first through hole 2 provided in the base film 1, a hole filling resin 3 filled in the first through hole 2, and a pad portion 4 formed at the end of the first through hole 2 on the surface of the base film 1.
  • the pad portion 4 has a first annular region R1 and a second region R2 disposed outside the outer periphery of the first region R1.
  • the average height H1 of the first region R1 is greater than the average height H2 of the second region R2.
  • the printed wiring board 10 includes one base film 1.
  • the printed wiring board of the present disclosure may include multiple base films.
  • the "through hole” includes a through hole penetrating all the base films of the printed wiring board and an interstitial via hole penetrating only some of the base films.
  • the printed wiring board 10 may include other members such as an insulating layer disposed on the base film 1.
  • the conductive pattern of a conventional printed wiring board is formed using a subtractive method after polishing so that the surface of the hole-filling resin and the surface of the plating layer are flush.
  • the conductive pattern of printed wiring board 10 is formed, for example, using a semi-additive method after filling hole 2 with hole-filling resin 3. Therefore, printed wiring board 10 differs from conventional printed wiring boards.
  • the average height H1 of first region R1 can be made larger than the average height H2 of second region R2. Since there is no need to use a subtractive method in forming the conductive pattern of printed wiring board 10, it is possible to form a fine conductive pattern on base film 1.
  • the base film 1 has insulating properties.
  • the base film 1 may have flexibility.
  • the printed wiring board 10 can be a flexible printed wiring board.
  • the main component of the base film 1 is, for example, polyimide, polyethylene terephthalate, liquid crystal polymer, or fluororesin.
  • the base film 1 does not have to have flexibility.
  • the main component of the base film 1 is, for example, glass epoxy, paper phenol, paper epoxy, glass composite, or glass.
  • the "main component” refers to the component with the largest content in terms of mass, for example, a component with a content of 50 mass% or more.
  • the lower limit of the average thickness of the base film 1 may be 3 ⁇ m, 5 ⁇ m, or 10 ⁇ m in order to increase the insulating strength and mechanical strength.
  • the upper limit of the average thickness may be 200 ⁇ m, 150 ⁇ m, or 100 ⁇ m in order to make the printed wiring board 10 thinner.
  • Average thickness refers to the average value of the thickness at any 10 points.
  • the first through hole 2 is formed by a through hole 2a penetrating the base film 1 and a plating layer laminated on the inner peripheral surface of the through hole 2a.
  • the diameter of the through hole 2a may be uniform along its axis.
  • the cross-sectional shape of the through hole 2a perpendicular to its axis is, for example, a circle.
  • the plating layers are a first electroless plating layer 11 that is laminated directly on the inner surface of the through hole 2a, and a first electroplating layer 12 that is laminated directly on the first electroless plating layer 11.
  • the plating layers are two layers, the first electroless plating layer 11 and the first electroplating layer 12.
  • the main components of the first electroless plating layer 11 and the first electroplating layer 12 may be the same or different.
  • the main component of the first electroless plating layer 11 and the first electroplating layer 12 is not particularly limited, but is, for example, copper.
  • the lower limit of the average thickness (average thickness of the plating layer) T1 of the first through hole 2 may be 5 ⁇ m, 10 ⁇ m, or 15 ⁇ m in order to improve the reliability of the electrical connection.
  • the upper limit of the average thickness T1 may be 30 ⁇ m, 25 ⁇ m, or 20 ⁇ m in order to easily control the thicknesses of the first electroless plating layer 11 and the first electroplating layer 12.
  • the lower limit of the average diameter D of the first through-holes 2 (average diameter based on the inner circumferential surface of the first electroplating layer 12) may be 100 ⁇ m, 150 ⁇ m, or 200 ⁇ m in order to easily fill the first through-holes 2 with the hole-filling resin 3.
  • the upper limit of the average diameter D may be 1000 ⁇ m, 800 ⁇ m, or 500 ⁇ m in order to sufficiently fill the first through-holes 2 with the hole-filling resin 3.
  • “Diameter” refers to the diameter of a perfect circle having an area equal to the area of a cross section perpendicular to the axis of the through-hole.
  • Average diameter refers to the average value of the diameters at any five points along the axis.
  • the internal space of the first through-hole 2 is filled with a hole-filling resin 3.
  • the hole-filling resin 3 is fixed to the inner peripheral surface of the first electroplating layer 12.
  • the main component of the hole-filling resin 3 is a thermosetting resin such as an epoxy resin.
  • the hole-filling resin 3 may contain a filler.
  • the main component of the filler is, for example, copper, silica, alumina, or calcium carbonate.
  • the pad portion 4 has a first region R1 and a second region R2 disposed outside the outer periphery of the first region R1. As shown in FIG. 2, both the first region R1 and the second region R2 are annular. In the pad portion 4, a region having an average height greater than that of the first region R1 may not exist outside the outer periphery of the first region R1.
  • the pad portion 4 has a third region R3 that blocks a region within the inner periphery of the first region R1.
  • the third region R3 is disposed on the hole-filling resin 3.
  • the pad portion 4 has a pad-on-via structure, and the surface of the hole-filling resin 3 is covered by the third region R3.
  • the pad portion 4 may have a connection region R4 between the first region R1 and the second region R2.
  • the pad portion 4 includes a part of the conductive underlayer 15, a part of the first electroless plating layer 11, a part of the first electroplating layer 12, a part of the second electroless plating layer 13, a part of the second electroplating layer 14, and a part of the hole-filling resin 3.
  • the first region R1 can be the region with the largest average height H1 in the entire pad portion 4.
  • the first region R1 includes a first electroplated layer 12 disposed on the base film 1 at the end of the first through hole 2.
  • the first electroless plated layer 11 and the first electroplated layer 12 protrude outward from the end of the through hole 2a and are also disposed on the surface of the base film 1.
  • the first region R1 includes the first electroless plated layer 11 and the first electroplated layer 12 disposed on the base film 1 and protrude from the through hole 2a.
  • the first region R1 is a portion where the first electroplated layer 12 exists in a plan view.
  • the height of the first region R1 is the distance from the surface of the base film 1 or an extension of the surface of the base film 1 to the surface of the second electroplating layer 14 (the distance from the surface of the base film 1 or an extension of the surface of the base film 1 to the exposed surface of the second electroplating layer 14 that is closer to the surface of the base film 1).
  • the first region R1 has a plurality of plating layers.
  • the first region R1 has a first electroless plating layer 11 disposed on the base film 1, a first electroless plating layer 12 laminated on the first electroless plating layer 11, a second electroless plating layer 13 laminated on the first electroless plating layer 12, and a second electroless plating layer 14 laminated on the second electroless plating layer 13.
  • the average height H1 of the first region R1 can be easily made greater than the average height H2 of the second region R2.
  • the first electroless plating layer 11, the first electroplating layer 12, the second electroless plating layer 13, and the second electroplating layer 14 are directly laminated on top of each other in this order.
  • the first region R1 has a conductive underlayer 15 disposed between the base film 1 and the first electroless plating layer 11.
  • the first region R1 has five layers, with the conductive underlayer 15, the first electroless plating layer 11, the first electroplating layer 12, the second electroless plating layer 13, and the second electroplating layer 14 being directly laminated on top of each other in this order from the surface of the base film 1.
  • the first region R1 has a portion that does not include the first electroless plating layer 11 and the conductive base layer 15. This portion is located inside the first through-hole 2 from the above-mentioned five-layer portion in a plan view.
  • the height of the first region R1 may be uniform. In this case, the entire first region R1 is a flat portion. "Uniform height" means that the difference between the maximum height and the minimum height is 3 ⁇ m or less.
  • the printed wiring board 10 may have a step between the first region R1 and the second region R2. In the printed wiring board 10, a step can be easily formed between the first region R1 and the second region R2.
  • the conductive underlayer 15 is formed of a metal foil such as copper foil.
  • the first electroless plating layer 11 is integrally formed of the same metal as the first electroless plating layer 11 constituting the first through-hole 2. Therefore, the thickness of the first electroless plating layer 11 constituting the first through-hole 2 is equal to the thickness of the first electroless plating layer 11 constituting the first region R1.
  • the first electroplating layer 12 is integrally formed of the same plating metal as the first electroplating layer 12 constituting the first through-hole 2.
  • the first electroplating layer 12 constituting the first region R1 can be polished when removing the hole-filling resin 3 as described later.
  • the thickness of the first electroplating layer 12 constituting the first region R1 may be smaller than the thickness of the first electroplating layer 12 constituting the first through-hole 2.
  • the upper limit of the difference between the thickness of the first electroplating layer 12 constituting the first region R1 and the thickness of the first electroplating layer 12 constituting the first through-hole 2 may be 4 ⁇ m, 3 ⁇ m, or 2 ⁇ m.
  • the second electroless plating layer 13 is laminated during the process of forming a conductive pattern, for example, by a semi-additive method.
  • the second electroless plating layer 13 may be a plating layer obtained by filling the first through-holes 2 with a hole-filling resin 3, forming an electroless plating layer over the entire surface of the base film 1, and then removing a portion of the electroless plating layer by etching.
  • the main component of the second electroless plating layer 13 is not particularly limited, but is, for example, copper.
  • the second electroplating layer 14 is laminated during the process of forming a conductive pattern, for example, by a semi-additive method.
  • the second electroplating layer 14 may be a plating layer obtained by forming an electroless plating layer over the entire surface of the base film 1, forming a resist pattern on the electroless plating layer, and performing electroplating on the electroless plating layer exposed from the resist pattern.
  • the main component of the second electroplating layer 14 is not particularly limited, but is, for example, copper.
  • the second region R2 may be the outermost region of the pad portion 4 (the region located at the outermost position in the radial direction of the first through hole 2 in a plan view).
  • the second region R2 has a plurality of plating layers.
  • the second region R2 has a first electroless plating layer 11, a second electroless plating layer 13 laminated on the first electroless plating layer 11, and a second electroplating layer 14 laminated on the second electroless plating layer 13.
  • the average height H2 of the second region R2 relative to the average height H1 of the first region R1 can be made smaller by a thickness equivalent to the first electroplating layer 12.
  • the average height H1 of the first region R1 can be easily made larger than the average height H2 of the second region R2.
  • the height of the second region R2 is the distance from the surface of the base film 1 to the surface of the second electroplating layer 14 (the distance from the surface of the base film 1 to the exposed surface of the second electroplating layer 14 that is closer to the surface of the base film 1).
  • the number of plating layers in the first region R1 is different from the number of plating layers in the second region R2. More specifically, since the first region R1 has an electroplating layer (first electroplating layer 12) and the second region R2 does not have an electroplating layer, the number of plating layers in the first region R1 is greater than the number of plating layers in the second region R2. Therefore, the average height H1 of the first region R1 can be easily made greater than the average height H2 of the second region R2.
  • the second region R2 In the second region R2, the first electroless plating layer 11, the second electroless plating layer 13, and the second electroplating layer 14 are directly laminated in this order.
  • the second region R2 has a conductive underlayer 15 disposed between the base film 1 and the first electroless plating layer 11.
  • the second region R2 has four layers, which are the conductive underlayer 15, the first electroless plating layer 11, the second electroless plating layer 13, and the second electroplating layer 14 laminated in this order from the surface of the base film 1.
  • the second region R2 may be formed from only these four layers.
  • the height of the second region R2 may be uniform. In this case, the entire second region R2 is a flat portion. The height of the second region R2 may gradually decrease along a direction away from the axis of the through hole 2. In this case, the second region R2 may be provided integrally with the connection region R4. When the second region R2 is provided integrally with the connection region R4, there may be no step between the first region R1 and the second region R2.
  • the conductive base layer 15 is integrally formed from the same metal foil as the conductive base layer 15 arranged in the first region R1. Therefore, the thickness of the conductive base layer 15 in the first region R1 is equal to the thickness of the conductive base layer 15 in the second region R2.
  • the first electroless plating layer 11 is integrally formed from the same plating metal as the first electroless plating layer 11 arranged in the first region R1. Therefore, the thickness of the first electroless plating layer 11 in the first region R1 is equal to the thickness of the first electroless plating layer 11 in the second region R2.
  • the second electroless plating layer 13 is integrally formed from the same plating metal as the second electroless plating layer 13 arranged in the first region R1.
  • the thickness of the second electroless plating layer 13 in the first region R1 is equal to the thickness of the second electroless plating layer 13 in the second region R2.
  • the second electroless plating layer 14 is integrally formed from the same plating metal as the second electroless plating layer 14 arranged in the first region R1. Therefore, the thickness of the second electroplating layer 14 in the first region R1 is equal to the thickness of the second electroplating layer 14 in the second region R2.
  • the second region R2 does not have the first electroplating layer 12, unlike the first region R1. Therefore, the average height of the flat portion in the second region R2 can be smaller than the height of the first region R1 by approximately the thickness of the first electroplating layer 12.
  • the lower limit of the difference between the average height of the flat portion in the first region R1 and the average height of the flat portion in the second region R2 may be 5 ⁇ m, 10 ⁇ m, or 15 ⁇ m in order to make the first electroplating layer 12 sufficiently thick to increase the electrical connection reliability of the first through hole 2.
  • the upper limit of the difference may be 30 ⁇ m, 25 ⁇ m, or 20 ⁇ m in order to easily control the thickness of the first electroplating layer 12.
  • the third region R3 is disposed on the filling resin 3 and closes the region within the inner periphery of the first region R1.
  • the third region R3 has a plurality of plating layers.
  • the third region R3 may be formed only of a plurality of plating layers.
  • the third region R3 has a second electroless plating layer 13 and a second electroplating layer 14 laminated on the second electroless plating layer 13.
  • the pad portion 4 since the pad portion 4 has the third region R3, a pad-on-via structure can be easily formed.
  • the second electroless plating layer 13 and the second electroplating layer 14 are laminated in this order directly on the surface of the hole-filling resin 3.
  • the third region R3 may be formed only from the second electroless plating layer 13 and the second electroplating layer 14.
  • the height of the third region R3 may be uniform. In this case, the entire third region R3 is a flat portion. The surface of the third region R3 may be flush with the surface of the flat portion of the first region R1.
  • the second electroless plating layer 13 is integrally formed from the same plating metal as the second electroless plating layer 13 disposed in the first region R1. Therefore, the thickness of the second electroless plating layer 13 in the first region R1 is equal to the thickness of the second electroless plating layer 13 in the third region R3.
  • the second electroplating layer 14 is integrally formed from the same plating metal as the second electroplating layer 14 disposed in the first region R1. Therefore, the thickness of the second electroplating layer 14 in the first region R1 is equal to the thickness of the second electroplating layer 14 in the third region R3.
  • connection region R4 is, for example, annular. In a plan view, the connection region R4 is located between the first region R1 and the second region R2.
  • the connection region R4 includes a portion where the average height of the pad portion 4 gradually decreases from the first region R1 toward the second region R2.
  • the number of plating layers in the first region R1 is different from the number of plating layers in the second region R2.
  • the connection region R4 may have a step.
  • the surface of the connection region R4 may be an inclined surface. On the inclined surface, the height of the pad portion 4 decreases along a direction away from the axis of the first through hole 2.
  • the pad portion 4 may have a region other than the connection region R4 between the first region R1 and the second region R2.
  • the first region R1 and the second region R2 may be directly connected to the connection region R4.
  • the first region R1 and the second region R2 may be directly connected without sandwiching the connection region R4.
  • a step may be formed at the boundary between the first region R1 and the second region R2 by a surface perpendicular to the flat portion of the first region R1.
  • the method for manufacturing the printed wiring board includes a step S1 of forming a first through hole in a base film, a step S2 of filling the first through hole with a hole filling resin, and a step S3 of forming a pad portion after the step S2 of filling the hole filling resin.
  • This manufacturing method makes it easy to manufacture the printed wiring board 10.
  • a through hole 2a is formed in a laminate having a base film 1 and a conductive underlayer 15 disposed on the surface of the base film 1.
  • the through hole 2a can be formed by, for example, laser processing or drilling.
  • step S1 of forming the first through hole as shown in FIG. 5, the inner surface of the through hole 2a is subjected to electroless plating and electroplating in this order to form the first through hole 2.
  • the electroless plating in step S1 of forming the first through hole forms a first electroless plating layer 11.
  • the electroplating in step S1 of forming the first through hole forms a first electroplating layer 12.
  • the first electroplating layer 12 may be formed by partial plating.
  • step S2 of filling the holes with filling resin which will be described later, damage to the entire surface of the base film 1 can be reduced when removing the hole filling resin 3 that has spilled over from the surface of the first electroplating layer 12. As a result, distortion is less likely to occur on the plating layer surface.
  • Step of filling hole with resin 6 in the step S2 of filling the hole with the filling resin, the internal space of the first through hole 2 is filled with the filling resin 3.
  • the filling resin 3 is filled along the axis of the first through hole 2 so as to overflow from the surface of the first electroplating layer 12.
  • the filling resin 3 may be disposed up to the surface of the first electroplating layer 12.
  • step S2 of filling the holes with the filling resin as shown in FIG. 7, the portion of the filling resin 3 that has spilled over the surface of the first electroplating layer 12 is removed.
  • the filling resin 3 is removed, for example, by polishing.
  • the surface of the first electroplating layer 12 may be polished together with the filling resin 3.
  • Step of forming pad portion The step S3 of forming the pad portion can be performed as a part of the step of forming a conductive pattern on the surface of the base film 1 by a semi-additive method.
  • electroless plating is performed on the entire surface of the base film 1.
  • An electroless plating layer is formed on the entire surface of the base film 1 by electroless plating.
  • the electroless plating layer is later patterned to form a second electroless plating layer 13.
  • half etching may be performed on the first electroplating layer 12 after the step S2 of filling the hole-filling resin in order to adjust the thickness.
  • step S3 of forming the pad portion as shown in FIG. 9, a resist pattern 16 is formed on the electroless plating layer. Electroplating is performed on the electroless plating layer exposed from the resist pattern 16. A second electroplating layer 14 is formed by electroplating.
  • step S3 of forming the pad portion as shown in FIG. 10, the resist pattern 16 is removed. Furthermore, the electroless plating layer exposed by removing the resist pattern 16 and the conductive underlayer disposed below the electroless plating layer are removed by etching. In this manner, a pad portion is formed that includes part of the conductive underlayer 15, part of the first electroless plating layer 11, part of the first electroless plating layer 12, the second electroless plating layer 13, the second electroless plating layer 14, and part of the hole-filling resin 3. As a result, the printed wiring board 10 is obtained.
  • the printed wiring board 20 in FIG. 11 includes a base film 1, a first through hole 2 provided in the base film 1, a hole filling resin 23 filled in the first through hole 2, and a pad portion 4 formed at the end of the first through hole 2 on the surface of the base film 1.
  • the printed wiring board 20 differs from the printed wiring board 10 in that the surface 23a of the hole filling resin 23 is roughened. Since the surface 23a of the hole filling resin 23 is roughened, the anchor effect for other members is improved.
  • the configuration of the printed wiring board 20 can be the same as that of the printed wiring board 10, except that the surface 23a of the hole filling resin 23 is roughened. Only the hole filling resin 23 will be described below.
  • the internal space of the first through-hole 2 is filled with a hole-filling resin 23.
  • the hole-filling resin 23 is fixed to the inner peripheral surface of the first electroplating layer 12.
  • the main component of the hole-filling resin 23 is the same type of thermosetting resin as the hole-filling resin 3.
  • the hole-filling resin 23 may contain a filler.
  • the main component of the filler is, for example, copper, silica, alumina, or calcium carbonate.
  • the hole-filling resin 23 can roughen the surface 23a by removing the portion that overflows from the surface of the first electroplating layer 12 with a laser.
  • the filler exposed on the surface 23a of the hole-filling resin 23 falls off, forming minute unevenness on the surface 23a.
  • the thermosetting resin is easier to remove than the filler, minute unevenness is formed on the surface 23a.
  • the anchor effect of the member (the second electroless plating layer 13 in FIG. 11) placed on the surface 23a of the hole-filling resin 23 is likely to be improved.
  • the lower limit of the arithmetic mean roughness Sa of the surface 23a of the hole-filling resin 23 may be 0.1 ⁇ m, 1.0 ⁇ m, or 3.0 ⁇ m in order to improve the anchoring effect of the hole-filling resin 23.
  • the upper limit of the arithmetic mean roughness Sa may be 10.0 ⁇ m or 6.0 ⁇ m in order to easily roughen only the surface 23a of the hole-filling resin 23, for example, by controlling the laser output.
  • the surface 23a of the hole-filling resin 23 may be recessed with respect to the surface of the first electroplating layer 12 that contacts the second electroless plating layer.
  • the surface 23a of the hole-filling resin 23 can be recessed with respect to the surface of the first electroplating layer 12 by selectively removing a portion of the hole-filling resin 23 that overflows from the surface of the first electroplating layer 12 and a portion filled in the first through-hole 2.
  • the lower limit of the average depth of the surface 23a of the hole-filling resin 23 with respect to the surface of the first electroplating layer 12 may be 5 ⁇ m, 10 ⁇ m, or 20 ⁇ m in order to easily obtain an anchor effect when other members are placed on the hole-filling resin 23.
  • the upper limit of the average depth may be 200 ⁇ m or 100 ⁇ m in order to easily and reliably adhere the hole-filling resin 23 to other members.
  • the "average depth” is determined as follows: Measure the depth at any ten points. From the measured values, remove the deepest, second deepest, deepest, and second deepest values. The average value of the remaining six depths is the "average depth.”
  • the surface 23a of the hole-filling resin 23 may have a recess in the peripheral portion that is connected to the through-hole 2. This recess can be formed by removing the hole-filling resin 23 that is filled in the first through-hole 2 with a laser. This makes it easier to improve the anchor effect when placing other components on the hole-filling resin 23.
  • step S2 of filling the hole with filling resin only the filling resin 23 is selectively removed by a laser. Only the portion of the filling resin 23 that has overflowed from the surface of the first electroplating layer 12 may be selectively removed. In addition to the portion that has overflowed from the first electroplating layer 12, a portion filled in the first through-hole 2 may be selectively removed.
  • the filling resin 23 can be selectively removed by controlling the wavelength, output, repetition frequency, and irradiation diameter of the laser.
  • the laser is, for example, a UV laser or a carbon dioxide laser. Using a UV laser makes it easier to remove the desired area of the filling resin 23 with high precision.
  • the lower limit of the laser wavelength may be 280 nm or 320 nm.
  • the upper limit of the wavelength may be 500 nm or 400 nm.
  • ⁇ Printed Wiring Board> 12 includes a base film 1, a first through-hole 2 provided in the base film 1, a hole-filling resin 3 filled in the first through-hole 2, and a pad portion 4 formed at an end of the first through-hole 2 on the surface of the base film 1.
  • the printed wiring board 30 includes a circuit 31 disposed on the surface of the base film 1.
  • the circuit 31, together with the pad portion 4, constitutes a conductive pattern in the printed wiring board 30.
  • the printed wiring board 30 may include other members, such as an insulating layer, disposed on the base film 1.
  • the base film 1, first through hole 2, hole filling resin 3, and pad portion 4 in the printed wiring board 30 can be the same as those in the printed wiring board 10. Only the circuit 31 will be described below.
  • the circuit 31 is formed by a semi-additive method.
  • the semi-additive method can improve the accuracy of the circuit pattern more than, for example, a subtractive method.
  • the circuit 31 has a layer structure similar to that of the second region R2 of the pad portion 4.
  • the circuit 31 has four layers, which are a conductive underlayer 15, a first electroless plating layer 11, a second electroless plating layer 13, and a second electroplating layer 14 stacked in this order from the surface of the base film 1.
  • the lower limit of the etch factor of the circuit 31 may be 8 or 10 to improve the accuracy of the circuit pattern.
  • the circuit 31 can be formed by a semi-additive method, so the etch factor can be controlled to be equal to or higher than the lower limit.
  • the upper limit of the etch factor of the circuit 31 is not particularly limited, but may be 20.
  • the method for manufacturing a printed wiring board includes a step S1 of forming a first through hole in a base film, a step S2 of filling the first through hole with a hole filling resin, and a step S4 of forming a conductive pattern on the surface of the base film by a semi-additive method after the step S2 of filling the hole filling resin.
  • the method for manufacturing printed wiring boards includes a step S4 of forming a conductive pattern after the step S2 of filling the holes with a filling resin, making it easy to form a fine conductive pattern on the base film.
  • step S1 for forming a first through hole and step S2 for filling the hole with a filling resin can be performed in the same manner as in the method for manufacturing a printed wiring board shown in FIG. 3.
  • step S4 for forming a conductive pattern will be described.
  • the step S4 of forming the conductive pattern includes the step S3 of forming the pad portion in Fig. 3.
  • electroless plating is performed on the entire surface of the base film 1.
  • An electroless plating layer is formed on the entire surface of the base film 1 by the electroless plating.
  • the electroless plating layer is later patterned to form a second electroless plating layer 13.
  • step S4 of forming the conductive pattern as shown in FIG. 14, a resist pattern 36 is formed on the electroless plating layer. Electroplating is performed on the electroless plating layer exposed from the resist pattern 36. A second electroplating layer 14 is formed by electroplating.
  • step S4 of forming the conductive pattern the resist pattern 36 is removed. Furthermore, the electroless plating layer exposed by removing the resist pattern 36 and the conductive base layer disposed below the electroless plating layer are removed by etching. As a result, the printed wiring board 30 is obtained.
  • ⁇ Printed Wiring Board> 15 includes a base film 1, a first through hole 2 provided in the base film 1, a hole-filling resin 3 filled in the first through hole 2, and a pad portion 4 formed at an end of the first through hole 2 on the surface of the base film 1.
  • the printed wiring board 40 includes a second through hole 42 that is not filled with resin.
  • the configuration of the printed wiring board 40 can be the same as that of the printed wiring board 10, except that the printed wiring board 40 includes the second through hole 42. Only the second through hole 42 will be described below.
  • the second through hole 42 is provided in the base film 1.
  • the second through hole 42 is composed of a through hole 2b penetrating the base film 1 and a plating layer laminated on the inner peripheral surface of the through hole 2b.
  • the diameter of the through hole 2b may be uniform along its axis.
  • the cross-sectional shape of the through hole 2b perpendicular to its axis is, for example, a circle.
  • the plating layer is composed of a first electroless plating layer 11 that is laminated directly onto the inner circumferential surface of the through hole 2b, a first electroless plating layer 12 that is laminated onto the first electroless plating layer 11, a second electroless plating layer 13 that is laminated onto the first electroless plating layer 12, and a second electroless plating layer 14 that is laminated onto the second electroless plating layer 13.
  • the first electroless plating layer 11, the first electroless plating layer 12, the second electroless plating layer 13, and the second electroless plating layer 14 are each laminated directly onto the inner circumferential surface of the through hole 2b in this order.
  • the internal space of the first through hole 2 is filled with hole-filling resin 3, but the internal space of the second through hole 42 is not filled with hole-filling resin 3.
  • the second through hole 42 has four layers including the second electroless plating layer 13 and the second electroplating layer 14. Therefore, the average thickness T2 of the second through hole 42 (average thickness of the plating layer) is greater than the average thickness T1 of the first through hole 2. This makes it easy to improve the electrical and strength connection reliability of the second through hole 42.
  • the average thickness T2 of the second through holes 42 is greater than the average thickness T1 of the first through holes 2 by the combined thickness of the second electroless plating layer 13 and the second electroplating layer 14.
  • the lower limit of the difference between the average thickness T2 of the second through holes 42 and the average thickness T1 of the first through holes 2 may be 5 ⁇ m or 10 ⁇ m in order to sufficiently increase the electrical and strength connection reliability of the second through holes 42.
  • the upper limit of the difference may be 30 ⁇ m, 25 ⁇ m, or 20 ⁇ m in order to easily control the thickness of the second through holes 42.
  • the method for manufacturing the printed wiring board 40 includes a step of forming a first through hole in a base film, a step of forming a second through hole in the base film, a step of filling the first through hole with a hole filling resin, and a step of forming a pad portion after the step of filling the hole filling resin.
  • the method for manufacturing a printed wiring board can be performed in the same manner as the method for manufacturing a printed wiring board shown in FIG. 3, except that it includes a step of forming a second through hole. Below, only the step of forming the second through hole will be described.
  • Step of forming second through holes In the step of forming the second through hole, the through hole 2b is formed in the laminate having the base film 1 and the conductive underlayer 15 disposed on the surface of the base film 1.
  • the through hole 2b can be formed simultaneously when the through hole is formed in the step of forming the first through hole.
  • electroless plating and electroplating are performed in that order on the inner surface of the through hole 2b. These plating processes are performed simultaneously with the electroless plating and electroplating processes in the process of forming the first through hole. As a result, a first electroless plating layer 11 and a first electroplating layer 12 are laminated on the inner surface of the through hole 2b.
  • electroless plating and electroplating are performed in this order on the first electroplating layer 12. These plating processes are performed simultaneously with the electroless plating and electroplating processes in the process of forming the pad portion.
  • the second electroless plating layer 13 and the second electroplating layer 14 are laminated in this order on the first electroless plating layer 11 and the first electroplating layer 12, forming the second through-hole 42.
  • a through hole may be formed in the base film after the step of filling the hole filling resin.
  • a step of forming a pad portion or a step of forming a conductive pattern may be performed, and a plating layer may be laminated in the through hole to form a through hole (third through hole).
  • the average thickness of the third through hole may be approximately the same as the average thickness of the first through hole, and further, the third through hole may not be filled with resin.
  • the thickness of the third through hole may be smaller than the thickness of the second through hole. Since resin is less likely to enter the third through hole, it is easier to reduce the diameter of the through hole, for example.
  • the circuit 31 and the second through-hole 42 are formed on the printed wiring board 10.
  • the circuit may be formed on the printed wiring board 20, and the second through-hole may be formed.
  • each region may have an additional plating layer.
  • the structure and material of the conductive base layer are not particularly limited.
  • the conductive base layer may be a conductor layer other than a metal foil.
  • the pad portion has a third region so that a pad-on-via structure can be formed.
  • the printed wiring board of the present disclosure does not need to have a third region.
  • Base film 2 First through hole 2a, 2b Through hole 3, 23 Hole filling resin 4 Pad portion 10, 20, 30, 40 Printed wiring board 11 First electroless plating layer 12 First electroplating layer 13 Second electroless plating layer 14 Second electroplating layer 15 Conductive base layer 16, 36 Resist pattern 23a Surface of hole filling resin 31 Circuit 42 Second through hole D Average diameter R1 of first through hole First region R2 Second region R3 Third region R4 Connection region H1 Average height H2 of first region Average height T1 of second region Average thickness T2 of first through hole Average thickness of second through hole

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
PCT/JP2024/022768 2023-07-21 2024-06-24 プリント配線板およびプリント配線板の製造方法 Pending WO2025022898A1 (ja)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001274546A (ja) * 2000-03-27 2001-10-05 Shinko Electric Ind Co Ltd 電子部品実装用基板及びその製造方法
JP2017041475A (ja) * 2015-08-17 2017-02-23 凸版印刷株式会社 配線基板及び多層配線基板、配線基板の製造方法
JP2017228775A (ja) * 2016-06-15 2017-12-28 大日本印刷株式会社 孔電極基板の製造方法、孔電極基板および半導体装置
JP2018098424A (ja) * 2016-12-15 2018-06-21 凸版印刷株式会社 配線基板、多層配線基板、及び配線基板の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001274546A (ja) * 2000-03-27 2001-10-05 Shinko Electric Ind Co Ltd 電子部品実装用基板及びその製造方法
JP2017041475A (ja) * 2015-08-17 2017-02-23 凸版印刷株式会社 配線基板及び多層配線基板、配線基板の製造方法
JP2017228775A (ja) * 2016-06-15 2017-12-28 大日本印刷株式会社 孔電極基板の製造方法、孔電極基板および半導体装置
JP2018098424A (ja) * 2016-12-15 2018-06-21 凸版印刷株式会社 配線基板、多層配線基板、及び配線基板の製造方法

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