WO2024109043A1 - 显示面板 - Google Patents

显示面板 Download PDF

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Publication number
WO2024109043A1
WO2024109043A1 PCT/CN2023/103595 CN2023103595W WO2024109043A1 WO 2024109043 A1 WO2024109043 A1 WO 2024109043A1 CN 2023103595 W CN2023103595 W CN 2023103595W WO 2024109043 A1 WO2024109043 A1 WO 2024109043A1
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WO
WIPO (PCT)
Prior art keywords
photosensitive
electrode
layer
display panel
active
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2023/103595
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English (en)
French (fr)
Inventor
马亮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Original Assignee
Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd filed Critical Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority to JP2023568103A priority Critical patent/JP7693836B2/ja
Priority to US18/556,672 priority patent/US20250280672A1/en
Priority to KR1020237037670A priority patent/KR102881136B1/ko
Publication of WO2024109043A1 publication Critical patent/WO2024109043A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H10F39/8037—Pixels having integrated switching, control, storage or amplification elements the integrated elements comprising a transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K39/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic radiation-sensitive element covered by group H10K30/00
    • H10K39/30—Devices controlled by radiation
    • H10K39/32—Organic image sensors
    • H10K39/34—Organic image sensors integrated with organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
    • G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
    • G06V40/12—Fingerprints or palmprints
    • G06V40/13—Sensors therefor
    • G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/803—Pixels having integrated switching, control, storage or amplification elements
    • H10F39/8033—Photosensitive area
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/811—Interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/10—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00
    • H10H29/14—Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 comprising multiple light-emitting semiconductor components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • H10K59/65—OLEDs integrated with inorganic image sensors

Definitions

  • the present application relates to the field of display technology, and in particular to a display panel.
  • Fingerprint recognition has become a function equipped in most display terminals such as mobile phones, tablets, and laptops. At present, fingerprint recognition of display devices is gradually changing from capacitive fingerprint recognition to optical fingerprint recognition. Optical fingerprint recognition uses the refraction and reflection of light to image the user's fingerprint, and then identifies the fingerprint features through image recognition. It has the characteristics of high imaging resolution and relatively easy image recognition, and can be set under the display screen to form under-screen fingerprint recognition.
  • Photosensitive elements are semiconductor devices that convert received light signals into electrical signals.
  • the in-plane light-emitting units will squeeze the area of the photosensitive elements, resulting in a problem of low photoelectric signal quantity, affecting detection sensitivity.
  • the present application provides a display panel to solve the technical problem that the photosensitive element has a small area, resulting in a low amount of electrical signals and affecting the detection sensitivity.
  • the present application provides a display panel, which includes: at least one photosensitive device, the photosensitive device includes: a switch element, a first photosensitive element and a second photosensitive element; the display panel also includes:
  • a first conductive layer is disposed on the substrate, wherein the first conductive layer includes a first electrode and a second electrode connected to each other;
  • the photosensitive layer arranged on a side of the first conductive layer away from the substrate, the photosensitive layer comprising a first photosensitive portion arranged corresponding to the first electrode and a second photosensitive portion arranged corresponding to the second electrode, the first photosensitive portion and the second photosensitive portion being arranged at intervals, and the photosensitive layer comprising a metal oxide semiconductor;
  • An insulating layer disposed between the first conductive layer and the photosensitive layer;
  • a second conductive layer is provided on a side of the photosensitive layer away from the substrate, the second conductive layer comprising a first protective electrode and a second protective electrode, the first protective electrode is electrically connected to the first photosensitive portion, and the second protective electrode is electrically connected to the second photosensitive portion;
  • a third conductive layer disposed on a side of the second conductive layer away from the substrate, the third conductive layer comprising a source and a drain of the switch element, the first protective electrode and the second protective electrode both being electrically connected to the source or drain of the switch element;
  • the first photosensitive element includes the first electrode, the first photosensitive portion, and the first protective electrode; the second photosensitive element includes the second electrode, the second photosensitive portion, and the second protective electrode.
  • the display panel further includes:
  • a first active layer is arranged between the substrate and the photosensitive layer, the first active layer includes a first active part of the switching element, the source and the drain of the switching element are electrically connected to the first active part, and the first active part includes a polysilicon semiconductor, or a metal oxide semiconductor.
  • the photosensitive device further includes: a storage capacitor
  • the first conductive layer further includes a first capacitor electrode of the storage capacitor, and the first capacitor electrode is electrically connected to both the first electrode and the second electrode;
  • the third conductive layer further includes a second capacitor electrode of the storage capacitor, the second capacitor electrode is electrically connected to the first protection electrode and the second protection electrode, and the second capacitor electrode is at least partially overlapped with the first capacitor electrode.
  • the display panel further includes: a fourth conductive layer, the fourth conductive layer including a conductive portion, and the orthographic projection of the conductive portion on the substrate partially overlaps with the orthographic projection of the first electrode and/or the second electrode on the substrate.
  • the electron mobility of the metal oxide semiconductor of the photosensitive layer is greater than or equal to 10 cm 2 /Vs, and the thickness of the insulating layer is 5 nanometers to 15 nanometers.
  • the display panel further includes: a pixel driving circuit, the pixel driving circuit including a first driving transistor and a second driving transistor;
  • the display panel further includes:
  • the second active layer disposed between the substrate and the photosensitive layer, the second active layer comprising a second active portion of the first driving transistor, the second active portion comprising a polysilicon semiconductor;
  • a third active layer disposed between the second active layer and the photosensitive layer, the third active layer comprising a third active portion of the second driving transistor, the third active portion comprising a metal oxide semiconductor;
  • a conductive layer disposed between the second active layer and the third active layer, the conductive layer comprising a second gate of the first driving transistor, the second gate at least partially overlapping the second active portion;
  • the second conductive layer further includes a third gate of the second driving transistor, and the third gate is disposed to at least partially overlap with the third active portion.
  • the first active portion includes a polycrystalline silicon semiconductor
  • the second active layer further includes the first active portion, and the conductive layer further includes a first gate of the switch element, and the first gate is disposed to at least partially overlap with the first active portion.
  • the first active portion includes a metal oxide semiconductor
  • the third active layer also includes the first active part
  • the conductive layer also includes the fourth gate of the switching element
  • the second conductive layer also includes the first gate of the switching element
  • the fourth gate is at least partially overlapped with the first active part
  • the first gate is at least partially overlapped with the first active part.
  • the display panel further comprises a plurality of light emitting units, and the plurality of light emitting units are arranged into a plurality of rows along the first direction, and are arranged into a plurality of columns along the second direction;
  • a plurality of intersection regions are formed between the plurality of rows of light-emitting units and the plurality of columns of light-emitting units, and each of the intersection regions is provided with at most one first photosensitive element or one second photosensitive element.
  • the first photosensitive element and the second photosensitive element are respectively located in two adjacent intersection areas, and the two adjacent intersection areas are located on the same side of the same light-emitting unit.
  • the display panel includes a plurality of the photosensitive devices
  • a plurality of the first photosensitive elements and a plurality of the second photosensitive elements in the same row are arranged alternately
  • a plurality of the first photosensitive elements and a plurality of the second photosensitive elements in the same column are arranged alternately
  • each of the first photosensitive elements is connected in parallel with an adjacent second photosensitive element in the same row and on the same side, or each of the first photosensitive elements is connected in parallel with an adjacent second photosensitive element in the same column and on the same side;
  • first photosensitive elements and multiple second photosensitive elements in the same row are arranged alternately, and all the first photosensitive elements or the second photosensitive elements in the same column are connected in parallel with an adjacent second photosensitive element in the same row and on the same side.
  • the photosensitive device further includes a third photosensitive element
  • the third photosensitive element includes a third electrode, a third protective electrode, and a third photosensitive portion located between the third electrode and the third protective electrode; the third electrode and the first electrode are located in the same layer and connected to each other, the third photosensitive portion and the first photosensitive portion are located in the same layer and are spaced apart, and the third protective electrode is connected to the source electrode or the drain electrode;
  • the first photosensitive element, the second photosensitive element and the third photosensitive element are respectively located in the three intersection areas at three vertices of the same light-emitting unit.
  • the embodiment of the present application also relates to a display panel, which includes at least one photosensitive device, wherein the photosensitive device includes: a switch element, a first photosensitive element and a second photosensitive element; the display panel also includes:
  • a first conductive layer is disposed on the substrate, wherein the first conductive layer includes a first electrode and a second electrode connected to each other;
  • the photosensitive layer arranged on a side of the first conductive layer away from the substrate, the photosensitive layer comprising a first photosensitive portion arranged corresponding to the first electrode and a second photosensitive portion arranged corresponding to the second electrode, the first photosensitive portion and the second photosensitive portion being arranged at intervals, and the photosensitive layer comprising a metal oxide semiconductor;
  • an insulating layer disposed between the first conductive layer and the photosensitive layer
  • a second conductive layer disposed on a side of the photosensitive layer away from the substrate, the second conductive layer comprising a first protective electrode and a second protective electrode, the first protective electrode being electrically connected to the first photosensitive portion, and the second protective electrode being electrically connected to the second photosensitive portion;
  • a third conductive layer arranged on a side of the second conductive layer away from the substrate, the third conductive layer comprising a source and a drain of the switch element, the first protective electrode and the second protective electrode both being electrically connected to the source or drain of the switch element;
  • the first photosensitive element includes the first electrode, the first photosensitive portion, and the first protective electrode;
  • the second photosensitive element includes the second electrode, the second photosensitive portion, and the second protective electrode;
  • the display panel further includes:
  • a first active layer disposed between the substrate and the first conductive layer, the first active layer comprising a first active portion of the switch element, a source electrode and a drain electrode of the switch element being electrically connected to the first active portion respectively;
  • the display panel further comprises a plurality of light emitting units, wherein the plurality of light emitting units are arranged into a plurality of rows along a first direction and into a plurality of columns along a second direction;
  • a plurality of intersection regions are formed between the plurality of rows of light-emitting units and the plurality of columns of light-emitting units, and each of the intersection regions is provided with at most one first photosensitive element or one second photosensitive element.
  • the photosensitive device further includes: a storage capacitor, the storage capacitor including a first capacitor electrode and a second capacitor electrode that are at least partially overlapped;
  • the first capacitor electrode is electrically connected to the first electrode and the second electrode;
  • the second capacitor electrode is electrically connected to the first protection electrode and the second protection electrode, and the second capacitor electrode is at least partially overlapped with the first capacitor electrode.
  • the display panel further includes: a fourth conductive layer, the fourth conductive layer including a conductive portion, and the orthographic projection of the conductive portion on the substrate partially overlaps with the orthographic projection of the first electrode and/or the second electrode on the substrate.
  • the electron mobility of the metal oxide semiconductor of the photosensitive layer is greater than or equal to 10 cm 2 /Vs, and the thickness of the insulating layer is 5 nanometers to 15 nanometers.
  • the display panel further includes: a pixel driving circuit, the pixel driving circuit including a first driving transistor and a second driving transistor;
  • the display panel further includes:
  • the second active layer disposed between the substrate and the photosensitive layer, the second active layer comprising a second active portion of the first driving transistor, the second active portion comprising a polysilicon semiconductor;
  • a third active layer disposed between the second active layer and the photosensitive layer, the third active layer comprising a third active portion of the second driving transistor, the third active portion comprising a metal oxide semiconductor;
  • a conductive layer disposed between the second active layer and the third active layer, the conductive layer comprising a second gate of the first driving transistor, the second gate at least partially overlapping the second active portion;
  • the second conductive layer further includes a third gate of the second driving transistor, and the third gate is disposed to at least partially overlap with the third active portion.
  • the first active portion includes a polycrystalline silicon semiconductor
  • the second active layer further includes the first active portion, and the conductive layer further includes a first gate of the switch element, and the first gate is disposed to at least partially overlap with the first active portion.
  • the first active portion includes a metal oxide semiconductor
  • the third active layer also includes the first active part
  • the conductive layer also includes the fourth gate of the switching element
  • the second conductive layer also includes the first gate of the switching element
  • the fourth gate is at least partially overlapped with the first active part
  • the first gate is at least partially overlapped with the first active part.
  • the first photosensitive element and the second photosensitive element are respectively located in two adjacent intersection areas, and the two adjacent intersection areas are located on the same side of the same light-emitting unit.
  • the present application discloses a display panel.
  • the display panel includes at least one photosensitive device, and the photosensitive device includes a switch element, a first photosensitive element, and a second photosensitive element.
  • the first photosensitive element includes a first electrode, a first photosensitive portion, and a first protective electrode
  • the second photosensitive element includes a second electrode, a second photosensitive portion, and a second protective electrode. Since the first electrode and the second electrode are connected, and the first photosensitive portion and the second photosensitive portion are both connected to the source or drain of the switch element, the first photosensitive element and the second photosensitive element are designed in parallel, which increases the photosensitive area of the photosensitive device, thereby increasing the amount of electrical signals and improving the detection sensitivity.
  • the film structure of the photosensitive device is simplified. Furthermore, since an insulating layer is provided between the first electrode and the first photosensitive portion, the potential barrier difference between the first electrode and the first photosensitive portion can be reduced, allowing electrons to tunnel and form a conductive path; similarly, since an insulating layer is provided between the second electrode and the second photosensitive portion, the potential barrier difference between the second electrode and the second photosensitive portion can be reduced, allowing electrons to tunnel and form a conductive path; thereby, the photosensitivity of the photosensitive device can be improved.
  • FIG1 is a first structural schematic diagram of a display panel provided by the present application.
  • FIG2 is a circuit diagram of a photosensitive device provided by the present application.
  • FIG3 is a second structural schematic diagram of a display panel provided by the present application.
  • FIG4 is a third structural schematic diagram of a display panel provided in the present application.
  • FIG5 is a fourth structural schematic diagram of a display panel provided by the present application.
  • FIG6 is a fifth structural schematic diagram of a display panel provided in the present application.
  • FIG7 is a sixth structural schematic diagram of a display panel provided by the present application.
  • FIG8 is a seventh structural schematic diagram of a display panel provided in the present application.
  • FIG9 is an eighth structural schematic diagram of a display panel provided in the present application.
  • FIG10 is a ninth structural schematic diagram of a display panel provided in the present application.
  • FIG11 is a first plan view of a display panel provided by the present application.
  • FIG12 is a second plan view of a display panel provided by the present application.
  • FIG. 13 is a third plan view schematically showing the display panel provided in the present application.
  • the present application provides a display panel, which is described in detail below. It should be noted that the description order of the following embodiments is not intended to limit the preferred order of the embodiments of the present application.
  • Fig. 1 is a first structural schematic diagram of a display panel provided by the present application.
  • the display panel 100 includes at least one photosensitive device ST.
  • the photosensitive device ST includes a switch element T, a first photosensitive element S1 and a second photosensitive element S2.
  • the display panel 100 further includes a substrate 10 , a first conductive layer 25 , an insulating layer 26 , a photosensitive layer 27 , a second conductive layer 28 and a third conductive layer 30 .
  • the first conductive layer 25 is disposed on the substrate 10.
  • the first conductive layer 25 includes a first electrode 251 and a second electrode 252 connected to each other.
  • the photosensitive layer 27 is disposed on a side of the first conductive layer 25 away from the substrate 10.
  • the photosensitive layer 27 includes a first photosensitive portion 271 disposed corresponding to the first electrode 251 and a second photosensitive portion 272 disposed corresponding to the second electrode 252.
  • the photosensitive layer 27 includes a metal oxide semiconductor.
  • the first photosensitive portion 271 and the second photosensitive portion 272 are disposed at intervals.
  • the insulating layer 26 is disposed between the first conductive layer 25 and the photosensitive layer 27.
  • the insulating layer 26 includes a first insulating portion 261 and a second insulating portion 262.
  • the first insulating portion 261 is at least located between the first electrode 251 and the first photosensitive portion 271.
  • the second insulating portion 262 is at least located between the second electrode 252 and the second photosensitive portion 272.
  • the second conductive layer 28 is disposed on the side of the photosensitive layer 27 away from the substrate 10.
  • the second conductive layer 28 includes a first protective electrode 281 and a second protective electrode 282.
  • the first protective electrode 281 is electrically connected to the first photosensitive portion 271.
  • the second protective electrode 282 is electrically connected to the second photosensitive portion 272.
  • the third conductive layer 30 is disposed on a side of the second conductive layer 28 away from the substrate 10.
  • the third conductive layer 30 includes a source 301 and a drain 302 of the switch element T.
  • the first protective electrode 281 and the second protective electrode 282 are both connected to the source 301 or the drain 302.
  • the first protective electrode 281 and the second protective electrode 282 are both connected to the source 301.
  • the first protective electrode 281 and the second protective electrode 282 are both connected to the drain 302.
  • the first photosensitive element S1 includes a first electrode 251 , a first insulating portion 261 , a first photosensitive portion 271 and a first protective electrode 281 .
  • the second photosensitive element S2 includes a second electrode 252 , a second insulating portion 262 , a second photosensitive portion 272 and a second protective electrode 282 .
  • the first electrode 251 and the second electrode 252 may be directly connected, that is, the first electrode 251 and the second electrode 252 are an integrated structure.
  • the first electrode 251 and the second electrode 252 may also be connected through a bridge wire and a via, which is not specifically limited in this application.
  • the following embodiments of this application are described by taking the direct connection of the first electrode 251 and the second electrode 252 as an example, but this cannot be understood as a limitation of this application.
  • a photosensitive device ST includes at least two photosensitive elements, namely a first photosensitive element S1 and a second photosensitive element S2. Since the first electrode 251 and the second electrode 252 are connected, the first protective electrode 281 and the second protective electrode 282 are both connected to the source 301 or the drain 302, thereby realizing the parallel connection of the first photosensitive element S1 and the second photosensitive element S2, increasing the photosensitive area of the photosensitive device ST, thereby improving the amount of electrical signals and detection sensitivity.
  • the film structure of the photosensitive device ST is simplified.
  • first insulating portion 261 is provided between the first electrode 251 and the first photosensitive portion 271
  • the potential barrier difference between the first electrode 251 and the first photosensitive portion 271 can be reduced, allowing electrons to tunnel and form a conductive path
  • second insulating portion 262 is provided between the second electrode 252 and the second photosensitive portion 272
  • the potential barrier difference between the second electrode 252 and the second photosensitive portion 272 can be reduced, allowing electrons to tunnel and form a conductive path; therefore, compared to the related art in which a high work function metal is required to form a metal-semiconductor junction, the present application utilizes a first conductive layer 25 of conventional materials to form a photosensitive device ST, thereby improving the photosensitivity of the photosensitive device ST.
  • a photosensitive device ST at least includes a first photosensitive element S1 and a second photosensitive element S2 designed in parallel, which increases the overall photosensitive area of the photosensitive device ST, increases the amount of electrical signals, and thus improves the detection sensitivity.
  • a photosensitive device ST including two parallel photosensitive elements (a first photosensitive element S1 and a second photosensitive element S2) as an example, but this should not be understood as a limitation of the present application.
  • a photosensitive device ST may include three parallel photosensitive elements, five photosensitive elements, or more photosensitive elements.
  • the switch element T further includes a first gate 253 and a first active portion 231.
  • the first active portion 231 and the first gate 253 are correspondingly arranged.
  • the source 301 and the drain 302 are respectively connected to the first active portion 231.
  • the film layer structures of the first gate 253, the first active portion 231, the source 301 and the drain 302 will be described in the following embodiments and will not be repeated here.
  • the photosensitive device ST further includes at least one storage capacitor C.
  • the first capacitor plate of the storage capacitor C is electrically connected to both the first electrode 251 and the second electrode 252.
  • the second capacitor plate of the storage capacitor C is connected to the source 301 or the drain 302.
  • the photosensitive device ST only includes a storage capacitor C, and the first photosensitive element S1 and the second photosensitive element S2 share a storage element C, which further simplifies the structure of the photosensitive device ST.
  • FIG. 1 is a circuit diagram of the photosensitive device provided by the present application.
  • the photosensitive device ST includes a first photosensitive element S1, a second photosensitive element S2, a storage capacitor C and a switch element T.
  • the first electrode 251 and the second electrode 252 are connected to the bias voltage VBias.
  • the first photosensitive portion 271 in the first photosensitive element S1 and the second photosensitive portion 272 in the second photosensitive element S2 absorb the light signal and convert the received light signal into an electrical signal.
  • the electrical signal is stored in the storage capacitor C. After the storage capacitor C is full, the switch element T is turned on, and the storage capacitor C is discharged.
  • the signal generated by the first photosensitive element S1 and the second photosensitive element S2 can be transmitted to the detection signal line (not shown in the figure), and the detection signal line is transmitted to the corresponding circuit for processing to realize the detection of light intensity.
  • the material of the first active portion 231 may be single crystal silicon, low temperature polysilicon or metal oxide semiconductor.
  • the metal oxide semiconductor may be IGZO (indium gallium zinc oxide), IGZTO (indium gallium zinc tin oxide), IZO, IGO (gallium indium oxide), IGTO (indium gallium tin oxide), IZTO (indium zinc tin oxide), ITO, ATZO (zinc aluminum tin oxide), AIZO (zinc aluminum indium oxide), etc.
  • the electron mobility of the metal oxide semiconductor of the photosensitive layer 27 is greater than or equal to 10 cm 2 /Vs.
  • the materials of the first photosensitive portion 271 and the second photosensitive portion 272 are both IGZO.
  • IGZO has high mobility.
  • IGZO has good photosensitivity and low resistance in the visible light band, so it can improve the photosensitivity of the photosensitive device ST.
  • the materials of the first active portion 231, the first photosensitive portion 271 and the second photosensitive portion 272 are all IGZO.
  • the first photosensitive portion 271 and the second photosensitive portion 272 can share the same IGZO substrate film layer.
  • the materials of the first active portion 231, the first photosensitive portion 271, and the second photosensitive portion 272 may be different.
  • the materials of the first photosensitive portion 271 and the second photosensitive portion 272 are indium gallium zinc oxide, and the material of the first active portion 231 may be single crystal silicon, low temperature polycrystalline silicon, or other oxide semiconductor materials other than IGZO. In this way, the performance requirements of the switch element T and the first photosensitive element S1 and the second photosensitive element S2 can be met at the same time.
  • the orthographic projection of the first protective electrode 281 on the substrate 10 overlaps with the orthographic projection of the first photosensitive portion 271 on the substrate 10; the orthographic projection of the second protective electrode 282 on the substrate 10 overlaps with the orthographic projection of the second photosensitive portion 272 on the substrate 10.
  • the same photomask can be used for patterning to form the photosensitive layer 27 and the second conductive layer 28, simplifying the process.
  • the present application is not limited to this.
  • the second photosensitive element S2 is located on a side of the first photosensitive element S1 away from the drain 302.
  • the first conductive layer 25 also includes a first capacitor electrode of the storage capacitor C.
  • the first capacitor electrode is electrically connected to the first electrode 251 and the second electrode 252.
  • the third conductive layer 30 also includes a second capacitor electrode of the storage capacitor C.
  • the second capacitor electrode is electrically connected to the first protection electrode 281 and the second protection electrode 282.
  • the second capacitor electrode is at least partially overlapped with the first capacitor electrode.
  • the first capacitor electrode is a part of the drain electrode 302, and the second capacitor electrode is a part of the first electrode 251.
  • the orthographic projection of the drain electrode 302 on the substrate 10 at least partially overlaps with the orthographic projection of the first electrode 251 on the substrate 10. That is, the drain electrode 302 at least forms a storage capacitor C with the first electrode 251. Since the first electrode 251 is connected to the second electrode 252, the first photosensitive element S1 and the second photosensitive element S2 share a storage capacitor C.
  • the display panel 100 further includes a first active layer 23 and a gate insulating layer 24.
  • the first active layer 23 is disposed on a side of the first conductive layer 25 close to the substrate 10.
  • the gate insulating layer 24 is disposed between the first active layer 23 and the first conductive layer 25.
  • the first active layer 23 includes a first active portion 231.
  • the first conductive layer 25 further includes a first gate 253.
  • the first active portion 231 and the first gate 253 are disposed correspondingly.
  • the first gate electrode 253 is disposed in the same layer as the first electrode 251 and the second electrode 252, which can save a photomask, simplify the process and reduce the thickness of the display panel 100.
  • the display panel 100 further includes an interlayer insulating layer 29.
  • the interlayer insulating layer 29 is located between the first conductive layer 25 and the third conductive layer 30.
  • the interlayer insulating layer 29 has a first via hole 29a, a second via hole 29b, and a third via hole 29c.
  • the first via hole 29a penetrates the interlayer insulating layer 29 and extends to a side of the first active portion 231 away from the substrate 10.
  • the source electrode 301 is connected to the first active portion 231 through the first via hole 29a.
  • the second via hole 29b penetrates the interlayer insulating layer 29 and extends to a side of the first active portion 231 away from the substrate 10.
  • the drain electrode 302 is connected to the first active portion 231 through the second via hole 29b.
  • the third via hole 29c exposes a surface of a side of the first protective electrode 281 away from the substrate 10.
  • the drain electrode 302 is connected to the first protective electrode 281 through the third via hole 29c.
  • the first active portion 231 includes a source region, a drain region, and a channel region (not shown) between the source region and the drain region.
  • the source 301 is connected to the source region.
  • the drain 302 is connected to the drain region.
  • the source region and the drain region are made conductive by ion doping or the like, so that the conductivity of the source 301 and the drain 302 and the first active portion 231 can be improved.
  • the present application embodiment is described by taking the switch element T as a top-gate transistor as an example, but this should not be construed as a limitation on the present application.
  • the switch element T may also be a bottom-gate transistor or a dual-gate transistor.
  • the substrate 10 may include but is not limited to a substrate 11, a barrier layer 12, a first insulating layer 13 and a second insulating layer 14 stacked in sequence from bottom to top.
  • the material of the substrate 11 may be glass or a flexible material.
  • the materials of the barrier layer 12, the first insulating layer 13 and the second insulating layer 14 may be silicon oxide, silicon nitride, etc.
  • the barrier layer 12, the first insulating layer 13 and the second insulating layer 14 may play the role of blocking water and oxygen.
  • the first conductive layer 25 is made of a material with excellent conductivity and good light shielding properties.
  • the material of the first conductive layer 25 can be molybdenum, titanium, molybdenum/copper (laminated), molybdenum/titanium (laminated) or titanium/aluminum (laminated), etc.
  • the first electrode 251 and the second electrode 252 are made of a conductive material with light shielding properties, which can prevent the light on the side of the substrate 10 from being incident on the first photosensitive element S1 and the second photosensitive element S2, thereby improving the detection accuracy of the photosensitive device ST.
  • the material of the insulating layer 26 can be silicon nitride, silicon oxide, etc.
  • the thickness of the insulating layer 26 is very thin, generally about 10 nanometers, such as 5 nanometers to 15 nanometers.
  • the materials of the gate insulating layer 24 and the interlayer insulating layer 29 may be silicon oxide, silicon nitride, aluminum oxide, or a stack thereof.
  • the second conductive layer 28 is a transparent conductive material, so as to ensure that light can enter the first photosensitive element S1 and the second photosensitive element S2, thereby improving the sensing sensitivity of the photosensitive device ST.
  • the material of the second conductive layer 28 can be ITO, IZO, etc.
  • the display panel 100 further includes a fourth conductive layer 21 and a buffer layer 22.
  • the fourth conductive layer 21 is disposed on a side of the first active layer 23 close to the substrate 10.
  • the buffer layer 22 is disposed between the first active layer 23 and the fourth conductive layer 21.
  • the fourth conductive layer 21 includes a light shielding portion 211.
  • the light shielding portion 211 is disposed corresponding to the first active portion 231.
  • the orthographic projection of the light shielding portion 211 on the substrate 10 at least covers the orthographic projection of the channel portion of the first active portion 231 on the substrate 10.
  • the light shielding portion 211 can shield light incident from the substrate 10 in a direction away from the light shielding portion 211 , thereby reducing interference of external light on the first active portion 231 , and further improving the working performance of the photosensitive device ST.
  • the light shielding portion 211 may be connected to the source 301 or the drain 302 to form an equal potential, so as to prevent the voltage change on the light shielding portion 211 from affecting the electrical performance of the first active portion 231 .
  • the third conductive layer 30 may further include an input electrode 303.
  • the input electrode 303 is connected to the first electrode 251 or the second electrode 252.
  • the input electrode 303 is used to access the bias voltage V bias .
  • the interlayer insulating layer 29 further includes a connection hole 29d.
  • the connection hole 29d extends to a surface of the second electrode 252 that is away from the substrate 10.
  • the input electrode 303 is connected to the second electrode 252 through the connection hole 29d.
  • the first conductive layer 25 also includes at least one scan line, and the scan line can be time-division multiplexed into the first electrode 251 and the second electrode 252.
  • Time-division multiplexing means that the scan line can be used to transmit a scan signal, and can also be used as the first electrode 251 and the second electrode 252 to transmit the bias voltage Vbias.
  • the scan line is respectively connected to the gate drive circuit and the signal line that provides the bias voltage Vbias.
  • the signal line transmits the bias voltage Vbias to the scan line; when displaying, the gate drive circuit provides a scan signal to the scan line.
  • the wiring in the display panel 100 can be reduced, the sizes of the first photosensitive element S1 and the second photosensitive element S2 can be increased, and the photosensitive area can be increased. It should be noted that when a plurality of photosensitive devices ST are provided in the display panel 100, each scanning line is only multiplexed into the first electrode 251 and the second electrode 252 connected in one photosensitive device ST.
  • FIG. 3 is a second structural schematic diagram of the display panel provided by the present application.
  • the display panel 100 includes a fourth conductive layer 21.
  • the fourth conductive layer 21 includes a conductive portion 212.
  • the orthographic projection of the conductive portion 212 on the substrate 10 overlaps at least partially with the orthographic projection of the drain 302 on the substrate 10. That is, the conductive portion 212 and the drain 302 constitute a storage capacitor C.
  • the conductive portion 212 and the drain electrode 302 are used to form a storage capacitor C, and the length of the first electrode 251 can be reduced in the direction from the switch element T to the first photosensitive element S1.
  • the cross-sectional area of the first electrode 251 is constant, the length of the first electrode 251 is reduced, thereby reducing the resistance of the first electrode 251 and reducing the load of the first photosensitive element S1 and the second photosensitive element S2.
  • the fourth conductive layer 21 may further include a light shielding portion 211.
  • the conductive portion 212 and the light shielding portion 211 are arranged in the same layer, which can save a photomask and simplify the process.
  • the conductive portion 212 and the light shielding portion 211 can also be arranged in different layers.
  • FIG. 4 is a third structural schematic diagram of the display panel provided by the present application.
  • the fourth conductive layer 21 also includes a conductive portion 212.
  • the orthographic projection of the conductive portion 212 on the substrate 10 at least partially overlaps with the orthographic projection of the first electrode 251 and/or the second electrode 252 on the substrate 10. That is, the conductive portion 212 and the first electrode 251 and/or the second electrode 252 constitute a storage capacitor C.
  • the embodiment of the present application forms a storage capacitor C through the conductive portion 212 and the first electrode 251 and/or the second electrode 252, which can reduce the extension length of the drain 302 from the switch element T to the first photosensitive element S1, thereby reducing the distance between the switch element T and the first photosensitive element S1, and reducing the wiring in the display panel 100.
  • the conductive portion 212 is located below the first electrode 251 and/or the second electrode 252, the capacitance value of the storage capacitor C can be adjusted by adjusting the area of the conductive portion 212, and no additional wiring space will be occupied.
  • the wiring space of the first photosensitive element S1 and the second photosensitive element S2 can be increased, and the photosensitive area of the photosensitive device can be further increased, thereby improving the sensitivity.
  • FIG5 is a fourth structural diagram of the display panel provided by the present application.
  • the first active layer 23 includes a first active portion 231 and a conductive electrode portion 232 .
  • the first active portion 231 and the first gate 253 are arranged correspondingly.
  • the source 301 and the drain 302 are respectively connected to the first active portion 231.
  • the orthographic projection of the electrode portion 232 on the substrate 10 partially overlaps with the orthographic projection of the first electrode 251 and/or the second electrode 252 on the substrate 10.
  • the electrode portion 232 may be made conductive by ion doping or other processes to improve the conductivity of the electrode portion 232 .
  • the storage capacitor C is formed by the conductive electrode portion 232 and the first electrode 251 and/or the second electrode 252.
  • the distance between the switch element T and the first photosensitive element S1 can be reduced, and the wiring in the display panel 100 can be reduced, thereby increasing the wiring space of the first photosensitive element S1 and the second photosensitive element S2, further increasing the photosensitive area of the photosensitive device, and improving the sensitivity.
  • the distance between the two plates of the storage capacitor C is reduced, thereby increasing the capacitance value of the storage capacitor C.
  • FIG. 6 is a fifth structural schematic diagram of the display panel provided by the present application.
  • the insulating layer 26 further includes a third insulating portion 263.
  • the orthographic projections of the first insulating portion 261 and the second insulating portion 262 on the substrate 10 overlap with the orthographic projections of the first electrode 251 and the second electrode 252 on the substrate 10.
  • the orthographic projection of the third insulating portion 263 on the substrate 10 overlaps with the orthographic projection of the first gate 253 on the substrate 10.
  • the embodiment of the present application can use the same photomask to achieve patterning of the first conductive layer 25 and the insulating layer 26, thereby simplifying the process.
  • the first insulating portion 261 covers the first electrode 251 and the second electrode 252
  • the third insulating portion 263 covers the first gate 253, when the photosensitive layer 27 is formed, the insulating layer 26 can protect the first electrode 251, the second electrode 252 and the first gate 253, thereby improving the stability of the photosensitive device.
  • FIG. 7 is a sixth structural diagram of the display panel provided by the present application.
  • the difference from the display panel 100 shown in FIG. 1 is at least that in the implementation of the present application, the display panel 100 further includes a pixel driving circuit.
  • the pixel driving circuit includes a first driving transistor T1 and a second driving transistor T2.
  • the display panel 100 further includes a second active layer 32 , a third active layer 33 and a conductive layer 34 .
  • the second active layer 32 is disposed between the substrate 10 and the photosensitive layer 27.
  • the second active layer 32 includes a second active portion 321 of the first driving transistor T1.
  • the second active portion 321 includes a polycrystalline silicon semiconductor.
  • the third active layer 33 is disposed between the second active layer 32 and the photosensitive layer 27.
  • the third active layer 33 includes a third active portion 331 of the second driving transistor T2.
  • the third active portion 331 includes a metal oxide semiconductor.
  • the conductive layer 34 is disposed between the second active layer 32 and the third active layer 33.
  • the conductive layer 34 includes a second gate 341 of the first driving transistor T1.
  • the second gate 341 is disposed to overlap at least partially with the second active portion 321.
  • the second conductive layer 28 further includes a third gate 283 of the second driving transistor T2 .
  • the third gate 283 is disposed to at least partially overlap with the third active portion 331 .
  • the first active portion 231 includes a polysilicon semiconductor.
  • the second active layer 32 also includes the first active portion 231.
  • the conductive layer 34 also includes a first gate 253 of the switch element T. The first gate 253 is at least partially overlapped with the first active portion 231. That is, the first active layer 23 and the second active layer 32 are the same active layer.
  • the first conductive layer 25 further includes a third electrode 255.
  • the third electrode 255, the second gate 341 and the first insulating layer 13 between the third electrode 255 and the second gate 341 form a capacitor.
  • the conductive layer 34 further includes a fifth gate 343 of the second driving transistor T2, that is, the second driving transistor T2 has a dual-gate structure.
  • the third conductive layer 30 further includes a first source 304 and a first drain 305 of the first driving transistor T1 and a second source 306 and a second drain 307 of the second driving transistor T2.
  • the first drain 305 and the second source 306 are connected through a via.
  • FIG8 is a seventh structural diagram of a display panel provided in the present application.
  • the first active portion 231 includes a metal oxide semiconductor.
  • the third active layer 33 also includes the first active portion 231 .
  • the conductive layer 34 further includes a fourth gate 342 of the switch element T.
  • the second conductive layer 28 further includes a first gate 253 of the switch element T.
  • the fourth gate 342 is at least partially overlapped with the first active portion 231.
  • the first gate 253 is at least partially overlapped with the first active portion 231. That is, the switch element T has a dual-gate structure.
  • FIG. 9 is an eighth structural schematic diagram of the display panel provided by the present application.
  • the difference from the display panel 100 shown in FIG. 1 is at least that, in the implementation of the present application, the photosensitive layer 27 further includes the first active portion 231 of the switch element T.
  • the gate insulating layer 24 has an opening 24a.
  • the opening 24a exposes the surface of the first photosensitive portion 271 and the second photosensitive portion 272 away from the substrate 10.
  • the first protective electrode 281 and the second protective electrode 282 are disposed in the opening 24a.
  • the first active portion 231, the first photosensitive portion 271 and the second photosensitive portion 272 are arranged in the same layer, which can simplify the manufacturing process.
  • the gate insulating layer 24 is formed first, and then the first protection electrode 281 and the second protection electrode 282 are formed, which can avoid damaging the first active portion 231 when patterning the second conductive layer 28, thereby improving the stability of the switch element T.
  • the display panel 100 further includes a pixel circuit.
  • the pixel circuit includes a first driving transistor T1 and a second driving transistor T2.
  • the photosensitive layer 27 further includes a first active portion 231 of the switch element T and a third active portion 331 of the second driving transistor T2.
  • the first active portion 231 of the switch element T, the third active portion 331 of the second driving transistor T2, the first photosensitive portion 271 and the second photosensitive portion 272 are arranged in the same layer.
  • the display panel 100 further includes a second active layer 32, a conductive layer 34, and a fifth conductive layer 31.
  • the second active layer 32 is disposed between the substrate 10 and the photosensitive layer 27.
  • the conductive layer 34 is disposed between the second active layer 32 and the photosensitive layer 27.
  • the fifth conductive layer 31 is disposed on a side of the gate insulating layer 24 away from the substrate 10.
  • the second active layer 32 includes a second active portion 321 of the first driving transistor T1.
  • the second active portion 321 includes a polycrystalline silicon semiconductor.
  • the conductive layer 34 includes a second gate 341 of the first driving transistor T1 and an electrode portion 232.
  • the second gate 341 is disposed to overlap at least partially with the second active portion 321.
  • the fifth conductive layer 31 includes a first gate 253 of the switching element T and a third gate 283 of the second driving transistor T2.
  • the first conductive layer 25 further includes a fourth gate 342 of the switch element T, a fifth gate 343 of the second driving transistor T2, and a third electrode 255.
  • the third conductive layer 30 further includes a first source 304 and a first drain 305 of the first driving transistor T1, and a second source 306 and a second drain 307 of the second driving transistor T2. The first drain 305 and the second source 306 are connected through a via.
  • FIG. 10 is a ninth structural diagram of the display panel provided by the present application.
  • the difference from the display panel 100 shown in FIG. 9 is that, in the implementation of the present application, the second active portion 321 of the first driving transistor T1 and the first active portion 231 of the switch element T are arranged in the same layer.
  • the third active portion 331 of the second driving transistor T2, the first photosensitive portion 271 and the second photosensitive portion 272 are arranged in the same layer.
  • the second active layer 32 includes the second active portion 321 of the first driving transistor T1 and the first active portion 231 of the switching element T.
  • the conductive layer 34 includes the second gate 341 of the first driving transistor T1 and the first gate 253 of the switching element T.
  • the embodiment of the present application adopts LTPO (Low Temperature Poly-Oxide) technology, which can reduce the power consumption of the display panel 100.
  • LTPO Low Temperature Poly-Oxide
  • the switch element T and the photosensitive device ST are made in the same layer and process as the LTPO structure in the plane, which can reduce the thickness of the display panel 100 and simplify the process.
  • FIG. 11 is a first plan view of a display panel provided by the present application.
  • the display panel 100 further includes a plurality of light-emitting units 40.
  • the plurality of light-emitting units 40 are arranged in a plurality of rows along a first direction Y, and in a plurality of columns along a second direction X.
  • the first direction Y intersects with the second direction X.
  • the first direction Y intersects with the second direction X at right angles.
  • a plurality of cross regions 40a are formed between the plurality of rows of light emitting units 40 and the plurality of columns of light emitting units 40.
  • Each cross region 40a is provided with at most one first photosensitive element S1 or one second photosensitive element S2.
  • the first photosensitive element S1 and the second photosensitive element S2 are arranged in different intersection areas 40a, so that the first photosensitive element S1 and the second photosensitive element S2 are staggered with the light-emitting unit 40 to avoid affecting the display effect of the display panel.
  • the first photosensitive element S1 and the second photosensitive element S2 are arranged in different intersection areas 40a, which can increase the wiring space of the first photosensitive element S1 and the second photosensitive element S2, and then increase the photosensitive area of the first photosensitive element S1 and the second photosensitive element S2, and further increase the amount of electrical signals.
  • each intersection area 40a may be provided with a first photosensitive element S1 or a second photosensitive element S2 to improve the test sensitivity.
  • the distribution density of the first photosensitive element S1 and the second photosensitive element S2 may also be set according to actual product requirements.
  • the first photosensitive element S1 and the second photosensitive element S2 are respectively located in two adjacent intersection regions 40 a .
  • the two adjacent intersection regions 40 a are located on the same side of the same light emitting unit 40 .
  • the distance between the first photosensitive element S1 and the second photosensitive element S2 in the same photosensitive device ST can be reduced, which facilitates the parallel connection between the first photosensitive element S1 and the second photosensitive element S2 and reduces the wiring length.
  • the display panel 100 includes a plurality of photosensitive devices ST.
  • a plurality of first photosensitive elements S1 and a plurality of second photosensitive elements S2 in the same row are arranged alternately; a plurality of first photosensitive elements S1 and a plurality of second photosensitive elements S2 in the same column are arranged alternately.
  • Each first photosensitive element S1 is connected in parallel with an adjacent second photosensitive element S2 in the same row and on the same side.
  • each first photosensitive element S1 is connected in parallel with an adjacent second photosensitive element S2 in the same column and on the same side.
  • each first photosensitive element S1 is connected in parallel with an adjacent second photosensitive element S2 located in the same row and on the right side of the first photosensitive element S1.
  • each first photosensitive element S1 can also be connected in parallel with an adjacent second photosensitive element S2 located in the same row and on the left side of the first photosensitive element S1.
  • the embodiment of the present application enables multiple photosensitive devices ST to be staggered in the display panel 100 , and the distribution of the multiple photosensitive devices ST in the display panel 100 is more uniform, which can improve the uniformity of the detection sensitivity of the display panel 100 .
  • a plurality of first photosensitive elements S1 and a plurality of second photosensitive elements S2 in the same row are arranged alternately, and the first photosensitive elements S1 or the second photosensitive elements S2 in the same column are all first photosensitive elements S1 or second photosensitive elements S2.
  • Each first photosensitive element S1 is connected in parallel with an adjacent second photosensitive element S2 in the same row and on the same side.
  • the embodiment of the present application makes the positional relationship between the first photosensitive element S1 and the second photosensitive element S2 in each photosensitive device ST the same, thereby improving the structural regularity of the multiple photosensitive devices S and reducing the difficulty of the process.
  • the photosensitive device ST further includes a third photosensitive element S3 (not shown in FIG. 1 ).
  • the third photosensitive element S3 includes a third electrode, a third protective electrode, and a third photosensitive portion located between the third electrode and the third protective electrode.
  • the third electrode, the first electrode 251, and the second electrode 252 are located in the same layer and connected.
  • the third photosensitive, first photosensitive portion 271, and second photosensitive portion 272 are located in the same layer and are spaced apart.
  • the third protective electrode, the first protective electrode 281, and the second protective electrode 282 are located in the same layer.
  • the third protective electrode is connected to the source 301 or the drain 302.
  • the first photosensitive element S1 , the second photosensitive element S2 , and the third photosensitive element S3 are respectively located in three intersection areas 40 a at three vertices of the same light emitting unit 40 .
  • the two first photosensitive elements S1 are diagonally arranged, the two second photosensitive elements S2 are diagonally arranged, and the two third photosensitive elements S3 are located in the same row, thereby improving the distribution uniformity of the multiple photosensitive devices ST.
  • the photosensitive device ST includes a first photosensitive element S1, a second photosensitive element S2 and a third photosensitive element S3, which further increases the photosensitive area of the photosensitive device ST.
  • the first photosensitive element S1, the second photosensitive element S2 and the third photosensitive element S3 are respectively arranged in three intersection areas 40a at three vertices of the same light-emitting unit 40, so that the distance between the first photosensitive element S1, the second photosensitive element S2 and the third photosensitive element S3 in the same photosensitive device ST can be reduced, which facilitates the parallel connection between the first photosensitive element S1, the second photosensitive element S2 and the third photosensitive element S3, and reduces the wiring length.

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Abstract

本申请公开一种显示面板。显示面板（100）包括感光器件（ST），感光器件（ST）包括开关元件（T）、第一感光元件（S1）以及第二感光元件（S2）。第一感光元件（S1）包括第一电极（251）、第一感光部（271）以及第一保护电极（281）；第二感光元件（S2）包括第二电极（252）、第二感光部（272）以及第二保护电极（282）；开关元件（T）包括源极（301）和漏极（302）；第一电极（251）和第二电极（252）相连接，第一感光部（271）和第二感光部（272）均与源极（301）或漏极（302）相连接。

Description

显示面板 技术领域
本申请涉及显示技术领域，具体涉及一种显示面板。
 背景技术
指纹识别已经成为大部分诸如手机、平板电脑、笔记本电脑等显示终端都配备的功能。目前，显示装置的指纹识别正逐步从电容式指纹识别转变为光学式指纹识别。光学式指纹识别是利用光线的折射和反射对用户指纹进行成像，然后通过图像识别的方法来识别指纹特征，具有成像分辨率高、图像识别比较容易等特点，且可以设置于显示屏下方，形成屏下指纹识别。
现有感光器件利用感光元件对光线进行检测，感光元件是一种将接收到的光信号转换成电信号的半导体器件。但随着像素分辨率的提升，面内发光单元会挤压感光元件的面积，从而带来光电信号量偏低的问题，影响检测灵敏度。
 发明概述
本申请提供一种显示面板，以解决感光元件面积较小，导致电信号量偏低，影响检测灵敏度的技术问题。
本申请提供一种显示面板，其包括：至少一感光器件，所述感光器件包括：开关元件、第一感光元件以及第二感光元件；所述显示面板还包括：
基板；
第一导电层，设置在所述基板上，所述第一导电层包括相连接的第一电极和第二电极；
感光层，设置在所述第一导电层远离所述基板的一侧，所述感光层包括与所述第一电极对应设置的第一感光部和与所述第二电极对应设置的第二感光部，且所述第一感光部和所述第二感光部间隔设置，所述感光层包括金属氧化物半导体；
绝缘层，设置在所述第一导电层和所述感光层之间；
第二导电层，设置在所述感光层远离所述基板的一侧，所述第二导电层包括第一保护电极和第二保护电极，所述第一保护电极和所述第一感光部电连接，所述第二保护电极和所述第二感光部电连接；
第三导电层，设置在所述第二导电层远离所述基板的一侧，所述第三导电层包括所述开关元件的源极和漏极，所述第一保护电极和所述第二保护电极均与所述开关元件的源极或漏极电连接；以及
其中，所述第一感光元件包括所述第一电极、所述第一感光部以及所述第一保护电极；所述第二感光元件包括所述第二电极、所述第二感光部以及所述第二保护电极。
可选的，在本申请一些实施例中，所述显示面板还包括：
第一有源层，设置在所述基板和所述感光层之间，所述第一有源层包括所述开关元件的第一有源部，所述开关元件的源极和漏极均与所述第一有源部电连接，所述第一有源部包括多晶硅半导体，或者，金属氧化物半导体。
可选的，在本申请一些实施例中，所述感光器件还包括：存储电容；
所述第一导电层还包括所述存储电容的第一电容电极，所述第一电容电极与所述第一电极以及所述第二电极均电连接；
所述第三导电层还包括所述存储电容的第二电容电极，所述第二电容电极与所述第一保护电极以及所述第二保护电极均电连接，所述第二电容电极与所述第一电容电极至少部分重叠设置。
可选的，在本申请一些实施例中，所述显示面板还包括:第四导电层，所述第四导电层包括导电部，所述导电部在所述基板上的正投影与所述第一电极和/或所述第二电极在所述基板上的正投影部分重叠。
可选的，在本申请一些实施例中，所述感光层的所述金属氧化物半导体的电子迁移率大于或等于10cm 2 /Vs，所述绝缘层的厚度为5纳米至15纳米。
可选的，在本申请一些实施例中，所述显示面板还包括：像素驱动电路，所述像素驱动电路包括第一驱动晶体管和第二驱动晶体管；
所述显示面板还包括：
第二有源层，设置在所述基板和所述感光层之间，所述第二有源层包括所述第一驱动晶体管的第二有源部，所述第二有源部包括多晶硅半导体；
第三有源层，设置在所述第二有源层和所述感光层之间，所述第三有源层包括第二驱动晶体管的第三有源部，所述第三有源部包括金属氧化物半导体；
导电层，设置在所述第二有源层和所述第三有源层之间，所述导电层包括所述第一驱动晶体管的第二栅极，所述第二栅极与所述第二有源部至少部分重叠设置；
所述第二导电层还包括所述第二驱动晶体管的第三栅极，所述第三栅极与所述第三有源部至少部分重叠设置。
可选的，在本申请一些实施例中，所述第一有源部包括多晶硅半导体；
所述第二有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第一栅极，所述第一栅极与所述第一有源部至少部分重叠设置。
可选的，在本申请一些实施例中，所述第一有源部包括金属氧化物半导体；
所述第三有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第四栅极，所述第二导电层还包括所述开关元件的第一栅极，所述第四栅极与所述第一有源部至少部分重叠设置，所述第一栅极与所述第一有源部至少部分重叠设置。
可选的，在本申请一些实施例中，所述显示面板还包括多个发光单元，多个所述发光单元沿第一方向排列成多行，以及沿第二方向排列成多列；
其中，多行所述发光单元和多列所述发光单元之间形成多个交叉区域，每一所述交叉区域至多设有一所述第一感光元件或一所述第二感光元件。
可选的，在本申请一些实施例中，所述第一感光元件和所述第二感光元件分别位于两个相邻的所述交叉区域内，所述两个相邻的所述交叉区域位于同一所述发光单元的同一侧。
可选的，在本申请一些实施例中，所述显示面板包括多个所述感光器件；
其中，位于同一行的多个所述第一感光元件和多个所述第二感光元件交替排列，位于同一列的多个所述第一感光元件和多个所述第二感光元件交替排列，且每一所述第一感光元件均与位于同一行且同侧的一相邻所述第二感光元件并联，或者每一所述第一感光元件均与位于同一列且同侧的一相邻所述第二感光元件并联；
或者位于同一行的多个所述第一感光元件和多个所述第二感光元件交替排列，位于同一列的均为所述第一感光元件或所述第二感光元件，每一所述第一感光元件均与位于同一行且同侧的一相邻所述第二感光元件并联。
可选的，在本申请一些实施例中，所述感光器件还包括第三感光元件；
其中，所述第三感光元件包括第三电极、第三保护电极以及位于所述第三电极和所述第三保护电极之间的第三感光部；所述第三电极和所述第一电极位于同一层且相连接，所述第三感光部和所述第一感光部位于同一层且间隔设置，所述第三保护电极和所述源极或所述漏极相连接；
所述第一感光元件、所述第二感光元件以及所述第三感光元件分别位于同一所述发光单元的三个顶点处的三个所述交叉区域内。
本申请实施例还涉及一种显示面板，其包括至少一感光器件，所述感光器件包括：开关元件、第一感光元件以及第二感光元件；所述显示面板还包括：
基板；
第一导电层，设置在所述基板上，所述第一导电层包括相连接的第一电极和第二电极；
感光层，设置在所述第一导电层远离所述基板的一侧，所述感光层包括与所述第一电极对应设置的第一感光部和与所述第二电极对应设置的第二感光部，且所述第一感光部和所述第二感光部间隔设置，所述感光层包括金属氧化物半导体；
绝缘层，设置在所述第一导电层和所述感光层之间；
第二导电层，设置在所述感光层远离所述基板的一侧，所述第二导电层包括第一保护电极和第二保护电极，所述第一保护电极和所述第一感光部电连接，所述第二保护电极和所述第二感光部电连接；以及
第三导电层，设置在所述第二导电层远离所述基板的一侧，所述第三导电层包括所述开关元件的源极和漏极，所述第一保护电极和所述第二保护电极均与所述开关元件的源极或漏极电连接；
所述第一感光元件包括所述第一电极、所述第一感光部以及所述第一保护电极；所述第二感光元件包括所述第二电极、所述第二感光部以及所述第二保护电极；
所述显示面板还包括：
第一有源层，设置在所述基板和所述第一导电层之间，所述第一有源层包括所述开关元件的第一有源部，所述开关元件的源极和漏极分别与所述第一有源部电连接；
所述显示面板还包括多个发光单元，多个所述发光单元沿第一方向排列成多行，以及沿第二方向排列成多列；
多行所述发光单元和多列所述发光单元之间形成多个交叉区域，每一所述交叉区域至多设有一所述第一感光元件或一所述第二感光元件。
可选的，在本申请一些实施例中，所述感光器件还包括：存储电容，所述存储电容包括至少部分重叠设置的第一电容电极和第二电容电极；
所述第一电容电极与所述第一电极以及所述第二电极均电连接；
所述第二电容电极与所述第一保护电极以及所述第二保护电极均电连接，所述第二电容电极与所述第一电容电极至少部分重叠设置。
可选的，在本申请一些实施例中，所述显示面板还包括:第四导电层，所述第四导电层包括导电部，所述导电部在所述基板上的正投影与所述第一电极和/或所述第二电极在所述基板上的正投影部分重叠。
可选的，在本申请一些实施例中，所述感光层的所述金属氧化物半导体的电子迁移率大于或等于10cm 2/Vs，所述绝缘层的厚度为5纳米至15纳米。
可选的，在本申请一些实施例中，所述显示面板还包括：像素驱动电路，所述像素驱动电路包括第一驱动晶体管和第二驱动晶体管；
所述显示面板还包括：
第二有源层，设置在所述基板和所述感光层之间，所述第二有源层包括所述第一驱动晶体管的第二有源部，所述第二有源部包括多晶硅半导体；
第三有源层，设置在所述第二有源层和所述感光层之间，所述第三有源层包括第二驱动晶体管的第三有源部，所述第三有源部包括金属氧化物半导体；
导电层，设置在所述第二有源层和所述第三有源层之间，所述导电层包括所述第一驱动晶体管的第二栅极，所述第二栅极与所述第二有源部至少部分重叠设置；
所述第二导电层还包括所述第二驱动晶体管的第三栅极，所述第三栅极与所述第三有源部至少部分重叠设置。
可选的，在本申请一些实施例中，所述第一有源部包括多晶硅半导体；
所述第二有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第一栅极，所述第一栅极与所述第一有源部至少部分重叠设置。
可选的，在本申请一些实施例中，所述第一有源部包括金属氧化物半导体；
所述第三有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第四栅极，所述第二导电层还包括所述开关元件的第一栅极，所述第四栅极与所述第一有源部至少部分重叠设置，所述第一栅极与所述第一有源部至少部分重叠设置。
可选的，在本申请一些实施例中，所述第一感光元件和所述第二感光元件分别位于两个相邻的所述交叉区域内，所述两个相邻的所述交叉区域位于同一所述发光单元的同一侧。
有益效果
本申请提供公开一种显示面板。显示面板包括至少一感光器件，所述感光器件包括开关元件、第一感光元件以及第二感光元件。其中，第一感光元件包括第一电极、第一感光部以及第一保护电极；第二感光元件包括第二电极、第二感光部以及第二保护电极。由于第一电极和第二电极连接，且第一感光部和第二感光部均与开关元件的源极或漏极连接，使得第一感光元件和第二感光元件并联设计，增大了感光器件的感光面积，从而提高了电信号量，提高了检测灵敏度。此外，由于第一电极和第二电极同层设置、第一感光部和第二感光部同层设置，简化了感光器件的膜层结构。再则，由于第一电极和第一感光部之间设有绝缘层，可以减小第一电极和第一感光部之间的势垒差，允许电子隧穿，形成导电通路；同理由于第二电极和第二感光部之间设有绝缘层，可以减小第二电极和第二感光部之间的势垒差，允许电子隧穿，形成导电通路；由此可以改善感光器件的感光性能。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获取其他的附图。
图1是本申请提供的显示面板的第一结构示意图；
图2是本申请提供的感光器件的电路示意图；
图3是本申请提供的显示面板的第二结构示意图；
图4是本申请提供的显示面板的第三结构示意图；
图5是本申请提供的显示面板的第四结构示意图；
图6是本申请提供的显示面板的第五结构示意图；
图7是本申请提供的显示面板的第六结构示意图；
图8是本申请提供的显示面板的第七结构示意图；
图9是本申请提供的显示面板的第八结构示意图；
图10是本申请提供的显示面板的第九结构示意图；
图11是本申请提供的显示面板的第一平面示意图；
图12是本申请提供的显示面板的第二平面示意图；
图13是本申请提供的显示面板的第三平面示意图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获取的所有其他实施例，都属于本申请保护的范围。
在本申请的描述中，需要理解的是，术语“第一”和“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”和“第二”等的特征可以明示或者隐含地包括一个或者更多个所述特征，因此不能理解为对本申请的限制。此外，需要说明的是，除非另有明确的规定和限定，术语“相连”、“连接”应做广义理解，例如，可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通。对于本领域的普通技术人员而言，可以具体情况理解上述术语在本发明中的具体含义。
本申请提供一种显示面板，以下进行详细说明。需要说明的是，以下实施例的描述顺序不作为对本申请实施例优选顺序的限定。
请参阅图1，图1是本申请提供的显示面板的第一结构示意图。在本申请实施例中，显示面板100包括至少一感光器件ST。感光器件ST包括开关元件T、第一感光元件S1以及第二感光元件S2。
显示面板100还包括基板10、第一导电层25、绝缘层26、感光层27、第二导电层28以及第三导电层30。
其中，第一导电层25设置在基板10上。第一导电层25包括相连接的第一电极251和第二电极252。
感光层27设置在第一导电层25远离基板10的一侧。感光层27包括与第一电极251对应设置的第一感光部271和与第二电极252对应设置的第二感光部272。感光层27包括金属氧化物半导体。第一感光部271和第二感光部272间隔设置。
绝缘层26设置在第一导电层25和感光层27之间。比如，绝缘层26包括第一绝缘部261和第二绝缘部262。第一绝缘部261至少位于第一电极251和第一感光部271之间。第二绝缘部262至少位于第二电极252和第二感光部272之间。
第二导电层28设置在感光层27远离基板10的一侧。第二导电层28包括第一保护电极281和第二保护电极282。第一保护电极281和第一感光部271电连接。第二保护电极282和第二感光部272电连接。
第三导电层30设置在第二导电层28远离基板10的一侧。第三导电层30包括开关元件T的源极301和漏极302。第一保护电极281和第二保护电极282均与源极301或漏极302连接。比如，第一保护电极281和第二保护电极282均与源极301连接。又比如，第一保护电极281和第二保护电极282均与漏极302连接。
其中，第一感光元件S1包括第一电极251、第一绝缘部261、第一感光部271以及第一保护电极281。第二感光元件S2包括第二电极252、第二绝缘部262、第二感光部272以及第二保护电极282。
其中，第一电极251和第二电极252可以直接连接，也即第一电极251和第二电极252为一体结构。第一电极251和第二电极252也可以通过桥接线和过孔连接，本申请对此不作具体限定。本申请以下各实施例均以第一电极251和第二电极252直接连接为例进行说明，但不能理解为对本申请的限定。
本申请实施例中，一感光器件ST至少包括两个感光元件，分别为第一感光元件S1和第二感光元件S2。由于第一电极251和第二电极252相连接，第一保护电极281和第二保护电极282均与源极301或漏极302连接，由此实现第一感光元件S1和第二感光元件S2的并联，增大了感光器件ST的感光面积，从而提高电信号量和检测灵敏度。此外，由于第一电极251和第二电极252同层设置，第一感光部271和第二感光部272同层设置，且第一保护电极281和第二保护电极282同层设置，简化了感光器件ST的膜层结构。再则，由于第一电极251和第一感光部271之间设有第一绝缘部261，可以减小第一电极251和第一感光部271之间的势垒差，允许电子隧穿，形成导电通路；同理由于第二电极252和第二感光部272之间设有第二绝缘部262，可以减小第二电极252和第二感光部272之间的势垒差，允许电子隧穿，形成导电通路；由此相较于相关技术中形成金属-半导体结需要高功函数金属的情况，本申请利用常规材料的第一导电层25，即可形成感光器件ST，改善感光器件ST的感光性能。
可以理解的是，当显示面板100中的布线空间有限时，第一感光元件S1和第二感光元件S2各自的感光面积都会设计的比较小，第一感光部271和第二感光部272各自吸收的光信号较少，产生的电流信号也比较小。本申请实施例中一感光器件ST至少包括并联设计的第一感光元件S1和第二感光元件S2，增大了感光器件ST的整体感光面积，提高了电信号量，从而提高检测灵敏度。
需要说明的是，本申请实施例以一个感光器件ST包括两个并联的感光元件（第一感光元件S1和第二感光元件S2）为例进行说明，但不能理解为对本申请的限定。比如，一个感光器件ST可以包括3个并联的感光元件、5个感光元件或更多个感光元件。
本申请实施例中，开关元件T还包括第一栅极253以及第一有源部231。第一有源部231和第一栅极253对应设置。源极301和漏极302分别与第一有源部231连接。其中，第一栅极253、第一有源部231、源极301以及漏极302的膜层结构将在以下实施例中进行说明，在此不再赘述。
本申请实施例中，感光器件ST还包括至少一存储电容C。存储电容C的第一电容极板与第一电极251以及第二电极252均电连接。存储电容C的第二电容极板与源极301或漏极302连接。
比如，感光器件ST仅包括一存储电容C，第一感光元件S1和第二感光元件S2共用一存储元件C，进一步简化感光器件ST的结构。
具体的，请参阅图1和图2，图2是本申请提供的感光器件的电路示意图。感光器件ST包括第一感光元件S1、第二感光元件S2、存储电容C以及开关元件T。
其中，第一电极251和第二电极252接入偏置电压VBias。当光线进入感光器件ST中的第一感光元件S1和第二感光元件S2时，第一感光元件S1中的第一感光部271和第二感光元件S2中的第二感光部272吸收光信号，并将接收的光信号转换为电信号。电信号存储在存储电容C中，存储电容C充满后，开关元件T开启，存储电容C放电，可以将第一感光元件S1和第二感光元件S2产生的信号传递至检测信号线（图中未示出），由检测信号线传递给对应的电路进行处理，实现光强度的检测。
本申请实施例中，第一有源部231的材料可以为单晶硅、低温多晶硅或者金属氧化物半导体。金属氧化物半导体可以为IGZO（铟镓锌氧化物）、IGZTO（铟镓锌锡氧化物）、IZO、IGO（镓铟氧化物）、IGTO（铟镓锡氧化物）、IZTO（铟锌锡氧化物）、ITO、ATZO（锌铝锡氧化物）、AIZO（锌铝铟氧化物）等。
在一些实施例中，感光层27的金属氧化物半导体的电子迁移率大于或等于10cm 2/Vs。具体的，第一感光部271和第二感光部272的材料均为IGZO。IGZO具有高迁移率。IGZO在可见光波段具有较好的光感特性、较低的电阻，因此可以提高感光器件ST的感光性能。
在一些实施例中，第一有源部231、第一感光部271以及第二感光部272的材料均为IGZO。如此，第一感光部271以及第二感光部272可以同IGZO基板膜层共用。
在一些实施例中，第一有源部231、第一感光部271以及第二感光部272的材料可以不相同。比如，第一感光部271和第二感光部272的材料为氧化铟镓锌，第一有源部231的材料可以为单晶硅、低温多晶硅或者其它非IGZO的氧化物半导体材料。如此，可以同时满足开关元件T和第一感光元件S1以及第二感光元件S2的性能需求。
在一些实施例中，第一保护电极281在基板10上的正投影与第一感光部271在基板10上的正投影重叠；第二保护电极282在基板10上的正投影与第二感光部272在基板10上的正投影重叠。由此，可以采用同一光罩进行图案化处理以形成感光层27和第二导电层28，简化工艺制程。当然，本申请并不限于此。
本申请实施例中，第二感光元件S2位于第一感光元件S1远离漏极302的一侧。第一导电层25还包括存储电容C的第一电容电极。第一电容电极与第一电极251以及第二电极252均电连接。第三导电层30还包括存储电容C的第二电容电极。第二电容电极与第一保护电极281以及第二保护电极282均电连接。第二电容电极与第一电容电极至少部分重叠设置。
具体的，第一电容电极为漏极302的一部分，第二电容电极为第一电极251的一部分。漏极302在基板10上的正投影与第一电极251在基板10上的正投影至少部分重叠。也即，漏极302至少与第一电极251构成存储电容C。由于第一电极251与第二电极252相连接，第一感光元件S1和第二感光元件S2共用一存储电容C。
本申请实施例中，显示面板100还包括第一有源层23和栅绝缘层24。第一有源层23设置在第一导电层25靠近基板10的一侧。栅绝缘层24设置在第一有源层23和第一导电层25之间。第一有源层23包括第一有源部231。第一导电层25还包括第一栅极253。第一有源部231和第一栅极253对应设置。
本申请实施例将第一栅极253与第一电极251以及第二电极252同层设置，可以节省一道光罩，简化工艺制程。同时，减小了显示面板100的厚度。
在一实施例中，显示面板100还包括层间绝缘层29。层间绝缘层29位于第一导电层25和第三导电层30之间。层间绝缘层29具有第一过孔29a、第二过孔29b以及第三过孔29c。第一过孔29a贯穿层间绝缘层29，并延伸至第一有源部231远离基板10的一侧。源极301通过第一过孔29a与第一有源部231连接。第二过孔29b贯穿层间绝缘层29，并延伸至第一有源部231远离基板10的一侧。漏极302通过第二过孔29b与第一有源部231连接。第三过孔29c暴露出第一保护电极281远离基板10的一侧表面。漏极302通过第三过孔29c与第一保护电极281连接。
其中，第一有源部231包括源极区、漏极区以及位于源极区和漏极区之间的沟道区（图中未标示）。源极301与源极区连接。漏极302与漏极区连接。源极区和漏极区通过离子掺杂等方式进行了导体化，因此可以提高源极301以及漏极302与第一有源部231的导电性。
需要说明的是，本申请实施例以开关元件T为顶栅型晶体管为例进行说明，但不能理解为对本申请的限定。在本申请一些实施例中，开关元件T也可以是底栅型晶体管或双栅晶体管。
本申请实施例中，基板10可以包括但不限于从下至上依次叠层设置的衬底11、阻隔层12、第一绝缘层13以及第二绝缘层14。其中，衬底11的材料可以是玻璃或柔性材料。阻隔层12、第一绝缘层13以及第二绝缘层14的材料可以是氧化硅、氮化硅等。阻隔层12、第一绝缘层13以及第二绝缘层14可以起到阻水隔氧的作用。
本申请实施例中，第一导电层25由导电性优、遮光性好的材料制成。比如，第一导电层25的材料可以是钼、钛、钼/铜(叠层)、钼/钛(叠层)或者钛/铝(叠层)等。本申请实施例利用具有遮光性的导电材料制成第一电极251和第二电极252，可以避免基板10侧的光线入射进第一感光元件S1和第二感光元件S2，从而提高感光器件ST的检测精度。
本申请实施例中，绝缘层26的材料可以是氮化硅、氧化硅等。绝缘层26的厚度很薄，一般为10纳米左右，比如5纳米至15纳米。当第一感光元件S1和第二感光元件S2工作时，电子可以穿过第一感光元件S1和第二感光元件S2。
本申请实施例中，栅绝缘层24和层间绝缘层29的材料可以为氧化硅、氮化硅、三氧化铝及其叠层。
本申请实施例中，第二导电层28为透明的导电材料，从而保证光线可以入射进第一感光元件S1和第二感光元件S2，提高感光器件ST的感测灵敏度。比如，第二导电层28的材料可以是ITO、IZO等。
本申请实施例中，显示面板100还包括第四导电层21和缓冲层22。第四导电层21设置在第一有源层23靠近基板10的一侧。缓冲层22设置在第一有源层23和第四导电层21之间。第四导电层21包括遮光部211。遮光部211与第一有源部231对应设置。比如，遮光部211在基板10上的正投影至少覆盖第一有源部231的沟道部在基板10上的正投影。
其中，遮光部211可以遮挡从基板10远离遮光部211的方向射入的光线，进而减弱外部光线对第一有源部231产生的干扰，进一步提高感光器件ST的工作性能。
在一些实施例中，还可以将遮光部211与源极301或漏极302连接形成等电位，可以避免遮光部211上的电压变化影响第一有源部231的电学性能。
本申请实施例中，第三导电层30还可以包括输入电极303。输入电极303与第一电极251或第二电极252连接。输入电极303用于接入偏置电压V bias。
比如，层间绝缘层29还包括连接孔29d。连接孔29d延伸至第二电极252远离基板10的一侧表面。输入电极303通过连接孔29d与第二电极252连接。
本申请实施例中，第一导电层25还包括至少一扫描线，扫描线可以分时复用为第一电极251和第二电极252。分时复用指的是：扫描线可以用于传输扫描信号，也可以用作第一电极251和第二电极252以传输偏置电压Vbias。具体的，扫描线分别与栅极驱动电路以及提供偏置电压Vbias的信号线连接。在进行指纹识别时，信号线传输偏置电压Vbias至扫描线；在进行显示时，栅极驱动电路提供扫描信号至扫描线。
由此，可以减少显示面板100中的布线，增大第一感光元件S1和第二感光元件S2的尺寸，从而增加感光面积。需要说明的是，当显示面板100内设有多个感光器件ST时，每一扫描线仅复用为一感光器件ST中相连接的第一电极251和第二电极252。
请参阅图3，图3是本申请提供的显示面板的第二结构示意图。与图1所示的显示面板100的不同之处在于，本申请实施中，显示面板100包括第四导电层21。第四导电层21包括导电部212。导电部212在基板10上的正投影与漏极302在基板10上的正投影至少部分重叠。也即，导电部212与漏极302构成存储电容C。
本申请实施例利用导电部212与漏极302构成存储电容C，可以在自开关元件T向第一感光元件S1的方向上，减小第一电极251的长度。在第一电极251的横截面积一定的情况下，减小第一电极251的长度，从而减小第一电极251的电阻，降低第一感光元件S1和第二感光元件S2的负载。
此外，第四导电层21还可以包括遮光部211。导电部212和遮光部211同层设置，可以节省一道光罩，简化工艺制程。当然，在一些实施例中导电部212和遮光部211也可以异层设置。
请参阅图4，图4是本申请提供的显示面板的第三结构示意图。与图1所示的显示面板100的不同之处在于，本申请实施中，第四导电层21还包括导电部212。导电部212在基板10上的正投影与第一电极251和/或第二电极252在基板10上的正投影至少部分重叠。也即，导电部212与第一电极251和/或第二电极252构成存储电容C。
可以理解的是，本申请实施例通过导电部212与第一电极251和/或第二电极252构成存储电容C，可以减小漏极302自开关元件T向第一感光元件S1的延伸长度，从而减小开关元件T和第一感光元件S1之间的距离，减少显示面板100中的布线。并且由于导电部212位于第一电极251和/或第二电极252的下方，通过调节导电部212的面积，便可调节存储电容C的电容值，不会额外占用布线空间。由此，可以增加第一感光元件S1和第二感光元件S2的布线空间，进一步提高感光器件的感光面积，提高灵敏度。
请参阅图5，图5是本申请提供的显示面板的第四结构示意图。与图1所示的显示面板100的不同之处在于，本申请实施中，第一有源层23包括第一有源部231和导体化的电极部232。
其中，第一有源部231和第一栅极253对应设置。源极301和漏极302分别与第一有源部231连接。电极部232在基板10上的正投影与第一电极251和/或第二电极252在基板10上的正投影部分重叠。
其中，可通过离子掺杂等工艺对电极部232进行导体化处理，以提高电极部232的导电能力。
本申请实施例通过导体化的电极部232与第一电极251和/或第二电极252构成存储电容C。一方面，可以减小开关元件T和第一感光元件S1之间的距离，减少显示面板100中的布线，从而增加第一感光元件S1和第二感光元件S2的布线空间，进一步提高感光器件的感光面积，提高灵敏度。另一方面，由于电极部232和第一电极251（第二电极252）之间仅设有缓冲层22，减小了存储电容C的两极板之间的距离，从而提高存储电容C的电容值。
请参阅图6，图6是本申请提供的显示面板的第五结构示意图。与图1所示的显示面板100的不同之处在于，本申请实施中，绝缘层26还包括第三绝缘部263。第一绝缘部261和第二绝缘部262在基板10上的正投影与第一电极251和第二电极252在基板10上的正投影重叠。第三绝缘部263在基板10上的正投影与第一栅极253在基板10上的正投影重叠。
本申请实施例可以采用同一光罩实现对第一导电层25和绝缘层26的图案化处理，简化工艺制程。此外，由于第一绝缘部261覆盖在第一电极251和第二电极252上，第三绝缘部263覆盖在第一栅极253上，在制成感光层27时，绝缘层26可以起到保护第一电极251、第二电极252以及第一栅极253的作用，提高感光器件的稳定性。
请参阅图7，图7是本申请提供的显示面板的第六结构示意图。与图1所示的显示面板100的不同之处至少在于，本申请实施中，显示面板100还包括像素驱动电路。像素驱动电路包括第一驱动晶体管T1和第二驱动晶体管T2。
显示面板100还包括第二有源层32、第三有源层33以及导电层34。
第二有源层32设置在基板10和感光层27之间。第二有源层32包括第一驱动晶体管T1的第二有源部321。第二有源部321包括多晶硅半导体。
第三有源层33设置在第二有源层32和感光层27之间。第三有源层33包括第二驱动晶体管T2的第三有源部331。第三有源部331包括金属氧化物半导体。
导电层34设置在第二有源层32和第三有源层33之间。导电层34包括第一驱动晶体管T1的第二栅极341。第二栅极341与第二有源部321至少部分重叠设置。
第二导电层28还包括第二驱动晶体管T2的第三栅极283。第三栅极283与第三有源部331至少部分重叠设置。
在一些实施例中，请继续参阅图7，第一有源部231包括多晶硅半导体。第二有源层32还包括第一有源部231。导电层34还包括开关元件T的第一栅极253。第一栅极253与第一有源部231至少部分重叠设置。也即，第一有源层23和第二有源层32为同一有源层。
其中，第一导电层25还包括第三电极255。第三电极255与第二栅极341以及位于第三电极255与第二栅极341之间的第一绝缘层13构成一电容。导电层34还包括第二驱动晶体管T2的第五栅极343，也即第二驱动晶体管T2为双栅结构。
其中，第三导电层30还包括第一驱动晶体管T1的第一源极304和第一漏极305以及第二驱动晶体管T2的第二源极306和第二漏极307。第一漏极305和第二源极306通过过孔连接。
在一些实施例中，请参阅图8，图8是本申请提供的显示面板的第七结构示意图。与图7所示的显示面板100的不同之处在于，在本实施例中，第一有源部231包括金属氧化物半导体。第三有源层33还包括第一有源部231。
其中，导电层34还包括开关元件T的第四栅极342。第二导电层28还包括开关元件T的第一栅极253。第四栅极342与第一有源部231至少部分重叠设置。第一栅极253与第一有源部231至少部分重叠设置。也即，开关元件T为双栅结构。
请参阅图9，图9是本申请提供的显示面板的第八结构示意图。与图1所示的显示面板100的不同之处至少在于，本申请实施中，感光层27还包括开关元件T的第一有源部231。栅绝缘层24具有开口24a。开口24a暴露出第一感光部271和第二感光部272远离1基板10的一侧表面。第一保护电极281和第二保护电极282设置在开口24a内。
本申请实施例将第一有源部231、第一感光部271以及第二感光部272同层设置，可以简化制程工艺。同时，先形成栅绝缘层24，然后形成第一保护电极281和第二保护电极282，可以避免对第二导电层28进行图案化时损伤第一有源部231，从而提高开关元件T的稳定性。
进一步的，在一些实施例中，请继续参阅图9，显示面板100还包括像素电路。像素电路包括第一驱动晶体管T1和第二驱动晶体管T2。
其中，感光层27还包括开关元件T的第一有源部231和第二驱动晶体管T2的第三有源部331。开关元件T的第一有源部231、第二驱动晶体管T2的第三有源部331、第一感光部271以及第二感光部272同层设置。
具体的，显示面板100还包括第二有源层32、导电层34以及第五导电层31。第二有源层32设置在基板10和感光层27之间。导电层34设置在第二有源层32和感光层27之间。第五导电层31设置在栅绝缘层24远离基板10的一侧。第二有源层32包括第一驱动晶体管T1的第二有源部321。第二有源部321包括多晶硅半导体。导电层34包括第一驱动晶体管T1的第二栅极341和电极部232。第二栅极341与第二有源部321至少部分重叠设置。第五导电层31包括开关元件T的第一栅极253和第二驱动晶体管T2的第三栅极283。
第一导电层25还包括开关元件T的第四栅极342、第二驱动晶体管T2的第五栅极343以及第三电极255。第三导电层30还包括第一驱动晶体管T1的第一源极304和第一漏极305，以及第二驱动晶体管T2的第二源极306和第二漏极307。第一漏极305和第二源极306通过过孔连接。
请参阅图10，图10是本申请提供的显示面板的第九结构示意图。与图9所示的显示面板100的不同之处在于，本申请实施中，第一驱动晶体管T1的第二有源部321和开关元件T的第一有源部231同层设置。第二驱动晶体管T2的第三有源部331、第一感光部271以及第二感光部272同层设置。
具体的，第二有源层32包括第一驱动晶体管T1的第二有源部321和开关元件T的第一有源部231。导电层34包括第一驱动晶体管T1的第二栅极341、和开关元件T的第一栅极253。
本申请实施例采用LTPO（Low Temperature Poly-Oxide，低温多晶氧化物）技术，可以降低显示面板100的功耗。同时将开关元件T和感光器件ST与面内的LTPO结构同层同工艺制成，可以减小显示面板100的厚度，简化制程工艺。
请参阅图11，图11是本申请提供的显示面板的第一平面示意图。显示面板100还包括多个发光单元40。多个发光单元40沿第一方向Y排列成多行，以及沿第二方向X排列成多列。第一方向Y和第二方向X相交。比如，第一方向Y和第二方向X垂直相交。
其中，多行发光单元40和多列发光单元40之间形成多个交叉区域40a。每一交叉区域40a至多设有一第一感光元件S1或一第二感光元件S2。
本申请实施例将第一感光元件S1和第二感光元件S2设置在不同的交叉区域40a内，使得第一感光元件S1和第二感光元件S2均与发光单元40错开设置，避免影响显示面板的显示效果。此外，将第一感光元件S1和第二感光元件S2设置在不同的交叉区域40a内，可以提高第一感光元件S1和第二感光元件S2的布线空间，进而可以增大第一感光元件S1和第二感光元件S2的感光面积，进一步提高电信号量。
本申请实施例中，每一交叉区域40a均可设置一第一感光元件S1或一第二感光元件S2，以提高测试灵敏度。当然，也可以根据实际产品需求设置第一感光元件S1和第二感光元件S2的分布密度。
如图11所示，第一感光元件S1和第二感光元件S2分别位于两个相邻的交叉区域40a内。两个相邻的交叉区域40a位于同一发光单元40的同一侧。
由此，可以减小同一感光器件ST中的第一感光元件S1和第二感光元件S2之间的距离，便于实现第一感光元件S1和第二感光元件S2之间的并联，减小布线长度。
在本申请一些实施例中，显示面板100包括多个感光器件ST。位于同一行的多个第一感光元件S1和多个第二感光元件S2交替排列；位于同一列的多个第一感光元件S1和多个第二感光元件S2交替排列。每一第一感光元件S1均与位于同一行且同侧的一相邻第二感光元件S2并联。或者每一第一感光元件S1均与位于同一列且同侧的一相邻第二感光元件S2并联。
比如，如图11所示，每一第一感光元件S1均与位于同一行且位于该第一感光元件S1右侧的一相邻第二感光元件S2并联。当然，每一第一感光元件S1也可以与位于同一行且位于该第一感光元件S1左侧的一相邻第二感光元件S2并联。
可以理解的是，本申请实施例使得多个感光器件ST在显示面板100中交错设置，多个感光器件ST在显示面板100中的分布更加均匀，可以提高显示面板100的检测灵敏度均一性。
在本申请一些实施例中，如图12所示，位于同一行的多个第一感光元件S1和多个第二感光元件S2交替排列，位于同一列的均为第一感光元件S1或第二感光元件S2。每一第一感光元件S1均与位于同一行且同侧的一相邻第二感光元件S2并联。
可以理解的是，本申请实施例使得每一感光器件ST中的第一感光元件S1和第二感光元件S2的位置关系均相同，从而提高多个感光器件S的结构规整性，降低制程难度。
在本申请一些实施例中，如图1和图13所示，感光器件ST还包括第三感光元件S3（图1中未示出）。
其中，第三感光元件S3包括第三电极、第三保护电极以及位于第三电极和第三保护电极之间的第三感光部。第三电极、第一电极251以及第二电极252位于同一层且相连接。第三感光、第一感光部271以及第二感光部272位于同一层且间隔设置。第三保护电极、第一保护电极281以及第二保护电极282位于同一层。第三保护电极和源极301或漏极302相连接。
第一感光元件S1、第二感光元件S2以及第三感光元件S3分别位于同一发光单元40的三个顶点处的三个交叉区域40a内。
具体的，在同一列发光单元40中，对于每相邻两个感光器件ST来说，两个第一感光元件S1呈对角设置，两个第二感光元件S2呈对角设置，两个第三感光元件S3位于同一行，从而提高多个感光器件ST的分布均匀性。
本申请实施例设置感光器件ST包括第一感光元件S1、第二感光元件S2以及第三感光元件S3，进一步提高了感光器件ST的感光面积。将第一感光元件S1、第二感光元件S2以及第三感光元件S3分别设置在同一发光单元40的三个顶点处的三个交叉区域40a内，可以减小同一感光器件ST中的第一感光元件S1、第二感光元件S2以及第三感光元件S3相互之间的距离，便于实现第一感光元件S1、第二感光元件S2以及第三感光元件S3之间的并联，减小布线长度。
以上对本申请实施例提供的显示面板进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的一般技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种显示面板，其包括至少一感光器件，所述感光器件包括：开关元件、第一感光元件以及第二感光元件；所述显示面板还包括：
    基板；
    第一导电层，设置在所述基板上，所述第一导电层包括相连接的第一电极和第二电极；
    感光层，设置在所述第一导电层远离所述基板的一侧，所述感光层包括与所述第一电极对应设置的第一感光部和与所述第二电极对应设置的第二感光部，且所述第一感光部和所述第二感光部间隔设置，所述感光层包括金属氧化物半导体；
    绝缘层，设置在所述第一导电层和所述感光层之间；
    第二导电层，设置在所述感光层远离所述基板的一侧，所述第二导电层包括第一保护电极和第二保护电极，所述第一保护电极和所述第一感光部电连接，所述第二保护电极和所述第二感光部电连接；以及
    第三导电层，设置在所述第二导电层远离所述基板的一侧，所述第三导电层包括所述开关元件的源极和漏极，所述第一保护电极和所述第二保护电极均与所述开关元件的源极或漏极电连接；
    其中，所述第一感光元件包括所述第一电极、所述第一感光部以及所述第一保护电极；所述第二感光元件包括所述第二电极、所述第二感光部以及所述第二保护电极。
  2. 根据权利要求1所述的显示面板，其中，所述显示面板还包括：
    第一有源层，设置在所述基板和所述第一导电层之间，所述第一有源层包括所述开关元件的第一有源部，所述开关元件的源极和漏极分别与所述第一有源部电连接。
  3. 根据权利要求2所述的显示面板，其中，所述感光器件还包括：存储电容，所述存储电容包括至少部分重叠设置的第一电容电极和第二电容电极；
    所述第一电容电极与所述第一电极以及所述第二电极均电连接；
    所述第二电容电极与所述第一保护电极以及所述第二保护电极均电连接，所述第二电容电极与所述第一电容电极至少部分重叠设置。
  4. 根据权利要求3所述的显示面板，其中，所述显示面板还包括:第四导电层，所述第四导电层包括导电部，所述导电部在所述基板上的正投影与所述第一电极和/或所述第二电极在所述基板上的正投影部分重叠。
  5. 根据权利要求3所述的显示面板，其中，所述感光层的所述金属氧化物半导体的电子迁移率大于或等于10cm 2 /Vs，所述绝缘层的厚度为5纳米至15纳米。
  6. 根据权利要求2所述的显示面板，其中，所述显示面板还包括：像素驱动电路，所述像素驱动电路包括第一驱动晶体管和第二驱动晶体管；
    所述显示面板还包括：
    第二有源层，设置在所述基板和所述感光层之间，所述第二有源层包括所述第一驱动晶体管的第二有源部，所述第二有源部包括多晶硅半导体；
    第三有源层，设置在所述第二有源层和所述感光层之间，所述第三有源层包括第二驱动晶体管的第三有源部，所述第三有源部包括金属氧化物半导体；
    导电层，设置在所述第二有源层和所述第三有源层之间，所述导电层包括所述第一驱动晶体管的第二栅极，所述第二栅极与所述第二有源部至少部分重叠设置；
    所述第二导电层还包括所述第二驱动晶体管的第三栅极，所述第三栅极与所述第三有源部至少部分重叠设置。
  7. 根据权利要求6所述的显示面板，其中，所述第一有源部包括多晶硅半导体；
    所述第二有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第一栅极，所述第一栅极与所述第一有源部至少部分重叠设置。
  8. 根据权利要求6所述的显示面板，其中，所述第一有源部包括金属氧化物半导体；
    所述第三有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第四栅极，所述第二导电层还包括所述开关元件的第一栅极，所述第四栅极与所述第一有源部至少部分重叠设置，所述第一栅极与所述第一有源部至少部分重叠设置。
  9. 根据权利要求1所述的显示面板，其中，所述显示面板还包括多个发光单元，多个所述发光单元沿第一方向排列成多行，以及沿第二方向排列成多列；
    其中，多行所述发光单元和多列所述发光单元之间形成多个交叉区域，每一所述交叉区域至多设有一所述第一感光元件或一所述第二感光元件。
  10. 根据权利要求9所述的显示面板，其中，所述第一感光元件和所述第二感光元件分别位于两个相邻的所述交叉区域内，所述两个相邻的所述交叉区域位于同一所述发光单元的同一侧。
  11. 根据权利要求10所述的显示面板，其中，所述显示面板包括多个所述感光器件；
    其中，位于同一行的多个所述第一感光元件和多个所述第二感光元件交替排列，位于同一列的多个所述第一感光元件和多个所述第二感光元件交替排列，且每一所述第一感光元件均与位于同一行且同侧的一相邻所述第二感光元件并联，或者每一所述第一感光元件均与位于同一列且同侧的一相邻所述第二感光元件并联；
    或者位于同一行的多个所述第一感光元件和多个所述第二感光元件交替排列，位于同一列的均为所述第一感光元件或所述第二感光元件，每一所述第一感光元件均与位于同一行且同侧的一相邻所述第二感光元件并联。
  12. 根据权利要求9所述的显示面板，其中，所述感光器件还包括第三感光元件；
    其中，所述第三感光元件包括第三电极、第三保护电极以及位于所述第三电极和所述第三保护电极之间的第三感光部；所述第三电极和所述第一电极位于同一层且相连接，所述第三感光部和所述第一感光部位于同一层且间隔设置，所述第三保护电极和所述源极或所述漏极相连接；
    所述第一感光元件、所述第二感光元件以及所述第三感光元件分别位于同一所述发光单元的三个顶点处的三个所述交叉区域内。
  13. 一种显示面板，其包括至少一感光器件，所述感光器件包括：开关元件、第一感光元件以及第二感光元件；所述显示面板还包括：
    基板；
    第一导电层，设置在所述基板上，所述第一导电层包括相连接的第一电极和第二电极；
    感光层，设置在所述第一导电层远离所述基板的一侧，所述感光层包括与所述第一电极对应设置的第一感光部和与所述第二电极对应设置的第二感光部，且所述第一感光部和所述第二感光部间隔设置，所述感光层包括金属氧化物半导体；
    绝缘层，设置在所述第一导电层和所述感光层之间；
    第二导电层，设置在所述感光层远离所述基板的一侧，所述第二导电层包括第一保护电极和第二保护电极，所述第一保护电极和所述第一感光部电连接，所述第二保护电极和所述第二感光部电连接；以及
    第三导电层，设置在所述第二导电层远离所述基板的一侧，所述第三导电层包括所述开关元件的源极和漏极，所述第一保护电极和所述第二保护电极均与所述开关元件的源极或漏极电连接；
    所述第一感光元件包括所述第一电极、所述第一感光部以及所述第一保护电极；所述第二感光元件包括所述第二电极、所述第二感光部以及所述第二保护电极；
    所述显示面板还包括：
    第一有源层，设置在所述基板和所述第一导电层之间，所述第一有源层包括所述开关元件的第一有源部，所述开关元件的源极和漏极分别与所述第一有源部电连接；
    所述显示面板还包括多个发光单元，多个所述发光单元沿第一方向排列成多行，以及沿第二方向排列成多列；
    多行所述发光单元和多列所述发光单元之间形成多个交叉区域，每一所述交叉区域至多设有一所述第一感光元件或一所述第二感光元件。
  14. 根据权利要求13所述的显示面板，其中，所述感光器件还包括：存储电容，所述存储电容包括至少部分重叠设置的第一电容电极和第二电容电极；
    所述第一电容电极与所述第一电极以及所述第二电极均电连接；
    所述第二电容电极与所述第一保护电极以及所述第二保护电极均电连接，所述第二电容电极与所述第一电容电极至少部分重叠设置。
  15. 根据权利要求14所述的显示面板，其中，所述显示面板还包括:第四导电层，所述第四导电层包括导电部，所述导电部在所述基板上的正投影与所述第一电极和/或所述第二电极在所述基板上的正投影部分重叠。
  16. 根据权利要求14所述的显示面板，其中，所述感光层的所述金属氧化物半导体的电子迁移率大于或等于10cm 2 /Vs，所述绝缘层的厚度为5纳米至15纳米。
  17. 根据权利要求13所述的显示面板，其中，所述显示面板还包括：像素驱动电路，所述像素驱动电路包括第一驱动晶体管和第二驱动晶体管；
    所述显示面板还包括：
    第二有源层，设置在所述基板和所述感光层之间，所述第二有源层包括所述第一驱动晶体管的第二有源部，所述第二有源部包括多晶硅半导体；
    第三有源层，设置在所述第二有源层和所述感光层之间，所述第三有源层包括第二驱动晶体管的第三有源部，所述第三有源部包括金属氧化物半导体；
    导电层，设置在所述第二有源层和所述第三有源层之间，所述导电层包括所述第一驱动晶体管的第二栅极，所述第二栅极与所述第二有源部至少部分重叠设置；
    所述第二导电层还包括所述第二驱动晶体管的第三栅极，所述第三栅极与所述第三有源部至少部分重叠设置。
  18. 根据权利要求17所述的显示面板，其中，所述第一有源部包括多晶硅半导体；
    所述第二有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第一栅极，所述第一栅极与所述第一有源部至少部分重叠设置。
  19. 根据权利要求17所述的显示面板，其中，所述第一有源部包括金属氧化物半导体；
    所述第三有源层还包括所述第一有源部，所述导电层还包括所述开关元件的第四栅极，所述第二导电层还包括所述开关元件的第一栅极，所述第四栅极与所述第一有源部至少部分重叠设置，所述第一栅极与所述第一有源部至少部分重叠设置。
  20. 根据权利要求13所述的显示面板，其中，所述第一感光元件和所述第二感光元件分别位于两个相邻的所述交叉区域内，所述两个相邻的所述交叉区域位于同一所述发光单元的同一侧。
PCT/CN2023/103595 2022-11-23 2023-06-29 显示面板 Ceased WO2024109043A1 (zh)

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