WO2024085108A1 - Élément électroluminescent à semi-conducteur, dispositif électroluminescent à semi-conducteur, procédé de fabrication d'élément électroluminescent à semi-conducteur et procédé de fabrication de dispositif électroluminescent à semi-conducteur - Google Patents

Élément électroluminescent à semi-conducteur, dispositif électroluminescent à semi-conducteur, procédé de fabrication d'élément électroluminescent à semi-conducteur et procédé de fabrication de dispositif électroluminescent à semi-conducteur Download PDF

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WO2024085108A1
WO2024085108A1 PCT/JP2023/037374 JP2023037374W WO2024085108A1 WO 2024085108 A1 WO2024085108 A1 WO 2024085108A1 JP 2023037374 W JP2023037374 W JP 2023037374W WO 2024085108 A1 WO2024085108 A1 WO 2024085108A1
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semiconductor light
light emitting
emitting element
protrusion
emitting device
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PCT/JP2023/037374
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English (en)
Japanese (ja)
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洋希 永井
東吾 中谷
康光 久納
篤志 山田
剛 荒木
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ヌヴォトンテクノロジージャパン株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/023—Mount members, e.g. sub-mount members
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H01S5/02355—Fixing laser chips on mounts
    • H01S5/0237—Fixing laser chips on mounts by soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/028—Coatings ; Treatment of the laser facets, e.g. etching, passivation layers or reflecting layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042—Electrical excitation ; Circuits therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure

Definitions

  • This disclosure relates to a semiconductor light-emitting element, a semiconductor light-emitting device, a method for manufacturing a semiconductor light-emitting element, and a method for manufacturing a semiconductor light-emitting device.
  • semiconductor light-emitting elements such as edge-emitting semiconductor laser elements are known that include an N-type substrate, an N-side electrode arranged on the bottom surface of the substrate, a semiconductor laminate arranged on the top surface of the substrate, and a P-side electrode arranged above the semiconductor laminate (for example, Patent Document 1, etc.).
  • the heat dissipation characteristics of the semiconductor light-emitting element can be improved by joining the P-side electrode, which is closer to the active layer (which is the hottest part of the semiconductor light-emitting element) to the heat sink than the N-side electrode (i.e., by mounting in junction down).
  • a bonding material such as solder is used to bond to a heat sink
  • the P-side electrode generally has a pad electrode (electrode for bonding to the bonding material) made of Au on the surface on the side that bonds to the heat sink.
  • a P-side pad electrode is formed up to the front end face, which is the end face that emits light
  • the molten bonding material will spread along the side of this P-side pad and beyond the front end face of the semiconductor light-emitting element, covering part of the light-emitting surface.
  • the bonding material will block the light emitted from the front end face. When the light is blocked, the blocked light is converted into heat, and the temperature of the front end face rises, inducing COD (catastrophic optical damage).
  • the pad electrode made of Au which is included in the P-side electrode, is not formed near the front end face.
  • the height from the bottom surface of the semiconductor light emitting element (the position of the upper surface of the semiconductor light emitting element) of the area where the pad electrode is not formed near the front end face is lower than the height of the area where the pad electrode is formed.
  • such a coating film is generally a dielectric multilayer film, it has low wettability with bonding materials such as solder. For this reason, it is difficult to arrange a bonding material in the area near the front end face of the upper surface of the semiconductor light emitting element. Since the light intensity is high and the amount of heat generated is large near the front end face of the semiconductor light emitting element, the heat dissipation characteristics of the semiconductor light emitting element are reduced by not arranging a bonding material to be bonded to the heat sink in that area. In addition, the reduced heat dissipation characteristics cause the temperature during operation to rise and the band gap in the active layer to become smaller, which is called the band gap shrink phenomenon. This shortens the lifespan of semiconductor light-emitting devices.
  • the present disclosure aims to solve these problems and to prevent light from being blocked at the front end face while suppressing deterioration of heat dissipation characteristics in a semiconductor light-emitting element that emits light from the front end face.
  • one aspect of the semiconductor light-emitting element is an edge-emitting semiconductor light-emitting element that has a waveguide between a front end face and a rear end face and emits light from the front end face, the edge-emitting semiconductor light-emitting element comprising a substrate, a semiconductor laminate disposed above the substrate and having the waveguide, a first P-side electrode disposed above the semiconductor laminate, and a pad electrode disposed above the first P-side electrode, the semiconductor light-emitting element has a front bottom portion on the top surface of the semiconductor light-emitting element, extending from the front end face toward the rear above the waveguide of the semiconductor light-emitting element, where the pad electrode is not disposed, a rear bottom portion disposed behind the front bottom, a front protrusion portion disposed between the front bottom and the rear bottom, protruding upward relative to the front bottom and the rear bottom, and a rear protrusion portion disposed behind the rear bottom, protruding upward
  • an edge-emitting semiconductor light-emitting device that has a waveguide between a front end face and a rear end face and emits light from the front end face
  • the edge-emitting semiconductor light-emitting device comprising: a substrate; a semiconductor laminate disposed above the substrate and having the waveguide; a first P-side electrode disposed above the semiconductor laminate; and a pad electrode disposed above the first P-side electrode, the semiconductor light-emitting device having a front end face extending rearward from the front end face on the top surface of the semiconductor light-emitting device and above the waveguide of the semiconductor light-emitting device.
  • the semiconductor laminate has a front bottom and a rear protrusion disposed behind the front bottom and protruding upward relative to the front bottom, the pad electrode is not disposed on the front bottom, the rear protrusion includes at least a portion of the pad electrode, the rear protrusion has a first region located above the optical axis of the light, and a second region adjacent to the first region in a lateral direction perpendicular to the propagation direction of the light and the stacking direction of the semiconductor laminate, and the distance from the front end face to the front end of the first region is greater than the distance from the front end face to the front end of the second region.
  • one aspect of the semiconductor light emitting device is a semiconductor light emitting device comprising the above semiconductor light emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink
  • the semiconductor light emitting element comprises a second P-side electrode disposed above the first P-side electrode and the pad electrode
  • the forward protrusion and the rear protrusion each include a portion of the second P-side electrode
  • the bonding member is disposed from the second P-side electrode included in the forward protrusion to the second P-side electrode included in the rear protrusion.
  • one aspect of the semiconductor light emitting device is a semiconductor light emitting device comprising the above semiconductor light emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, wherein the forward protrusion has a plurality of continuous regions and one or more gap regions, each of the plurality of continuous regions is a region that protrudes upward relative to the front bottom and the rear bottom, each of the one or more gap regions is located between two adjacent continuous regions of the plurality of continuous regions and is a region that does not protrude upward relative to the front bottom and the rear bottom, and the bonding member is disposed in the one or more gap regions.
  • one aspect of the semiconductor light emitting device is a semiconductor light emitting device comprising the above semiconductor light emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, wherein the forward protrusion has a plurality of continuous regions and one or more gap regions, each of the plurality of continuous regions is a region that protrudes upward relative to the front bottom L1 and the rear bottom L2, each of the one or more gap regions is a region that is located between two adjacent continuous regions of the plurality of continuous regions and does not protrude upward relative to the front bottom L1 and the rear bottom L2, and the bonding member extends from the one or more gap regions to a position forward of the forward protrusion.
  • one aspect of the semiconductor light emitting device disclosed herein is a semiconductor light emitting device including the semiconductor light emitting element, a heat sink, and a bonding member that bonds the top surface of the semiconductor light emitting element to the heat sink, in which the bonding member located in front of the first region is not disposed forward of the front end face, and the bonding member located in front of the second region extends from the front bottom to a position forward of the front end face.
  • one aspect of the semiconductor light emitting device is a semiconductor light emitting device comprising the above semiconductor light emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink
  • the semiconductor light emitting element comprises a second P-side electrode disposed above the first P-side electrode and the pad electrode
  • the rear bottom and the rear protrusion each include a portion of the second P-side electrode
  • the rear protrusion includes a portion of the pad electrode
  • the pad electrode included in the rear protrusion is spaced apart from the bonding member.
  • one aspect of the semiconductor light emitting device is a semiconductor light emitting device comprising the above semiconductor light emitting element, a heat sink, and a bonding member that bonds the top surface of the semiconductor light emitting element to the heat sink
  • the semiconductor light emitting element comprises a second P-side electrode disposed above the first P-side electrode and the pad electrode
  • the rear bottom and the rear protrusion each include a portion of the second P-side electrode
  • the rear protrusion includes a portion of the pad electrode
  • at least one of the pad electrode included in the first region and the pad electrode included in the second region is separated from the bonding member.
  • one aspect of the semiconductor light emitting device disclosed herein is a semiconductor light emitting device including the semiconductor light emitting element, a heat sink, and a bonding member that bonds the upper surface of the semiconductor light emitting element to the heat sink, and the forward protrusion includes a portion of the pad electrode, and the pad electrode included in the forward protrusion is spaced apart from the bonding member.
  • one aspect of the method for manufacturing a semiconductor light-emitting element is a method for manufacturing an edge-emitting semiconductor light-emitting element that has a waveguide between a front end face and a rear end face and emits light from the front end face, the method including the steps of forming a semiconductor laminate having the waveguide, forming a first P-side electrode above the semiconductor laminate, forming a pad electrode above the first P-side electrode, and forming the front end face and the rear end face, and the top surface of the semiconductor light-emitting element is provided with a front bottom extending rearward from the front end face, a rear bottom disposed rearward of the front bottom, a front protrusion disposed between the front bottom and the rear bottom and protruding upward relative to the front bottom and the rear bottom, and a rear protrusion disposed rearward of the rear bottom and protruding upward relative to the front bottom and the rear bottom, the pad electrode is not disposed on the front bottom, and the rear
  • one aspect of the method for manufacturing a semiconductor light emitting device is a method for manufacturing a semiconductor light emitting device including the semiconductor light emitting element, a heat sink, and a bonding member, and includes the manufacturing method for the semiconductor light emitting element and a step of bonding the upper surface of the semiconductor light emitting element to the heat sink using the bonding member.
  • a semiconductor light-emitting element that emits light from the front end face, it is possible to prevent the light from being blocked at the front end face while suppressing a deterioration in heat dissipation characteristics.
  • FIG. 1 is a schematic top view showing an overall configuration of a semiconductor light emitting device according to a first embodiment.
  • 1 is a first schematic cross-sectional view showing an overall configuration of a semiconductor light emitting device according to a first embodiment.
  • 2 is a second schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device according to the first embodiment.
  • FIG. 4 is a third schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device according to the first embodiment.
  • FIG. 4 is a schematic fourth cross-sectional view showing the overall configuration of the semiconductor light emitting device according to the first embodiment.
  • FIG. 2 is a schematic cross-sectional view showing a configuration of an N-type semiconductor layer according to the first embodiment.
  • FIG. 2 is a schematic cross-sectional view showing a configuration of an active layer according to the first embodiment.
  • FIG. 3 is a schematic cross-sectional view showing a configuration of a second etching stop layer according to the first embodiment.
  • FIG. 1 is a schematic plan view showing an overall configuration of a semiconductor light emitting device according to a first embodiment.
  • 1 is a schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a first embodiment.
  • 1 is a cross-sectional view showing a configuration of a semiconductor light emitting device including a semiconductor light emitting element of a comparative example.
  • 3 is a schematic cross-sectional view showing a first step of a method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a schematic first cross-sectional view showing a second step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a schematic second cross-sectional view showing a second step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a first schematic cross-sectional view showing a third step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a second schematic cross-sectional view showing a third step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a first schematic cross-sectional view showing a fourth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a second schematic cross-sectional view showing a fourth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a first schematic cross-sectional view showing a fifth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a second schematic cross-sectional view showing a fifth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a first schematic cross-sectional view showing a sixth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 4 is a second schematic cross-sectional view showing a sixth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 5 is a schematic cross-sectional view showing a seventh step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a first schematic cross-sectional view showing an eighth step of the method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 11 is a second schematic cross-sectional view showing an eighth step of the method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a first schematic cross-sectional view showing a ninth step of a method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 11 is a second schematic cross-sectional view showing a ninth step of the manufacturing method for the semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a first schematic cross-sectional view showing a ninth step of a method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 11 is a second schematic cross-sectional view showing a ninth
  • FIG. 11 is a third schematic cross-sectional view showing a ninth step of the method for manufacturing the semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a first schematic cross-sectional view showing a tenth step of a method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a second schematic cross-sectional view showing a tenth step of the manufacturing method for the semiconductor light-emitting device according to the first embodiment.
  • FIG. 11 is a schematic third cross-sectional view showing a tenth step of the method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a first schematic cross-sectional view showing a tenth step of a method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 10 is a first schematic cross-sectional view showing a tenth step of a method for manufacturing a semiconductor light-emitting device according to the first embodiment.
  • FIG. 10
  • FIG. 1 is a schematic perspective view showing a configuration of a substrate base material according to a first embodiment
  • 3 is a schematic perspective view showing a cleavage step in a method for manufacturing the semiconductor light emitting device according to the first embodiment.
  • FIG. 4 is a schematic perspective view showing a coating film forming step in the method for manufacturing the semiconductor light emitting device according to the first embodiment.
  • FIG. 5A to 5C are schematic cross-sectional views showing a coating film forming step in the method for manufacturing the semiconductor light-emitting element according to the first embodiment. 4 is a flowchart showing a method for manufacturing the semiconductor light emitting device according to the first embodiment.
  • 3A to 3C are diagrams illustrating examples of the configuration of each layer of a contact layer, a P-type cladding layer, and an active layer according to the first embodiment.
  • 3A to 3C are diagrams illustrating an example of the configuration of each layer of an N-type semiconductor layer and a substrate according to the first embodiment.
  • 11A and 11B are diagrams illustrating an example of the configuration of each layer of a contact layer, a P-type cladding layer, and an active layer according to a second embodiment.
  • 11A and 11B are diagrams illustrating an example of the configuration of each layer of an N-type semiconductor layer and a substrate according to a second embodiment.
  • 11 is a schematic top view showing the configuration of a forward protrusion of a semiconductor light emitting element according to a second embodiment.
  • FIG. 1 is a first schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a second embodiment.
  • 11 is a second schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to the second embodiment.
  • FIG. 13 is a schematic top view showing a first configuration example of a forward protrusion according to embodiment 2.
  • FIG. 13 is a schematic top view showing a second configuration example of a forward protrusion according to embodiment 2.
  • FIG. 13 is a schematic top view showing a third configuration example of a forward protrusion according to embodiment 2.
  • FIG. FIG. 11 is a schematic top view showing a fourth configuration example of the forward protrusion according to the second embodiment.
  • FIG. 11 is a schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a third embodiment.
  • FIG. 11 is a schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a third embodiment.
  • FIG. 13 is a schematic cross-sectional view showing an overall configuration of a semiconductor light emitting device according to a modified example of the third embodiment.
  • FIG. 13 is a schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a modified example of the third embodiment.
  • FIG. FIG. 13 is a schematic top view showing the overall configuration of a semiconductor light emitting device according to a fourth embodiment.
  • FIG. 11 is a schematic cross-sectional view showing an overall configuration of a semiconductor light-emitting device according to a fourth embodiment.
  • FIG. 13 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a fifth embodiment.
  • FIG. 13 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a sixth embodiment.
  • FIG. 13 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a seventh embodiment.
  • FIG. 13 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a seventh embodiment.
  • FIG. 13 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting device according to a seventh embodiment.
  • 13A to 13C are diagrams illustrating a first step in a method for forming a pad electrode of a semiconductor light emitting element according to embodiment 7.
  • 13A to 13C are diagrams illustrating a second step in the method for forming a pad electrode of a semiconductor light emitting element according to embodiment 7.
  • 13A to 13C are diagrams illustrating a third step in the method for forming a pad electrode of a semiconductor light emitting element according to embodiment 7.
  • 13 is a schematic cross-sectional view showing an overall configuration of a semiconductor light emitting device according to a modified example of the seventh embodiment.
  • each figure is a schematic diagram and is not necessarily an exact illustration. Therefore, the scales and the like are not necessarily the same in each figure. Furthermore, in each figure, the same reference numerals are used for substantially the same configurations, and duplicate explanations are omitted or simplified.
  • the terms “above” and “below” do not refer to vertically above and below in an absolute spatial sense, but are used as terms defined by a relative positional relationship based on the stacking order in the stacked configuration. Furthermore, the terms “above” and “below” are applied not only to cases where two components are arranged with a gap between them and another component exists between the two components, but also to cases where two components are arranged in contact with each other.
  • front and “rear” used in relation to position do not refer to “front” and “rear” in an absolute spatial sense, but are used as terms defined by a relative positional relationship based on the direction of propagation of light emitted from the semiconductor light-emitting element.
  • the direction of propagation of light emitted from the semiconductor light-emitting element is defined as forward
  • the opposite direction to the direction of light propagation is defined as rearward
  • the terms "front” and “rear” are used in describing the relative positions of each component such as the semiconductor light-emitting element.
  • FIG. 1 is a schematic top view showing the overall configuration of the semiconductor light emitting device 1 according to the present embodiment.
  • FIGS. 2 to 5 are schematic cross-sectional views showing the overall configuration of the semiconductor light emitting device 1 according to the present embodiment.
  • FIGS. 2, 3, and 4 show cross sections of the semiconductor light emitting device 1 taken along lines II-II, III-III, and IV-IV in FIG. 1, respectively.
  • FIG. 5 shows only a portion of the cross section (a cross section parallel to the YZ plane in FIG.
  • FIG. 1 1) of the semiconductor light emitting device 1 passing through the optical axis Ax (which coincides with the central axis of the waveguide of the semiconductor light emitting device) shown in FIG. 1, including the front end face 1F.
  • Each figure shows the X-axis, Y-axis, and Z-axis, which are orthogonal to each other.
  • the X-axis, Y-axis, and Z-axis are in a right-handed Cartesian coordinate system.
  • the stacking direction of the semiconductor light emitting device 1 i.e., the thickness direction of each layer included in the semiconductor light emitting device 1
  • the main propagation direction of light is parallel to the Y-axis direction.
  • the semiconductor light-emitting element 1 is an edge-emitting semiconductor light-emitting element that has a waveguide between the front end face 1F and the rear end face 1R and emits light from the front end face 1F.
  • the semiconductor light-emitting element 1 is a semiconductor laser element that emits laser light with a wavelength in the near-infrared region (approximately 900 nm to 980 nm). More specifically, the semiconductor light-emitting element 1 emits laser light with a wavelength of approximately 976 nm, but is not limited to this, and may also emit laser light with a wavelength in the blue region or ultraviolet region. As shown in FIG.
  • the front end face 1F and the rear end face 1R of the semiconductor light-emitting element 1 form a resonator.
  • the front end face 1F is an end face that emits light
  • the rear end face 1R is an end face with a higher reflectivity than the front end face 1F.
  • the resonator length of the semiconductor light-emitting element 1, that is, the distance between the front end face 1F and the rear end face 1R in the light propagation direction (the Y-axis direction in each figure, that is, the resonance direction), is not particularly limited, but in this embodiment, it is 0.5 mm or more.
  • the semiconductor light emitting element 1 has coating films 2F and 2R arranged at the ends in the light propagation direction.
  • the coating films 2F and 2R are films for adjusting the reflectance of the front end facet 1F and the rear end facet 1R, respectively.
  • each of the coating films 2F and 2R is a dielectric multilayer film.
  • the coating film 2F has a lower reflectance than the coating film 2R.
  • the semiconductor light-emitting element 1 includes a substrate 10, a semiconductor laminate 1S, and an insulating film 60.
  • the semiconductor light-emitting element 1 further includes a first P-side electrode 71, a pad electrode 73, a second P-side electrode 72, and an N-side electrode 80.
  • the substrate 10 is a plate-like member that serves as a base for the semiconductor light-emitting element 1.
  • the substrate 10 is an N-type GaAs substrate.
  • the substrate 10 has a pair of cleavage end faces 10C.
  • the cleavage end faces 10C are cleavage surfaces that are formed when the substrate 10 is cleaved.
  • Coating films 2F and 2R are disposed on the pair of cleavage end faces 10C, respectively.
  • the semiconductor laminate 1S is a laminate disposed above the substrate 10 and having a waveguide.
  • the semiconductor laminate 1S has an N-type semiconductor layer 20, an active layer 30, a P-type cladding layer 40, and a contact layer 50.
  • the N-type semiconductor layer 20 is an N-type semiconductor layer disposed above the substrate 10.
  • the configuration of the N-type semiconductor layer 20 according to this embodiment will be described with reference to FIG. 6.
  • FIG. 6 is a schematic cross-sectional view showing the configuration of the N-type semiconductor layer 20 according to this embodiment.
  • FIG. 6 shows a cross-section of the N-type semiconductor layer 20 taken along line II-II in FIG. 1.
  • the N-type semiconductor layer 20 has an N-type cladding layer 23.
  • the N-type semiconductor layer 20 further has an N-type buffer layer 21 and an N-type buffer boundary layer 22.
  • the N-type buffer layer 21 is an N-type semiconductor layer disposed above the substrate 10.
  • the N-type buffer layer 21 is an N-type GaAs layer doped with an N-type impurity (Si) at a concentration of 3.0 ⁇ 10 17 cm ⁇ 3 and having a thickness of 0.50 ⁇ m.
  • the N-type buffer boundary layer 22 is an N-type semiconductor layer disposed between the N-type buffer layer 21 and the N-type cladding layer 23.
  • the N-type buffer boundary layer 22 is an N-type AlX22Ga1 -X22As layer (0.15 ⁇ X22 ⁇ 0.25) doped with an N-type impurity (Si) at a concentration of 2.0 ⁇ 1018 cm -3 and having a thickness of 0.05 ⁇ m.
  • the Al composition ratio X22 of the N-type buffer boundary layer 22 increases toward the N-type cladding layer 23.
  • the Al composition ratio X22 of the N-type buffer boundary layer 22 is 0.15 at the boundary surface with the N-type buffer layer 21 and is 0.25 at the boundary surface with the N-type cladding layer 23.
  • the N-type cladding layer 23 is an N-type semiconductor layer disposed above the substrate 10.
  • the average refractive index of the N-type cladding layer 23 is lower than the average refractive index of the active layer 30.
  • the N-type cladding layer 23 is disposed on the N-type buffer boundary layer 22.
  • the N-type cladding layer 23 is an N-type Al0.25Ga0.75As layer having a thickness of 3.1 ⁇ m.
  • the impurity concentration of the N-type cladding layer 23 is 2.0 ⁇ 10 18 cm -3 in a region that is 2.60 ⁇ m or less away from the interface with the N-type buffer boundary layer 22, 5.0 ⁇ 10 17 cm -3 in a region that is more than 2.60 ⁇ m and less than 3.00 ⁇ m away from the interface with the N-type buffer boundary layer 22, and 7.0 ⁇ 10 16 cm -3 in a region that is more than 3.00 ⁇ m and less than 3.10 ⁇ m away from the interface with the N-type buffer boundary layer 22 .
  • the active layer 30 is a light-emitting layer disposed above the N-type semiconductor layer 20 (or the N-type cladding layer 23). In this embodiment, the active layer 30 has a quantum well structure.
  • FIG. 7 is a schematic cross-sectional view showing the configuration of the active layer 30 according to this embodiment.
  • FIG. 7 shows a cross section of the active layer 30 taken along line II-II in FIG. 1.
  • the active layer 30 has an N-side cladding boundary layer 31, an N-side guide layer 32, an N-side barrier layer 33, a well layer 34, a P-side barrier layer 35, a P-side guide layer 36, and a P-side cladding boundary layer 37.
  • the active layer 30 has a window region 30w (i.e., a non-light-emitting region) near the front end face 1F of the semiconductor light-emitting element 1.
  • the window region 30w the quantum well structure including the N-side barrier layer 33, the well layer 34, and the P-side barrier layer 35 is disordered.
  • the band gap energy in the window region 30w is larger than that in the region of the active layer 30 other than the window region 30w. This suppresses light emission and light absorption near the front end face 1F, thereby suppressing heat generation near the front end face 1F. Therefore, COD near the front end face 1F of the semiconductor light-emitting element 1 can be suppressed.
  • the active layer 30 also has a window region 30w near the rear end face 1R.
  • the window region 30w is formed over a predetermined length in the light propagation direction from the end of the active layer 30 on the front end face 1F side.
  • the length of the window region 30w in the light propagation direction may be equal to the length from the lower end position of the end of the ridge R (see FIG. 5) on the front end surface 1F side (in this embodiment, the boundary position between the lower end of the trench Te and the ridge R shown in FIG. 5) to the end of the P-type cladding layer 40 on the front end surface 1F side.
  • the N-side cladding boundary layer 31 shown in Fig. 7 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see Figs. 2 to 5).
  • the N-side cladding boundary layer 31 is an N-type AlX31Ga1 -X31As layer (0.25 ⁇ X31 ⁇ 0.20) having a thickness of 0.83 ⁇ m disposed between the N-type cladding layer 23 and the N-side guide layer 32.
  • the Al composition ratio X31 of the N-side cladding boundary layer 31 decreases toward the N-side guide layer 32.
  • the Al composition ratio X31 of the N-side cladding boundary layer 31 is 0.25 at the boundary surface with the N-type cladding layer 23 and is 0.20 at the boundary surface with the N-side guide layer 32.
  • the concentration of N-type impurity (Si) doped in the N-side cladding boundary layer 31 decreases toward the N-side guide layer 32.
  • the N-type impurity concentration of the N-side cladding boundary layer 31 is 7.0 ⁇ 10 16 cm ⁇ 3 at the interface with the N-type cladding layer 23 and 5.0 ⁇ 10 16 cm ⁇ 3 at the interface with the N-side guide layer 32 .
  • the N-side guide layer 32 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5).
  • the average refractive index of the N-side guide layer 32 is higher than that of the N-type cladding layer 23.
  • the N-side guide layer 32 is disposed above the N-side cladding boundary layer 31.
  • the N-side guide layer 32 is an N-type Al 0.20 Ga 0.80 As layer doped with an N-type impurity (Si) at a concentration of 5.0 ⁇ 10 16 cm -3 and having a thickness of 0.27 ⁇ m.
  • the N-side barrier layer 33 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5) and functions as a barrier for the quantum well structure.
  • the N-side barrier layer 33 is disposed above the N-side guide layer 32.
  • the N-side barrier layer 33 is an undoped Al 0.16 Ga 0.84 As layer having a thickness of 0.010 ⁇ m.
  • the well layer 34 is disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5) and is a semiconductor layer that functions as a well of the quantum well structure. In this embodiment, the well layer 34 is disposed above the N-side barrier layer 33.
  • the well layer 34 is an undoped In 0.135 Ga 0.865 As layer with a thickness of 0.009 ⁇ m.
  • the P-side barrier layer 35 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5) and functions as a barrier for the quantum well structure. In this embodiment, the P-side barrier layer 35 is disposed above the well layer 34.
  • the P-side barrier layer 35 is a P-type Al 0.16 Ga 0.84 As layer doped with a P-type impurity (C (carbon)) at a concentration of 4.0 ⁇ 10 16 cm -3 and having a thickness of 0.010 ⁇ m.
  • the P-side guide layer 36 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5).
  • the average refractive index of the P-side guide layer 36 is higher than the average refractive index of the P-type cladding layer 40 (see FIGS. 2 to 5).
  • the P-side guide layer 36 is disposed above the P-side barrier layer 35.
  • the P-side guide layer 36 is a P-type Al x36 Ga 1-x36 As layer (0.20 ⁇ X36 ⁇ 0.21) having a thickness of 0.29 ⁇ m.
  • the Al composition ratio X36 of the P-side guide layer 36 is 0.20 in a region where the distance from the interface between the P-side guide layer 36 and the P-side barrier layer 35 is 0.01 ⁇ m or less.
  • the Al composition ratio X36 of the P-side guide layer 36 increases as it approaches the P-side cladding boundary layer 37 in a region where the distance from the interface between the P-side guide layer 36 and the P-side barrier layer 35 is greater than 0.01 ⁇ m.
  • the Al composition ratio X36 of the P-side guide layer 36 is 0.21 at the boundary surface with the P-side cladding boundary layer 37.
  • the P-type impurity concentration of the P-side guide layer 36 increases toward the P-side cladding boundary layer 37.
  • the P-type impurity concentration of the P-side guide layer 36 is 4.0 ⁇ 10 16 cm -3 at the boundary surface with the P-side barrier layer 35 and 1.5 ⁇ 10 17 cm -3 at the boundary surface with the P-side cladding boundary layer 37.
  • the P-side cladding boundary layer 37 is a semiconductor layer disposed above the N-type semiconductor layer 20 (see FIGS. 2 to 5).
  • the P-side cladding boundary layer 37 is a P-type Al x37 Ga 1-x37 As layer (0.21 ⁇ X37 ⁇ 0.75) having a thickness of 0.10 ⁇ m, disposed between the P-side guide layer 36 and the P-type cladding layer 40 (see FIGS. 2 to 5).
  • the Al composition ratio X37 of the P-side cladding boundary layer 37 increases toward the P-type cladding layer 40.
  • the Al composition ratio X37 of the P-side cladding boundary layer 37 is 0.21 at the boundary surface with the P-side guide layer 36, and is 0.75 at the boundary surface with the P-type cladding layer 40.
  • the P-type impurity concentration of the P-side guide layer 36 increases toward the P-side cladding boundary layer 37.
  • the P-type impurity concentration of the P-side cladding boundary layer 37 is 1.5 ⁇ 10 17 cm ⁇ 3 at the interface with the P-side guide layer 36 and 5.0 ⁇ 10 17 cm ⁇ 3 at the interface with the P-type cladding layer 40 .
  • the P-type cladding layer 40 is made of Al x Ga 1-x As (0 ⁇ X ⁇ 1), and has a lower cladding layer 41, a first cladding layer 42, a first etching stop layer 43, a second cladding layer 44, and a second etching stop layer 45.
  • the lower cladding layer 41 is a P-type semiconductor layer disposed above the active layer 30.
  • the lower cladding layer 41 is a P-type Al 0.75 Ga 0.25 As layer doped with a P-type impurity (C) at a concentration of 1.0 ⁇ 10 18 cm ⁇ 3 and having a thickness of 0.050 ⁇ m.
  • the first cladding layer 42 is a P-type semiconductor layer disposed above the active layer 30.
  • the first cladding layer 42 is a P-type Al 0.85 Ga 0.15 As layer disposed above the lower cladding layer 41 and having a thickness of 0.10 ⁇ m.
  • the first etching stop layer 43 is a P-type semiconductor layer disposed above the active layer 30. In the present embodiment, the first etching stop layer 43 is disposed above the first cladding layer 42. The Al composition ratio of the first etching stop layer 43 is 0.7 or less.
  • the first etching stop layer 43 is a P-type Al 0.70 Ga 0.30 As layer doped with a P-type impurity (C) at a concentration of 5.0 ⁇ 10 18 cm -3 and having a thickness of 0.05 ⁇ m.
  • the second cladding layer 44 is a P-type semiconductor layer disposed above the active layer 30.
  • the second cladding layer 44 is a P-type Al 0.85 Ga 0.15 As layer disposed above the first etching stop layer 43 and having a thickness of 0.20 ⁇ m.
  • the second etching stop layer 45 is a P-type semiconductor layer disposed above the active layer 30.
  • the second etching stop layer 45 is a P-type Al x45 Ga 1-x45 As layer (0.70 ⁇ x45 ⁇ 0.15) having a thickness of 0.050 ⁇ m disposed above the second cladding layer 44.
  • the second etching stop layer 45 has two or more inclined regions in which the Al composition ratio decreases toward the contact layer, and one or more constant regions in which the Al composition ratio is constant with respect to the position in the stacking direction. The two or more inclined regions and the one or more constant regions are alternately arranged in the stacking direction.
  • the configuration of the second etching stop layer 45 according to this embodiment will be described below with reference to FIG. 8. FIG.
  • FIG. 8 is a schematic cross-sectional view showing the configuration of the second etching stop layer 45 according to this embodiment.
  • FIG. 8 shows a cross section of the second etching stop layer 45 at the ridge R of the II-II line in FIG. 1.
  • the second etch stop layer 45 has two sloped regions 45b and 45d and two constant regions 45a and 45c.
  • the constant region 45a is a P-type Al0.70Ga0.30As layer with a thickness of 0.050 ⁇ m that is disposed above the second cladding layer 44.
  • the inclined region 45b is a P-type AlX45Ga1 -X45As layer with a thickness of 0.01 ⁇ m that is disposed above the constant region 45a.
  • the Al composition ratio X45 of the inclined region 45b decreases toward the contact layer 50.
  • the Al composition ratio X45 of the inclined region 45b is 0.70 at the interface with the constant region 45a and is 0.60 at the interface with the constant region 45c.
  • the constant region 45c is a P-type Al0.60Ga0.40As layer with a thickness of 0.030 ⁇ m that is disposed above the inclined region 45b.
  • the inclined region 45d is a P-type Al.sub.X45Ga.sub.1 -X45As layer having a thickness of 0.010 .mu.m and disposed above the constant region 45c.
  • the Al composition ratio X45 of the inclined region 45d decreases toward the contact layer 50.
  • the Al composition ratio X45 of the inclined region 45d is 0.60 at the interface with the constant region 45c and is 0.15 at the interface with the contact layer 50.
  • the second etching stop layer 45 is doped with a P-type impurity (C) at a concentration of 5.0.times.10.sup.18 cm.sup. -3 .
  • the contact layer 50 is a P-type semiconductor layer disposed above the P-type cladding layer 40 and in ohmic contact with the first P-side electrode 71.
  • the contact layer 50 is a P-type GaAs layer having a film thickness of 0.25 ⁇ m.
  • the P-type impurity concentration of the contact layer 50 decreases with increasing distance from the P-type cladding layer 40.
  • the P-type impurity concentration of the contact layer 50 is 3.0 ⁇ 10 19 cm -3 at the boundary surface with the P-type cladding layer 40 and 1.0 ⁇ 10 18 cm -3 at the upper surface.
  • a ridge R extending in the direction of light propagation is formed in a region including the P-type cladding layer 40 and the contact layer 50.
  • a waveguide is formed along the ridge R. Note that in Figure 1, the outline of the top surface of the ridge R is shown by a dashed line.
  • the upper surface of the semiconductor laminate 1S in the groove Te portion (cross section along line III-III) slightly behind the end of the ridge R in the light propagation direction closer to the front end face 1F from which the light of the semiconductor light emitting element 1 is emitted is located on the second etching stop layer 45.
  • a similar ridge structure is also present near the rear end face 1R of the semiconductor light emitting element 1, but it is not necessary to have a similar structure near the rear end face 1R, but it is more effective if there is one on both sides.
  • a wing portion G is formed in the region including the P-type cladding layer 40 and the contact layer 50, extending along the ridge R and having the same height as the ridge R at its upper surface.
  • a groove T is formed along the ridge R between the wing portion G and the ridge R.
  • the outline of the upper surface of the wing portion G is shown by a dashed line.
  • the ridge R is formed between the two wing portions G.
  • the region including the P-type cladding layer 40 and the contact layer 50 is disposed between the end of the semiconductor laminate 1S on the front end face 1F side and the ridge R, and has a separation region De separated from the ridge R.
  • a groove Te is formed between the ridge R and the separation region De.
  • the contact layer 50 and a portion of the P-type cladding layer 40 are removed.
  • the isolation region De is disposed between the two wing portions G.
  • the isolation region De is connected to the two wing portions G.
  • the upper surface of the contact layer 50 at the end of the semiconductor laminate 1S in the light propagation direction is flat and continuous over the entire length of the contact layer 50 in the width direction (i.e., the X-axis direction).
  • This structure does not have to be located near the rear end face 1R, but it is more effective if it is located on both sides.
  • the contact layer 50 and the second etching stop layer 45 cover the second cladding layer 44 having a high Al composition ratio and the like, so that oxidation and erosion of the second cladding layer 44 and the like can be suppressed.
  • the adhesion between the semiconductor laminate including these layers and the insulating film 60 can be improved.
  • the semiconductor light-emitting element 1 when singulated, it is cleaved at positions corresponding to the front and rear ends of the semiconductor laminate 1S, so if the adhesion between the contact layer 50 and the insulating film 60 is low, the insulating film 60 may peel off.
  • the adhesion between the insulating film 60 and the contact layer 50 can be increased at positions corresponding to the front and rear ends of the semiconductor laminate 1S, so peeling of the insulating film 60 can be suppressed.
  • a recess 3 that is recessed in the width direction of the semiconductor light-emitting element 1 is formed at the end in the width direction of the semiconductor light-emitting element 1 (i.e., the end in the X-axis direction).
  • the recess 3 is formed on the outer side in the X-axis direction of the wing portion G.
  • the recess 3 is part of a separation groove that is used when singulating the semiconductor light-emitting element 1. As shown in Figures 2 to 4, the portion of the side surface of the semiconductor light-emitting element 1 that corresponds to the recess 3 is narrowed inward in the X-axis direction.
  • the position of the recess 3 in the width direction of the semiconductor light-emitting element 1 is located at the innermost position in the width direction (i.e., closer to the ridge R) in the P-type cladding layer 40. In other words, the recess 3 is narrowest in the P-type cladding layer 40.
  • the position of the recess 3 in the width direction of the semiconductor light-emitting element 1 moves outward in the width direction of the semiconductor light-emitting element 1 (i.e., away from the ridge R) as it approaches the substrate 10 from the active layer 30.
  • the insulating film 60 is an electrical insulating film disposed above the P-type cladding layer 40. As shown in FIG. 7, the insulating film 60 continuously covers the side surface of the ridge R and a part of the upper surface of the ridge R. In this embodiment, an opening 60a is formed in the insulating film 60 at a position corresponding to the upper surface of the ridge R. A current is injected from the first P-side electrode 71 to the contact layer 50 through the opening 60a. In other words, the opening 60a is a current injection window region to the contact layer 50.
  • the insulating film 60 continuously covers the entire upper surface of the semiconductor laminate formed on the substrate 10, except for the opening 60a. This makes it possible to suppress current flowing to areas other than the ridge R.
  • the first P-side electrode 71 continuously covers from the top surface of the isolation region De to the top surface of the ridge R, including the bottom surface and both side surfaces of the trench Te.
  • the insulating film 60 continuously covers from the top surface of the isolation region De to a part of the top surface of the ridge R, including the bottom surface and both side surfaces of the trench Te. Therefore, no current is injected from the first P-side electrode 71 formed on the top surface of the ridge R to the isolation region De. Since the pad electrode 73 has the role of injecting current into the first P-side electrode 71 on the ridge, the position of the end of the pad electrode 73 on the front end surface 1F side above the waveguide region of the semiconductor laminate 1S can be located near the trench Te.
  • the material of the insulating film 60 is not particularly limited as long as it is electrically insulating.
  • the insulating film 60 is a silicon nitride film with a thickness of 100 nm.
  • the first P-side electrode 71 is a conductive layer disposed above the semiconductor laminate. In this embodiment, the first P-side electrode 71 is disposed above the contact layer 50. As shown in FIG. 2 and FIG. 3, the first P-side electrode 71 contacts the contact layer 50 on the upper surface of the ridge R. The first P-side electrode 71 continuously covers from the upper surface of one wing portion G to the upper surface of the other wing portion G. There are no particular limitations on the material of the first P-side electrode 71 as long as it is conductive.
  • the first P-side electrode 71 includes, for example, a Ti film with a thickness of 50 nm, a Pt film with a thickness of 150 nm, and an Au film with a thickness of 100 nm to 300 nm, which are stacked in this order from the contact layer 50 side.
  • the Au film included in the first P-side electrode 71 has a thickness of 200 nm.
  • the pad electrode 73 shown in Figures 2, 3, and 5 is a pad-shaped conductive layer disposed above the first P-side electrode 71.
  • the pad electrode 73 has overhanging portions 73a at the X-axis direction end and the Y-axis direction end.
  • the overhanging portions 73a are portions that protrude outward in the X-axis direction and the Y-axis direction at the upper ends of the X-axis direction ends of the pad electrode 73.
  • the configuration of the pad electrode 73 is not particularly limited.
  • the film thickness of the pad electrode 73 is, for example, 1.5 ⁇ m or more and 4.0 ⁇ m or less.
  • the pad electrode 73 is an Au plating film with a film thickness of 2.5 ⁇ m.
  • the second P-side electrode 72 shown in Figures 2 to 5 is a conductive layer disposed above the first P-side electrode 71 and the pad electrode 73.
  • the second P-side electrode 72 may also be disposed in an area of the upper surface of the first P-side electrode 71 and the insulating film 60 where the pad electrode 73 is not disposed.
  • the configuration of the second P-side electrode 72 is not particularly limited.
  • the second P-side electrode 72 may have a barrier layer containing at least one of Ti, Pt, and Cr, for example. This can suppress the diffusion of Sn elements, oxygen, and the like from the outside of the second P-side electrode 72 to the pad electrode 73 and the first P-side electrode 71 through the second P-side electrode 72.
  • the second P-side electrode 72 includes a Ti film with a thickness of 50 nm, a Pt film with a thickness of 150 nm, and an Au film with a thickness of 100 nm to 300 nm, which are stacked in this order from the pad electrode 73 side.
  • the thickness of the Au film included in the second P-side electrode 72 is 200 nm.
  • the N-side electrode 80 shown in Figures 2, 3, and 5 is a conductive layer disposed on the lower main surface of the substrate 10 (i.e., the main surface of the substrate 10 on the back side of the main surface on which the semiconductor layer is laminated).
  • the configuration of the N-side electrode 80 is not particularly limited.
  • the N-side electrode 80 includes, laminated in this order from the substrate 10 side, a 90 nm thick AuGe film, a 20 nm thick Ni film, a 50 nm thick Au film, a 100 nm thick Ti film, a 50 nm thick Pt film, a 50 nm thick Ti film, a 100 nm thick Pt film, and a 500 nm thick Au film.
  • a front bottom L1, a front protrusion H1, a rear bottom L2, and a rear protrusion H2 are formed on the top surface of the semiconductor light-emitting element 1 above the optical axis Ax of the light emitted by the semiconductor light-emitting element 1.
  • the semiconductor light-emitting element 1 has a front bottom L1, a front protrusion H1, a rear bottom L2, and a rear protrusion H2 on the top surface of the semiconductor light-emitting element 1 above the waveguide along the optical axis Ax.
  • the optical axis Ax is an axis along the waveguide formed by the ridge R.
  • the upper side of the waveguide may be defined as, for example, the upper side of the semiconductor laminate 1S, the upper side of the waveguide being the same width as the ridge R along the optical axis Ax.
  • the optical axis Ax is located in the active layer 30 in the stacking direction (i.e., the Z-axis direction), and is located approximately in the center of the semiconductor light-emitting element 1 in the horizontal direction perpendicular to the stacking direction and the light propagation direction (i.e., the X-axis direction).
  • the front bottom L1, the front protrusion H1, the rear bottom L2, and the rear protrusion H2 do not have to be arranged over the entire width of the waveguide (i.e., the X-axis direction), but may be arranged only above a portion of the width of the waveguide.
  • the front bottom L1 is a part of the upper surface of the semiconductor light-emitting element 1 and extends rearward from the front end face 1F.
  • a first P-side electrode 71 and a second P-side electrode 72 are arranged on the semiconductor laminate 1S, but a pad electrode 73 is not arranged.
  • the coating film 2F is arranged continuously from the cleavage end face 10C through the front bottom L1 to the front surface of the forward protrusion H1 (i.e., the front end face). Note that in FIG. 1, the coating films 2F and 2R arranged on the upper surface of the semiconductor light-emitting element 1 are omitted from the illustration in order to prevent the drawing from becoming too complicated.
  • the rear bottom L2 is a part of the upper surface of the semiconductor light-emitting element 1, and is located behind the front bottom L1.
  • a first P-side electrode 71 and a second P-side electrode 72 are arranged on the semiconductor laminate 1S, but a pad electrode 73 is not arranged.
  • a coating film 2F is not arranged on the rear bottom L2.
  • no coating film 2F is disposed on the upper surface of the forward protrusion H1, and no coating film 2F is disposed on the rear surface (i.e., the rear end surface) of the forward protrusion H1.
  • the forward protrusion H1 is disposed between the front bottom L1 and the rear bottom L2, and is a portion that protrudes upward relative to the L1 front bottom and the rear bottom L2.
  • a first P-side electrode 71, a pad electrode 73, and a second P-side electrode 72 are disposed on the semiconductor laminate 1S.
  • the forward protrusion H1 in this embodiment includes a portion of each of the first P-side electrode 71, the pad electrode 73, and the second P-side electrode. In this way, by including a portion of the pad electrode 73, the forward protrusion H1 protrudes upward from the front bottom L1 and the rear bottom L2, which do not include the pad electrode 73.
  • the pad electrode 73 included in the forward protrusion H1 has a eaves portion 73a at the end in the Y-axis direction.
  • the pad electrode 73 included in the forward protrusion H1 has an inverted tapered shape in a cross section parallel to the YZ plane. In other words, the width of the pad electrode 73 in the Y-axis direction increases the farther it is from the semiconductor laminate 1S. Because the pad electrode 73 has such a shape, the second P-side electrode 72 formed on the pad electrode 73 is discontinuous between the forward protrusion H1 and the front bottom L1 and rear bottom L2. In other words, the second P-side electrode 72 is not arranged on the side surface (end surface in the Y-axis direction) of the pad electrode 73.
  • the rear protrusion H2 is disposed behind the rear bottom L2 and protrudes upward relative to the front bottom L1 and rear bottom L2.
  • the first P-side electrode 71, the pad electrode 73, and the second P-side electrode 72 are disposed on the semiconductor laminate 1S.
  • the rear protrusion H2 in this embodiment includes a portion of each of the first P-side electrode 71, the pad electrode 73, and the second P-side electrode. In this way, by including a portion of the pad electrode 73, the rear protrusion H2 protrudes upward relative to the front bottom L1 and the rear bottom L2, which do not include the pad electrode 73.
  • the rear protrusion H2 is positioned so as to cover the groove Te.
  • the groove Te By covering the groove Te, it is possible to prevent the diffusion of moisture in the air through cracks that may occur at the corners of the thin film (insulating film 60 and first P-side electrode 71) arranged on the groove Te, and it is also possible to suppress cracks in the semiconductor laminate that originate from the groove Te.
  • the pad electrode 73 included in the rear protrusion H2 has a eaves portion 73a at the end in the Y-axis direction, similar to the pad electrode 73 included in the forward protrusion H1. Furthermore, the pad electrode 73 included in the rear protrusion H2 has an inverted tapered shape in a cross section parallel to the YZ plane. Because the pad electrode 73 has such a shape, the second P-side electrode 72 formed on the pad electrode 73 by a deposition method or the like is discontinuous between the rear protrusion H2 and the rear bottom L2. In other words, the second P-side electrode 72 is not formed on the side surface (end surface in the Y-axis direction) of the pad electrode 73. Furthermore, no coating film 2F is disposed on the rear protrusion H2.
  • the front bottom L1 and the front protrusion H1 are disposed contiguously.
  • the front bottom L1 and the front protrusion H1 are in contact with each other.
  • the front protrusion H1 and the rear bottom L2 are disposed contiguously, and the rear bottom L2 and the rear protrusion H2 are disposed contiguously.
  • the heights of the front bottom L1 and the rear bottom L2 i.e., the positions of the upper surface in the Z-axis direction
  • the heights of the front protrusion H1 and the rear protrusion H2 are the same.
  • the heights of the front protrusion H1 and the rear protrusion H2 from the front bottom L1 or the rear bottom L2 are, for example, 1.5 ⁇ m or more and 4.0 ⁇ m or less.
  • the length of the front bottom L1 in the direction of the optical axis Ax may be shorter than the length of the rear bottom L2 in the direction of the optical axis Ax, and may be longer than the length of the forward protrusion H1 in the direction of the optical axis Ax.
  • the length of the front bottom L1 in this embodiment, the distance from the front end face 1F to the forward protrusion H1 may be 3 ⁇ m or more and 7 ⁇ m or less.
  • the structure of the region near the rear end face 1R on the top surface of the semiconductor light-emitting element 1 is the same as the region near the front end face 1F.
  • the structure of the region near the rear end face 1R has a structure that is symmetrical with respect to a plane that passes through the center of the semiconductor light-emitting element 1 in the Y-axis direction and is parallel to the XZ plane.
  • the structure near the rear end face 1R is not limited to this. For example, there may not be a structure corresponding to the forward protrusion H1 near the rear end face 1R.
  • an example of a semiconductor light-emitting element 1 having window regions 30w near the front end face 1F and the rear end face 1R is shown, but the same effect is achieved in the case of a semiconductor light-emitting element that does not have a window region.
  • the configuration of the semiconductor light-emitting element is the same as that of the semiconductor light-emitting element 1 according to this embodiment, except for the window region 30w.
  • FIG. 9 and Fig. 10 are schematic plan and cross-sectional views, respectively, showing the overall configuration of the semiconductor light emitting device 5 according to the present embodiment.
  • Fig. 10 shows only a portion of the cross section (cross section parallel to the YZ plane in Fig. 9) of the semiconductor light emitting device 5 passing through the optical axis Ax shown in Fig. 9, including the front end surface 1F.
  • the semiconductor light-emitting device 5 includes a semiconductor light-emitting element 1, a heat sink 7, and a bonding member 9.
  • the semiconductor light-emitting device 5 further includes a conductive layer 8.
  • the heat sink 7 is a base on which the semiconductor light-emitting element 1 is mounted, and has the function of dissipating heat generated by the semiconductor light-emitting element 1. There are no particular limitations on the material from which the heat sink 7 is made, as long as it has high thermal conductivity. In this embodiment, the heat sink 7 is an AlN substrate.
  • the conductive layer 8 is a conductive member disposed on the main surface of the heat sink 7.
  • the conductive layer 8 has a first conductive layer 81 disposed on the main surface of the heat sink 7, and a second conductive layer 82 covering the first conductive layer 81.
  • the first conductive layer 81 is formed of, for example, Cu.
  • the second conductive layer 82 is, for example, a multilayer film in which a Ni layer, a Pt layer, and an Au layer are stacked in this order from the first conductive layer 81 side.
  • the cleavage end surface 10C is located forward of the end of the conductive layer 8 in the optical axis Ax direction. This can prevent the conductive layer 8 from blocking the light emitted from the semiconductor light-emitting element 1.
  • the bonding member 9 will have difficulty reaching the vicinity of the front end surface 1F, which may reduce the heat dissipation characteristics of the semiconductor light-emitting element 1.
  • the distance D4 may be greater than 1 ⁇ m and less than 10 ⁇ m. This can prevent the conductive layer 8 from blocking the light while also reducing the deterioration of the heat dissipation characteristics of the semiconductor light-emitting element 1.
  • the joining member 9 is a member that joins the upper surface of the semiconductor light-emitting element 1 to the heat sink 7.
  • the joining member 9 is disposed on the conductive layer 8 as shown in FIG. 10, and is joined to the heat sink 7 via the conductive layer 8.
  • the joining member 9 is, for example, AuSn solder.
  • the joining member 9 is mainly joined to the second P-side electrode 72 of the semiconductor light-emitting element 1.
  • the joining member 9 is arranged from the second P-side electrode 72 included in the forward protrusion H1 to the second P-side electrode 72 included in the rear protrusion H2.
  • the joining member 9 is also joined to the second P-side electrodes 72 included in the front bottom L1, the forward protrusion H1, the rear bottom L2, and the rear protrusion H2 of the semiconductor light-emitting element 1.
  • the joining member 9 extends beyond the forward protrusion H1 to the left of FIG. 10, and a fillet portion is formed on the joining member 9 on the front bottom L1.
  • the height (height in the Z-axis direction positive side) of the fillet portion gradually decreases as it proceeds from the upper surface of the forward protrusion H1 to the front end surface 1F side.
  • the surface of the joining member 9 at the fillet portion may be a concave curved surface.
  • the joining member 9 protrudes from the end on the front end surface 1F side of the conductive layer 8, and the protruding part covers part of the side surface on the front end surface 1F side of the conductive layer 8.
  • the fillet portion and the part covering the front end surface side of the conductive layer are continuously connected, and the maximum height of the fillet portion may be higher than the height of the forward protrusion H1 as shown in FIG. 10. In other words, the joining member 9 may cover the entire forward protrusion.
  • Fig. 11 is a cross-sectional view showing the configuration of a semiconductor light emitting device 905 including a semiconductor light emitting element 901 of the comparative example.
  • Fig. 11 shows a part of a cross section passing through the optical axis Ax of the semiconductor light emitting element 901 and parallel to the stacking direction of the semiconductor laminate 1S included in the semiconductor light emitting element 901.
  • the semiconductor light emitting device 901 of the comparative example differs from the semiconductor light emitting device 1 of the present embodiment in that the pad electrode 73 is disposed from near the front end face 1F to near the rear end face 1R (not shown in FIG. 11), but is the same in other respects.
  • a semiconductor light emitting device 905 including such a comparative semiconductor light emitting element 901 an Au pad electrode 73 is disposed up to the front end of the semiconductor laminate 1S, and the pad electrode 73 is joined to the joining member 9 and heat sink 7 via the second P-side electrode 72.
  • heat generated near the front end face 1F can be dissipated to the heat sink 7 via each electrode and the joining member 9, so the heat dissipation characteristics are excellent.
  • the end face of the semiconductor light emitting element 901 of the comparative example is generally formed by forming the semiconductor laminate 1S, the first P-side electrode 71, the pad electrode 73, and the second P-side electrode 72 on a wafer, which is the base material of the substrate 10, and then cleaving the wafer.
  • the front end face 1F is formed by forming a coating film 2F on the cleaved end face of the substrate 10 (and the semiconductor laminate 1S) formed by cleavage.
  • the pad electrode 73 is formed up to the front end face 1F, which is the end face that emits light, there is a problem in that the molten bonding material spreads beyond the front end face 1F of the semiconductor light emitting element 1 and covers part of the light emitting surface. In this case, there is a risk that the bonding material will block the light emitted from the front end face 1F.
  • the top surface of the semiconductor light-emitting element 1 above the optical axis Ax is provided with a front bottom L1 extending rearward from the front end face 1F, a rear bottom L2 disposed rearward of the front bottom L1, a forward protrusion H1 disposed between the front bottom L1 and the rear bottom L2 and protruding upward relative to the front bottom L1 and the rear bottom L2, and a rear protrusion H2 disposed rearward of the rear bottom L2 and protruding upward relative to the front bottom L1 and the rear bottom L2.
  • No pad electrode 73 is disposed on the front bottom L1, and the rear protrusion H2 includes at least a portion of the pad electrode 73.
  • the semiconductor light emitting element 1 has a front bottom portion L1 where the pad electrode 73 is not disposed near the front end face 1F, so there is no problem with the molten bonding material spreading beyond the front end face 1F of the semiconductor light emitting element 1. Therefore, it is possible to prevent light from being blocked by the bonding material 9.
  • the forward protrusion H1 since the forward protrusion H1 is formed, the formation of the coating film 2F behind the front surface of the forward protrusion H1 can be suppressed. Therefore, for example, when the semiconductor light emitting element 1 is joined to the heat sink 7 by the joining member 9, the decrease in wettability of the joining member 9 due to the formation of the coating film 2F on the area other than the front surface of the forward protrusion H1, the rear bottom L2, and the rear protrusion H2 can be suppressed. This makes it easier for the joining member 9 to alloy with the electrodes of the forward protrusion H1, the rear bottom L2, and the rear protrusion H2.
  • the joining member 9 when the joining member 9 is AuSn solder, it is easier to alloy with the Au of each electrode. Therefore, the joining member 9 is sufficiently distributed from the rear protrusion H2 to the upper surface of the forward protrusion H1. As a result, the joining member 9 is further arranged from the upper surface of the forward protrusion H1 to the front bottom L1, and a fillet portion is formed. Therefore, heat generated near the front end surface 1F can be dissipated to the heat sink 7 via this fillet portion, which prevents deterioration of the heat dissipation characteristics of the semiconductor light emitting element 1 and the semiconductor light emitting device 5 including it.
  • the semiconductor light-emitting element 1 has a coating film formed on the front end face 1F, the front bottom L1, and the front surface of the forward protrusion H1, and the coating film 2F does not have to be formed on the rear surface of the forward protrusion H1.
  • the forward protrusion H1 may include a portion of the pad electrode 73.
  • forward protrusion H1 to be formed simultaneously with the rearward protrusion H2, which includes at least a portion of the pad electrode 73, simplifying the manufacturing process for the forward protrusion H1.
  • the distance from the front end face 1F to the forward protrusion H1 may be 3 ⁇ m or more and 7 ⁇ m or less.
  • the pad electrode 73 included in the forward protrusion H1 may deform during the cleavage process that is generally included in the manufacturing process of the semiconductor light-emitting element 1.
  • this distance is too long, when mounting the semiconductor light-emitting element 1 on a heat sink 7 or the like, the bonding member 9 and the like will have difficulty reaching the vicinity of the front end face 1F, and the heat dissipation characteristics of the semiconductor light-emitting element 1 will deteriorate. Therefore, by setting this distance to 3 ⁇ m or more and 7 ⁇ m or less, it is possible to more reliably prevent light from being blocked at the front end face while suppressing deterioration in heat dissipation characteristics.
  • the distance from the forward protrusion H1 to the rearward protrusion H2 may be 10 ⁇ m or more and 35 ⁇ m or less. In this embodiment, it is 20 ⁇ m. If it is 20 ⁇ m, when the joining member 9 made of 4.0 ⁇ m thick AuSn solder is used and heated for a predetermined time at a predetermined heating temperature, the joining member 9 can straddle the forward protrusion H1 and the rearward protrusion H2 as it melts and spreads.
  • the heating temperature of the joining member 9 may be, for example, 320°C or higher and 350°C or lower. By setting the heating temperature to 320°C or higher, the joining member 9 can be sufficiently melted and spread. Furthermore, by setting the heating temperature to 360°C or lower, excessive alloying reaction between the joining member 9 and each electrode can be suppressed, and deformation of each electrode can be suppressed. Therefore, application of non-uniform stress to the semiconductor light-emitting element 1 due to deformation of each electrode can be suppressed, and a decrease in the deflection ratio and reliability of the semiconductor light-emitting element 1 can be suppressed. In this embodiment, the heating temperature is 330°C.
  • the heating time of the joining member 9 may be, for example, 3 seconds or more and 20 seconds or less. By setting the heating time to 3 seconds or more, the joining member 9 can be sufficiently melted and spread. Furthermore, by setting the heating time to 20 seconds or less, excessive alloying reaction between the joining member 9 and each electrode can be suppressed, and deformation of each electrode can be suppressed. Therefore, application of non-uniform stress to the semiconductor light-emitting element 1 due to deformation of each electrode can be suppressed, and a decrease in the deflection ratio and reliability of the semiconductor light-emitting element 1 can be suppressed. In this embodiment, the heating time is 3 seconds.
  • the semiconductor light emitting element 1 also includes a second P-side electrode 72 arranged above the first P-side electrode 71 and the pad electrode 73, and the second P-side electrode 72 arranged on the front bottom L1 and rear bottom L2 may be spaced apart from the pad electrode 73 included in the forward protrusion H1.
  • the joining member 9 joined to the second P-side electrode 72 of the rear protrusion H2 melts and spreads forward, overflowing from the rear protrusion H2 and contacting the second P-side electrode 72 at the rear bottom L2.
  • the molten joining member 9 spreads in the front-rear direction at the rear bottom L2, but as shown in FIG. 10, the effect of preventing the liquid from spreading at the boundary between the high wettability portion and the low wettability portion (so-called pinning effect) is exerted. Therefore, this configuration can suppress contact between the joining member 9 and the pad electrode 73.
  • the semiconductor light-emitting element 1 also includes a second P-side electrode 72 disposed above the first P-side electrode 71 and the pad electrode 73, and the second P-side electrode 72 may have a barrier layer containing at least one of Ti, Pt, and Cr.
  • the semiconductor light emitting device 5 includes a semiconductor light emitting element 1, a heat sink 7, and a bonding member 9 that bonds the upper surface of the semiconductor light emitting element 1 to the heat sink 7.
  • the semiconductor light emitting element 1 includes a second P-side electrode 72 that is disposed above the first P-side electrode 71 and the pad electrode 73.
  • Each of the forward protrusion H1 and the rear protrusion H2 includes a portion of the second P-side electrode 72, and the bonding member 9 may be disposed from the second P-side electrode 72 included in the forward protrusion H1 to the second P-side electrode 72 included in the rear protrusion H2.
  • the semiconductor light emitting element 1 includes a second P-side electrode 72 disposed above the first P-side electrode 71 and the pad electrode 73.
  • the rear bottom L2 and the rear protrusion H2 each include a portion of the second P-side electrode 72, and the rear protrusion H2 includes a portion of the pad electrode 73, and the pad electrode 73 included in the rear protrusion H2 may be spaced apart from the bonding member 9.
  • the pad electrode 73 included in the forward protrusion H1 and the bonding member 9 may be spaced apart.
  • the first P-side electrode 71 may also include an Au film with a thickness of 100 nm or more and 300 nm or less as the top layer.
  • the thickness of the Au film contained in the first P-side electrode 71 100 nm or more, it is possible to prevent a shortage of Au that undergoes an alloying reaction with the joining member 9 at the rear bottom portion L2. Therefore, it is possible to prevent a shortage of Au that undergoes an alloying reaction with the joining member 9 at the rear bottom portion L2 from making it difficult for the joining member 9 to overcome the forward protrusion portion H1.
  • the thickness of the Au film included in the first P-side electrode 71 300 nm or less, it is possible to suppress a decrease in cleavage in the cleavage process of the method for manufacturing the semiconductor light-emitting element 1 described below.
  • the second P-side electrode 72 may also include an Au film with a thickness of 100 nm or more and 300 nm or less as the top layer.
  • the thickness of the Au film contained in the second P-side electrode 72 100 nm or more, it is possible to prevent a shortage of Au that undergoes an alloying reaction with the joining member 9 at the rear bottom portion L2. Therefore, it is possible to prevent a shortage of Au that undergoes an alloying reaction with the joining member 9 at the rear bottom portion L2 from making it difficult for the joining member 9 to overcome the forward protrusion portion H1.
  • the thickness of the Au film included in the second P-side electrode 72 300 nm or less, it is possible to suppress a decrease in cleavage in the cleavage process of the manufacturing method of the semiconductor light-emitting device 1 described below.
  • FIGS. 12 to 35 are schematic cross-sectional views showing each step of the manufacturing method of the semiconductor light emitting element 1 according to the present embodiment.
  • Figs. 12, 13, 15, 17, 19, 21, 23, 24, 26, 29, and 23 show a cross section corresponding to the line II-II of the semiconductor light emitting element 1 shown in Fig. 1.
  • Figs. 14, 16, 18, 20, 22, 25, 27, 30, and 24 show a cross section corresponding to the line III-III of the semiconductor light emitting element 1 shown in Fig. 1.
  • Figs. 12 to 31 are schematic cross-sectional views showing each step of the manufacturing method of the semiconductor light emitting element 1 according to the present embodiment.
  • Figs. 12, 13, 15, 17, 19, 21, 23, 24, 26, 29, and 23 show a cross section corresponding to the line II-II of the semiconductor light emitting element 1 shown in Fig. 1.
  • Figs. 14, 16, 18, 20, 22, 25, 27, 30, and 24 show a cross section corresponding to the line III-III of the semiconductor light emitting element 1 shown in Fig. 1.
  • Fig. 32 is a schematic perspective view showing the configuration of the substrate base material 10M according to the present embodiment.
  • Fig. 33 is a schematic perspective view showing a cleavage step of the manufacturing method of the semiconductor light emitting element 1 according to the present embodiment.
  • 34 and 35 are schematic perspective and cross-sectional views, respectively, illustrating the steps of forming the coating films 2F and 2R in the method for manufacturing the semiconductor light emitting device 1 according to the present embodiment.
  • a semiconductor laminate 1S having a waveguide is formed on a substrate 10.
  • a substrate base material which is a wafer including a substrate 10
  • a semiconductor laminate 1S is formed above the substrate base material.
  • the process of forming each semiconductor layer includes a process of forming an N-type semiconductor layer 20 above the substrate 10, a process of forming an active layer 30 above the N-type semiconductor layer 20, a process of forming a P-type cladding layer 40 above the active layer 30, and a process of forming a contact layer 50 above the P-type cladding layer 40.
  • the process of forming each semiconductor layer further includes a process of forming a cap layer 55 on the contact layer 50.
  • the cap layer 55 is a layer that functions as a mask for forming a window region 30w in the active layer 30.
  • the cap layer 55 has, for example, a GaInP layer on the contact layer 50 and an AlGaAs layer on the GaInP layer.
  • Each semiconductor layer is grown as a crystal using, for example, MOCVD (Metalorganic Chemical Vapor Deposition).
  • MOCVD Metalorganic Chemical Vapor Deposition
  • a window region 30w is formed in a region of the active layer 30 that corresponds to the vicinity of the front end face 1F. Specifically, for example, by annealing the semiconductor laminate 1S, a window region 30w can be formed in the vicinity of the front end face 1F of the active layer 30 that is not masked by the cap layer 55. In this embodiment, a window region 30w is also formed in a region that corresponds to the vicinity of the rear end face 1R.
  • the cap layer 55 is removed. This results in the active layer 30 having a window region 30w in the region near the front end face 1F, as shown in Figure 14.
  • a ridge R is formed in the region including the P-type cladding layer 40 and the contact layer 50.
  • the process of forming the ridge R includes a process of forming an upper ridge Ru, and a process of forming a lower ridge Rd (see FIG. 17 described later) after the process of forming the upper ridge Ru.
  • the upper ridge Ru is formed.
  • the upper wing portion Gu is also formed at the same time.
  • wet etching is used in the process of forming the upper ridge Ru. This makes it possible to incline the side surface of the upper ridge Ru so that the upper ridge Ru has a forward mesa shape. Therefore, it is possible to improve the adhesion between the side surface of the upper ridge Ru and the insulating film 60.
  • a groove Te is also formed.
  • the extension direction of the groove Te differs by 90 degrees from the extension direction of the side surface of the upper ridge Ru, so that the side surface of the groove Te is inclined from the top surface of the semiconductor light-emitting element 1 toward the groove direction, and the groove Te can be shaped so that the width of the bottom end of the groove Te is wider than the width of the top end of the groove Te.
  • a mask made of SiO 2 or the like is formed in a predetermined pattern on the contact layer 50 by photolithography. Then, the portion of the contact layer 50 that is not covered by the mask is removed by wet etching.
  • the chemical solution used for etching and the configuration of each semiconductor layer are determined so that the etching rate of the second etching stop layer 45 is slower than that of the contact layer 50. This makes it easier to stop etching at the second etching stop layer 45. In other words, the controllability of the height of the upper ridge Ru and the upper wing portion Gu can be improved.
  • the contact layer 50 and a part of the second etching stop layer 45 are removed by wet etching.
  • a pattern can be used that can remove the outer periphery of the upper ridge Ru in a planar view and the portion extending in the front-to-rear direction on the side of the upper ridge Ru relative to the optical axis, similar to the pattern shown by the dashed line in Figure 1.
  • the second etching stop layer 45 has constant regions 45a and 45c (see FIG. 8) in which the Al composition ratio is constant with respect to the stacking direction position, so that etching can be stopped more reliably in the second etching stop layer 45 than when the entire second etching stop layer 45 is made of a sloped region.
  • the chemical used for etching can be, for example, a solution containing tartaric acid and hydrogen peroxide.
  • the mixture ratio of tartaric acid to hydrogen peroxide is, for example, 2:1.
  • the lower ridge Rd and the lower wing portion Gd are formed as shown in FIG. 17 and FIG. 18.
  • wet etching is used in the process of forming the lower ridge Rd.
  • a mask made of SiO 2 or the like is formed by photolithography so as to cover the upper ridge Ru and the upper wing portion Gu.
  • a pattern in which only a region parallel to the upper ridge Ru is opened in the region where the second etching stop layer 45 is exposed can be used, similar to the pattern shown by the dashed line in FIG. 1.
  • the P-type cladding layer 40 is etched up to the first etching stop layer 43 by wet etching to form a groove T.
  • the chemical solution used for etching and the configuration of each semiconductor layer are determined so that the etching rate of the first etching stop layer 43 is slower than that of the second cladding layer 44. This makes it easier to stop the etching at the first etching stop layer 43. That is, the controllability of the heights of the lower ridge Rd and the lower wing portion Gd can be improved.
  • the second etching stop layer 45, the second cladding layer 44, and a part of the first etching stop layer 43 are removed by wet etching.
  • the chemical used for etching can be, for example, a solution containing sulfuric acid, hydrogen peroxide, and water.
  • the mixture ratio of sulfuric acid, hydrogen peroxide, and water is, for example, 1:1:6.
  • the lower ridge Rd and the lower wing portion Gd can be formed as shown in Figures 17 and 18.
  • the lower ridge Rd and the lower wing portion Gd continue from near the end of the P-type cladding layer 40 on the front end face 1F side to near the end of the P-type cladding layer 40 on the rear end face 1R side.
  • dry etching may be used in the process of forming the lower ridge Rd.
  • dry etching it is possible to improve the controllability of the film thickness removed by etching. Therefore, it is possible to reduce the effective refractive index difference ⁇ N between the inside and outside of the ridge R of the semiconductor light emitting element 1 and the individual difference in the spread angle of the emitted light.
  • the effective refractive index difference is the difference between the effective refractive index n0 for the light at the ridge R and below the ridge R and the effective refractive index n1 on the outside in the width direction of the ridge R.
  • the outside in the width direction of the ridge R means the outside (in the X-axis direction) from the position of the maximum width of the ridge R.
  • the effective refractive index is a value obtained by multiplying the distribution of light guided through the semiconductor light emitting element 1 (in this embodiment, the light distribution generated during laser oscillation) and the refractive index distribution of the semiconductor light emitting element 1.
  • (chemical) reactive etching is adopted for dry etching, so that the lower ridge Rd and the lower wing portion Gd having the above-mentioned shape can be formed.
  • SiCl 4 can be used as a gas for dry etching.
  • recesses 3 that are recessed in the width direction of the semiconductor light emitting element 1 are formed at the ends in the width direction of the semiconductor light emitting element 1.
  • the recesses 3 are part of the separation grooves used in singulating the semiconductor light emitting element 1.
  • separation grooves are formed between adjacent semiconductor laminates, and the semiconductor laminates are separated along the separation grooves. This forms the recesses 3 as shown in Figures 19 and 20.
  • an insulating film 60 is formed on the ridge R.
  • the insulating film 60 continuously covers from the side surface Rds of the lower ridge Rd to a part of the upper surface of the upper ridge Ru.
  • the insulating film 60 is formed on the entire upper surface of the semiconductor laminate 1S shown in FIG. 21 and FIG. 22.
  • a silicon nitride film is formed as the insulating film 60 using a CVD method or the like.
  • an opening 60a is formed in the insulating film 60 in a region corresponding to the top surface of the upper ridge Ru. Specifically, a mask is formed in the insulating film 60 in a region other than the region corresponding to the opening 60a. The region in the insulating film 60 corresponding to the opening 60a is, for example, etched to form the opening 60a.
  • a first P-side electrode 71 is formed above the semiconductor laminate 1S.
  • the first P-side electrode 71 is formed at least in the opening 60a of the insulating film 60.
  • the first P-side electrode 71 continuously covers from the top surface of one upper wing portion Gu to the top surface of the other upper wing portion Gu.
  • the first P-side electrode 71 is formed, for example, using photolithography technology and vapor deposition.
  • a pad electrode 73 is formed above the first P-side electrode 71.
  • the pad electrode 73 is formed at least above the opening 60a of the insulating film 60.
  • the pad electrode 73 continuously covers the area on the first P-side electrode 71 from the upper surface of one upper wing portion Gu to the upper surface of the other upper wing portion Gu.
  • the pad electrode 73 is formed above the area of the first P-side electrode 71 corresponding to the forward protrusion H1. In this way, at least a part of the forward protrusion H1 and the rear protrusion H2 are formed in the process of forming the pad electrode 73. This simplifies the process of forming the forward protrusion H1.
  • the pad electrode 73 is formed, for example, by a plating method using a mask.
  • the pad electrode 73 may have a eaves portion 73a at the X-axis end and the Y-axis end as shown in FIG. 26 to 28 (and FIG. 5).
  • it is possible to form the eaves-shaped portion by forming a plating film that is thicker than the mask and then removing the mask.
  • the second P-side electrode 72 is formed.
  • the second P-side electrode 72 is formed in the area on the pad electrode 73, at least above the opening 60a of the insulating film 60.
  • the second P-side electrode 72 covers the entire upper surface of the pad electrode 73.
  • the second P-side electrode 72 also covers at least a portion of the upper surface of the first P-side electrode 71 disposed on the periphery of the pad electrode 73.
  • the second P-side electrode 72 does not need to cover the area below the overhanging portion 73a of the side surface of the pad electrode 73.
  • the second P-side electrode 72 is formed, for example, using photolithography and vapor deposition.
  • an N-side electrode 80 is formed on the lower surface of the substrate 10 (the main surface of the substrate 10 on the back side of the main surface on which the semiconductor layers are stacked). Note that the lower surface of the substrate 10 may be polished before forming the N-side electrode 80.
  • the N-side electrode 80 is formed at least in a position facing the opening 60a of the insulating film 60.
  • the N-side electrode 80 is formed, for example, by using photolithography technology and vapor deposition.
  • the substrate base material including the substrate 10 and on which the semiconductor laminate 1S and the like are laminated is cleaved to form the cleaved end surface 10C.
  • the substrate base material 10M on which multiple semiconductor laminates 1S and the like corresponding to multiple semiconductor light emitting elements 1 are laminated is cleaved at positions corresponding to the front and rear end surfaces of the semiconductor light emitting elements 1.
  • the bar-shaped substrate 10B is a member in which substrates 10 corresponding to multiple semiconductor light emitting elements 1 are connected in the horizontal direction, and multiple semiconductor laminates 1S and the like corresponding to multiple semiconductor light emitting elements 1 are laminated.
  • This forms the cleaved end surface 10C which is the end surface of the substrate 10 and the semiconductor laminate 1S.
  • the front end face 1F and the rear end face 1R are formed by forming the coating films 2F and 2R on the pair of cleavage end faces 10C, respectively.
  • the bar-shaped substrate 10B is sandwiched between the spacers 10S so that the cleavage end faces 10C are substantially flush with the side faces of the spacers 10S.
  • the coating film 2F is formed on the cleavage end faces 10C, for example, by sputtering.
  • the sputtering for example, ECR (Electron Cyclotron Resonance) sputtering can be used.
  • the front end face 1F is formed, as shown in Fig.
  • the bar-shaped substrate 10B has a front bottom L1 and a front protruding portion H1 that protrudes upward from the front bottom L1, so that a gap is formed between the front bottom L1 and the spacer. Therefore, not only is the sputtering material (e.g., a dielectric material) laminated on the cleavage end face 10C, but the sputtering material that has entered through the gap is also laminated on the front bottom L1 and the front of the forward protrusion H1.
  • sputtering material e.g., a dielectric material
  • the bar-shaped substrate 10B has an N-side electrode formed on the rear surface of the substrate (the surface behind the main surface on which the semiconductor laminate 1S of the substrate 10 is formed) at a position rearward from the front end face, a narrow gap is also formed between the rear surface of the substrate and the spacer. Therefore, some of the sputtering material that has entered through the gap is also laminated near the front end face of the rear surface of the substrate. Therefore, in this embodiment, the coating film 2F is continuous from the rear surface of the substrate through the cleavage end face 10C to the front bottom L1. Note that, although the coating film 2F is shown in FIG. 35, the coating film 2R is also formed on the other cleavage end face 10C in the same manner, forming the rear end face 1R.
  • the multiple semiconductor light-emitting elements 1 included in the bar-shaped substrate 10B are separated into individual pieces. Specifically, the bar-shaped substrate 10B is divided along the recesses 3 that function as element isolation grooves. This makes it possible to manufacture the semiconductor light-emitting elements 1 according to this embodiment.
  • the method for manufacturing the semiconductor light-emitting element 1 according to this embodiment provides the same effects as those described above for the semiconductor light-emitting element 1.
  • FIG. 36 is a flow chart showing a method for manufacturing the semiconductor light emitting device 5 according to the present embodiment.
  • the semiconductor light-emitting element 1 is manufactured as described above (S10).
  • the upper surface of the semiconductor light-emitting element 1 is bonded to the heat sink 7 using a bonding member 9 (S20).
  • the upper surface of the semiconductor light-emitting element 1 is bonded to the heat sink 7 via the conductive layer 8 by the bonding member 9.
  • the method for manufacturing the semiconductor light emitting device 5 according to this embodiment provides the same effects as those described above for the semiconductor light emitting element 1 and the semiconductor light emitting device 5.
  • Fig. 37 is a diagram showing an example of the configuration of each layer of the contact layer 50, the P-type cladding layer 40, and the active layer 30 in Example 1.
  • Fig. 38 is a diagram showing an example of the configuration of each layer of the N-type semiconductor layer 20 and the substrate 10 in Example 1.
  • Fig. 39 is a diagram showing an example of the configuration of each layer of the contact layer 50, the P-type cladding layer 40, and the active layer 30 in Example 2.
  • Fig. 40 is a diagram showing an example of the configuration of each layer of the N-type semiconductor layer 20 and the substrate 10 in Example 2.
  • Example 1 37 and 38, Example 1 differs from the above-mentioned configuration mainly in the configurations of the N-type cladding layer 23, the N-side guide layer 32, and the P-side guide layer 36.
  • the N-type cladding layer 23 has a first N-type cladding layer 23a, a 2DEG layer 23b, and a second N-type cladding layer 23c
  • the N-side guide layer 32 has a first N-side guide layer 32a and an N-side carrier block layer 32b
  • the P-side guide layer 36 has a P-side carrier block layer 36a and a first P-side guide layer 36b.
  • the 2DEG layer 23b is a layer that generates two-dimensional electron gas.
  • the 2DEG layer 23b is a laminated structure in which 60 pairs of undoped Al0.24Ga0.76As layers with a thickness of 0.005 ⁇ m and N-type Al0.28Ga0.72As layers with a thickness of 0.005 ⁇ m and doped with Si at a concentration of 2.0 ⁇ 1018 cm -3 are alternately laminated.
  • the N-side carrier block layer 32b includes a layer with a lower energy position of the valence band than the first N-side guide layer 32a, is doped with Si, and is a layer with a thickness that is thin enough not to affect the optical guide.
  • the P-side carrier block layer 36a includes a layer with a higher energy position of the conduction band than the first P-side guide layer 36b, is doped with C, and is a layer with a thickness that is thin enough not to affect the optical guide.
  • the N-side carrier block layer 32b suppresses holes from leaking out of the well layer 34
  • the P-side carrier block layer 36a suppresses electrons from leaking out of the well layer 34.
  • Example 2 As shown in Figures 39 and 40, in Example 2, the configurations of the N-type cladding layer 23, the N-side guide layer 32, and the P-side guide layer 36 are mainly different from the above configurations.
  • these layers use AlGaAsP, which has a band gap almost the same as AlGaAs but a different lattice constant. Since there is a positive correlation between the band gap and the refractive index, the amount of strain in the stacking direction can be reduced without affecting the light confinement by adjusting the composition ratio of each constituent element of these layers. This allows the amount of warping of the semiconductor light emitting element 1 to be reduced.
  • the wettability of the semiconductor light emitting element 1 to the bonding member 9 near the front end surface 1F can be improved when the semiconductor light emitting element 1 is used as a heat sink 7 or the like.
  • Embodiment 2 A semiconductor light emitting element and a semiconductor light emitting device according to embodiment 2 will be described.
  • the semiconductor light emitting element according to this embodiment differs from the semiconductor light emitting element 1 according to embodiment 1 in the configuration of the forward protrusion H1.
  • the semiconductor light emitting element and the semiconductor light emitting device according to this embodiment will be described below with reference to FIG. 41, focusing on the differences from the semiconductor light emitting element 1 and the semiconductor light emitting device 5 according to embodiment 1.
  • FIG. 41 is a schematic top view showing the configuration of the forward protrusion H1 of the semiconductor light emitting element 101 according to this embodiment.
  • the forward protrusion H1 of the semiconductor light emitting element 101 according to this embodiment is arranged intermittently in a direction along the front end face 1F.
  • the forward protrusion H1 is formed intermittently in a lateral direction (i.e., the X-axis direction) perpendicular to the stacking direction and the optical axis direction (i.e., the Y-axis direction).
  • the forward protrusion H1 has multiple continuous regions H1C and one or more gap regions H1G.
  • Each of the multiple continuous regions H1C is a region that protrudes upward relative to the front bottom L1 and the rear bottom L2.
  • Each of the one or more gap regions H1G is a region that is located between two adjacent continuous regions H1C among the multiple continuous regions H1C and does not protrude upward relative to the front bottom L1 and the rear bottom L2.
  • the multiple continuous regions H1C include a portion of the pad electrode 73, and in each of the one or more gap regions H1G, the pad electrode 73 is not disposed. Therefore, the position of the upper surface of each of the one or more gap regions H1G in the stacking direction is equal to the position of the upper surfaces of the front bottom L1 and the rear bottom L2 in the stacking direction.
  • Figures 42 and 43 are schematic cross-sectional views showing the overall configuration of a semiconductor light emitting device 105 according to this embodiment.
  • Figure 42 shows a cross section parallel to the YZ plane, passing through the gap region H1G of the forward protrusion H1 of the semiconductor light emitting element 101.
  • Figure 43 shows a cross section parallel to the YZ plane, passing through the continuous region H1C of the forward protrusion H1 of the semiconductor light emitting element 101.
  • the position of the forward protrusion H1 is shown by a dashed line so that the positional relationship between the forward protrusion H1 (continuous region H1C) and the rear bottom L2, etc. can be seen.
  • the gap region H1G does not protrude upward relative to the front bottom L1 and the rear bottom L2. Therefore, the molten joining material 9 spreads to the gap region H1G starting from the highly wettable region of the rear bottom L2 located behind the front protrusion H1. Since the gap region H1G does not have an area protruding upward, the joining material 9 can easily pass through the gap region H1G and reach the vicinity of the front end surface 1F (see the direction of flow of the joining material 9 indicated by the dashed arrow in FIG. 41). In other words, the joining material 9 extends from the gap region H1G to a position forward of the front protrusion H1.
  • the joining material 9 extends from the rear bottom L2 to the gap region H1G and to a position forward of the front protrusion H1.
  • the continuous region H1C protrudes upward relative to the rear bottom L2. Therefore, the molten joining material 9 does not extend beyond the forward protrusion H1 and contact the forward bottom L1, but the joining material that spreads to the forward bottom L1 through the gap region H1G may spread laterally and pass through the continuous region H1C and be present at the forward bottom in a cross section parallel to the YZ plane.
  • a fillet portion made of the joining member 9 from the forward protrusion H1 to the front bottom L1 is easily formed.
  • the height of the fillet portion gradually decreases from the upper surface of the forward protrusion H1 toward the front end face 1F.
  • the fillet portion of the joining member 9 according to this embodiment will be described below with reference to FIG. 43.
  • the surface 9FG of the fillet portion located in front of the gap region H1G of the forward protrusion H1 may have a concave shape in cross section near the center of the gap region.
  • the material of the coating film 2F also easily passes through the gap region H1G, but the continuous region H1C can block at least a portion of the material of the coating film 2F. Therefore, compared to when there is no forward protrusion H1, it is possible to suppress the formation of the coating film 2F on the rear bottom L2 and the rear protrusion H2.
  • the width of the gap region H1G in the lateral direction may be greater than the width of the continuous region H1C in the lateral direction. This makes it possible to prevent the material of the coating film 2F from penetrating rearward from the gap region H1G without impeding the flow from the rear bottom L2 to the front bottom L1 of the joining member 9.
  • the width of the continuous region H1C in the lateral direction is 8 ⁇ m
  • the width of the gap region H1G in the lateral direction is 12 ⁇ m.
  • FIG. 44 to FIG. 47 are schematic top views showing configuration examples of the forward protrusion H1 in this embodiment.
  • the continuous regions H1C may be arranged in two rows, with one row of continuous regions H1C located behind the gap regions H1G in the other row.
  • the continuous regions H1C may be arranged in a staggered pattern so that no gaps are formed when viewed from the front end face 1F side. While the flow of raw material by sputtering etc. is linear, the flow of solder can change direction midway, so this configuration does not completely impede the flow from the rear bottom L2 to the front bottom L1 of the joining member 9, and can almost completely prevent the coating film 2F from being formed behind the forward protrusion H1.
  • the shape of the continuous region H1C in top view is rectangular, but the shape of the continuous region H1C in top view does not have to be rectangular.
  • the shape of the continuous region H1C in top view may be diamond-shaped.
  • the apex of the diamond-shaped continuous region H1C in top view is positioned opposite the apex of another adjacent continuous region H1C, and the gap region H1G is between the two opposing apexes of the two adjacent continuous regions H1C.
  • the width of the gap region H1G increases as it approaches the front end face 1F, making it easier for the joining material 9 that passes through the gap to expand, and because a certain amount of area can be secured for the forward protrusion H1, heat dissipation via the pad electrode can be largely maintained.
  • the shape of the continuous region H1C in top view may be hexagonal.
  • two adjacent hexagonal continuous regions H1C are arranged with one side facing each other. This provides the same effect as the diamond-shaped continuous region H1C shown in FIG. 45.
  • the change in the lateral width of the gap region H1G with respect to the position in the Y-axis direction can be made gentler. This can further promote the flow of the joining material 9.
  • the shape of the continuous region H1C in top view may be trapezoidal.
  • the continuous region H1C is arranged so that its lateral width increases as it approaches the front end face 1F.
  • the gap region H1G is arranged so that its lateral width decreases as it approaches the front end face 1F.
  • This type of forward protrusion H1 does not impede the flow of the joining material 9, as does the diamond-shaped continuous region H1C shown in FIG. 45.
  • Embodiment 3 A semiconductor light emitting device and a semiconductor light emitting device according to embodiment 3 will be described.
  • the semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 1 according to embodiment 1 in the configuration of the second P-side electrode 72.
  • the semiconductor light emitting device and the semiconductor light emitting device according to this embodiment will be described below with reference to Figs. 48 to 51, focusing on the differences from the semiconductor light emitting device 1 and the semiconductor light emitting device 5 according to embodiment 1.
  • FIG. 48 is a schematic cross-sectional view showing the overall configuration of the semiconductor light-emitting element 201 according to this embodiment.
  • FIG. 48 shows a cross section passing through the optical axis Ax of the semiconductor light-emitting element 201 and parallel to the YZ plane.
  • the first P-side electrode 71 is exposed on at least a portion of the front bottom L1 and rear bottom L2 of the semiconductor light emitting element 201 according to this embodiment.
  • the second P-side electrode 72 is not formed on at least a portion of the front bottom L1 and rear bottom L2 of the semiconductor light emitting element 201.
  • the second P-side electrode 72 is not formed on a wide area of the rear bottom L2 closer to the front end surface 1F.
  • the second P-side electrode 72 is also not formed on the forward protrusion H1.
  • FIG. 49 is a schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device 205 according to this embodiment.
  • FIG. 49 shows only a portion of the cross section of the semiconductor light emitting device 205 that passes through the optical axis Ax and is parallel to the YZ plane, including the front end face 1F.
  • the joining member 9 made of AuSn solder melts and deforms to spread forward from the rear protrusion H2. At this time, it goes beyond the end of the second P-side electrode 72 on the rear bottom L2 on the front end surface 1F side and comes into contact with the first P-side electrode 71.
  • the joining member 9 comes into contact with the pad electrode 73 at the front protrusion H1 as shown in FIG. 49.
  • the joining member 9 After the joining member 9 reaches the pad electrode 73, it climbs over the forward protrusion H1 and reaches the front bottom L1. At this time, a fillet portion of the joining member 9 is formed from the forward protrusion H1 to the front bottom L1. Through this fillet portion, heat generated near the front end face 1F can be dissipated to the heat sink 7, improving the heat dissipation characteristics of the semiconductor light emitting element 201 and the semiconductor light emitting device 205 including it.
  • FIG. 50 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting element 201a according to a modified example of this embodiment.
  • FIG. 50 shows a cross section passing through the optical axis Ax of the semiconductor light-emitting element 201a and parallel to the YZ plane.
  • the first P-side electrode 71 is exposed from the second P-side electrode 72 in the entire area of the front bottom L1 and rear bottom L2 of the semiconductor light emitting element 201a according to this modified example.
  • the second P-side electrode 72 is not formed on the front bottom L1 and rear bottom L2 of the semiconductor light emitting element 201a.
  • the second P-side electrode 72 does not have to be disposed on the upper surface of the front end of the rear protrusion H2.
  • FIG. 51 is a schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device 205a according to this modified example.
  • FIG. 51 shows only a portion of the cross section of the semiconductor light emitting device 205a that passes through the optical axis Ax and is parallel to the YZ plane, including the front end face 1F.
  • the joining member 9 made of AuSn solder melts and deforms to spread forward from the rear protrusion H2. At this time, it reaches the upper surface of the first P-side electrode 71 at the rear bottom L2 from the upper surface of the pad electrode 73 at the front end of the rear protrusion H2 via the front end face of the rear protrusion H2.
  • the behavior of the joining member 9 after it reaches the pad electrode 73 is the same as in the embodiment shown in FIG. 49.
  • the semiconductor light emitting element 201a and the semiconductor light emitting device 205a according to this modification also achieve the same effects as the semiconductor light emitting element 201 and the semiconductor light emitting device 205 according to the present embodiment.
  • Embodiment 4 A semiconductor light emitting element and a semiconductor light emitting device according to embodiment 4 will be described.
  • the semiconductor light emitting element according to this embodiment differs from the semiconductor light emitting element 1 according to embodiment 1 mainly in the configuration of the rear protrusion H2.
  • the semiconductor light emitting element and the semiconductor light emitting device according to this embodiment will be described below with reference to Figures 52 and 53, focusing on the differences from the semiconductor light emitting element 1 and the semiconductor light emitting device 5 according to embodiment 1.
  • FIG. 52 is a schematic top view showing the overall configuration of a semiconductor light emitting element 301 according to this embodiment.
  • FIG. 53 is a schematic cross-sectional view showing the overall configuration of a semiconductor light emitting device 305 according to this embodiment.
  • FIG. 53 shows a cross section passing through the second region H22 of the rear protrusion H2 and parallel to the YZ plane.
  • the semiconductor light-emitting element 301 on the top surface of the semiconductor light-emitting element 301, above the optical axis Ax of the light emitted by the semiconductor light-emitting element 301, there is formed a front bottom portion L1 extending rearward from the front end face 1F, and a rear protrusion H2 disposed rearward of the front bottom portion L1 and protruding upward relative to the front bottom portion L1.
  • the rear protrusion H2 of the semiconductor light emitting element 301 has a first region H21 and a second region H22.
  • the first region H21 is a region of the rear protrusion H2 that is located above the optical axis Ax of the light emitted by the semiconductor light emitting element 301.
  • the second region H22 is a region adjacent to the first region H21 in the lateral direction (i.e., the X-axis direction) perpendicular to the light propagation direction and the stacking direction of the semiconductor laminate 1S. As shown in FIG. 52, the distance D1 from the front end face 1F to the front end of the first region H21 is greater than the distance D2 from the front end face 1F to the front end of the second region H22.
  • the second region H22 of the rear protrusion H2 extends to the vicinity of the front end face 1F. This allows heat generated near the front end face 1F to be dissipated via the second region H22, further improving the heat dissipation characteristics of the semiconductor light emitting element 301.
  • the bonding member 9 may reach the front end face 1F through the second region H22.
  • the second region H22 is not directly above the optical axis Ax, it is possible to prevent light from being blocked by the bonding member 9 that reaches the front end face 1F.
  • the distance D1 By increasing the distance D1, it is possible to prevent the bonding member 9 formed on the rear protrusion H2 from reaching the front end surface 1F of the semiconductor light emitting element 301 when it melts and spreads forward.
  • the distance D1 if the distance D1 is made too large, the area of the rear protrusion H2 made of Au or the like, which has high thermal conductivity, is reduced, which can degrade the heat dissipation characteristics.
  • the distance D1 may be, for example, 15 ⁇ m or more and 50 ⁇ m or less. In this embodiment, the distance D1 is 25 ⁇ m.
  • the semiconductor light emitting element 301 has a ridge R and a trench T arranged along the ridge R, and the second region H22 covers the trench T. Since a layer with a high Al composition ratio is exposed in the trench T, the trench T can be covered with the pad electrode 73 included in the second region H22 to improve adhesion between the insulating film 60 arranged in the trench T and the trench T.
  • the width of the first region H21 is 12 ⁇ m narrower than the inner spacing of the trench T (i.e., the width of the upper surface of the ridge R located between two trenches T).
  • the configuration for covering the trench T is not limited to a configuration for covering the entire trench T.
  • the configuration for covering the trench T also includes a configuration for covering only a portion of the trench T.
  • the upper surface of the semiconductor light emitting element 301 has a rear bottom L2 disposed between the front bottom L1 and the rear protrusion H2, and a forward protrusion H1 disposed between the front bottom L1 and the rear bottom L2 and protruding upward relative to the front bottom L1 and the rear bottom L2, formed above the optical axis Ax.
  • the semiconductor light emitting element 301 according to this embodiment also has the same effect as the semiconductor light emitting element 1 according to the first embodiment.
  • the semiconductor light emitting element 301 according to this embodiment does not need to have the forward protrusion H1.
  • the front bottom L1 and the rear bottom L2 may be integrated.
  • the area formed by combining the front bottom L1 and the rear bottom L2 may be referred to as the front bottom L1.
  • the distance D3 from the front end face 1F to the front end of the forward protrusion H1 is not too small. If the distance D3 is too small, the joining member 9 may reach the front end face 1F from the forward protrusion H1, and the light may be blocked by the joining member 9. Also, the distance D3 may be, for example, 3 ⁇ m or more and 7 ⁇ m or less. In this embodiment, the distance D3 is 5 ⁇ m.
  • the distance D3 may be smaller than the distance D2 from the front end face 1F to the front end of the second region. This makes it possible to provide a gap between the forward protrusion H1 and the second region H22 of the rear protrusion H2. This allows the joining member 9 to flow out from the rear bottom L2 through this gap. Therefore, the area from which heat can be dissipated by the joining member 9 can be expanded.
  • the distance D2 may be, for example, 5 ⁇ m or more and 15 ⁇ m or less. In this embodiment, the distance D2 is 10 ⁇ m.
  • the joining member 9 located in front of the first region H21 is not disposed forward of the front end face 1F.
  • the joining member 9 located in front of the second region H22 extends from the front bottom L1 to a position forward of the front end face 1F.
  • the joining member 9 reliably covers the front end face 1F, so the heat dissipation effect can be maximized in front of the second region H22.
  • the second region H22 is not directly above the optical axis Ax, it is possible to prevent light from being blocked by the joining member 9 that reaches the front end face 1F.
  • each of the rear bottom L2 and the rear protrusion H2 includes a part of the second P-side electrode 72, similar to the semiconductor light emitting device 1 according to the first embodiment. Furthermore, the rear protrusion H2 includes a part of the pad electrode 73, and as shown in FIG. 53, the pad electrode 73 included in the second region H22 and the bonding member 9 are separated. This makes it possible to suppress the diffusion of Sn and the like included in the bonding member 9 to the pad electrode 73, and the pad electrode 73 from being alloyed.
  • the pad electrode 73 included in the first region H21 and the bonding member 9 may be separated. This provides the same effect as the configuration in which the second region H22 and the bonding member 9 are separated.
  • FIG. 5 A semiconductor light emitting device according to embodiment 5 will be described.
  • the semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 1 according to embodiment 1 mainly in the configuration of the forward protrusion H1.
  • the semiconductor light emitting device according to this embodiment will be described below with reference to FIG. 54, focusing on the differences from the semiconductor light emitting device 1 according to embodiment 1.
  • FIG. 54 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting element 401 according to this embodiment.
  • FIG. 54 shows a cross section passing through the optical axis Ax and parallel to the YZ plane.
  • the semiconductor light emitting element 401 has a forward protrusion H1.
  • the forward protrusion H1 according to this embodiment includes a portion of the semiconductor laminate 401S.
  • the semiconductor laminate 401S according to this embodiment has the semiconductor laminate 1S according to the first embodiment and a cap layer 55.
  • the cap layer 55 is a semiconductor layer used when forming the window region 30w in the active layer 30 as described above.
  • the used cap layer 55 is patterned into a desired shape using photolithography or the like, and used as part of the forward protrusion H1.
  • at least a part of the forward protrusion H1 is formed in the step of forming the semiconductor stack 401S.
  • the forward protrusion H1 further includes a part of each of the first P-side electrode 71 and the second P-side electrode 72.
  • the forward protrusion H1 does not include a part of the pad electrode 73, but may include it.
  • the forward protrusion H1 may include a cap layer 55.
  • the semiconductor light-emitting element 401 according to this embodiment having such a configuration also achieves the same effects as the semiconductor light-emitting element 1 according to the first embodiment.
  • the height of the forward protrusion H1 i.e., the position of the top surface in the Z-axis direction
  • stress is applied to the forward protrusion H1 during junction-down mounting and during the formation of the coating films 2F and 2R, which may damage the semiconductor laminate 401S.
  • the height of the forward protrusion H1 is lower than the height of the rear protrusion H2
  • the material of the coating film 2F may reach the rear bottom L2 and the rear protrusion H2. Therefore, the height of the forward protrusion H1 may be equal to the height of the rear protrusion H2.
  • the semiconductor light emitting device according to this embodiment differs from the semiconductor light emitting device 1 according to embodiment 1 mainly in the configuration of the relative heights of the forward protrusion H1 and the rear protrusion H2.
  • the semiconductor light emitting device according to this embodiment will be described below with reference to FIG. 55, focusing on the differences from the semiconductor light emitting device 1 according to embodiment 1.
  • FIG. 55 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting element 501 according to this embodiment.
  • FIG. 55 shows a cross section passing through the optical axis Ax and parallel to the YZ plane.
  • the height of the forward protrusion H1 of the semiconductor light emitting element 501 according to this embodiment is lower than the height of the rear protrusion H2.
  • the difference ⁇ h between the height of the forward protrusion H1 and the height of the rearward protrusion H2 may be greater than 0 and less than or equal to 1 ⁇ m. This makes it possible to prevent the coating film 2F from being formed behind the forward protrusion H1.
  • the semiconductor light emitting element according to this embodiment differs from the semiconductor light emitting element 1 according to the first embodiment in the shape of the pad electrode 73.
  • FIG. 56 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting element 601 according to this embodiment.
  • FIG. 56 shows a cross section passing through the optical axis Ax and parallel to the YZ plane.
  • the pad electrodes 73 at the forward protrusion H1 and rear protrusion H2 in this embodiment have a forward tapered shape in a cross section perpendicular to the front end face 1F and parallel to the stacking direction of the semiconductor laminate 1S.
  • the width of the pad electrodes 73 in the Y-axis direction decreases the further away from the semiconductor laminate 1S.
  • the height of the forward protrusion H1 is equal to the height of the rear protrusion H2, and the pad electrode 73 at the forward protrusion H1 has a flat upper surface 73ft.
  • the second P-side electrode 72 is continuously disposed between the front bottom L1 and the front protrusion H1, between the front protrusion H1 and the rear bottom L2, and between the rear bottom L2 and the rear protrusion H2.
  • FIG. 57 is a schematic cross-sectional view showing the overall configuration of the semiconductor light emitting device 605 according to this embodiment.
  • FIG. 57 shows only a portion of the cross section of the semiconductor light emitting device 605 that passes through the optical axis Ax and is parallel to the YZ plane, including the front end face 1F.
  • the bonding member 9 made of AuSn solder melts and deforms, spreading forward from the rear protrusion H2. Since the pad electrode 73 of the semiconductor light emitting element 601 according to this embodiment has a forward tapered shape, the bonding member 9 can easily overcome the forward protrusion H1 as it spreads from the rear protrusion H2 to the rear bottom L2, the forward protrusion H1, and the forward bottom L1.
  • the joining member 9 After the joining member 9 reaches the pad electrode 73, it climbs over the forward protrusion H1 and spreads from the forward protrusion H1 to the front bottom L1. At this time, a fillet portion of the joining member 9 is formed from the forward protrusion H1 to the front bottom L1. Through this fillet portion, heat generated near the front end face 1F can be dissipated to the heat sink 7, improving the heat dissipation characteristics of the semiconductor light emitting element 601 and the semiconductor light emitting device including it.
  • the second P-side electrode 72 is continuously disposed from the front bottom portion L1 to the rear protrusion portion H2, so that the pad electrode 73 is covered with the second P-side electrode 72. This makes it possible to suppress alloying of the pad electrode 73. Therefore, it is possible to suppress the deterioration of the heat dissipation characteristics caused by alloying of the pad electrode 73.
  • the inclination angle ⁇ f of the forward tapered shape of the pad electrode 73 at the forward protrusion H1 may be greater than 0 degrees and less than or equal to 40 degrees. This makes it even easier for the joining member 9 to overcome the forward protrusion H1.
  • the inclination angle ⁇ f may also be greater than or equal to 20 degrees. This prevents the dimension of the forward protrusion H1 in the Y-axis direction from becoming too large.
  • the inclination angle ⁇ b of the forward tapered shape of the pad electrode 73 at the rear protrusion H2 may be equal to the inclination angle ⁇ f.
  • FIG. 58 is a diagram showing each process in a method for forming the pad electrode 73 of the semiconductor light emitting device 601 according to this embodiment.
  • a semiconductor laminate 1S, an insulating film 60, and a first P-side electrode 71 are formed on a substrate 10, and a pad electrode 73 is formed above the first P-side electrode 71.
  • the pad electrode 73 is formed on almost the entire surface of the first P-side electrode 71 using a plating method or the like.
  • a heat treatment of about several hundred degrees Celsius may be applied to the pad electrode 73. This makes it possible to increase the grain size of Au constituting the pad electrode 73. Accordingly, in etching the pad electrode 73, which will be described later, the flatness of the etched surface of the pad electrode 73 can be improved.
  • a resist 91 is formed at positions on the pad electrode 73 corresponding to the forward protrusion H1 and the rear protrusion H2. Note that an undercut may be formed near the contact portion of the resist 91 with the pad electrode 73. This can further promote the forward tapering of the shape of the pad electrode 73.
  • the pad electrode 73 is etched.
  • the pad electrode 73 is etched by, for example, wet etching.
  • an etching solution for example, a mixed solution of iodine and potassium iodide can be used.
  • the etching solution may also contain an organic solvent such as N-methyl-2-pyrrolidine. This can further promote the forward tapering of the pad electrode 73.
  • the resist 91 is removed to form the pad electrode 73 having a forward tapered shape.
  • FIG. 61 is a schematic cross-sectional view showing the overall configuration of a semiconductor light-emitting element 601a according to a modified example of this embodiment.
  • FIG. 61 shows a cross section passing through the optical axis Ax of the semiconductor light-emitting element 601a and parallel to the YZ plane.
  • the height of the forward protrusion H1 is lower than the height of the rear protrusion H2.
  • the pad electrode 73 in the forward protrusion H1 does not need to have a flat upper surface.
  • Such a pad electrode 73 in the forward protrusion H1 can be formed, for example, by appropriately adjusting the relationship between the width of the forward protrusion H1 in the Y-axis direction and the inclination angle ⁇ f. For example, by making the width of the forward protrusion H1 in the Y-axis direction smaller than a predetermined value, the upper surface of the pad electrode 73 in the forward protrusion H1 can be etched when etching the pad electrode 73. This allows the height of the pad electrode 73 in the forward protrusion H1 to be lower than the height of the pad electrode 73 in the rear protrusion H2.
  • the semiconductor light emitting element 601a according to this modified example also achieves the same effects as the semiconductor light emitting element 601. Furthermore, in the semiconductor light emitting element 601a according to this modified example, in the process of joining the upper surface of the semiconductor light emitting element 601a to a heat sink 7 or the like by the joining member 9, when the joining member 9 made of AuSn solder melts and deforms and spreads forward from the rear protrusion H2, the joining member 9 becomes even more likely to overcome the forward protrusion H1. Therefore, it becomes even easier to form a fillet portion of the joining member 9 from the forward protrusion H1 to the front bottom L1.
  • the difference ⁇ h between the height of the forward protrusion H1 and the height of the rearward protrusion H2 may be greater than 0 and less than or equal to 1 ⁇ m. This makes it possible to prevent the coating film 2F from being formed behind the forward protrusion H1.
  • the semiconductor light-emitting element was a semiconductor laser element, but the semiconductor light-emitting element is not limited to a semiconductor laser element.
  • the semiconductor light-emitting element may be a superluminescent diode.
  • the front bottoms and rear bottoms do not include pad electrodes 73, but the front bottoms and rear bottoms may include pad electrodes 73.
  • the film thickness of the pad electrodes 73 at the front bottoms and rear bottoms may be smaller than the film thickness of the pad electrodes 73 at the front protruding portions and rear protruding portions.
  • the pad electrode 73 has a eaves-shaped portion 73a, but the pad electrode 73 does not have to have the eaves-shaped portion 73a.
  • the semiconductor light-emitting element 1 has two wing portions G, but the semiconductor light-emitting element 1 may have only one wing portion G.
  • the active layer 30 of the semiconductor light emitting device 1 has a single quantum well structure, but it may have a multiple quantum well structure.
  • the active layer 30 of the semiconductor light-emitting element 1 has window regions 30w near the front end face 1F and the rear end face 1R, but the semiconductor light-emitting element 1 does not need to have the window regions 30w.
  • the sloped regions 45b and 45d of the second etching stop layer 45 are regions in which the Al composition ratio decreases as the region approaches the contact layer 50, but they may also be regions in which the Al composition ratio increases as the region approaches the contact layer 50.
  • this disclosure also includes forms obtained by applying various modifications to the above-mentioned embodiments and modifications that would occur to a person skilled in the art, and forms realized by arbitrarily combining the components and functions of the above-mentioned embodiments and modifications without departing from the spirit of this disclosure.
  • the semiconductor light emitting device disclosed herein can be used, for example, as a high-output, highly efficient light source in a light source for laser processing.

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Abstract

L'invention concerne un élément électroluminescent à semi-conducteur (1) qui émet de la lumière à partir d'une surface d'extrémité avant (1F) et comprend un stratifié semi-conducteur (1S) ayant un guide d'ondes, une première électrode côté P (71) et une électrode de plot (73). L'élément électroluminescent à semi-conducteur (1) comprend : une partie inférieure avant (L1) qui est la surface supérieure de l'élément électroluminescent à semi-conducteur (1), qui s'étend vers l'arrière à partir de la surface d'extrémité avant (1F) au-dessus du guide d'ondes de l'élément électroluminescent à semi-conducteur (1), et qui n'a pas l'électrode de pastille (73) disposée sur celle-ci ; une partie inférieure arrière (L2) disposée à l'arrière de la partie inférieure avant (L1) ; une partie de projection avant (H1) qui est disposée entre la partie inférieure avant (L1) et la partie inférieure arrière (L2) et qui fait saillie vers le haut par rapport à la partie inférieure avant (L1) et à la partie inférieure arrière (L2) ; et une partie de projection arrière (H2) qui est disposée à l'arrière de la partie inférieure arrière (L2) et qui fait saillie vers le haut par rapport à la partie inférieure avant (L1) et à la partie inférieure arrière (L2). La partie de projection arrière (H2) comprend au moins une partie de l'électrode de pastille (73).
PCT/JP2023/037374 2022-10-21 2023-10-16 Élément électroluminescent à semi-conducteur, dispositif électroluminescent à semi-conducteur, procédé de fabrication d'élément électroluminescent à semi-conducteur et procédé de fabrication de dispositif électroluminescent à semi-conducteur WO2024085108A1 (fr)

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JP2010028020A (ja) * 2008-07-24 2010-02-04 Sharp Corp 半導体レーザ素子、半導体ウェハおよび半導体レーザ素子の製造方法
JP2012079967A (ja) * 2010-10-04 2012-04-19 Nichia Chem Ind Ltd 半導体レーザ素子の駆動方法及び半導体レーザ装置
JP2014183120A (ja) * 2013-03-18 2014-09-29 Renesas Electronics Corp 半導体装置およびその製造方法並びに半導体ウェハ

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