WO2023243138A1 - パワーモジュール用基板 - Google Patents
パワーモジュール用基板 Download PDFInfo
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- WO2023243138A1 WO2023243138A1 PCT/JP2023/004096 JP2023004096W WO2023243138A1 WO 2023243138 A1 WO2023243138 A1 WO 2023243138A1 JP 2023004096 W JP2023004096 W JP 2023004096W WO 2023243138 A1 WO2023243138 A1 WO 2023243138A1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/10—Arrangements for heating
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/20—Arrangements for cooling
- H10W40/25—Arrangements for cooling characterised by their materials
- H10W40/255—Arrangements for cooling characterised by their materials having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Definitions
- the present disclosure relates to a power module substrate.
- This application claims priority to Japanese Patent Application No. 2022-96031 filed in Japan on June 14, 2022, the contents of which are incorporated herein.
- Patent Document 1 discloses a power semiconductor device in which a surface electrode of a power semiconductor element is composed of a plurality of different metal layers.
- the layer structure consisting of a plurality of metal layers includes an Al layer, a Cu layer formed on this Al layer and having a Vickers hardness of 200 to 350 Hv, and a Cu layer formed on this Cu layer and having a Vickers hardness of 70 to 150 Hv. ing.
- Such a layered structure reduces damage to the power semiconductor element when bonding with Cu wire.
- the present disclosure has been made to solve the above problems, and aims to provide a power module substrate that can further reduce damage to power semiconductor elements during wire bonding.
- a power module substrate includes an insulating plate, a plurality of surface patterns arranged on the surface of the insulating plate, and a connection to one of the plurality of surface patterns. bonding that connects a power semiconductor element that has been removed, an electrode part disposed on the upper surface of the power semiconductor element, another surface pattern different from the one surface pattern among the plurality of surface patterns, and the electrode part.
- a wire; the electrode part is formed of metal and is connected to the bonding wire; a contact layer formed of metal and disposed on the upper surface; a protective layer laminated on the contact layer; and a contact layer formed of metal and connected to the bonding wire. and a connection layer laminated on the protective layer, the protective layer containing a conductive ceramic having higher hardness than the contact layer and the connection layer.
- FIG. 1 is a perspective view showing a schematic configuration of a power conversion device according to a first embodiment of the present disclosure.
- FIG. 2 is a diagram when the power module according to the first embodiment of the present disclosure is viewed from the II-II line direction shown in FIG. 1.
- FIG. 3 is a cross-sectional view taken along line III-III shown in FIG. 2.
- FIG. 4 is an enlarged view of the main part of FIG. 3, and is a diagram showing a layer structure of an electrode part.
- FIG. FIG. 5 is a diagram showing a layer structure of an electrode part when a main part in a cross-sectional view of a power module according to a second embodiment of the present disclosure is enlarged, and is a diagram corresponding to the part shown in FIG. 4 .
- FIG. 5 is a diagram showing a layer structure of an electrode part when a main part in a cross-sectional view of a power module according to a second embodiment of the present disclosure is enlarged, and is a diagram corresponding to the part
- Example 5 is a diagram showing a layer structure of an electrode part when a main part in a cross-sectional view of a power module according to a third embodiment of the present disclosure is enlarged, and is a diagram corresponding to the part shown in FIG. 4 .
- the results of Example 1 are shown.
- the results of Example 1 are shown. This shows the results of Example 2.
- the results of Example 3 are shown.
- a power converter is a device that converts DC power into three-phase AC power or the like.
- Examples of the power conversion device of this embodiment include an inverter used in a system such as a power plant, an inverter used to drive an electric motor (motor) of an electric vehicle, etc.
- the power converter 100 includes a casing 1, an external input conductor 2, a capacitor 3, a power converter 4, and a cooler 5.
- the casing 1 and the cooler 5 are shown by two-dot chain lines.
- the casing 1 forms the outer shell of the power converter 100.
- the casing 1 in this embodiment is made of metal such as aluminum (Al), synthetic resin, or the like.
- the casing 1 in this embodiment is made of aluminum and has a rectangular parallelepiped shape.
- the outer surface of the casing 1 has two side surfaces arranged back to back to each other.
- the side facing one side will be referred to as the “input side side 1a”, and the side facing the other side will be referred to as the “output side side 1b".
- An external input conductor 2 for inputting DC power is drawn out from the input side surface 1a.
- the external input conductors 2 are a pair of electric conductors (bus bars) that supply DC power supplied from a power system outside the power converter 100 or a DC power source such as a battery to the capacitor 3.
- the external input conductor 2 in this embodiment is made of metal containing copper (Cu) or the like.
- One end of the external input conductor 2 is connected to the capacitor 3, and the other end of the external input conductor 2 extends, for example, in a direction intersecting the input side surface 1a of the casing 1.
- the capacitor 3 is a smoothing capacitor that stores charges input from the external input conductor 2 and suppresses voltage fluctuations associated with power conversion.
- the DC voltage whose ripples are suppressed and smoothed by passing through the capacitor 3 is supplied (applied) to the power converter 4 .
- the power converter 4 converts the voltage input from the capacitor 3.
- Power converter 4 is housed in casing 1 .
- the power converter 4 in this embodiment has three power modules 10 each responsible for outputting U-phase, V-phase, and W-phase output in order to output three-phase AC power. Therefore, the power conversion device 100 in this embodiment is a three-phase inverter including three power modules 10.
- the power module 10 is a device that converts input power and outputs the converted power. As shown in FIGS. 2 and 3, the power module 10 includes a base plate 11, a power module substrate 12, a main terminal section 13, an output terminal section 14, a reinforcing section 15, and a sealing section 16. ing.
- the base plate 11 is a flat member.
- the base plate 11 has a first surface 11a and a second surface 11b located on the back side of the first surface 11a. That is, the first surface 11a and the second surface 11b of the base plate 11 are parallel to each other and are placed back to back.
- the second surface 11b of the base plate 11 is fixed to the cooler 5 via a bonding material or the like (not shown).
- copper is used for the base plate 11 in this embodiment.
- the base plate 11 may be made of metal such as aluminum.
- the power module substrate 12 includes an insulating plate 20, a front pattern 21, a power semiconductor element 22, an electrode part 23, a bonding wire 27, and a back pattern 28.
- the insulating plate 20 has a flat plate shape.
- the insulating plate 20 has a front surface 20a and a back surface 20b located on the back side of the front surface 20a.
- the front surface 20a and the back surface 20b of the insulating plate 20 are parallel to each other and are placed back to back.
- the insulating plate 20 in this embodiment is made of an insulating material such as ceramic, for example.
- an insulating material such as ceramic, for example.
- the insulating material forming the insulating plate 20 in addition to ceramics, paper phenol, paper epoxy, glass composite, glass epoxy, glass polyimide, fluororesin, etc. can be used.
- the surface pattern 21 is a pattern of copper foil (Cu) or the like that is formed on the surface 20a of the insulating plate 20 and spreads in a plane.
- the surface pattern 21 is formed, for example, by being fixed to the surface 20a of the insulating plate 20 by bonding or the like and then etching or the like.
- a plurality of surface patterns 21 are arranged on the surface 20a of the insulating plate 20. These plurality of surface patterns 21 are arranged adjacent to each other with a gap in the direction in which the insulating plate 20 spreads.
- a case where three surface patterns 21 are arranged on the surface 20a of the insulating plate 20 will be described as an example.
- these three surface patterns 21 will be referred to as a first surface pattern 21a, a second surface pattern 21b, and a third surface pattern 21c.
- the first surface pattern 21a and the second surface pattern 21b are patterns for exchanging input and output of DC power with the capacitor 3, and correspond to an inlet portion or an outlet portion of a loop between PNs formed on the surface pattern 21. .
- the main terminal portion 13 connected to the capacitor 3 is connected to the first surface pattern 21a and the second surface pattern 21b in this embodiment.
- An output terminal section 14 for outputting the alternating current converted by the power semiconductor element 22 to a load (not shown) provided outside the power conversion device 100 is connected to the third surface pattern 21c.
- the power semiconductor element 22 is a circuit element that converts power through a switching operation that turns on and off voltage and current.
- the power semiconductor element 22 is, for example, a switching element such as an IGBT or a MOSFET.
- the power semiconductor element 22 is formed of, for example, a Si-based single crystal or a SiC-based single crystal, which has higher hardness than a Si-based single crystal.
- a case is shown in which a MOSFET is applied to the power semiconductor, and four power semiconductor elements 22 are connected to the surface pattern 21 of the power module substrate 12. Note that when an IGBT is used as the power semiconductor element 22, it is necessary to arrange a diode in parallel that allows current to flow in a direction opposite to that of the IGBT.
- the four power semiconductor elements 22 in this embodiment are comprised of two first power semiconductor elements 22a and two second power semiconductor elements 22b.
- the first power semiconductor element 22a is connected to the first surface pattern 21a.
- the second power semiconductor element 22b is connected to the third surface pattern 21c.
- the power semiconductor element 22 When the power semiconductor element 22 is a MOSFET, the power semiconductor element 22 has a lower surface 22d (see FIG. 3) on which an input terminal (not shown) corresponding to a drain is formed, and an output terminal (not shown) corresponding to a source. It has an upper surface 22u on which is formed, and a gate (not shown) corresponding to a control signal input terminal for controlling switching of the power semiconductor element 22.
- the lower surface 22d of the power semiconductor element 22 is electrically connected to the surface pattern 21 via the bonding material S.
- the lower surface 22d of the first power semiconductor element 22a is connected to the first surface pattern 21a.
- the lower surface 22d of the second power semiconductor element 22b is connected to the third surface pattern 21c.
- the bonding material S in this specification may be, for example, solder, sintered material (powder of metal, etc.), or the like.
- a control signal generated by a gate driving substrate (not shown) provided outside the power module substrate 12 is input to the power semiconductor element 22 through the gate.
- the power semiconductor element 22 performs switching according to this control signal.
- the power semiconductor element 22 is an IGBT
- the power semiconductor element 22 has a lower surface 22d corresponding to a collector, an upper surface 22u corresponding to an emitter, and a gate corresponding to a control signal input terminal.
- the electrode portion 23 is arranged on the upper surface 22u of the power semiconductor element 22.
- the electrode portion 23 corresponds to an electrode portion in the power semiconductor element 22.
- the electrode section 23 in this embodiment has a three-layer structure. As shown in FIG. 4, the electrode section 23 includes a contact layer 24, a protective layer 25, and a connection layer 26.
- the contact layer 24 is disposed on the upper surface 22u, and is integrally connected to the output terminal formed on the upper surface 22u.
- Contact layer 24 is made of metal. Any one of Ni, Al, and Cr can be used as the metal forming the contact layer 24 in this embodiment.
- the thickness L1 of the contact layer 24 is set to 0.05 to 0.5 ⁇ m.
- the contact layer 24 is formed on the upper surface 22u of the power semiconductor element 22 by, for example, a sputtering method.
- the protective layer 25 is a conductive material layered on the contact layer 24 . That is, the protective layer 25 is formed integrally with the contact layer 24 on the contact layer 24 .
- the protective layer 25 is made of conductive ceramic.
- the conductive ceramics forming the protective layer 25 in this embodiment include TiB 2 (titanium diboride), ZrB 2 (zirconium diboride), HfB 2 (hafnium diboride), and TiSi 2 (titanium disilicide). ), and WSi 2 (tungsten disilicide).
- the thickness L2 of the protective layer 25 is set to 0.5 to 2 ⁇ m.
- the protective layer 25 is formed on the contact layer 24 by, for example, a sputtering method.
- connection layer 26 is laminated on the protective layer 25. That is, the connection layer 26 is formed integrally with the protective layer 25 on the protective layer 25.
- the connection layer 26 is made of metal. Copper, an alloy containing copper, or the like can be used as the metal forming the connection layer 26 in this embodiment.
- the thickness L3 of the connection layer 26 is 10 to 20 ⁇ m.
- the connection layer 26 is formed on the protective layer 25 by, for example, a sputtering method.
- the hardness of the conductive ceramic forming the protective layer 25 is higher than the hardness of the metal forming the contact layer 24 and the connection layer 26.
- the conductive ceramic forming the protective layer 25 has a Vickers hardness ten times or more that of the metal forming the contact layer 24 and the connection layer 26.
- the thermal conductivity of the conductive ceramic forming the protective layer 25 is lower than the thermal conductivity of the metal forming the contact layer 24 and the connection layer 26.
- the Vickers hardness of TiB 2 is, for example, 32 to 34 GPa. Further, the Vickers hardness of ZrB 2 is, for example, 21 to 23 GPa. Further, the Vickers hardness of HfB 2 is, for example, 27 to 29 GPa. Further, the Vickers hardness of TiSi 2 is, for example, 9 to 11 GPa. Further, the Vickers hardness of WSi 2 is, for example, 9 to 11 GPa.
- the bonding wire 27 is a conductive wire that connects the surface pattern 21 and the electrode section 23 disposed on the upper surface 22u of the power semiconductor element 22.
- the bonding wire 27 in this embodiment is made of a metal containing copper or the like, and has a diameter of, for example, 200 to 400 ⁇ m.
- connection layer 26 in the electrode section 23 One end of the bonding wire 27 is connected to the connection layer 26 in the electrode section 23.
- the other end of the bonding wire 27 is connected to the surface pattern 21.
- a plurality of bonding wires 27 connect the connection layer 26 and the surface pattern 21.
- six bonding wires 27 connect the connection layer 26 of the electrode section 23 disposed on the upper surface 22u of the first power semiconductor element 22a and the third surface pattern 21c. There is. Further, as shown in FIGS. 2 to 4, six bonding wires 27 connect the connection layer 26 of the electrode section 23 disposed on the upper surface 22u of the second power semiconductor element 22b and the second surface pattern 21b. There is. That is, the surface patterns 21 arranged on the surface 20a of the insulating plate 20 are electrically connected to each other by the bonding wire 27.
- One end and the other end of the bonding wire 27 are integrally connected to each of the connection layer 26 and the surface pattern 21 in the electrode section 23 by wire bonding in which ultrasonic waves or the like are applied from the outside.
- DC power is input to the first power semiconductor element 22a through the first surface pattern 21a, and the second power semiconductor element 22b has a second surface pattern 21b, and this second surface pattern 21b and the second power semiconductor element 22b.
- DC power is input through the bonding wire 27 connecting the two.
- the first power semiconductor element 22a and the second power semiconductor element 22b perform a switching operation, the above-mentioned DC power is converted into AC power, which is output to the third surface pattern 21c through the electrode section 23 and the bonding wire 27. .
- the back pattern 28 is a pattern of copper foil or the like that is formed on the back surface 20b of the insulating plate 20 and spreads out in a plane.
- the back pattern 28 is fixed to the center of the first surface 11a of the base plate 11 via a bonding material S.
- the back pattern 28 is formed, for example, by being fixed to the back surface 20b of the insulating plate 20 by bonding or the like, and then etching or the like.
- the main terminal portion 13 is an electrical conductor (bus bar) that exchanges DC power between the capacitor 3 and the power module substrate 12.
- the main terminal portion 13 is made of metal including copper or the like.
- the main terminal portion 13 has a P terminal 13p as a positive electrode and an N terminal 13n as a negative electrode.
- P terminals 13p and N terminals 13n are arranged side by side with a gap G serving as a spatial distance (insulation distance) interposed therebetween.
- the P terminal 13p connects the positive electrode (not shown) of the capacitor 3 and the first surface pattern 21a of the power module substrate 12.
- the N terminal 13n connects the negative electrode (not shown) of the capacitor 3 and the second surface pattern 21b of the power module substrate 12.
- the output terminal section 14 is an electrical conductor (bus bar) for outputting the AC power converted by the power semiconductor element 22 to the outside of the power conversion device 100.
- the output terminal section 14 is made of metal including copper or the like.
- One end of the output terminal section 14 is connected to the third surface pattern 21c on the power module substrate 12.
- the other end of the output terminal portion 14 extends outward from the output side surface 1b of the casing 1, for example.
- the other end of the output terminal section 14 is connected to, for example, a power output wiring (not shown) connected to a load (AC rotating electric machine) such as a motor.
- the reinforcing portion 15 is a member that mechanically reinforces the main terminal portion 13 and the output terminal portion 14 while being fixed to the first surface 11a of the base plate 11.
- the reinforcing portion 15 is made of, for example, a synthetic resin material (insulating material).
- a synthetic resin material for example, PPS (polyphenylene sulfide) can be used as the material for forming the reinforcing portion 15 in this embodiment.
- a synthetic resin material other than PPS may be used for the reinforcing portion 15.
- the reinforcing portion 15 is fixed to the first surface 11a of the base plate 11 using, for example, an adhesive.
- the reinforcing portion 15 surrounds the power module substrate 12 from the outside, while covering the P terminal 13p and the N terminal 13n of the main terminal portion 13 and the output terminal portion 14 from the outside.
- the reinforcing portion 15 forms a case that surrounds the power module substrate 12 in a direction along the surface 20a of the base plate 11. Therefore, the reinforcing portion 15 defines a space in which the power module substrate 12 is accommodated together with the base plate 11. In this embodiment, for convenience of explanation, this space in which the power module substrate 12 is accommodated is referred to as a "potting space Rp."
- the sealing portion 16 is a sealing member disposed within the potting space Rp.
- the sealing portion 16 in the drawings is shown by hatching due to space limitations.
- the potting space Rp is filled with a liquid potting material from the outside (potting) to seal the members exposed within the potting space Rp.
- the sealing portion 16 is formed by applying a predetermined temperature and time to the potting material filled in the potting space Rp and hardening the potting material.
- the sealing portion 16 formed by hardening the potting material electrically insulates each member in the potting space Rp and between each member and the space outside the power module 10.
- the sealing part 16 in the potting space Rp is arranged so as to cover each surface of the power module substrate 12, the main terminal part 13, and the output terminal part 14.
- the cooler 5 is a device that mainly cools the power module 10 of the power conversion section 4.
- the cooler 5 is provided so as to be stacked on the casing 1, and is fixed and integrated with the casing 1.
- the cooler 5 has a base 51 and radiation fins 52.
- the base 51 and the radiation fins 52 are shown by dotted lines.
- the base 51 has a plate shape.
- the base 51 has a bonding surface 51a that is bonded to the second surface 11b of the base plate 11 in the power module 10 via a bonding material S, and a heat dissipation surface 51b that faces the opposite side to the bonding surface 51a. .
- the joint surface 51a and the heat radiation surface 51b are parallel to each other and are placed back to back.
- the radiation fins 52 are columnar members arranged in plural on the radiation surface 51b of the base 51. Each heat radiation fin 52 projects from the heat radiation surface 51b toward the side opposite to the power module 10 with the base 51 at the center.
- a liquid refrigerant W such as water is introduced into the cooler 5 from the outside.
- the heat radiation surface 51b of the base 51 and the radiation fins 52 are cooled by contacting with the liquid refrigerant W introduced from the outside.
- the liquid refrigerant W is heated by exchanging heat with the heat conducted from the power module 10 to the base 51 and the radiation fins 52, and simultaneously cools the power module 10.
- the protective layer 25 made of a conductive ceramic whose hardness is higher than that of the metal forming the contact layer 24 and the connection layer 26 is interposed between the contact layer 24 and the connection layer 26.
- this pressure is absorbed by the protective layer 25. That is, the protective layer 25 suppresses pressure from being transmitted to the contact layer 24 during wire bonding.
- the thermal conductivity of the protective layer 25 is lower than that of the contact layer 24 and the connection layer 26, for example, compared to the case where the protective layer 25 is formed of metal, the connection layer 26 to the contact layer 24 It is possible to further suppress heat conduction to.
- the contact layer 24 is formed with a thickness L1 of 0.05 to 0.5 ⁇ m
- the protective layer 25 is formed with a thickness L2 of 0.5 to 2 ⁇ m.
- the electrode section 23 in this embodiment has a five-layer structure.
- the electrode section 23 includes a contact layer 24, a protective layer 25a formed in three layers, and a connection layer 26.
- the protective layer 25a includes a first metal layer 251, a main body layer 252, and a second metal layer 253.
- the first metal layer 251 is formed integrally with the contact layer 24 on the contact layer 24 .
- the first metal layer 251 is made of a metal containing Ti (titanium).
- the thickness L2a of the first metal layer 251 is set to 0.1 to 0.5 ⁇ m.
- the first metal layer 251 is formed on the contact layer 24 by, for example, a sputtering method.
- the bonding force between the first metal layer 251 and the contact layer 24 is the same as that between the main body layer 252 and the contact layer 24 when the first metal layer 251 is not interposed. is greater than the bonding force of Furthermore, since the first metal layer 251 is formed of a metal containing Ti, the bonding force between the first metal layer 251 and the main body layer 252 is stronger than the bonding force between, for example, a metal other than Ti and the main body layer 252. big. In other words, the combination of the first metal layer 251 and the main body layer 252 has a higher affinity than the combination of a metal other than Ti and the main body layer 252.
- the main body layer 252 is laminated on the first metal layer 251. That is, the main body layer 252 is formed on the first metal layer 251 while being integral with the first metal layer 251 .
- the main body layer 252 is made of conductive ceramic. Any one of TiB 2 , ZrB 2 , HfB 2 , TiSi 2 , and WSi 2 can be used as the conductive ceramic forming the main body layer 252 in this embodiment.
- the thickness L2b of the main body layer 252 is 0.5 to 2 ⁇ m.
- the main body layer 252 is formed on the first metal layer 251 by, for example, a sputtering method.
- the second metal layer 253 is laminated on the main body layer 252. That is, the second metal layer 253 is formed on the main body layer 252 while being integral with the main body layer 252 .
- the second metal layer 253 is made of a metal containing Ti.
- the thickness L2c of the second metal layer 253 is set to 0.1 to 0.5 ⁇ m.
- the second metal layer 253 is formed on the main body layer 252 by, for example, a sputtering method.
- the bonding force between the second metal layer 253 and the connection layer 26 is the same as that between the main body layer 252 and the connection layer 26 when the second metal layer 253 is not interposed. is greater than the bonding force of Furthermore, since the second metal layer 253 is formed of a metal containing Ti, the bonding force between the second metal layer 253 and the main body layer 252 is stronger than, for example, the bonding force between a metal other than Ti and the main body layer 252. big. In other words, the combination of the second metal layer 253 and the main body layer 252 has a higher affinity than the combination of a metal other than Ti and the main body layer 252.
- connection layer 26 is laminated on the second metal layer 253. That is, the connection layer 26 is formed on the second metal layer 253 while being integral with the second metal layer 253.
- the first metal layer 251 and the second metal layer 253 are formed with a thickness L2a, L2c of 0.1 to 0.5 ⁇ m, and the main body layer 252 is formed with a thickness of 0.5 to 2 ⁇ m. It is formed by L2b.
- the electrode section 23 in this embodiment has a five-layer structure.
- the electrode section 23 includes a contact layer 24, a protective layer 25b formed in three layers, and a connection layer 26.
- the protective layer 25b includes a first protective layer 254, a metal layer 255, and a second protective layer 256.
- the first protective layer 254 is a conductive material layered on the contact layer 24 . That is, the first protective layer 254 is formed on the contact layer 24 while being integral with the contact layer 24 .
- the first protective layer 254 is made of conductive ceramic. As the conductive ceramic forming the first protective layer 254 in this embodiment, any one of TiB 2 , ZrB 2 , HfB 2 , TiSi 2 , and WSi 2 can be used.
- the thickness L2d of the first protective layer 254 is 0.5 to 2 ⁇ m.
- the first protective layer 254 is formed on the contact layer 24 by, for example, a sputtering method.
- the metal layer 255 is laminated on the first protective layer 254. That is, the metal layer 255 is formed integrally with the first protective layer 254 on the first protective layer 254 .
- the metal layer 255 is made of a metal containing Ti.
- the thickness L2e of the metal layer 255 is set to 0.1 to 0.5 ⁇ m.
- the metal layer 255 is formed on the first protective layer 254 by, for example, a sputtering method.
- the second protective layer 256 is a conductive material laminated on the metal layer 255. That is, the second protective layer 256 is formed integrally with the metal layer 255 on the metal layer 255.
- the second protective layer 256 is made of conductive ceramic. As the conductive ceramic forming the second protective layer 256 in this embodiment, any one of TiB 2 , ZrB 2 , HfB 2 , TiSi 2 , and WSi 2 can be used.
- the thickness L2f of the second protective layer 256 is 0.5 to 2 ⁇ m.
- the second protective layer 256 is formed on the metal layer 255 by, for example, a sputtering method.
- connection layer 26 is laminated on the second protective layer 256. That is, the connection layer 26 is formed integrally with the second protective layer 256 on the second protective layer 256.
- a first protective layer 254 and a second protective layer 256 made of conductive ceramic are laminated with a metal layer 255 made of a metal containing Ti interposed therebetween.
- FIGS. 7A to 9 show whether or not cracks or fissures (microcracks) occur on the surface of the power semiconductor element 22 when the output intensity of the ultrasonic waves used during wire bonding is changed in eight steps in the range of 10 to 100. shows. "10" in the ultrasonic output intensity indicates a predetermined output intensity.
- "30" is adopted as the output intensity of the ultrasonic wave.
- the presence or absence of cracks or fissures on the surface of the power semiconductor element 22 can be determined by observing the surface of the power semiconductor element 22 using, for example, a scanning electron microscope (SEM), and comparing it with, for example, a limit sample. Judgment is made based on the comparison.
- SEM scanning electron microscope
- the bonding wire 27 was made of copper and had a diameter of 300 ⁇ m.
- the contact layer 24 is made of aluminum and has a thickness L1 of 0.1 ⁇ m.
- the connection layer 26 is made of copper and has a thickness L3 of 15 ⁇ m. Note that the diameter of the bonding wire 27, the thickness L1 of the contact layer 24, and the thickness L3 of the connection layer 26 shown here are actual values, and are subject to slight manufacturing errors and design differences. tolerances are allowed.
- FIG. 7A shows a case where the power semiconductor element 22 is formed of Si-based single crystal.
- the rows (i) to (v) of “present invention” in FIG. 7A are the results after wire bonding with the configuration described in the first embodiment, and the rows of “comparative example” in FIG. 7A are the results after wire bonding with the configuration described in the first embodiment.
- the protective layer 25 in "the present invention” in FIG. 7A is formed of each of TiB 2 , ZrB 2 , HfB 2 , TiSi 2 , and WSi 2 and has a thickness L2 of 1.0 ⁇ m in each case. has been done.
- the protective layer 25 is made of a metal containing Ta (tantalum) and has a thickness of 1.0 ⁇ m. Note that the thickness L2 of the protective layer 25 shown here indicates a substantial value, and slight manufacturing errors and design tolerances are allowed.
- FIG. 7B a case is shown in which the power semiconductor element 22 is formed of a SiC-based single crystal.
- the row of “present invention” in FIG. 7B is the result after wire bonding with the configuration described in the first embodiment, and the row of “comparative example” in FIG. This is the result after wire bonding in a configuration without using.
- the protective layer 25 in "the present invention” in FIG. 7B is made of TiB 2 and has a thickness L2 of 1.0 ⁇ m.
- the protective layer 25 is made of a metal containing Ta (tantalum) and has a thickness of 1.0 ⁇ m. Note that the thickness L2 of the protective layer 25 shown here indicates a substantial value, and slight manufacturing errors and design tolerances are allowed.
- FIGS. 7A and 7B which show the functions and effects of the configuration of the first embodiment, it can be seen that the occurrence of cracks and fissures in the power semiconductor element 22 is suppressed compared to the "comparative example". .
- Example 2 In FIG. 8, a case is shown in which the power semiconductor element 22 is formed of Si-based single crystal. Rows (i) and (iii) of “present invention” in FIG. 8 are the results after wire bonding with the configuration described in the second embodiment.
- the first metal layer 251 and second metal layer 253 in (i) and (iii) of the "present invention” in FIG. 8 are made of Ti, and both have a thickness of 0.2 ⁇ m, L2a and L2c. has been done.
- the main body layer 252 in (i) of the "present invention” in FIG. 8 is made of HfB 2 and has a thickness L2b of 1.0 ⁇ m.
- the row (ii) in “the present invention” in FIG. 8 is the result shown by the row (iii) in “the present invention” in FIG. 7A.
- the row (iv) in “the present invention” in FIG. 8 is the result shown by the row (iv) in “the present invention” in FIG. 7A.
- the "body layer” in FIG. 8 may be replaced with the "protective layer” in FIG. 7A.
- FIG. 8 which shows the functions and effects of the configuration of the second embodiment, it can be seen that the occurrence of cracks and fissures in the power semiconductor element 22 is suppressed compared to the "comparative example".
- Example 3 In FIG. 9, a case is shown in which the power semiconductor element 22 is formed of Si-based single crystal. Rows (i) and (iii) in “Present Invention” in FIG. 9 are the results after wire bonding with the configuration described in the third embodiment.
- the first protective layer 254 and the second protective layer 256 in (i) of the "present invention” in FIG. 9 are made of TiB 2 and both have a thickness of 1.0 ⁇ m, L2d and L2f. .
- the first protective layer 254 and the second protective layer 256 in (iii) of the "present invention” in FIG. 9 are made of ZrB 2 and both have a thickness of 1.0 ⁇ m, L2d and L2f. .
- the metal layer 255 in (i) and (iii) of "the present invention” in FIG. 9 is made of Ti and has a thickness L2e of 0.2 ⁇ m. It should be noted that the thickness L2d of the first protective layer 254, the thickness L2f of the second protective layer 256, and the thickness L2e of the metal layer 255 shown here refer to actual values, and are based on manufacturing considerations. Minor errors and design tolerances are allowed.
- the row (ii) of "the present invention” in FIG. 9 is the result shown by the row (i) of “the present invention” in FIG. 7A.
- the row (iv) in "the present invention” in FIG. 9 is the result shown by the row (ii) in “the present invention” in FIG. 7A. At this time, the "first protective layer” in FIG. 9 may be replaced with the "protective layer” in FIG. 7A.
- FIG. 9 which shows the functions and effects of the configuration of the third embodiment, it can be seen that the occurrence of cracks and fissures in the power semiconductor element 22 is suppressed compared to the "comparative example".
- an inverter is used as an example of the power converter 100, but the power converter 100 is not limited to an inverter.
- the power conversion device 100 may be a device that performs power conversion using the power semiconductor element 22, such as a converter or a combination of an inverter and a converter.
- the power converter 100 is a converter
- an AC voltage is input to the output terminal section 14 from an external input power source (not shown), and the power semiconductor element 22 converts this AC voltage into a DC voltage. Any configuration is sufficient as long as the DC voltage from the input section is output from the input section.
- the power module substrate described in the embodiment can be understood, for example, as follows.
- the power module substrate 12 includes an insulating plate 20, a plurality of surface patterns 21 arranged on a surface 20a of the insulating plate 20, and a surface of one of the plurality of surface patterns 21.
- 21 and a bonding wire 27 connecting the electrode part 23, the electrode part 23 is formed of metal and is provided with a contact layer 24 disposed on the upper surface 22u, and a bonding wire 27 laminated on the contact layer 24.
- the protective layer 25 includes protective layers 25, 25a, 25b, and a connecting layer 26 formed of metal and laminated on the protective layers 25, 25a, 25b in a state connected to the bonding wire 27.
- 25a, 25b include conductive ceramics having higher hardness than the contact layer 24 and the connection layer 26.
- the power module substrate 12 according to the second aspect is the power module substrate 12 according to the first aspect, in which the protective layer 25a is formed of a metal containing Ti, and the contact layer a first metal layer 251 integrally laminated on the first metal layer 251; a main body layer 252 formed of conductive ceramic and integrally laminated on the first metal layer 251; A second metal layer 253 may be provided between the main body layer 252 and the connection layer 26, and the second metal layer 253 is disposed integrally with the main body layer 252 and the connection layer 26.
- the protective layer 25a is formed of a metal containing Ti, and the contact layer a first metal layer 251 integrally laminated on the first metal layer 251; a main body layer 252 formed of conductive ceramic and integrally laminated on the first metal layer 251;
- a second metal layer 253 may be provided between the main body layer 252 and the connection layer 26, and the second metal layer 253 is disposed integrally with the main body layer 252 and the connection layer 26.
- the pressure generated due to ultrasonic waves during wire bonding is absorbed by the second metal layer 253 in the protective layer 25a. Further, the pressure transmitted from the main body layer 252 toward the power semiconductor element 22 is absorbed by the first metal layer 251 in the protective layer 25a.
- the power module substrate 12 according to the third aspect is the power module substrate 12 according to the first aspect, in which the protective layer 25b is formed of conductive ceramic, and the contact layer 24 is A first protective layer 254 integrally laminated, a metal layer 255 formed of a metal containing Ti and integrally laminated on the first protective layer 254, and a metal layer 255 formed of a conductive ceramic.
- a second protective layer 256 may be provided between the connection layer 26 and the metal layer 255 and the connection layer 26 .
- the thickness of the protective layer 25b can be increased while suppressing deformation such as distortion or bending from occurring in the protective layer 25b.
- the power module substrate 12 according to the fourth aspect is the power module substrate 12 according to the first aspect, in which the contact layer 24 has a thickness L1 of 0.05 to 0.5 ⁇ m.
- the protective layer 25 may be formed with a thickness L2 of 0.5 to 2 ⁇ m.
- the power module substrate 12 according to the fifth aspect is the power module substrate 12 according to the second aspect, in which the contact layer 24 has a thickness L1 of 0.05 to 0.5 ⁇ m.
- the first metal layer 251 and the second metal layer 253 have a thickness of 0.1 to 0.5 ⁇ m, L2a and L2c, and the main body layer 252 has a thickness of 0.5 to 2 ⁇ m. It may be formed by L2b.
- the power module substrate 12 according to the sixth aspect is the power module substrate 12 according to the third aspect, wherein the first protective layer 254 and the second protective layer 256 have a thickness of 0.5
- the metal layer 255 may be formed with a thickness L2d and L2f of 0.1 to 0.5 ⁇ m.
- a power module substrate 12 according to a seventh aspect is the power module substrate 12 according to any one of the first to sixth aspects, wherein the conductive ceramic is TiB 2 , It may be formed of any one of ZrB 2 , HfB 2 , TiSi 2 and WSi 2 .
- the power module substrate 12 according to the eighth aspect is the power module substrate 12 according to any one of the first to seventh aspects, wherein the bonding wires 27 are Other surface patterns 21 and the connection layer 26 may be connected.
Landscapes
- Wire Bonding (AREA)
- Inverter Devices (AREA)
Abstract
Description
本願は、2022年6月14日に日本に出願された特願2022-96031号について優先権を主張し、その内容をここに援用する。
電力変換装置は、直流電力を三相交流電力等に変換する装置である。本実施形態の電力変換装置には、例えば、発電所等の系統で用いられるインバータや、電気自動車等の電動機(モータ)の駆動に用いられるインバータ等が挙げられる。
ケーシング1は、電力変換装置100の外殻を成している。本実施形態におけるケーシング1は、アルミニウム(Al)等の金属または合成樹脂等により形成されている。本実施形態におけるケーシング1は、アルミニウムによって形成されており、直方体状を成している。ケーシング1の外面は、互いに背合わせとなるように配置されている二つの側面を有している。
外部入力導体2は、電力変換装置100の外部の電力系統や、バッテリ等の直流電源から供給された直流電力をコンデンサ3へ供給する一対の電気導体(バスバー)である。本実施形態における外部入力導体2は、銅(Cu)等を含む金属により形成されている。外部入力導体2の一端は、コンデンサ3に接続されており、外部入力導体2の他端は、例えば、ケーシング1の入力側側面1aと交差する方向に延びている。
コンデンサ3は、外部入力導体2から入力された電荷を蓄えるとともに、電力変換に伴う電圧変動を抑えるための平滑コンデンサである。コンデンサ3を経由することでリプルが抑えられて平滑化された直流電圧は、電力変換部4へ供給(印加)される。
電力変換部4は、コンデンサ3から入力された電圧を変換する。電力変換部4は、ケーシング1に収容されている。本実施形態における電力変換部4は、三相交流電力を出力するために、U相、V相、及びW相用の出力をそれぞれ担当する三つのパワーモジュール10を有している。したがって、本実施形態における電力変換装置100は、三つのパワーモジュール10を備える三相インバータである。
パワーモジュール10は、入力された電力を変換して出力する装置である。図2及び図3に示すように、パワーモジュール10は、ベースプレート11と、パワーモジュール用基板12と、主端子部13と、出力端子部14と、補強部15と、封止部16とを備えている。
ベースプレート11は、平板状を成す部材である。ベースプレート11は、第一面11aと、この第一面11aの裏側に位置する第二面11bとを有している。即ち、ベースプレート11の第一面11aと第二面11bとは互いに平行を成した状態で背合わせになっている。ベースプレート11の第二面11bは、接合材等(図示省略)を介して、冷却器5に固定されている。本実施形態におけるベースプレート11には、例えば銅が採用される。なお、ベースプレート11には、アルミニウム等の金属が採用されてもよい。
パワーモジュール用基板12は、絶縁板20と、表面パターン21と、パワー半導体素子22と、電極部23と、ボンディングワイヤ27と、裏面パターン28とを有している。
絶縁板20は、平板状を成している。絶縁板20は、表面20aと、この表面20aの裏側に位置する裏面20bとを有している。絶縁板20における表面20aと裏面20bとは互いに平行を成した状態で背合わせになっている。
表面パターン21は、絶縁板20の表面20aに形成された平面状に広がる銅箔(Cu)等のパターンである。表面パターン21は、例えば、絶縁板20の表面20aに接合等で固定された後、エッチング等がなされることにより形成される。
パワー半導体素子22は、電圧や電流をオンオフするスイッチング動作により電力を変換する回路素子である。パワー半導体素子22は、例えば、IGBTやMOSFET等のスイッチング素子である。パワー半導体素子22は、例えばSi系の単結晶や、Si系の単結晶よりも硬度が高いSiC系の単結晶によって形成されている。
電極部23は、パワー半導体素子22の上面22uに配置されている。電極部23は、パワー半導体素子22における電極部分に相当する。本実施形態における電極部23は、三層構造を成している。図4に示すように、電極部23は、コンタクト層24と、保護層25と、接続層26とを有している。
図2から図4に示すように、ボンディングワイヤ27は、表面パターン21と、パワー半導体素子22の上面22uに配置された電極部23とを接続する導線である。本実施形態におけるボンディングワイヤ27は、銅等を含む金属によって形成されており、例えば、200~400μmの径を有している。
裏面パターン28は、絶縁板20の裏面20bに形成された平面状に広がる銅箔等のパターンである。当該裏面パターン28は、接合材Sを介してベースプレート11の第一面11aの中央に固定されている。裏面パターン28は、例えば、絶縁板20の裏面20bに接合等で固定された後、エッチング等がなされることにより形成される。
主端子部13は、コンデンサ3とパワーモジュール用基板12との間で直流電力をやり取りする電気導体(バスバー)である。主端子部13は、銅等を含む金属によって形成されている。主端子部13は、正極としてのP端子13pと、負極としてのN端子13nとを有している。
出力端子部14は、パワー半導体素子22によって変換された後の交流電力を電力変換装置100の外部へ出力するための電気導体(バスバー)である。出力端子部14は、銅等を含む金属により形成されている。出力端子部14の一端は、パワーモジュール用基板12における第三表面パターン21cに接続されている。図1に示すように、出力端子部14の他端は、例えば、ケーシング1の出力側側面1bよりも外側に延びている。出力端子部14の他端には、例えば、モータ等の負荷(交流回転電機)に繋がる電力出力用の配線(図示省略)が接続される。
図2及び図3に示すように、補強部15は、ベースプレート11の第一面11aに固定された状態で、主端子部13及び出力端子部14を機械的に補強する部材である。補強部15は、例えば、合成樹脂材料(絶縁材料)等により形成されている。本実施形態における補強部15を形成する材料には、例えば、PPS(ポリフェニレンサルファイド)を採用することができる。なお、PPS以外の合成樹脂材料を、補強部15に採用してもよい。補強部15は、ベースプレート11の第一面11aに、例えば接着剤等によって固定されている。
封止部16は、ポッティング空間Rp内に配置されている封止部材である。図面中における封止部16は、紙面の都合上、ハッチングで示されている。ポッティング空間Rpには、外部から液状のポッティング材が充填され(ポッティング)、ポッティング空間Rp内で露出する部材を封止する。封止部16は、ポッティング空間Rp内に充填されたポッティング材に所定の温度及び時間がかけられ、このポッティング材が硬化することによって形成される。ポッティング材が硬化することによって形成された封止部16は、ポッティング空間Rp内における各部材間、及び各部材とパワーモジュール10外部の空間とを電気的に絶縁する。
図1に示すように、冷却器5は、主として電力変換部4のパワーモジュール10を冷却する装置である。冷却器5は、ケーシング1に積層されるように設けられており、ケーシング1に固定され一体化されている。図3に示すように、冷却器5は、基部51と、放熱フィン52とを有している。なお、図3中では、基部51及び放熱フィン52は、点線で示されている。
超音波を用いたワイヤボンディングによってボンディングワイヤ27が電極部23に接続される際、この超音波に伴って発生する熱や圧力が電極部23からパワー半導体素子22へ向かう。
次に、本開示に係る電力変換装置100の第二実施形態について図5を参照して説明する。なお、以下に説明する第二実施形態では、上記の第一実施形態と共通する構成については図中に同符号を付してその説明を省略する。第二実施形態では、パワーモジュール用基板12における電極部23の構成が、第一実施形態で説明した電極部23の構成と異なっている。
本実施形態における電極部23は、五層構造を成している。電極部23は、コンタクト層24と、三層に形成された保護層25aと、接続層26とを有している。保護層25aは、第一金属層251と、本体層252と、第二金属層253とを有している。
第二実施形態の構成によれば、超音波に伴って生じる圧力が電極部23の接続層26にかかった際、この圧力が第二金属層253によって吸収される。即ち、ワイヤボンディング時に圧力が本体層252へ伝わることを第二金属層253が抑制する。また、本体層252からパワー半導体素子22に向かって伝わる圧力が第一金属層251によって吸収される。即ち、ワイヤボンディング時に圧力がコンタクト層24を介してパワー半導体素子22に伝わることを第一金属層251が抑制する。
次に、本開示に係る電力変換装置100の第三実施形態について図6を参照して説明する。なお、以下に説明する第三実施形態では、上記の第一実施形態と共通する構成については図中に同符号を付してその説明を省略する。第三実施形態では、パワーモジュール用基板12における電極部23の構成が、第一実施形態で説明した電極部23の構成と異なっている。
本実施形態における電極部23は、五層構造を成している。電極部23は、コンタクト層24と、三層に形成された保護層25bと、接続層26とを有している。保護層25bは、第一保護層254と、金属層255と、第二保護層256とを有している。
第三実施形態の構成によれば、超音波に伴って生じる圧力が電極部23の接続層26にかかった際、この圧力が第二保護層256及び金属層255によって吸収される。即ち、ワイヤボンディング時に圧力が第一保護層254へ伝わることを第二保護層256及び金属層255が抑制する。
以上、本開示の実施形態について図面を参照して詳述したが、具体的な構成は実施形態の構成に限られるものではなく、本開示の要旨を逸脱しない範囲内での構成の付加、省略、置換、及びその他の変更が可能である。
図7A中では、パワー半導体素子22がSi系の単結晶で形成された場合を示している。図7A中の「本発明」における(i)~(v)の行は、第一実施形態で説明した構成でワイヤボンディングをした後の結果であり、図7A中の「比較例」の行は、保護層25に導電性セラミックを用いない場合の構成でワイヤボンディングをした後の結果である。図7A中の「本発明」における保護層25は、TiB2、ZrB2、HfB2、TiSi2、及びWSi2のそれぞれによって形成されるとともに、何れの場合も1.0μmの厚さL2で形成されている。図7A中の「比較例」では、保護層25がTa(タンタル)を含有する金属によって形成されるとともに1.0μmの厚さで形成されている。なお、ここで示した保護層25の厚さL2は、実質的な値を指すものであって、製造上のわずかな誤差や設計上の公差は許容される。
図8中では、パワー半導体素子22がSi系の単結晶で形成された場合を示している。図8中の「本発明」における(i)及び(iii)の行は、第二実施形態で説明した構成でワイヤボンディングした後の結果である。図8中の「本発明」の(i)及び(iii)における第一金属層251及び第二金属層253は、Tiによって形成されるとともに、何れも0.2μmの厚さL2a,L2cで形成されている。図8中の「本発明」の(i)における本体層252は、HfB2によって形成されるとともに1.0μmの厚さL2bで形成されている。図8中の「本発明」の(iii)における本体層252は、TiSi2によって形成されるとともに1.0μmの厚さL2bで形成されている。なお、ここで示した第一金属層251の厚さL2a、第二金属層253の厚さL2c、及び本体層252の厚さL2bは、実質的な値を指すものであって、製造上のわずかな誤差や設計上の公差は許容される。
図8中の「本発明」における(ii)の行は、図7A中の「本発明」における(iii)の行が示す結果である。図8中の「本発明」における(iv)の行は、図7A中の「本発明」における(iv)の行が示す結果である。この際、図8中の「本体層」を、図7A中の「保護層」に読み替えればよい。
図9中では、パワー半導体素子22がSi系の単結晶で形成された場合を示している。図9中の「本発明」における(i)及び(iii)の行は、第三実施形態で説明した構成でワイヤボンディングした後の結果である。図9中の「本発明」の(i)における第一保護層254及び第二保護層256は、TiB2によって形成されるとともに、何れも1.0μmの厚さL2d,L2fで形成されている。図9中の「本発明」の(iii)における第一保護層254及び第二保護層256は、ZrB2によって形成されるとともに、何れも1.0μmの厚さL2d,L2fで形成されている。図9中の「本発明」の(i)及び(iii)における金属層255は、Tiによって形成されるとともに0.2μmの厚さL2eで形成されている。なお、ここで示した第一保護層254の厚さL2d、第二保護層256の厚さL2f、及び金属層255の厚さL2eは、実質的な値を指すものであって、製造上のわずかな誤差や設計上の公差は許容される。
図9中の「本発明」における(ii)の行は、図7A中の「本発明」における(i)の行が示す結果である。図9中の「本発明」における(iv)の行は、図7A中の「本発明」における(ii)の行が示す結果である。この際、図9中の「第一保護層」を、図7A中の「保護層」に読み替えればよい。
実施形態に記載のパワーモジュール用基板は、例えば以下のように把握される。
Claims (8)
- 絶縁板と、
前記絶縁板の表面に配置された複数の表面パターンと、
複数の前記表面パターンのうち一の表面パターンに接続されたパワー半導体素子と、
前記パワー半導体素子の上面に配置された電極部と、
複数の前記表面パターンのうち前記一の表面パターンとは異なる他の表面パターンと、前記電極部とを接続するボンディングワイヤと、
を備え、
前記電極部は、
金属により形成され、前記上面に配置されたコンタクト層と、
前記コンタクト層に積層された保護層と、
金属により形成され、前記ボンディングワイヤに接続された状態で、前記保護層に積層された接続層と、
を有し、
前記保護層は、硬度が前記コンタクト層及び前記接続層よりも高い導電性セラミックを含む
パワーモジュール用基板。 - 前記保護層は、
Tiを含有する金属により形成され、前記コンタクト層に一体に積層された第一金属層と、
導電性セラミックにより形成され、前記第一金属層に一体に積層された本体層と、
Tiを含有する金属により形成され、前記本体層と前記接続層との間でこれら本体層及び接続層と一体に配置された第二金属層と、
を有する
請求項1に記載のパワーモジュール用基板。 - 前記保護層は、
導電性セラミックにより形成され、前記コンタクト層に一体に積層された第一保護層と、
Tiを含有する金属により形成され、前記第一保護層に一体に積層された金属層と、
導電性セラミックにより形成され、前記金属層と前記接続層との間でこれら金属層及び接続層と一体に配置された第二保護層と、
を有する
請求項1に記載のパワーモジュール用基板。 - 前記コンタクト層は、0.05~0.5μmの厚さで形成されており、
前記保護層は、0.5~2μmの厚さで形成されている
請求項1に記載のパワーモジュール用基板。 - 前記コンタクト層は、0.05~0.5μmの厚さで形成されており、
前記第一金属層及び前記第二金属層は、0.1~0.5μmの厚さで形成され、
前記本体層は、0.5~2μmの厚さで形成されている
請求項2に記載のパワーモジュール用基板。 - 前記第一保護層及び前記第二保護層は、0.5~2μmの厚さで形成されており、
前記金属層は、0.1~0.5μmの厚さで形成されている
請求項3に記載のパワーモジュール用基板。 - 前記導電性セラミックは、TiB2、ZrB2、HfB2、TiSi2及びWSi2の何れか一つによって形成されている
請求項1から6の何れか一項に記載のパワーモジュール用基板。 - 前記ボンディングワイヤは、複数が前記他の表面パターンと前記接続層とを接続している
請求項1から6の何れか一項に記載のパワーモジュール用基板。
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07130790A (ja) * | 1993-11-05 | 1995-05-19 | Asahi Kasei Denshi Kk | 半導体装置の電極構造 |
| JP2014082367A (ja) * | 2012-10-17 | 2014-05-08 | Nippon Micrometal Corp | パワー半導体装置 |
| JP2017092168A (ja) * | 2015-11-06 | 2017-05-25 | 株式会社日立製作所 | 半導体モジュール及び電力変換装置 |
| JP2018037684A (ja) * | 2015-03-10 | 2018-03-08 | 三菱電機株式会社 | パワー半導体装置 |
| JP2020167869A (ja) * | 2019-03-29 | 2020-10-08 | 株式会社富士通ゼネラル | パワーモジュール |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4127641B2 (ja) * | 2001-10-23 | 2008-07-30 | 三菱電機株式会社 | 半導体装置 |
| JP2022096031A (ja) | 2020-12-17 | 2022-06-29 | ソニーセミコンダクタソリューションズ株式会社 | 画像処理装置、及び画像処理方法 |
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-
2023
- 2023-02-08 DE DE112023001951.7T patent/DE112023001951T5/de active Pending
- 2023-02-08 US US18/873,829 patent/US20250364453A1/en active Pending
- 2023-02-08 WO PCT/JP2023/004096 patent/WO2023243138A1/ja not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07130790A (ja) * | 1993-11-05 | 1995-05-19 | Asahi Kasei Denshi Kk | 半導体装置の電極構造 |
| JP2014082367A (ja) * | 2012-10-17 | 2014-05-08 | Nippon Micrometal Corp | パワー半導体装置 |
| JP2018037684A (ja) * | 2015-03-10 | 2018-03-08 | 三菱電機株式会社 | パワー半導体装置 |
| JP2017092168A (ja) * | 2015-11-06 | 2017-05-25 | 株式会社日立製作所 | 半導体モジュール及び電力変換装置 |
| JP2020167869A (ja) * | 2019-03-29 | 2020-10-08 | 株式会社富士通ゼネラル | パワーモジュール |
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|---|---|
| JP2023182429A (ja) | 2023-12-26 |
| DE112023001951T5 (de) | 2025-02-27 |
| US20250364453A1 (en) | 2025-11-27 |
| JP7847481B2 (ja) | 2026-04-17 |
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