WO2023236501A1 - 补偿电路、控制芯片和显示装置 - Google Patents

补偿电路、控制芯片和显示装置 Download PDF

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Publication number
WO2023236501A1
WO2023236501A1 PCT/CN2022/140830 CN2022140830W WO2023236501A1 WO 2023236501 A1 WO2023236501 A1 WO 2023236501A1 CN 2022140830 W CN2022140830 W CN 2022140830W WO 2023236501 A1 WO2023236501 A1 WO 2023236501A1
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Prior art keywords
thin film
film transistor
electrode
compensation circuit
control
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PCT/CN2022/140830
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English (en)
French (fr)
Inventor
周仁杰
袁海江
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惠科股份有限公司
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Priority to KR1020237024614A priority Critical patent/KR20230170640A/ko
Publication of WO2023236501A1 publication Critical patent/WO2023236501A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0833—Several active elements per pixel in active matrix panels forming a linear amplifier or follower
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Definitions

  • This application relates to the field of display technology, and specifically to a compensation circuit, a control chip and a display device.
  • TFT Transistor
  • One of the purposes of this application is to provide a compensation circuit, a control chip and a display device to ensure the luminous rate of the OLED panel.
  • the first aspect of the embodiment of the present application provides a compensation circuit for use in a driving circuit.
  • the driving circuit includes a first thin film transistor, a second thin film transistor, an organic light emitting diode and a capacitor.
  • the control electrode of the first thin film transistor is connected to the control electrode of the first thin film transistor.
  • the scan lines are connected, the first electrode of the first thin film transistor is connected to the data line, the second electrode of the first thin film transistor is connected to the control electrode of the second thin film transistor, and the second electrode of the second thin film transistor is connected to the data line.
  • the first electrode of the second thin film transistor is connected to the power supply terminal, and the negative electrode of the organic light emitting diode is grounded.
  • One end of the capacitor is connected to the second electrode of the first thin film transistor.
  • the other end of the capacitor is connected to the negative electrode of the organic light-emitting diode; it is characterized in that the compensation circuit includes a third thin film transistor and a detection module;
  • the control electrode of the third thin film transistor is used to be connected to the second electrode of the second thin film transistor, and the first electrode of the third thin film transistor is used to be connected to the control electrode of the second thin film transistor,
  • the detection module is respectively connected to the second pole of the third thin film transistor, the scan line and the data line, and the detection module is used to detect the output of the adjacent second pole of the third thin film transistor. When there are two voltage signals, they are turned off and on respectively.
  • the first thin film transistor in the process of the scanning line inputting high-level signals to the driving circuit twice, when the scanning line in the driving circuit receives the high-level signal for the first time, the first thin film transistor
  • the data line respectively charges the capacitor and applies a voltage to the control electrode of the second thin film transistor, thereby causing the second thin film transistor to turn on.
  • the organic light-emitting diode After the second thin film transistor is turned on, the organic light-emitting diode emits light, and the second electrode of the second thin film transistor applies a voltage (i.e., VDD) to the control electrode of the third thin film transistor, causing the third thin film transistor to turn on.
  • VDD voltage
  • the first electrode of the three thin film transistors collects the gate voltage Vth of the control electrode of the third thin film transistor, and transmits the gate voltage Vth to the detection module through the second electrode of the third thin film transistor. After receiving the voltage signal (ie, gate voltage Vth) transmitted from the second electrode of the third thin film transistor, the detection module turns on to transmit the gate voltage Vth to the data line.
  • the connection circuit of the compensation circuit is simple and ensures the luminous rate of the OLED panel.
  • a second aspect of the embodiment of the present application provides a control chip.
  • the control chip is connected to the scanning lines in the display panel and is used to input scanning signals to the scanning lines.
  • the control chip includes any of the above optional methods. the compensation circuit described above.
  • a third aspect of the embodiments of the present application provides a display device, which includes the control chip described in any of the above optional methods.
  • Figure 1 is a schematic diagram of a driving circuit provided by an embodiment of the present application.
  • Figure 2 is a schematic diagram of a compensation circuit in related art
  • Figure 3 is a schematic diagram of a compensation circuit provided by an embodiment of the present application.
  • Figure 4 is another schematic diagram of a compensation circuit provided by an embodiment of the present application.
  • Figure 5 is a schematic diagram of another example of a compensation circuit provided by an embodiment of the present application.
  • Figure 6 is a schematic diagram of another example of a compensation circuit provided by an embodiment of the present application.
  • Figure 7 is a schematic diagram of another example of a compensation circuit provided by an embodiment of the present application.
  • FIG. 8 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • the 2T1C drive circuit is often used in OLED panels to control OLED light emission.
  • the 2T1C drive circuit generally includes two thin film transistors, a capacitor and organic light-emitting diodes.
  • the driving circuit 1 may include a first thin film transistor T1, a second thin film transistor T2, an organic light emitting diode OLED and a capacitor C.
  • the control electrode T1a of the first thin film transistor T1 is connected to the scan line Scan.
  • a first electrode T1b of a thin film transistor T1 is connected to the data line Data
  • a second electrode T1c of the first thin film transistor T1 is connected to the control electrode T2a of the second thin film transistor T2
  • a second electrode T2c of the second thin film transistor T2 is connected to the organic light emitting device.
  • the anode of the diode is connected
  • the first electrode T2b of the second thin film transistor T2 is connected to VDD (ie, the power terminal)
  • the cathode of the organic light-emitting diode is connected to the ground.
  • One end of the capacitor C is connected to the second electrode T1c of the first thin film transistor T2, and the other end of the capacitor is connected to the cathode of the organic light emitting diode.
  • the first thin film transistor T1 When the scan line Scan in the driving circuit 1 receives a high-level signal for the first time, the first thin film transistor T1 is turned on, the data line Data can charge the capacitor C, and apply a voltage to the control electrode T2a of the second thin film transistor T2 . After the control electrode T2a of the second thin film transistor T2 receives the voltage of the data line Data, the second thin film transistor T2 is turned on, and the second electrode T2 of the second thin film transistor T2 applies a voltage to the anode of the organic light-emitting diode, so that the organic light-emitting diode can glow.
  • the first thin film transistor T1 When the scan line Scan receives a low-level signal for the first time, the first thin film transistor T1 is turned off, and the data line Data cannot apply voltage to the control electrode T2a of the second thin film transistor T2. At this time, the capacitor C is discharged, and the capacitor C is the first The control electrode T2a of the two thin film transistors T2 provides voltage (maintains conduction) to cause the organic light emitting diode to emit light.
  • the threshold voltage of the TFT will drift under long-term gate bias, and the voltage applied to the control electrode T2a of the second thin film transistor T2 when the capacitor is discharged may be less than the threshold voltage after the drift, the luminous brightness of the OLED will decrease, thereby affecting the OLED display effect.
  • this application does not place any specific restrictions on the structure of the driving circuit 1, as long as it is a driving circuit 1 having a first thin film transistor, a second thin film transistor, an organic light emitting diode and a capacitor.
  • a P-type 2T1C i.e. two thin film transistors and a capacitor
  • the compensation circuit is shown in Figure 2 and includes a first thin film transistor T1-1, a second thin film transistor T1-2, Three thin film transistors T1-3 and capacitor C2.
  • the control electrode of the first thin film transistor T1-1, the second thin film transistor T1-2 and the third thin film transistor T1-3 are connected to the first scan line Scan1(n), the second scan line Scan2(n) and the third scan line respectively.
  • the first electrode of the first thin film transistor T1-1 is connected to the ground
  • the second electrode of the first thin film transistor T1-1 is connected to one end of the capacitor C2
  • the first electrode of the third thin film transistor T1-3 is connected to the ground
  • the first electrode of the first thin film transistor T1-1 is connected to the ground.
  • the second electrode of the three thin film transistor T1-3 is connected to the other end of the capacitor C2
  • the first electrode of the second thin film transistor T1-2 is connected to the internal driving circuit
  • the second electrode of the second thin film transistor T1-2 is connected to the other end of the capacitor C2. connected.
  • the ground capacitor C2 When the scan line receives a low-level signal, the ground capacitor C2 performs voltage compensation for the capacitor C1, thereby avoiding threshold voltage drift and causing damage to the luminescence of the OLED. Influence. In this way, multiple transistors, scan lines and capacitors need to be added to the display panel. As can be seen from the figure, the circuits are complex, which greatly increases the wiring of the panel, making the area of a single OLED larger, which is not beautiful.
  • This application provides a compensation circuit, which is applied to the drive circuit 1.
  • the compensation circuit can be set on an external chip, the connection line is simple, and it solves the problem of low luminous rate of the OLED panel due to the threshold voltage drift of the OLED panel, ensuring that The luminous rate of the OLED panel.
  • the compensation circuit 2 includes a third thin film transistor T3 and a detection module 201.
  • the control electrode T3a of the third thin film transistor T3 is used to Connected to the second electrode T2c of the second thin film transistor T2, the first electrode T3b of the third thin film transistor T3 is used to connect to the control electrode T2a of the second thin film transistor T2, and the detection module 201 is respectively connected to the second electrode of the third thin film transistor T3.
  • the pole T3c, the scan line Scan and the data line Data are connected, and the detection module 201 is configured to turn off and on respectively when receiving two adjacent voltage signals output by the second pole T3c of the third thin film transistor T3.
  • the first thin film transistor T1 When the scan line Scan in the driving circuit 1 receives a high-level signal for the first time, the first thin film transistor T1 is turned on, and the data line Data charges the capacitor C and applies voltage to the control electrode T2a of the second thin film transistor T2 respectively. , thereby causing the second thin film transistor T2 to be turned on.
  • the organic light-emitting diode emits light
  • the second electrode T2c of the second thin film transistor T2 applies a voltage (ie, Vdd) to the control electrode T3a of the third thin film transistor T3, causing the third thin film transistor T3 to
  • the first electrode T3b of the third thin film transistor T3 collects the gate voltage Vth of the control electrode T2a of the second thin film transistor T2, and transmits the gate voltage Vth through the second electrode T3c of the third thin film transistor T3. to the detection module 201.
  • the detection module 201 receives the gate voltage Vth, the detection module 201 is turned on and outputs the gate voltage Vth to the data line Data.
  • the first thin film transistor T1 When the scan line Scan in the driving circuit 1 receives a low-level signal for the first time, the first thin film transistor T1 is turned off, and the capacitor C is discharged to the control electrode T2a of the second thin film transistor T2, so that the second thin film transistor T2 remains on. , so that the organic light-emitting diode can maintain light emission.
  • the first thin film transistor T1 is turned on, and the data line Data charges the data voltage Vdata and the gate voltage Vth into the capacitor C, and charges the data voltage Vdata and the gate voltage Vth into the capacitor C.
  • the control electrode T2a of the second thin film transistor T2 applies a voltage, thereby causing the second thin film transistor T2 to be turned on.
  • the organic light-emitting diode is caused to emit light, and the second electrode T2c of the second thin film transistor T2 will apply a voltage to the control electrode T3a of the third thin film transistor T3, causing the third thin film transistor T3 to be turned on.
  • the first electrode of the third thin film transistor T3 The electrode T3b collects the gate voltage Vth of the control electrode T2a of the second thin film transistor T2, and transmits the gate voltage Vth to the detection module 201 through the second electrode T3c of the third thin film transistor T3. After the detection module 201 receives the gate voltage Vth, the detection module 201 turns off and does not apply voltage to the data line Data.
  • the first thin film transistor T1 When the scan line Scan receives a low-level signal for the second time, the first thin film transistor T1 is turned off and the capacitor C is discharged. Since the capacitor C at this time contains the data voltage and the gate voltage Vth that compensates Vdata, the second thin film transistor T1 is turned off.
  • the thin film transistor T2 can also enable the organic light-emitting diode to achieve the brightness of the high-level signal under low-level signals, ensuring the luminous rate of the organic light-emitting diodes. In this way, in the state of high and low level signal switching, the problem of threshold voltage drift caused by long-term gate bias is solved, and the luminous rate is also guaranteed under low level signals.
  • the detection module 201 When the scan line Scan receives the third high-level signal, the detection module 201 turns on and outputs the threshold voltage to the data line Data. When the detection module 201 receives two adjacent high-level signals, it turns off and on respectively. This working state circulates repeatedly.
  • this application can design a detection module based on a T flip-flop.
  • the detection module may include a resistor R, a T flip-flop, and a fourth thin film transistor T4.
  • One end of the resistor R ie, the R1 end as shown in Figure 4
  • the clock signal receiving end of the T flip-flop ie, the C1 end as shown in Figure 4
  • the other end of the resistor R ie, as shown in Figure 4
  • the R2 terminal shown in Figure 4 is connected to the scan line Scan.
  • the second data signal input terminal of the T flip-flop (the T terminal shown in Figure 4) is used to input a digital signal.
  • the non-inverting output terminal of the T flip-flop When the second data signal input terminal receives the digital signal "0 ", the non-inverting output terminal of the T flip-flop (Q terminal as shown in Figure 4) outputs a low level signal. When the second data signal input terminal receives the digital signal "1", the Q terminal of the T flip-flop outputs a high level signal. flat signal.
  • the Q terminal of the T flip-flop is connected to the control electrode T4a of the fourth thin film transistor T4, the second electrode T4b of the fourth thin film transistor T4 is connected to the second electrode T3c of the third thin film transistor T3, and the first electrode of the fourth thin film transistor T4 T4c is connected to the data line Data.
  • the T flip-flop may be a falling edge T flip-flop.
  • the T terminal in the falling edge T flip-flop is always high level.
  • the C1 terminal of the falling edge T flip-flop detects two adjacent falling edge signals, it turns off and on respectively.
  • the fourth thin film transistor T4 is turned off and on accordingly.
  • the detection module 201 receives the high-level signal (i.e., the clock control signal) output by the scan line Scan.
  • the T terminal receives the digital signal “1”
  • the falling edge T flip-flop outputs a high level, causing the fourth thin film transistor T4 to turn on, thereby causing the detection module 201 to output the gate voltage Vth to the data line Data.
  • the first thin film transistor T1 When the scan line Scan in the driving circuit 1 receives a low-level signal for the first time, the first thin film transistor T1 is turned off, and the capacitor C is discharged to the control electrode T2a of the second thin film transistor T2, thereby causing the organic light-emitting diode to emit light.
  • the C1 terminal of the T flip-flop receives the clock control signal.
  • the digital signal "1" is received at the T terminal, the falling edge of the T flip-flop The Q terminal outputs a low level.
  • the fourth thin film transistor T4 turns off, so that the first electrode T4b of the fourth thin film transistor T4 does not output voltage to the data line Data.
  • the detection module 201 can respectively turn off and turn on the fourth thin film transistor T4 during two adjacent high-level signals, that is, control the compensated gate voltage Vth.
  • the compensation circuit 2 will always apply a gate voltage Vth to the data line Data, thereby causing the compensated gate voltage Vth to keep increasing, eventually causing the OLED to malfunction. Panel failure.
  • the compensation circuit 2 may also include a voltage follower (ie, A shown in FIG. 5 ).
  • the voltage follower is connected in series between the third thin film transistor T3 and the detection module 201 .
  • the voltage follower The non-inverting input terminal of A (i.e. the “+” terminal of A shown in Figure 5) is connected to the second pole T3c of the third thin film transistor T3, and the output terminal of the voltage follower A is connected to the detection module 201 and the reverse direction of the voltage follower respectively.
  • the input terminal that is, the "-" terminal of A shown in Figure 5) is connected. Setting the voltage follower A in the compensation circuit 2 can improve the load carrying capacity of the compensation circuit 2 and reduce the problem of gate voltage loss during transmission.
  • the compensation circuit 2 also includes a first control module 202.
  • the first control module 202 is connected to the second pole T2c of the second thin film transistor T2 and the second control module respectively.
  • the control module 202 uses The second control module is controlled to alternately output a high level signal and a low level signal according to the signal output by the second pole T2c of the second thin film transistor T2, and the second control module is used to alternately input the high level signal to the scan line Scan. and low level signals. In this way, there is no need to add additional pull-up resistors and pull-down resistors to control the high and low level conversion respectively, and one control module 202 can realize the high and low level conversion.
  • the first control module 202 may include a comparator as shown in Figure 7 (ie, B as shown in Figure 7), a D flip-flop, an inverter (ie, E as shown in Figure 5), a first metal oxidation a physical semiconductor field effect transistor M1 and a second metal oxide semiconductor field effect transistor M2.
  • the non-inverting input terminal of comparator B i.e. the "+" terminal of B shown in Figure 7
  • the inverting input terminal of comparator B i.e. the "+" terminal of B shown in Figure 7
  • the inverting input terminal of comparator B i.e.
  • the data signal input terminal of the D flip-flop i.e., the D terminal shown in Figure 7
  • the positive-phase signal output terminal of the D flip-flop i.e., the Q terminal shown in Figure 7
  • the data signal input terminal of the D flip-flop is connected to the output terminal of the inverter E
  • the positive-phase signal output terminal of the D flip-flop i.e., the Q terminal shown in Figure 7
  • the inverting The input terminal of the device E, the control electrode M1a of the first metal oxide semiconductor field effect transistor M1 and the control electrode M2a of the second metal oxide semiconductor field effect transistor M2 are connected, and the second metal oxide semiconductor field effect transistor M1a
  • the pole M1c and the second pole M2c of the second metal oxide semiconductor field effect transistor are respectively connected to the second control module.
  • the comparator can be a zero-crossing voltage comparator.
  • the D flip-flop can be a rising edge D flip-flop.
  • the scan line Scan receives a high-level signal for the first time
  • the first thin film transistor T1 is turned on
  • the data line Data charges the capacitor C and applies a voltage to the control electrode T2a of the second thin film transistor T2, respectively, so that The second thin film transistor T2 is turned on.
  • the organic light-emitting diode emits light
  • the second electrode T2c of the second thin film transistor T2 applies a voltage to the non-inverting input terminal (+) of the comparator B. At this time, the voltage is greater than that of the comparator B.
  • the second metal oxide semiconductor field effect transistor M2 is turned off, so that the first metal oxide semiconductor field effect transistor M1 outputs a high level signal to the second control module 203, causing the second control module 203 to output a high level signal to the scan LineScan.
  • the positive-phase signal output of the D flip-flop After the terminal outputs a high level, the high level inputs a digital signal "0" to the data signal input terminal of the D flip-flop through the inverter E, causing the positive phase signal output terminal of the D flip-flop to output a low level, and the second metal is oxidized
  • the control electrode M2a of the physical semiconductor field effect transistor M2 receives the high level, the second metal oxide semiconductor field effect transistor M2 is turned on, and the first metal oxide semiconductor field effect transistor M1 is turned off, thereby causing the second metal oxide semiconductor field effect transistor M1 to be turned off.
  • the field effect transistor M2 outputs a low level signal to the second control module 203, thereby controlling the scan line Scan.
  • the D flip-flop can always remain in the switching mode of receiving data signals "0" and "1", thereby realizing the conversion of high and low levels by a first control module 202.
  • the first thin film transistor T1, the second thin film transistor T2, the third thin film transistor T3 and the fourth thin film transistor T4 provided in the embodiment of the present application may be the same. of transistors.
  • Oxide TFT an oxide thin-film transistor-TFT (Oxide TFT) can be used.
  • Oxide TFT has high carrier mobility, low preparation temperature, and good electrical uniformity.
  • Embodiment 2 of the present application also provides a control chip.
  • the control chip is connected to the scanning lines of the display panel and is used to input scanning signals to the scanning lines.
  • the control chip includes the compensation circuit provided in Embodiment 1.
  • the control chip can design a compensation circuit 2.
  • the first electrode T3b of the third thin film transistor T3 in the compensation circuit 2 is connected to the control electrode T2a of the second thin film transistor T2 in the driving circuit corresponding to each OLED in the display panel. , to perform threshold voltage compensation on the display panel as a whole.
  • control chip can design multiple compensation circuits 2, each compensation circuit corresponding to a display area in the display panel.
  • the display panel is divided into 9 areas, then the control chip can design 9 compensation circuits 2.
  • the first electrode T3b of the third thin film transistor T3 in each compensation circuit 2 is connected to the corresponding display area.
  • the control electrode T2a of the second thin film transistor T2 in the driving circuit corresponding to each OLED is connected to perform threshold voltage compensation on the corresponding area.
  • the compensation circuit 2 of the driving circuit corresponding to each OLED in the display panel can also be designed in the control chip. That is, each OLED is divided into a display area.
  • Embodiment 3 of the present application further provides a display device.
  • the display device includes the control chip provided in Embodiment 2.

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Abstract

一种补偿电路（2）、控制芯片和显示装置。一种补偿电路（2），应用于驱动电路（1），驱动电路（1）包括第一薄膜晶体管（T1）、第二薄膜晶体管（T2）、有机发光二极管（OLED）和电容（C）。补偿电路（2）包括第三薄膜晶体管（T3）和检测模块（201）。第三薄膜晶体管（T3）的控制极（T3a）用于与第二薄膜晶体管（T2）的第二极（T2c）相连，第三薄膜晶体管（T3）的第一极（T3b）用于与第二薄膜晶体管（T2）的控制极（T2a）相连，检测模块（201）分别与第三薄膜晶体管（T3）的第二极（T3c）、扫描线（Scan）和数据线（Data）连接，检测模块（201）用于在接收第三薄膜晶体管（T3）的第二极（T3c）输出相邻两个电压信号时，分别关断和导通。补偿电路（2）连接线路简单，且解决了由于OLED面板存在阈值电压漂移而产生的OLED面板发光率较低的问题，保证了OLED面板的发光率。

Description

补偿电路、控制芯片和显示装置
本申请要求于2022年6月9日在中国专利局提交的申请号为CN202210645866.2、发明名称为“补偿电路、控制芯片和显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，具体涉及一种补偿电路、控制芯片和显示装置。
 背景技术
有机电致发光显示（Organic Light-Emitting Diode，OLED）器作为新一代的显示器件，因其具备自发光、快速响应等优点而被广泛推崇。目前OLED中常用薄膜晶体管（Thin Film Transistor，TFT）作为重要的电子器件，但是在使用过程中，TFT存在一个问题，即TFT在长时间栅极偏压下阈值电压会发生漂移，而OLED的发光亮度是由该TFT的电压决定的，因此，TFT阈值电压的漂移会使得OLED的发光亮度下降，从而影响OLED的使用寿命。
 技术问题
本申请的目的之一在于：提供一种补偿电路、控制芯片和显示装置，以保证OLED面板的发光率。
技术方案
本申请实施例的第一方面提供一种补偿电路，应用于驱动电路，所述驱动电路包括第一薄膜晶体管、第二薄膜晶体管、有机发光二极管和电容，所述第一薄膜晶体管的控制极与扫描线相连，所述第一薄膜晶体管的第一极与数据线相连，所述第一薄膜晶体管的第二极与所述第二薄膜晶体管的控制极相连，所述第二薄膜晶体管的第二极与所述有机发光二极管的正极连接，所述第二薄膜晶体管的第一极与电源端连接，所述有机发光二极管的负极接地；所述电容的一端与所述第一薄膜晶体管的第二极相连，所述电容的另一端与所述有机发光二极管的负极相连；其特征在于，所述补偿电路包括第三薄膜晶体管和检测模块；
所述第三薄膜晶体管的控制极用于与所述第二薄膜晶体管的第二极相连，所述第三薄膜晶体管的第一极用于与所述第二薄膜晶体管的所述控制极相连，所述检测模块分别与所述第三薄膜晶体管的第二极、所述扫描线和所述数据线连接，所述检测模块用于在接收所述第三薄膜晶体管的第二极输出的相邻两个电压信号时，分别进行关断和导通。
依据本申请实施例所提供的补偿电路，在扫描线向驱动电路输入两次高电平信号的过程中，当驱动电路中的扫描线第一次接收到高电平信号时，第一薄膜晶体管导通，数据线分别向电容进行充电和对第二薄膜晶体管的控制极施加电压，从而使得第二薄膜晶体管导通。第二薄膜晶体管导通后，使得有机发光二极管发光，且第二薄膜晶体管的第二极会向第三薄膜晶体管的控制极施加电压（即VDD），使得第三薄膜晶体管导通，此时第三薄膜晶体管的第一极采集第三薄膜晶体管的控制极的栅极电压Vth，并将该栅极电压Vth通过第三薄膜晶体管的第二极传输至检测模块。检测模块在接收到第三薄膜晶体管的第二极传输的电压信号（即栅极电压Vth）后，检测模块导通，以将栅极电压Vth传输给数据线。补偿电路的连接线路简单，且保证了OLED面板的发光率。
本申请实施例的第二方面提供一种控制芯片，所述控制芯片与显示面板中的扫描线相连，用于向所述扫描线输入扫描信号，所述控制芯片包括上述任一可选方式所述的补偿电路。
本申请实施例的第三方面提供一种显示装置，所述显示装置包括上述任一可选方式所述的控制芯片。
 附图说明
图1是本申请实施例提供的一种驱动电路的示意图；
图2是相关技术中补偿电路的示意图；
图3是本申请实施例提供的一种补偿电路的一例示意图；
图4是本申请实施例提供的一种补偿电路的又一例示意图；
图5是本申请实施例提供的一种补偿电路的再一例示意图；
图6是本申请实施例提供的一种补偿电路的另外一例示意图；
图7是本申请实施例提供的一种补偿电路的其他一例示意图；
图8是本申请实施例提供的一种显示面板的结构示意图。
具体实施方式
以下描述中，为了说明而不是为了限定，提出了诸如特定系统结构、技术之类的具体细节，以便透彻理解本申请实施例。然而，本领域的技术人员应当清楚，在没有这些具体细节的其它实施例中也可以实现本申请。在其它情况中，省略对众所周知的系统、装置及电路的详细说明，以免不必要的细节妨碍本申请的描述。
OLED面板中常采用2T1C驱动电路控制OLED发光。2T1C驱动电路一般包括两个薄膜晶体管、一个电容和有机发光二极管。示例性，如图1所示，驱动电路1可以包括第一薄膜晶体管T1、第二薄膜晶体管T2、有机发光二极管OLED和电容C，第一薄膜晶体管T1的控制极T1a与扫描线Scan相连，第一薄膜晶体管T1的第一极T1b与数据线Data相连，第一薄膜晶体管T1的第二极T1c与第二薄膜晶体管T2的控制极T2a相连，第二薄膜晶体管T2的第二极T2c与有机发光二极管的正极连接，第二薄膜晶体管T2的第一极T2b与VDD（即电源端）连接，有机发光二极管的负极接地。电容C的一端与第一薄膜晶体管T2的第二极T1c相连，电容的另一端与有机发光二极管的负极相连。
当驱动电路1中的扫描线Scan第一次接收到高电平信号时，第一薄膜晶体管T1导通，数据线Data可以向电容C充电，并向第二薄膜晶体管T2的控制极T2a施加电压。第二薄膜晶体管T2的控制极T2a接收到数据线Data的电压后，第二薄膜晶体管T2导通，第二薄膜晶体管T2的第二极T2向有机发光二极管的正极施加电压，使得有机发光二极管可以发光。
扫描线Scan第一次接收到低电平信号时，第一薄膜晶体管T1截止，数据线Data不能向第二薄膜晶体管T2的控制极T2a施加电压，此时，电容C放电，由电容C为第二薄膜晶体管T2的控制极T2a提供电压，（维持导通）以使得有机发光二极管发光。
由于TFT在长时间栅极偏压下阈值电压会发生漂移，而电容放电时给第二薄膜晶体管T2的控制极T2a施加的电压可能小于漂移后的阈值电压，使得OLED的发光亮度下降，进而影响OLED的显示效果。
应理解，本申请对驱动电路1的结构不做特定的限制，只要是有第一薄膜晶体管、第二薄膜晶体管、有机发光二极管和电容的驱动电路1皆可。例如，P型的2T1C（即两个薄膜晶体管和一个电容）电路。
相关技术中，存在一种解决方式，在显示面板中设置与驱动电路连接的补偿电路，该补偿电路如图2所示，包括第一薄膜晶体管T1-1、第二薄膜晶体管T1-2、第三薄膜晶体管T1-3、电容C2。第一薄膜晶体管T1-1的控制极、第二薄膜晶体管T1-2和第三薄膜晶体管T1-3分别与第一扫描线Scan1（n）、第二扫描线Scan2（n）和第三扫描线Scan3（n）相连，第一薄膜晶体管T1-1的第一极接地，第一薄膜晶体管T1-1的第二极与电容C2一端相连，第三薄膜晶体管T1-3的第一极接地，第三薄膜晶体管T1-3的第二极与电容C2另一端相连，第二薄膜晶体管T1-2的第一极与内部驱动电路相连，第二薄膜晶体管T1-2的第二极与电容C2另一端相连。当扫描线接收到高电平信号时，为电容C1和电容C2充电，当扫描线接收到低电平时，由地电容C2为电容C1进行电压补偿，从而避免阈值电压漂移从而对OLED的发光造成影响。而如此，需要在显示面板上增加多个晶体管、扫描线以及电容，由图可见线路复杂，极大地增加了面板的布线，使得单个OLED的面积增大，并不美观。
实施例一
本申请提供一种补偿电路，应用于驱动电路1，补偿电路可以设置在外部芯片上，连接线路简单，且解决了由于OLED面板存在阈值电压漂移而产生的OLED面板发光率较低的问题，保证了OLED面板的发光率。
下面结合附图对本申请提供的补偿电路2进行示例性的介绍。
以图1所示驱动电路1为例，基于图1，如图3所示，本申请提供的补偿电路2包括第三薄膜晶体管T3和检测模块201，第三薄膜晶体管T3的控制极T3a用于与第二薄膜晶体管T2的第二极T2c相连，第三薄膜晶体管T3的第一极T3b用于与第二薄膜晶体管T2的控制极T2a相连，检测模块201分别与第三薄膜晶体管T3的第二极T3c、扫描线Scan和数据线Data连接，检测模块201用于在接收第三薄膜晶体管T3的第二极T3c输出的相邻两个电压信号时，分别进行关断和导通。
当驱动电路1中的扫描线Scan第一次接收到高电平信号时，第一薄膜晶体管T1导通，数据线Data分别向电容C进行充电和对第二薄膜晶体管T2的控制极T2a施加电压，从而使得第二薄膜晶体管T2导通。第二薄膜晶体管T2导通后，使得有机发光二极管发光，且第二薄膜晶体管T2的第二极T2c会向第三薄膜晶体管T3的控制极T3a施加电压（即Vdd），使得第三薄膜晶体管T3导通，此时第三薄膜晶体管T3的第一极T3b采集第二薄膜晶体管T2的控制极T2a的栅极电压Vth，并将该栅极电压Vth通过第三薄膜晶体管T3的第二极T3c传输至检测模块201。检测模块201在接收到栅极电压Vth后，检测模块201导通，将栅极电压Vth输出给数据线Data。
当驱动电路1中的扫描线Scan第一次接收到低电平信号时，第一薄膜晶体管T1截止，电容C放电至第二薄膜晶体管T2的控制极T2a，使得第二薄膜晶体管T2维持导通，从而使得有机发光二极管维持发光。
之后，当驱动电路1中的扫描线Scan第二次接收到高电平信号时，第一薄膜晶体管T1导通，数据线Data将数据电压Vdata和栅极电压Vth充到电容C中，并对第二薄膜晶体管T2的控制极T2a施加电压，从而使得第二薄膜晶体管T2导通。使得有机发光二极管发光，且第二薄膜晶体管T2的第二极T2c会向第三薄膜晶体管T3的控制极T3a施加电压，使得第三薄膜晶体管T3导通，此时第三薄膜晶体管T3的第一极T3b采集第二薄膜晶体管T2的控制极T2a的栅极电压Vth，并将该栅极电压Vth通过第三薄膜晶体管T3的第二极T3c传输至检测模块201。检测模块201在接收到栅极电压Vth后，检测模块201截止，不对数据线Data施加电压。
当扫描线Scan第二次接收到低电平信号时，第一薄膜晶体管T1截止，电容C放电，由于此时的电容C内有数据电压和补偿Vdata的栅极电压Vth，因此，使得第二薄膜晶体管T2在低电平信号下，也能使得有机发光二极管可以实现高电平信号时的亮度，保证了有机发光二极管的发光率。如此，在高低电平信号切换的状态下，解决了长时间的栅极偏压下产生的阈值电压漂移的问题，且在低电平信号下也保证了发光率。
当扫描线Scan在接收到第三高电平信号后，检测模块201导通输出阈值电压给数据线Data，检测模块201在接收相邻两个高电平信号时，分别进行关断和导通这种工作状态反复循环。
在一个示例中，本申请可以基于T触发器设计检测模块。例如，如图4所示，检测模块可以包括电阻R、T触发器和第四薄膜晶体管T4。电阻R的一端（即如图4所示R1端）与所述T触发器的时钟信号接收端（即如图4所示C1端）相连，所述电阻R的另一端（即如图4所示R2端）与所述扫描线Scan相连，T触发器的第二数据信号输入端（如图4所示T端）用于输入数字信号，当第二数据信号输入端接收到数字信号“0”时，T触发器的同相输出端（如图4所示Q端）输出低电平信号，当第二数据信号输入端接收到数字信号“1”时，T触发器的Q端输出高电平信号。T触发器的Q端与第四薄膜晶体管T4的控制极T4a相连，第四薄膜晶体管T4的第二极T4b与第三薄膜晶体管T3的第二极T3c相连，第四薄膜晶体管T4的第一极T4c与数据线Data相连。
示例性的，T触发器可以是下降沿T触发器，本申请实施例中的下降沿T触发器中的T端始终是高电平。下降沿T触发器的C1端在检测到两个相邻的下降沿信号时，分别进行关断和导通。使得第四薄膜晶体管T4对应关断和导通。
例如，当扫描线Scan第一次接收到高电平信号时，检测模块201接收到扫描线Scan输出的高电平信号（即时钟控制信号），在T端是接收到数字信号“1”时，下降沿T触发器输出高电平，使得第四薄膜晶体管T4导通，进而使得检测模块201输出栅极电压Vth给数据线Data。
当驱动电路1中的扫描线Scan第一次接收到低电平信号时，第一薄膜晶体管T1截止，电容C放电至第二薄膜晶体管T2的控制极T2a，从而使得有机发光二极管发光。
当驱动电路1中的扫描线Scan第二次接收到高电平信号时，T触发器的C1端接收到时钟控制信号，在T端接收到数字信号“1”时，下降沿T触发器的Q端输出低电平，第四薄膜晶体管T4的控制极T4a接收到低电平后，第四薄膜晶体管T4关断，使得第四薄膜晶体管T4的第一极T4b不会输出电压给数据线Data，使得检测模块201可以在相邻两个高电平信号时，分别对第四薄膜晶体管T4进行关断和导通，即对补偿的栅极电压Vth控制。
若不如此，在扫描线Scan频繁接收到高电平信号的状态下，补偿电路2会一直向数据线Data施加一个栅极电压Vth，进而使得补偿的栅极电压Vth一直增大，最终导致OLED面板故障。
可以理解的是，当外部环境变化使得阈值电压发生变化时，本申请侦测到的栅极电压Vth也发生变化。
在一个示例中，如图5所示，补偿电路2还可以包括电压跟随器（即图5所示的A），电压跟随器串联在第三薄膜晶体管T3和检测模块201之间，电压跟随器A的同相输入端（即图5所示A的“+”端）与第三薄膜晶体管T3的第二极T3c相连，电压跟随器A的输出端分别与检测模块201和电压跟随器的反向输入端（即图5所示A的“-”端）相连。在补偿电路2中设置电压跟随器A，可以提高补偿电路2带负载的能力，降低传输过程中存在栅极电压存在损耗的问题。
在一个示例中，如图6所示，补偿电路2还包括第一控制模块202，第一控制模块202分别与第二薄膜晶体管T2的第二极T2c和第二控制模块连接，控制模块202用于根据第二薄膜晶体管T2的第二极T2c输出的信号控制第二控制模块交替输出高电平信号和低电平信号，第二控制模块用于向扫描线Scan交替输入所述高电平信号和低电平信号。如此，不需要再额外增加上拉电阻和下拉电阻分别控制高低电平的转换，由一个控制模块202即可实现对高低电平的转换。
示例性的，第一控制模块202可以包括如图7所示的比较器（即图7所示的B）、D触发器、反相器（即图5所示的E）、第一金属氧化物半导体场效应晶体管M1、第二金属氧化物半导体场效应晶体管M2。比较器B的同向输入端（即图7所示B的“+”端）与第二薄膜晶体管T2的第二极T2c相连，比较器B的反向输入端（即图7所示B的“-”端）接地，比较器B的输出端与第三薄膜晶体管T3的控制极T3a相连，D触发器的时钟信号接收端（即图7所示C1端）与比较器B的输出端相连，D触发器的数据信号输入端（即图7所示D端）与反相器E的输出端相连，D触发器的正相信号输出端（即图7所示Q端）分别与反相器E的输入端、第一金属氧化物半导体场效应晶体管M1的控制极M1a和第二金属氧化物半导体场效应晶体管M2的控制极M2a相连，第一金属氧化物半导体场效应晶体管M1a的第二极M1c和第二金属氧化物半导体场效应晶体管的第二极M2c分别与第二控制模块相连。
可选的，比较器可以是过零电压比较器。
可选的，D触发器可以是上升沿D触发器。
例如，当扫描线Scan第一次接收到高电平信号时，第一薄膜晶体管T1导通，数据线Data分别向电容C进行充电和对第二薄膜晶体管T2的控制极T2a施加电压，从而使得第二薄膜晶体管T2导通。第二薄膜晶体管T2导通后，使得有机发光二极管发光，且第二薄膜晶体管T2的第二极T2c会向比较器B的同向输入端（+）施加电压，此时的电压大于比较器B的反向输入端（-）接地时的电压，比较器B的输出端输出高电平，比较器B对第三薄膜晶体管T3的控制极T3a施加电压，从而使得第三薄膜晶体管T3导通。D触发器的时钟信号接收端接收到比较器B的输出端输出的信号后，此时D触发器的数据信号输入端是高电平，从而使得D触发器的正相信号输出端输出高电平，当D触发器的正相信号输出端输出高电平时，第一金属氧化物半导体场效应晶体管M1的控制极M1a接收到该高电平，第一金属氧化物半导体场效应晶体管M1导通，第二金属氧化物半导体场效应晶体管M2截止，从而使得第一金属氧化物半导体场效应晶体管M1向第二控制模块203输出高电平信号，使得第二控制模块203输出高电平信号给扫描线Scan。而由于D触发器的数据信号输入端与反相器E的输出端相连，D触发器的正相信号输出端分别与反相器E的输入端，因此，在D触发器的正相信号输出端输出高电平后，高电平通过反相器E给D触发器的数据信号输入端输入数字信号“0”，使得D触发器的正相信号输出端输出低电平，第二金属氧化物半导体场效应晶体管M2的控制极M2a接收到该高电平，第二金属氧化物半导体场效应晶体管M2导通，第一金属氧化物半导体场效应晶体管M1截止，从而使得第二金属氧化物半导体场效应晶体管M2向第二控制模块203输出低电平信号，从而控制扫描线Scan。由此，可以使得D触发器始终保持在接收数据信号“0”和“1”的切换模式中，从而实现了由一个第一控制模块202对高低电平的转换。
在一个示例中，为了避免晶体管的差异从而导致电路特性发生变化，本申请实施例中提供的第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3和第四薄膜晶体管T4可以是相同的晶体管。
示例性的，可以选用氧化物薄膜晶体管（oxide thin-film transistor-TFT，Oxide TFT），Oxide TFT其载流子迁移率高、制备温度低且电学均匀性好。
实施例二
本申请实施例二还提供一种控制芯片，控制芯片与显示面板的扫描线相连，用于向扫描线输入扫描信号，控制芯片包括如实施例一提供的补偿电路。
其中，控制芯片可以设计一个补偿电路2，该补偿电路2中的第三薄膜晶体管T3的第一极T3b分别与显示面板中各个OLED对应的驱动电路中的第二薄膜晶体管T2的控制极T2a连接，以在整体上对显示面板进行阈值电压补偿。
可选的，控制芯片可以设计多个补偿电路2，每个补偿电路对应显示面板中的一个显示区域。例如，如图8所示，显示面板划分为9个区域，则控制芯片可以设计9个补偿电路2，每个补偿电路2中的第三薄膜晶体管T3的第一极T3b分别与对应的显示区域中的各个OLED对应的驱动电路中的第二薄膜晶体管T2的控制极T2a连接，以对对应区域进行阈值电压补偿。
可选的，控制芯片中也可以设计与显示面板中每个OLED对应的驱动电路的补偿电路2。即每个OLED被划分为一个显示区域。
可以理解的是，当显示面板被划分为的区域越多，分别对每个区域进行栅极电压Vth的补偿越精细，则OLED面板的显示效果越佳。具体补偿方式可以根据实际需求决定。
实施例三
基于该控制芯片，本申请实施例三还提供一种显示装置，显示装置包括如实施例二提供的控制芯片。
应当理解，当在本申请说明书和所附权利要求书中使用时，术语“包括”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。
还应当理解，在本申请说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。
另外，在本申请说明书和所附权利要求书的描述中，术语“第一”、“第二”、“第三”等仅用于区分描述，而不能理解为指示或暗示相对重要性。
在本申请说明书中描述的参考“一个实施例”或“一些实施例”等意味着在本申请的一个或多个实施例中包括结合该实施例描述的特定特征、结构或特点。由此，在本说明书中的不同之处出现的语句“在一个实施例中”、“在一些实施例中”、“在其他一些实施例中”、“在另外一些实施例中”等不是必然都参考相同的实施例，而是意味着“一个或多个但不是所有的实施例”，除非是以其他方式另外特别强调。术语“包括”、“包含”、“具有”及它们的变形都意味着“包括但不限于”，除非是以其他方式另外特别强调。
以上所述实施例仅用以说明本申请的技术方案，而非对其限制；尽管参照前述实施例对本申请进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本申请各实施例技术方案的精神和范围，均应包含在本申请的保护范围之内。

Claims (15)

  1. 一种补偿电路，应用于驱动电路，所述驱动电路包括第一薄膜晶体管、第二薄膜晶体管、有机发光二极管和电容，所述第一薄膜晶体管的控制极与扫描线相连，所述第一薄膜晶体管的第一极与数据线相连，所述第一薄膜晶体管的第二极与所述第二薄膜晶体管的控制极相连，所述第二薄膜晶体管的第二极与所述有机发光二极管的正极连接，所述第二薄膜晶体管的第一极与电源端连接，所述有机发光二极管的负极接地；所述电容的一端与所述第一薄膜晶体管的第二极相连，所述电容的另一端与所述有机发光二极管的负极相连；所述补偿电路包括第三薄膜晶体管和检测模块；
    所述第三薄膜晶体管的控制极用于与所述第二薄膜晶体管的第二极相连，所述第三薄膜晶体管的第一极用于与所述第二薄膜晶体管的所述控制极相连，所述检测模块分别与所述第三薄膜晶体管的第二极、所述扫描线和所述数据线连接，所述检测模块用于在接收所述第三薄膜晶体管的第二极输出的相邻两个电压信号时，分别进行关断和导通。
  2. 根据权利要求1所述的补偿电路，其中，所述检测模块包括电阻、T触发器和第四薄膜晶体管；
    所述电阻的一端与所述T触发器的时钟信号接收端相连，所述电阻的另一端与所述扫描线相连，所述T触发器的正相信号输出端与所述第四薄膜晶体管的控制极相连，所述第四薄膜晶体管的第二极与所述第三薄膜晶体管的所述第二极相连，所述第四薄膜晶体管的第一极与所述数据线相连。
  3. 根据权利要求2所述的补偿电路，其中，所述第一薄膜晶体管、所述第二薄膜晶体管、所述第三薄膜晶体管和所述第四薄膜晶体管为氧化物薄膜晶体管。
  4. 根据权利要求2所述的补偿电路，其中，所述T触发器是下降沿T触发器。
  5. 根据权利要求4所述的补偿电路，其中，所述T触发器的第二数据信号输入端接入高电平。
  6. 根据权利要求1所述的补偿电路，其中，所述补偿电路还包括电压跟随器，所述电压跟随器串联在所述第三薄膜晶体管和所述检测模块之间，所述电压跟随器的同相输入端与所述第三薄膜晶体管的所述第二极相连，所述电压跟随器的输出端分别与所述检测模块和所述电压跟随器的反向输入端相连。
  7. 根据权利要求1所述的补偿电路，其中，所述补偿电路还包括第一控制模块，所述第一控制模块分别与所述第二薄膜晶体管的所述第二极和第二控制模块连接，所述第一控制模块用于根据所述第二薄膜晶体管的所述第二极输出的信号控制所述第二控制模块交替输出高电平信号和低电平信号，所述第二控制模块用于向所述扫描线交替输入所述高电平信号和所述低电平信号。
  8. 根据权利要求7所述的补偿电路，其中，所述第一控制模块包括比较器、D触发器、反相器、第一金属氧化物半导体场效应晶体管和第二金属氧化物半导体场效应晶体管；
    所述比较器的同向输入端与所述第二薄膜晶体管的所述第二极相连，所述比较器的反向输入端接地，所述比较器的输出端与所述第三薄膜晶体管的所述控制极相连，所述D触发器的时钟信号接收端与所述比较器的输出端相连，所述D触发器的数据信号输入端与所述反相器的输出端相连，所述D触发器的正相信号输出端分别与所述反相器的输入端、所述第一金属氧化物半导体场效应晶体管的控制极和所述第二金属氧化物半导体场效应晶体管的控制极相连，所述第一金属氧化物半导体场效应晶体管的第二极和所述第二金属氧化物半导体场效应晶体管的第二极分别与所述第二控制模块相连。
  9. 根据权利要求8所述的补偿电路，其中，所述比较器是过零电压比较器。
  10. 根据权利要求8所述的补偿电路，其中，所述D触发器是上升沿D触发器。
  11. 一种控制芯片，所述控制芯片与显示面板中的扫描线相连，用于向所述扫描线输入扫描信号，所述控制芯片包括补偿电路；
    所述补偿电路，应用于驱动电路，所述驱动电路包括第一薄膜晶体管、第二薄膜晶体管、有机发光二极管和电容，所述第一薄膜晶体管的控制极与扫描线相连，所述第一薄膜晶体管的第一极与数据线相连，所述第一薄膜晶体管的第二极与所述第二薄膜晶体管的控制极相连，所述第二薄膜晶体管的第二极与所述有机发光二极管的正极连接，所述第二薄膜晶体管的第一极与电源端连接，所述有机发光二极管的负极接地；所述电容的一端与所述第一薄膜晶体管的第二极相连，所述电容的另一端与所述有机发光二极管的负极相连；所述补偿电路包括第三薄膜晶体管和检测模块；
    所述第三薄膜晶体管的控制极用于与所述第二薄膜晶体管的第二极相连，所述第三薄膜晶体管的第一极用于与所述第二薄膜晶体管的所述控制极相连，所述检测模块分别与所述第三薄膜晶体管的第二极、所述扫描线和所述数据线连接，所述检测模块用于在接收所述第三薄膜晶体管的第二极输出的相邻两个电压信号时，分别进行关断和导通。
  12. 根据权利要求11所述的控制芯片，其中，所述控制芯片包括一个补偿电路，所述补偿电路中的所述第三薄膜晶体管的所述第一极分别与显示面板中的各个发光二极管对应的驱动电路中的第二薄膜晶体管连接。
  13. 根据权利要求11所述的控制芯片，其中，所述控制芯片包括至少一个补偿电路，每个所述补偿电路分别对应所述显示面板中的一个显示区域，每个所述补偿电路的所述第三薄膜晶体管的所述第一极分别与对应的显示区域中的各个发光二极管对应的驱动电路中的第二薄膜晶体管连接。
  14. 根据权利要求11所述的控制芯片，其中，所述控制芯片包括至少一个补偿电路，每个所述补偿电路分别对应所述显示面板中的所述发光二极管，每个所述发光二极管对应一个显示区域。
  15. 一种显示装置，所述显示装置包括控制芯片；
    所述控制芯片与显示面板中的扫描线相连，用于向所述扫描线输入扫描信号，所述控制芯片与显示面板中的扫描线相连，用于向所述扫描线输入扫描信号，所述控制芯片包括补偿电路；
    所述补偿电路，应用于驱动电路，所述驱动电路包括第一薄膜晶体管、第二薄膜晶体管、有机发光二极管和电容，所述第一薄膜晶体管的控制极与扫描线相连，所述第一薄膜晶体管的第一极与数据线相连，所述第一薄膜晶体管的第二极与所述第二薄膜晶体管的控制极相连，所述第二薄膜晶体管的第二极与所述有机发光二极管的正极连接，所述第二薄膜晶体管的第一极与电源端连接，所述有机发光二极管的负极接地；所述电容的一端与所述第一薄膜晶体管的第二极相连，所述电容的另一端与所述有机发光二极管的负极相连；所述补偿电路包括第三薄膜晶体管和检测模块；
    所述第三薄膜晶体管的控制极用于与所述第二薄膜晶体管的第二极相连，所述第三薄膜晶体管的第一极用于与所述第二薄膜晶体管的所述控制极相连，所述检测模块分别与所述第三薄膜晶体管的第二极、所述扫描线和所述数据线连接，所述检测模块用于在接收所述第三薄膜晶体管的第二极输出的相邻两个电压信号时，分别进行关断和导通。
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