WO2020211167A1 - Oled 显示面板及其驱动方法 - Google Patents

Oled 显示面板及其驱动方法 Download PDF

Info

Publication number
WO2020211167A1
WO2020211167A1 PCT/CN2019/088665 CN2019088665W WO2020211167A1 WO 2020211167 A1 WO2020211167 A1 WO 2020211167A1 CN 2019088665 W CN2019088665 W CN 2019088665W WO 2020211167 A1 WO2020211167 A1 WO 2020211167A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
voltage
data signal
pixel unit
Prior art date
Application number
PCT/CN2019/088665
Other languages
English (en)
French (fr)
Inventor
聂诚磊
韩佰祥
曹昆
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US16/496,444 priority Critical patent/US11308882B2/en
Publication of WO2020211167A1 publication Critical patent/WO2020211167A1/zh

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technology, in particular to an OLED display panel and a driving method thereof.
  • OLED Organic Light Emitting Display
  • OLED has self-luminescence, low driving voltage, high luminous efficiency, short response time, high definition and contrast, close to 180° viewing angle, wide operating temperature range, and can realize flexible display and large Area full-color display and many other advantages are recognized by the industry as the most promising display device.
  • OLED devices usually include: a substrate, an anode provided on the substrate, a hole injection layer provided on the anode, a hole transport layer provided on the hole injection layer, a light-emitting material layer provided on the hole transport layer, a device An electron transport layer on the luminescent material layer, an electron injection layer on the electron transport layer, and a cathode on the electron injection layer.
  • the light-emitting principle of OLED devices is that semiconductor materials and organic light-emitting materials are driven by an electric field to cause light emission through carrier injection and recombination.
  • OLED devices usually use indium tin oxide (ITO) electrodes and metal electrodes as the anode and cathode of the device, respectively.
  • ITO indium tin oxide
  • Electrons and holes migrate to the luminescent material layer through the electron transport layer and the hole transport layer respectively, and meet in the luminescent material layer to form excitons and excite the luminescent molecules, the latter emit visible light through radiation relaxation.
  • TFT thin film transistors
  • 2T1C pixel circuits There are two thin film transistors (TFT) and one capacitor in existing OLED pixel circuits, which are referred to as 2T1C pixel circuits for short.
  • the first TFT is called the switching TFT, which is used to control the entry of the data (Data) signal
  • the second TFT is called the driving TFT, which is used to control the current through the OLED, so the threshold of the Driving TFT
  • Vth the threshold of the Driving TFT
  • the importance of the voltage (Vth) is very obvious.
  • the positive or negative drift of the threshold voltage will cause different currents to pass through the OLED under the same Data signal, which will cause uneven display.
  • TFTs made of low-temperature polysilicon (LTPS) or oxides will experience threshold voltage drift during use. For example, factors such as illumination in oxide semiconductors and voltage stress of source and drain electrodes may cause threshold voltage drift. As a result, the current through the OLED is inconsistent with the required current, and the display uniformity of the panel is not satisfied.
  • the drift of the threshold voltage in the general 2T1C circuit cannot be improved by adjustment, so different methods need to be used to weaken or even eliminate the influence of the threshold voltage drift.
  • the method of simply adding new TFTs and signal lines inside the pixel to achieve drive tube threshold voltage compensation is called internal compensation; the advantage of this method is that the compensation process is relatively simple and the running speed is faster; the disadvantage is that the pixel circuit is complex , And the compensation range is limited; and the method of threshold voltage compensation through the external drive chip of the panel is called external compensation method.
  • the advantage of this method is that the pixel circuit is relatively simple and the compensation range is relatively large; the disadvantage is that the compensation process is complicated. Running speed is slow.
  • the purpose of the present invention is to provide an OLED display panel that can compensate for the unevenness of the initial threshold voltage of each driving thin film transistor caused by the manufacturing process in the OLED panel and the permanent actual threshold voltage drift of the driving thin film transistor caused by external stress. Instantly compensate for the relatively small actual threshold voltage drift that occurs during the lighting process of the OLED display panel.
  • the purpose of the present invention is to provide a driving method for an OLED display panel, which can compensate for the inhomogeneity of the initial threshold voltage of each driving thin film transistor in the OLED panel due to the manufacturing process and the permanent actual threshold voltage drift of the driving thin film transistor caused by external stress. , It can also instantly compensate for the relatively small actual threshold voltage drift that occurs during the lighting process of the OLED display panel.
  • the present invention provides an OLED display panel, including: a plurality of pixel unit circuits and an external compensation unit connected to the plurality of pixel unit circuits;
  • the external compensation unit is used to perform external compensation for each pixel unit circuit, obtain the initial threshold voltage of the driving thin film transistor of each pixel unit circuit, and superimpose the initial threshold voltage with the input signal corresponding to the pixel unit circuit to obtain A superimposed data signal, the superimposed data signal is sent to each pixel unit circuit;
  • the pixel unit circuit is used for internal compensation according to the superimposed data signal, so as to compensate for the drift of the actual threshold voltage of the driving thin film transistor.
  • the pixel unit circuit includes: a first thin film transistor, a second thin film transistor, a third thin film transistor, a storage capacitor, and an organic light emitting diode;
  • the gate of the first thin film transistor is electrically connected to the first node, the source is electrically connected to the second node, and the drain is connected to the positive voltage of the power supply;
  • the first thin film transistor is a driving thin film transistor;
  • the gate of the second thin film transistor is electrically connected to the first control signal, the source is connected to the superimposed data signal, and the drain is electrically connected to the first node;
  • the gate of the third thin film transistor is electrically connected to the second control signal, the source is connected to the initial voltage, and the drain is electrically connected to the second node;
  • One end of the storage capacitor is electrically connected to the first node, and the other end is electrically connected to the second node;
  • the anode of the organic light emitting diode is electrically connected to the second node, and the cathode is connected to the negative voltage of the power supply.
  • the first thin film transistor, the second thin film transistor and the third thin film transistor are all N-type thin film transistors.
  • the combination of the first control signal, the second control signal, the superimposed data signal, and the initial voltage sequentially corresponds to an initialization phase, a voltage programming phase, a data signal input phase, and a display light emitting phase.
  • the first control signal is a high potential
  • the second control signal is a high potential
  • the superimposed data signal is a potential of an initial voltage
  • the initial voltage is a low potential
  • the first control signal is a high potential
  • the second control signal is a low potential
  • the superimposed data signal is the superimposed initial threshold voltage and reference voltage
  • the initial voltage is low Potential
  • the potential of the reference voltage is greater than the potential of the initial voltage
  • the first control signal is at a high potential
  • the second control signal is at a low potential
  • the superimposed data signal is the superimposed initial threshold voltage and data signal voltage
  • the potential of the data signal voltage is greater than the potential of the reference voltage
  • the first control signal is a low potential
  • the second control signal is a low potential
  • the superimposed data signal is a potential of an initial voltage
  • the initial voltage is a low potential
  • the present invention also provides a driving method of an OLED display panel, which includes the following steps:
  • Step S1 Provide an OLED display panel, the OLED display panel comprising: a plurality of pixel unit circuits and an external compensation unit connected to the plurality of pixel unit circuits;
  • Step S2 The external compensation unit performs external compensation on each pixel unit circuit, obtains the initial threshold voltage of the driving thin film transistor of each pixel unit circuit, and superimposes the initial threshold voltage with the input signal corresponding to the pixel unit circuit Obtain a superimposed data signal, and input the superimposed data signal into each pixel unit circuit;
  • Step S3 The pixel unit circuit performs internal compensation according to the superimposed data signal, so as to compensate for the drift of the actual threshold voltage of the driving thin film transistor.
  • the pixel unit circuit includes: a first thin film transistor, a second thin film transistor, a third thin film transistor, a storage capacitor, and an organic light emitting diode;
  • the gate of the first thin film transistor is electrically connected to the first node, the source is electrically connected to the second node, and the drain is connected to the positive voltage of the power supply;
  • the first thin film transistor is a driving thin film transistor;
  • the gate of the second thin film transistor is electrically connected to the first control signal, the source is connected to the superimposed data signal, and the drain is electrically connected to the first node;
  • the gate of the third thin film transistor is electrically connected to the second control signal, the source is connected to the initial voltage, and the drain is electrically connected to the second node;
  • One end of the storage capacitor is electrically connected to the first node, and the other end is electrically connected to the second node;
  • the anode of the organic light emitting diode is electrically connected to the second node, and the cathode is connected to the negative voltage of the power supply.
  • the first thin film transistor, the second thin film transistor and the third thin film transistor are all N-type thin film transistors.
  • the combination of the first control signal, the second control signal, the superimposed data signal, and the initial voltage sequentially corresponds to an initialization phase, a voltage programming phase, a data signal input phase, and a display light emitting phase.
  • the first control signal is a high potential
  • the second control signal is a high potential
  • the superimposed data signal is a potential of an initial voltage
  • the initial voltage is a low potential
  • the first control signal is a high potential
  • the second control signal is a low potential
  • the superimposed data signal is the superimposed initial threshold voltage and reference voltage
  • the initial voltage is low Potential
  • the potential of the reference voltage is greater than the potential of the initial voltage
  • the first control signal is at a high potential
  • the second control signal is at a low potential
  • the superimposed data signal is the superimposed initial threshold voltage and data signal voltage
  • the potential of the data signal voltage is greater than the potential of the reference voltage
  • the first control signal is a low potential
  • the second control signal is a low potential
  • the superimposed data signal is a potential of an initial voltage
  • the initial voltage is a low potential
  • the OLED display panel of the present invention includes a plurality of pixel unit circuits and an external compensation unit connected to the plurality of pixel unit circuits.
  • the external compensation unit performs external compensation for each pixel unit circuit to obtain each pixel unit circuit.
  • the pixel unit circuit drives the initial threshold voltage of the thin film transistor, and superimposes the initial threshold voltage with the input signal corresponding to the pixel unit circuit to obtain a superimposed data signal.
  • the superimposed data signal is input to each pixel unit circuit, so
  • the pixel unit circuit performs internal compensation according to the superimposed data signal; that is, the present invention combines external compensation and internal compensation.
  • the external compensation can compensate for the unevenness of the initial threshold voltage of each driving thin film transistor in the OLED display panel due to the manufacturing process and the external
  • the permanent actual threshold voltage drift of the driving thin film transistor caused by stress, and the internal compensation can instantly compensate for the relatively small actual threshold voltage drift that occurs during the lighting process of the OLED display panel.
  • the driving method of the OLED display panel of the present invention combines external compensation and internal compensation.
  • the external compensation can compensate the unevenness of the initial threshold voltage of each driving thin film transistor in the OLED display panel due to the manufacturing process and the driving thin film transistor caused by external stress. Permanent actual threshold voltage drift, and internal compensation can instantly compensate for the relatively small actual threshold voltage drift that occurs during the lighting process of the OLED display panel.
  • FIG. 1 is a schematic diagram of the OLED display panel of the present invention
  • FIG. 2 is a schematic diagram of the pixel unit circuit of the OLED display panel of the present invention.
  • FIG. 3 is a signal timing diagram of the pixel unit circuit of the OLED display panel of the present invention.
  • FIG. 4 is a schematic diagram of the initialization stage of the pixel unit circuit of the OLED display panel of the present invention.
  • FIG. 5 is a schematic diagram of the voltage programming stage of the pixel unit circuit of the OLED display panel of the present invention.
  • FIG. 6 is a schematic diagram of the data signal input stage of the pixel unit circuit of the OLED display panel of the present invention.
  • FIG. 7 is a schematic diagram of the display light-emitting stage of the pixel unit circuit of the OLED display panel of the present invention.
  • FIG. 8 is a flowchart of the driving method of the OLED display panel of the present invention.
  • the present invention provides an OLED display panel including: a plurality of pixel unit circuits 10 and an external compensation unit 20 connected to the plurality of pixel unit circuits 10;
  • the external compensation unit 20 is used to perform external compensation for each pixel unit circuit 10, obtain the initial threshold voltage Vth1 of the driving thin film transistor of each pixel unit circuit 10, and compare the initial threshold voltage Vth1 with the pixel unit circuit 10 After the input signal is superimposed, a superimposed data signal data is obtained, and the superimposed data signal data is input into each pixel unit circuit 10;
  • the pixel unit circuit 10 is used for internal compensation according to the superimposed data signal data, so as to compensate for the drift of the actual threshold voltage Vth of the driving thin film transistor.
  • the pixel unit circuit 10 includes: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a storage capacitor Cst, and an organic light emitting diode D;
  • the gate of the first thin film transistor T1 is electrically connected to the first node G, the source is electrically connected to the second node Q, and the drain is connected to the positive power supply voltage VDD; the first thin film transistor T1 is a driving thin film transistor;
  • the gate of the second thin film transistor T2 is electrically connected to the first control signal WR, the source is connected to the superimposed data signal data, and the drain is electrically connected to the first node G;
  • the gate of the third thin film transistor T3 is electrically connected to the second control signal RD, the source is connected to the initial voltage Vini, and the drain is electrically connected to the second node Q;
  • One end of the storage capacitor Cst is electrically connected to the first node G, and the other end is electrically connected to the second node Q;
  • the anode of the organic light emitting diode D is electrically connected to the second node Q, and the cathode is connected to the negative power supply voltage VSS.
  • the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are all N-type thin film transistors.
  • the combination of the first control signal WR, the second control signal RD, the superimposed data signal data, and the initial voltage Vini sequentially corresponds to an initialization phase P1, a voltage programming phase P2, and a data signal
  • the first control signal WR is at a high level
  • the second control signal RD is at a high level
  • the superimposed data signal data is at the level of the initial voltage Vini.
  • the initial voltage Vini is a low potential
  • the second thin film transistor T2 and the third thin film transistor T3 are both turned on, and the gate and source voltages of the first thin film transistor T1 are both reset to the initial voltage Vini.
  • the first control signal WR is at a high level
  • the second control signal RD is at a low level
  • the superimposed data signal data is the superimposed initial threshold voltage Vth1
  • the reference voltage Vref the initial voltage Vini is a low potential
  • the potential of the reference voltage Vref is greater than the potential of the initial voltage Vini
  • the third thin film transistor T3 is turned off, the second thin film transistor T2 is turned on, and the first The gate voltage of a thin film transistor T1 changes from the initial voltage Vini to the superimposed initial threshold voltage Vth1 and the reference voltage Vref.
  • the source voltage of the first thin film transistor T1 starts to charge from the initial voltage Vini until the source voltage becomes Vth1+
  • the charging is completed when Vref -Vth; where Vth is the actual threshold voltage of the thin film transistor (before the display panel starts to light up, the initial threshold voltage Vth1 of the external compensation unit 20 driving the thin film transistor is the same as the actual threshold voltage Vth, and when the thin film transistor is driven When the actual threshold voltage of the transistor is slightly shifted by Vth due to subsequent temperature or voltage stress, Vth1 and Vth are not equal);
  • the first control signal WR is at a high level
  • the second control signal RD is at a low level
  • the superimposed data signal data is the superimposed initial threshold voltage Vth1 and the data signal voltage Vdata, the initial voltage Vini is at a low potential
  • the data signal voltage Vdata has a potential greater than the reference voltage Vref
  • the third thin film transistor T3 is turned off, and the second thin film transistor T2 is turned on
  • the gate voltage of the first thin film transistor T1 changes from the superimposed initial threshold voltage Vth1 and the reference voltage Vref to the superimposed initial threshold voltage Vth1 and the data signal voltage Vdata, so the gate voltage of the first thin film transistor T1 changes The quantity is always Vdata-Vref.
  • the source voltage of the first thin film transistor T1 becomes Vref+Vth1-Vth+(Vdata-Vref)Cst /(Cst+Coled);
  • the first control signal WR is at a low potential
  • the second control signal RD is at a low potential
  • the superimposed data signal data is the potential of the initial voltage Vini, so
  • the initial voltage Vini is a low potential
  • the second thin film transistor T2 and the third thin film transistor T3 are both turned off.
  • K is the intrinsic conductivity factor of the driving thin film transistor, that is, the first thin film transistor T1. It can be seen that the current flowing through the organic light emitting diode D has nothing to do with the actual threshold voltage Vth of the first thin film transistor T1, that is, the driving thin film transistor. The actual threshold voltage Vth drift of the transistor affects the organic light emitting diode D, so that the display brightness of the OLED display panel can be made uniform, and the display quality of the OLED display panel can be improved.
  • the present invention takes advantage of the fast running speed of the internal compensation circuit and the large compensation range of the external compensation circuit, and combines the internal compensation method of the pixel compensation circuit with the external compensation method.
  • first External compensation is performed by the external compensation unit 20 to obtain the initial actual threshold voltage Vth1 of the driving thin film transistor of each pixel unit circuit 10.
  • the initial actual threshold voltage Vth1 is compared with the pixel unit circuit 10
  • a superimposed data signal data is obtained.
  • the superimposed data signal data is input to each pixel unit circuit 10, and it works together with the internal compensation process of the pixel unit circuit 10.
  • the external The compensation can compensate for the inhomogeneity of the initial actual threshold voltage Vth1 of each driving thin film transistor in the OLED display panel due to the manufacturing process and the permanent actual threshold voltage Vth drift of the driving thin film transistor due to external stress, and the internal compensation can instantly compensate the OLED display panel A relatively small actual threshold voltage Vth drift that occurs during the lighting process.
  • the present invention may be a current I OLED flowing through the organic light emitting diode circuit D of each pixel cell 10 is the maximum and minimum The difference is controlled within 2%, and the uniform performance of the panel is greatly improved at this time;
  • each pixel unit circuit 10 flows through the light emitting diode D
  • the difference between the current I OLED of each pixel unit circuit 10 can be as high as about 25%; and the present invention can control the maximum and minimum difference of the current I OLED flowing through the light-emitting diode D of each pixel unit circuit 10 within 5%. At this time, the uniform performance of the panel is obtained. Greatly improve.
  • the present invention also provides a driving method of an OLED display panel, which includes the following steps:
  • Step S1 please refer to FIG. 1 to provide an OLED display panel, the OLED display panel comprising: a plurality of pixel unit circuits 10 and an external compensation unit 20 connected to the plurality of pixel unit circuits 10;
  • Step S2 The external compensation unit 20 performs external compensation on each pixel unit circuit 10, obtains the initial threshold voltage Vth1 of the driving thin film transistor of each pixel unit circuit 10, and corresponds the initial threshold voltage Vth1 to the pixel unit circuit 10 A superimposed data signal data is obtained after superimposing the input signal of, and the superimposed data signal data is input into each pixel unit circuit 10;
  • Step S3 The pixel unit circuit 10 performs internal compensation according to the superimposed data signal data, so as to compensate for the drift of the actual threshold voltage Vth of the driving thin film transistor.
  • the pixel unit circuit 10 includes: a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, a storage capacitor Cst, and an organic light emitting diode D;
  • the gate of the first thin film transistor T1 is electrically connected to the first node G, the source is electrically connected to the second node Q, and the drain is connected to the positive power supply voltage VDD; the first thin film transistor T1 is a driving thin film transistor;
  • the gate of the second thin film transistor T2 is electrically connected to the first control signal WR, the source is connected to the superimposed data signal data, and the drain is electrically connected to the first node G;
  • the gate of the third thin film transistor T3 is electrically connected to the second control signal RD, the source is connected to the initial voltage Vini, and the drain is electrically connected to the second node Q;
  • One end of the storage capacitor Cst is electrically connected to the first node G, and the other end is electrically connected to the second node Q;
  • the anode of the organic light emitting diode D is electrically connected to the second node Q, and the cathode is connected to the negative power supply voltage VSS.
  • the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are all N-type thin film transistors.
  • step S3 the combination of the first control signal WR, the second control signal RD, the superimposed data signal data, and the initial voltage Vini sequentially corresponds to an initialization phase P1, and a voltage programming Phase P2, a data signal input phase P3, and a display light-emitting phase P4.
  • the first control signal WR is at a high level
  • the second control signal RD is at a high level
  • the superimposed data signal data is at the level of the initial voltage Vini.
  • the initial voltage Vini is a low potential
  • the second thin film transistor T2 and the third thin film transistor T3 are both turned on, and the gate and source voltages of the first thin film transistor T1 are both reset to the initial voltage Vini.
  • the first control signal WR is at a high level
  • the second control signal RD is at a low level
  • the superimposed data signal data is the superimposed initial threshold voltage Vth1
  • the reference voltage Vref the initial voltage Vini is a low potential
  • the potential of the reference voltage Vref is greater than the potential of the initial voltage Vini
  • the third thin film transistor T3 is turned off, the second thin film transistor T2 is turned on, and the first The gate voltage of a thin film transistor T1 changes from the initial voltage Vini to the superimposed initial threshold voltage Vth1 and the reference voltage Vref.
  • the source voltage of the first thin film transistor T1 starts to charge from the initial voltage Vini until the source voltage becomes Vth1+
  • the charging is completed when Vref -Vth; where Vth is the actual threshold voltage of the thin film transistor (before the display panel starts to light up, the initial threshold voltage Vth1 of the external compensation unit 20 driving the thin film transistor is the same as the actual threshold voltage Vth, and when the thin film transistor is driven When the actual threshold voltage of the transistor is slightly shifted by Vth due to subsequent temperature or voltage stress, Vth1 and Vth are not equal);
  • the first control signal WR is at a high level
  • the second control signal RD is at a low level
  • the superimposed data signal data is the superimposed initial threshold voltage Vth1 and the data signal voltage Vdata, the initial voltage Vini is at a low potential
  • the data signal voltage Vdata has a potential greater than the reference voltage Vref
  • the third thin film transistor T3 is turned off, and the second thin film transistor T2 is turned on
  • the gate voltage of the first thin film transistor T1 changes from the superimposed initial threshold voltage Vth1 and the reference voltage Vref to the superimposed initial threshold voltage Vth1 and the data signal voltage Vdata, so the gate voltage of the first thin film transistor T1 changes The quantity is always Vdata-Vref.
  • the source voltage of the first thin film transistor T1 becomes Vref+Vth1-Vth+(Vdata-Vref)Cst /(Cst+Coled);
  • the first control signal WR is at a low potential
  • the second control signal RD is at a low potential
  • the superimposed data signal data is the potential of the initial voltage Vini, so
  • the initial voltage Vini is a low potential
  • the second thin film transistor T2 and the third thin film transistor T3 are both turned off.
  • K is the intrinsic conductivity factor of the driving thin film transistor, that is, the first thin film transistor T1. It can be seen that the current flowing through the organic light emitting diode D has nothing to do with the actual threshold voltage Vth of the first thin film transistor T1, that is, the driving thin film transistor. The actual threshold voltage Vth drift of the transistor affects the organic light emitting diode D, so that the display brightness of the OLED display panel can be made uniform, and the display quality of the OLED display panel can be improved.
  • the present invention takes advantage of the fast running speed of the internal compensation circuit and the large compensation range of the external compensation circuit, and combines the internal compensation method of the pixel compensation circuit with the external compensation method.
  • first External compensation is performed by the external compensation unit 20 to obtain the initial actual threshold voltage Vth1 of the driving thin film transistor of each pixel unit circuit 10.
  • the initial actual threshold voltage Vth1 is compared with the pixel unit circuit 10
  • a superimposed data signal data is obtained.
  • the superimposed data signal data is input to each pixel unit circuit 10, and it works together with the internal compensation process of the pixel unit circuit 10.
  • the external The compensation can compensate for the inhomogeneity of the initial actual threshold voltage Vth1 of each driving thin film transistor in the OLED display panel due to the manufacturing process and the permanent actual threshold voltage Vth drift of the driving thin film transistor due to external stress, and the internal compensation can instantly compensate the OLED display panel A relatively small actual threshold voltage Vth drift that occurs during the lighting process.
  • the present invention may be a current I OLED flowing through the organic light emitting diode circuit D of each pixel cell 10 is the maximum and minimum The difference is controlled within 2%, and the uniform performance of the panel is greatly improved at this time;
  • each pixel unit circuit 10 flows through the light emitting diode D
  • the difference between the current I OLED of each pixel unit circuit 10 can be as high as about 25%; and the present invention can control the maximum and minimum difference of the current I OLED flowing through the light-emitting diode D of each pixel unit circuit 10 within 5%. At this time, the uniform performance of the panel is obtained. Greatly improve.
  • the OLED display panel of the present invention includes multiple pixel unit circuits and an external compensation unit connected to the multiple pixel unit circuits.
  • the external compensation unit performs external compensation on each pixel unit circuit to obtain each pixel unit circuit.
  • the unit circuit drives the initial threshold voltage of the thin film transistor, and superimposes the initial threshold voltage with the input signal corresponding to the pixel unit circuit to obtain a superimposed data signal, and the superimposed data signal is input to each pixel unit circuit.
  • the pixel unit circuit performs internal compensation according to the superimposed data signal; that is, the present invention combines external compensation with internal compensation.
  • the external compensation can compensate for the inhomogeneity of the initial threshold voltage of each driving thin film transistor in the OLED display panel due to the manufacturing process and due to external stress.
  • the resulting permanent actual threshold voltage drift of the driving thin film transistor, and the internal compensation can instantly compensate for the relatively small actual threshold voltage drift that occurs during the lighting process of the OLED display panel.
  • the driving method of the OLED display panel of the present invention combines external compensation and internal compensation.
  • the external compensation can compensate the unevenness of the initial threshold voltage of each driving thin film transistor in the OLED display panel due to the manufacturing process and the driving thin film transistor caused by external stress. Permanent actual threshold voltage drift, and internal compensation can instantly compensate for the relatively small actual threshold voltage drift that occurs during the lighting process of the OLED display panel.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Geometry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本发明提供一种OLED显示面板及其驱动方法。该OLED显示面板包括多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元，所述外部补偿单元对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号输入至每个像素单元电路中，所述像素单元电路根据叠加数据信号进行内部补偿，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。

Description

OLED显示面板及其驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种OLED显示面板及其驱动方法。
 背景技术
发光二极管显示装置（Organic Light Emitting Display，OLED）具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示装置。
OLED器件通常包括：基板、设于基板上的阳极、设于阳极上的空穴注入层、设于空穴注入层上的空穴传输层、设于空穴传输层上的发光材料层、设于发光材料层上的电子传输层、设于电子传输层上的电子注入层、及设于电子注入层上的阴极。OLED器件的发光原理为半导体材料和有机发光材料在电场驱动下，通过载流子注入和复合导致发光。具体的，OLED器件通常采用氧化铟锡（ITO）电极和金属电极分别作为器件的阳极和阴极，在一定电压驱动下，电子和空穴分别从阴极和阳极注入到电子传输层和空穴传输层，电子和空穴分别经过电子传输层和空穴传输层迁移到发光材料层，并在发光材料层中相遇，形成激子并使发光分子激发，后者经过辐射弛豫而发出可见光。
现有的OLED像素电路中均存在两个薄膜晶体管（TFT）与一个电容，简称为2T1C像素电路。第一个TFT被称为开关（switching）TFT，用于控制数据（Data）信号的进入，第二个TFT被称为驱动（Driving）TFT，用于控制通过OLED的电流，因此Driving TFT的阈值电压（Vth）的重要性便十分明显，阈值电压的正向或负向漂移都有会使得在相同Data信号下有不同的电流通过OLED，出现显示不均匀的问题。
目前使用低温多晶硅（LTPS）或者氧化物制作的TFT在使用的过程中均会发生阈值电压漂移的现象，例如氧化物半导体中的照光、源漏电极电压应力作用等因素，都可能导致阈值电压漂移，导致通过OLED的电流与所需的电流不一致，面板的显示均匀度也得不到满足。一般的2T1C电路中阈值电压的漂移无法通过调节得到改善，因此需要使用不同方法来减弱甚至消除阈值电压漂移带来的影响。单纯通过在像素内部添加新的TFT和信号线的方式来实现驱动管阈值电压补偿的方法被称为内部补偿；这种方法的优点在于补偿过程相对简单，运行速度较快；缺点在于像素电路复杂，并且补偿的范围有限；而通过面板外部驱动芯片来进行阈值电压补偿的方法被称为外部补偿法，这种方法的优点在于像素电路相对简单，补偿范围相对较大；缺点在于补偿过程复杂，运行速度慢。
 技术问题
本发明的目的在于提供一种OLED显示面板，能够补偿OLED面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，也能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。
本发明的目的在于提供一种OLED显示面板的驱动方法，能够补偿OLED面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，也能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。
 技术解决方案
为实现上述目的，本发明提供了一种OLED显示面板，包括：多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元；
所述外部补偿单元用于对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号至每个像素单元电路中；
所述像素单元电路用于根据叠加数据信号进行内部补偿，从而补偿驱动薄膜晶体管的实际阈值电压的漂移。
所述像素单元电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、存储电容及有机发光二极管；
所述第一薄膜晶体管的栅极电性连接第一节点，源极电性连接第二节点，漏极接入电源正电压；该第一薄膜晶体管为驱动薄膜晶体管；
所述第二薄膜晶体管的栅极电性连接第一控制信号，源极接入叠加数据信号，漏极电性连接第一节点；
所述第三薄膜晶体管的栅极电性连接第二控制信号，源极接入初始电压，漏极电性连接第二节点；
所述存储电容的一端电性连接第一节点，另一端电性连接第二节点；
所述有机发光二极管的阳极电性连接第二节点，阴极接入电源负电压。
所述第一薄膜晶体管、第二薄膜晶体管以及第三薄膜晶体管均为N型薄膜晶体管。
所述第一控制信号、第二控制信号、叠加数据信号及初始电压相组合，先后对应于一初始化阶段、一电压编程阶段、一数据信号输入阶段以及一显示发光阶段。
在所述初始化阶段中，所述第一控制信号为高电位，所述第二控制信号为高电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位；
在所述电压编程阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和基准电压，所述初始电压为低电位；所述基准电压的电位大于初始电压的电位；
在所述数据信号输入阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和数据信号电压，所述初始电压为低电位；所述数据信号电压的电位大于基准电压的电位；
在所述显示发光阶段中，所述第一控制信号为低电位，所述第二控制信号为低电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位。
本发明还提供一种OLED显示面板的驱动方法，包括如下步骤：
步骤S1、提供OLED显示面板，所述OLED显示面板包括：多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元；
步骤S2、所述外部补偿单元对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号输入至每个像素单元电路中；
步骤S3、所述像素单元电路根据叠加数据信号进行内部补偿，从而补偿驱动薄膜晶体管的实际阈值电压的漂移。
所述像素单元电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、存储电容及有机发光二极管；
所述第一薄膜晶体管的栅极电性连接第一节点，源极电性连接第二节点，漏极接入电源正电压；该第一薄膜晶体管为驱动薄膜晶体管；
所述第二薄膜晶体管的栅极电性连接第一控制信号，源极接入叠加数据信号，漏极电性连接第一节点；
所述第三薄膜晶体管的栅极电性连接第二控制信号，源极接入初始电压，漏极电性连接第二节点；
所述存储电容的一端电性连接第一节点，另一端电性连接第二节点；
所述有机发光二极管的阳极电性连接第二节点，阴极接入电源负电压。
所述第一薄膜晶体管、第二薄膜晶体管以及第三薄膜晶体管均为N型薄膜晶体管。
所述步骤S3中，所述第一控制信号、第二控制信号、叠加数据信号及初始电压相组合，先后对应于一初始化阶段、一电压编程阶段、一数据信号输入阶段以及一显示发光阶段。
在所述初始化阶段中，所述第一控制信号为高电位，所述第二控制信号为高电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位；
在所述电压编程阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和基准电压，所述初始电压为低电位；所述基准电压的电位大于初始电压的电位；
在所述数据信号输入阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和数据信号电压，所述初始电压为低电位；所述数据信号电压的电位大于基准电压的电位；
在所述显示发光阶段中，所述第一控制信号为低电位，所述第二控制信号为低电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位。
 有益效果
本发明的有益效果：本发明的OLED显示面板包括多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元，所述外部补偿单元对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号输入至每个像素单元电路中，所述像素单元电路根据叠加数据信号进行内部补偿；即本发明将外部补偿与内部补偿相结合，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。本发明的OLED显示面板的驱动方法将外部补偿与内部补偿相结合，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。
 附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为本发明的OLED显示面板的示意图；
图2为本发明的OLED显示面板的像素单元电路的示意图；
图3为本发明的OLED显示面板的像素单元电路的信号时序图；
图4为本发明的OLED显示面板的像素单元电路的初始化阶段示意图；
图5为本发明的OLED显示面板的像素单元电路的电压编程阶段示意图；
图6为本发明的OLED显示面板的像素单元电路的数据信号输入阶段示意图；
图7为本发明的OLED显示面板的像素单元电路的显示发光阶段示意图；
图8为本发明的OLED显示面板的驱动方法的流程图。
 本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1，本发明提供一种OLED显示面板，包括：多个像素单元电路10以及与多个像素单元电路10均连接的外部补偿单元20；
所述外部补偿单元20用于对每个像素单元电路10进行外部补偿，获取每个像素单元电路10的驱动薄膜晶体管的初始阈值电压Vth1，并将初始阈值电压Vth1与该像素单元电路10对应的输入信号进行叠加后得到一叠加数据信号data，将该叠加数据信号data输入至每个像素单元电路10中；
所述像素单元电路10用于根据叠加数据信号data进行内部补偿，从而补偿驱动薄膜晶体管的实际阈值电压Vth的漂移。
具体的，请参阅图2，所述像素单元电路10包括：第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、存储电容Cst及有机发光二极管D；
所述第一薄膜晶体管T1的栅极电性连接第一节点G，源极电性连接第二节点Q，漏极接入电源正电压VDD；该第一薄膜晶体管T1为驱动薄膜晶体管；
所述第二薄膜晶体管T2的栅极电性连接第一控制信号WR，源极接入叠加数据信号data，漏极电性连接第一节点G；
所述第三薄膜晶体管T3的栅极电性连接第二控制信号RD，源极接入初始电压Vini，漏极电性连接第二节点Q；
所述存储电容Cst的一端电性连接第一节点G，另一端电性连接第二节点Q；
所述有机发光二极管D的阳极电性连接第二节点Q，阴极接入电源负电压VSS。
具体的，所述第一薄膜晶体管T1、第二薄膜晶体管T2以及第三薄膜晶体管T3均为N型薄膜晶体管。
具体的，请参阅图3，所述第一控制信号WR、第二控制信号RD、叠加数据信号data及初始电压Vini相组合，先后对应于一初始化阶段P1、一电压编程阶段P2、一数据信号输入阶段P3以及一显示发光阶段P4。
请参阅图4，在所述初始化阶段P1中，所述第一控制信号WR为高电位，所述第二控制信号RD为高电位，所述叠加数据信号data为初始电压Vini的电位，所述初始电压Vini为低电位；所述第二薄膜晶体管T2和所述第三薄膜晶体管T3均导通，所述第一薄膜晶体管T1的栅极和源极电压均为复位至初始电压Vini，此时无电流流过驱动薄膜晶体管与有机发光二极管D，即上一帧的电流被初始化；
请参阅图5，在所述电压编程阶段P2中，所述第一控制信号WR为高电位，所述第二控制信号RD为低电位，所述叠加数据信号data为叠加后的初始阈值电压Vth1和基准电压Vref，所述初始电压Vini为低电位；所述基准电压Vref的电位大于初始电压Vini的电位；所述第三薄膜晶体管T3截止，所述第二薄膜晶体管T2导通，所述第一薄膜晶体管T1的栅极电压由初始电压Vini变为叠加后的初始阈值电压Vth1和基准电压Vref，第一薄膜晶体管T1的源极电压从初始电压Vini开始充电，直至源极电压变为Vth1+Vref –Vth时完成充电；其中，Vth为驱动薄膜晶体管的实际阈值电压（显示面板未开始点亮之前，外部补偿单元20驱动薄膜晶体管的初始阈值电压Vth1与实际阈值电压Vth相同，而当驱动薄膜晶体管由于后续受到温度或电压应力影响而引起实际阈值电压略微Vth漂移时，Vth1与Vth不相等）；
请参阅图6，在所述数据信号输入阶段P3中，所述第一控制信号WR为高电位，所述第二控制信号RD为低电位，所述叠加数据信号data为叠加后的初始阈值电压Vth1和数据信号电压Vdata，所述初始电压Vini为低电位；所述数据信号电压Vdata的电位大于基准电压Vref的电位；所述第三薄膜晶体管T3截止，所述第二薄膜晶体管T2导通，所述第一薄膜晶体管T1的栅极电压由叠加后的初始阈值电压Vth1和基准电压Vref变为叠加后的初始阈值电压Vth1和数据信号电压Vdata，因此第一薄膜晶体管T1的栅极电压的变化量始终为Vdata-Vref，此时由于存储电容Cst与有机发光二极管D自身等效电容Coled的共同耦合作用，第一薄膜晶体管T1的源极电压变为Vref+Vth1-Vth+(Vdata-Vref)Cst/(Cst+Coled)；
请参阅图7，在所述显示发光阶段P4中，所述第一控制信号WR为低电位，所述第二控制信号RD为低电位，所述叠加数据信号data为初始电压Vini的电位，所述初始电压Vini为低电位；所述第二薄膜晶体管T2和第三薄膜晶体管T3均截止，此时，流经有机发光二极管D的电流I OLED的公式：I OLED=K×（Vgs－Vth） 2=K×（Vdata+Vth1-Vref-Vth1+Vth-(Vdata-Vref)Cst/(Cst+Coled)-Vth） 2 = K×（(Vdata-Vref)Coled/(Cst+Coled)） 2，其中，K为驱动薄膜晶体管即第一薄膜晶体管T1的本征导电因子，可见，流过有机发光二极管D的电流与第一薄膜晶体管T1即驱动薄膜晶体管的实际阈值电压Vth无关，消除了驱动薄膜晶体管的实际阈值电压Vth漂移对有机发光二极管D的影响，从而能够使OLED显示面板的显示亮度较均匀，提升OLED显示面板的显示品质。
需要说明的是，本发明同时利用了内部补偿电路运行速度快与外部补偿电路补偿范围大的特点，将像素补偿电路的内部补偿法与外部补偿法相结合，在OLED显示面板驱动点亮之前，首先通过外部补偿单元20进行外部补偿，获取每个像素单元电路10的驱动薄膜晶体管的初始实际阈值电压Vth1，在OLED显示面板驱动点亮的过程中，将初始实际阈值电压Vth1与该像素单元电路10对应的输入信号进行叠加后得到一叠加数据信号data，将该叠加数据信号data输入至每个像素单元电路10中，随着像素单元电路10的内部补偿的过程一起作用，在整个过程中，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始实际阈值电压Vth1不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压Vth漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压Vth漂移。
例如，当OLED显示面板由于制程原因导致面内每个驱动薄膜晶体管的初始实际阈值电压Vth1相差±1V时，如果只进行内部补偿，则每个像素单元电路10的流经有机发光二极管D的电流I OLED的差异可高达10%左右，此时OLED显示面板将呈现出明显的不均匀性；而本发明可将每个像素单元电路10的流经有机发光二极管D的电流I OLED的最大与最小差异控制在2%以内，此时面板均匀性能得到大大提高；
当OLED显示面板只进行外部补偿而没有内部补偿时，由于温度或电压应力的作用，每个驱动薄膜晶体管的实际阈值电压Vth漂移±0.5V，则每个像素单元电路10的流经发光二极管D的电流I OLED的差异可高达25%左右；而本发明可将每个像素单元电路10的流经发光二极管D的电流I OLED的最大与最小差异控制在5%以内，此时面板均匀性能得到大大提高。
请参阅图8，基于上述OLED显示面板，本发明还提供一种OLED显示面板的驱动方法，包括如下步骤：
步骤S1、请参阅图1，提供OLED显示面板，所述OLED显示面板包括：多个像素单元电路10以及与多个像素单元电路10均连接的外部补偿单元20；
步骤S2、所述外部补偿单元20对每个像素单元电路10进行外部补偿，获取每个像素单元电路10的驱动薄膜晶体管的初始阈值电压Vth1，并将初始阈值电压Vth1与该像素单元电路10对应的输入信号进行叠加后得到一叠加数据信号data，将该叠加数据信号data输入至每个像素单元电路10中；
步骤S3、所述像素单元电路10根据叠加数据信号data进行内部补偿，从而补偿驱动薄膜晶体管的实际阈值电压Vth的漂移。
具体的，请参阅图2，所述像素单元电路10包括：第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、存储电容Cst及有机发光二极管D；
所述第一薄膜晶体管T1的栅极电性连接第一节点G，源极电性连接第二节点Q，漏极接入电源正电压VDD；该第一薄膜晶体管T1为驱动薄膜晶体管；
所述第二薄膜晶体管T2的栅极电性连接第一控制信号WR，源极接入叠加数据信号data，漏极电性连接第一节点G；
所述第三薄膜晶体管T3的栅极电性连接第二控制信号RD，源极接入初始电压Vini，漏极电性连接第二节点Q；
所述存储电容Cst的一端电性连接第一节点G，另一端电性连接第二节点Q；
所述有机发光二极管D的阳极电性连接第二节点Q，阴极接入电源负电压VSS。
具体的，所述第一薄膜晶体管T1、第二薄膜晶体管T2以及第三薄膜晶体管T3均为N型薄膜晶体管。
具体的，请参阅图3，所述步骤S3中，所述第一控制信号WR、第二控制信号RD、叠加数据信号data及初始电压Vini相组合，先后对应于一初始化阶段P1、一电压编程阶段P2、一数据信号输入阶段P3以及一显示发光阶段P4。
请参阅图4，在所述初始化阶段P1中，所述第一控制信号WR为高电位，所述第二控制信号RD为高电位，所述叠加数据信号data为初始电压Vini的电位，所述初始电压Vini为低电位；所述第二薄膜晶体管T2和所述第三薄膜晶体管T3均导通，所述第一薄膜晶体管T1的栅极和源极电压均为复位至初始电压Vini，此时无电流流过驱动薄膜晶体管与有机发光二极管D，即上一帧的电流被初始化；
请参阅图5，在所述电压编程阶段P2中，所述第一控制信号WR为高电位，所述第二控制信号RD为低电位，所述叠加数据信号data为叠加后的初始阈值电压Vth1和基准电压Vref，所述初始电压Vini为低电位；所述基准电压Vref的电位大于初始电压Vini的电位；所述第三薄膜晶体管T3截止，所述第二薄膜晶体管T2导通，所述第一薄膜晶体管T1的栅极电压由初始电压Vini变为叠加后的初始阈值电压Vth1和基准电压Vref，第一薄膜晶体管T1的源极电压从初始电压Vini开始充电，直至源极电压变为Vth1+Vref –Vth时完成充电；其中，Vth为驱动薄膜晶体管的实际阈值电压（显示面板未开始点亮之前，外部补偿单元20驱动薄膜晶体管的初始阈值电压Vth1与实际阈值电压Vth相同，而当驱动薄膜晶体管由于后续受到温度或电压应力影响而引起实际阈值电压略微Vth漂移时，Vth1与Vth不相等）；
请参阅图6，在所述数据信号输入阶段P3中，所述第一控制信号WR为高电位，所述第二控制信号RD为低电位，所述叠加数据信号data为叠加后的初始阈值电压Vth1和数据信号电压Vdata，所述初始电压Vini为低电位；所述数据信号电压Vdata的电位大于基准电压Vref的电位；所述第三薄膜晶体管T3截止，所述第二薄膜晶体管T2导通，所述第一薄膜晶体管T1的栅极电压由叠加后的初始阈值电压Vth1和基准电压Vref变为叠加后的初始阈值电压Vth1和数据信号电压Vdata，因此第一薄膜晶体管T1的栅极电压的变化量始终为Vdata-Vref，此时由于存储电容Cst与有机发光二极管D自身等效电容Coled的共同耦合作用，第一薄膜晶体管T1的源极电压变为Vref+Vth1-Vth+(Vdata-Vref)Cst/(Cst+Coled)；
请参阅图7，在所述显示发光阶段P4中，所述第一控制信号WR为低电位，所述第二控制信号RD为低电位，所述叠加数据信号data为初始电压Vini的电位，所述初始电压Vini为低电位；所述第二薄膜晶体管T2和第三薄膜晶体管T3均截止，此时，流经有机发光二极管D的电流I OLED的公式：I OLED=K×（Vgs－Vth） 2=K×（Vdata+Vth1-Vref-Vth1+Vth-(Vdata-Vref)Cst/(Cst+Coled)-Vth） 2 = K×（(Vdata-Vref)Coled/(Cst+Coled)） 2，其中，K为驱动薄膜晶体管即第一薄膜晶体管T1的本征导电因子，可见，流过有机发光二极管D的电流与第一薄膜晶体管T1即驱动薄膜晶体管的实际阈值电压Vth无关，消除了驱动薄膜晶体管的实际阈值电压Vth漂移对有机发光二极管D的影响，从而能够使OLED显示面板的显示亮度较均匀，提升OLED显示面板的显示品质。
需要说明的是，本发明同时利用了内部补偿电路运行速度快与外部补偿电路补偿范围大的特点，将像素补偿电路的内部补偿法与外部补偿法相结合，在OLED显示面板驱动点亮之前，首先通过外部补偿单元20进行外部补偿，获取每个像素单元电路10的驱动薄膜晶体管的初始实际阈值电压Vth1，在OLED显示面板驱动点亮的过程中，将初始实际阈值电压Vth1与该像素单元电路10对应的输入信号进行叠加后得到一叠加数据信号data，将该叠加数据信号data输入至每个像素单元电路10中，随着像素单元电路10的内部补偿的过程一起作用，在整个过程中，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始实际阈值电压Vth1不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压Vth漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压Vth漂移。
例如，当OLED显示面板由于制程原因导致面内每个驱动薄膜晶体管的初始实际阈值电压Vth1相差±1V时，如果只进行内部补偿，则每个像素单元电路10的流经有机发光二极管D的电流I OLED的差异可高达10%左右，此时OLED显示面板将呈现出明显的不均匀性；而本发明可将每个像素单元电路10的流经有机发光二极管D的电流I OLED的最大与最小差异控制在2%以内，此时面板均匀性能得到大大提高；
当OLED显示面板只进行外部补偿而没有内部补偿时，由于温度或电压应力的作用，每个驱动薄膜晶体管的实际阈值电压Vth漂移±0.5V，则每个像素单元电路10的流经发光二极管D的电流I OLED的差异可高达25%左右；而本发明可将每个像素单元电路10的流经发光二极管D的电流I OLED的最大与最小差异控制在5%以内，此时面板均匀性能得到大大提高。
综上所述，本发明的OLED显示面板包括多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元，所述外部补偿单元对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号输入至每个像素单元电路中，所述像素单元电路根据叠加数据信号进行内部补偿；即本发明将外部补偿与内部补偿相结合，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。本发明的OLED显示面板的驱动方法将外部补偿与内部补偿相结合，外部补偿能补偿OLED显示面板中由于制程导致的每个驱动薄膜晶体管初始阈值电压不均匀性以及由于外界应力造成的驱动薄膜晶体管永久的实际阈值电压漂移，而内部补偿能够即时补偿OLED显示面板在点亮过程中发生的相对较小的实际阈值电压漂移。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种OLED显示面板，包括：多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元；
    所述外部补偿单元用于对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号至每个像素单元电路中；
    所述像素单元电路用于根据叠加数据信号进行内部补偿，从而补偿驱动薄膜晶体管的实际阈值电压的漂移。
  2. 如权利要求1所述的OLED显示面板，其中，所述像素单元电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、存储电容及有机发光二极管；
    所述第一薄膜晶体管的栅极电性连接第一节点，源极电性连接第二节点，漏极接入电源正电压；该第一薄膜晶体管为驱动薄膜晶体管；
    所述第二薄膜晶体管的栅极电性连接第一控制信号，源极接入叠加数据信号，漏极电性连接第一节点；
    所述第三薄膜晶体管的栅极电性连接第二控制信号，源极接入初始电压，漏极电性连接第二节点；
    所述存储电容的一端电性连接第一节点，另一端电性连接第二节点；
    所述有机发光二极管的阳极电性连接第二节点，阴极接入电源负电压。
  3. 如权利要求2所述的OLED显示面板，其中，所述第一薄膜晶体管、第二薄膜晶体管以及第三薄膜晶体管均为N型薄膜晶体管。
  4. 如权利要求3所述的OLED显示面板，其中，所述第一控制信号、第二控制信号、叠加数据信号及初始电压相组合，先后对应于一初始化阶段、一电压编程阶段、一数据信号输入阶段以及一显示发光阶段。
  5. 如权利要求4所述的OLED显示面板，其中，在所述初始化阶段中，所述第一控制信号为高电位，所述第二控制信号为高电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位；
    在所述电压编程阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和基准电压，所述初始电压为低电位；所述基准电压的电位大于初始电压的电位；
    在所述数据信号输入阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和数据信号电压，所述初始电压为低电位；所述数据信号电压的电位大于基准电压的电位；
    在所述显示发光阶段中，所述第一控制信号为低电位，所述第二控制信号为低电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位。
  6. 一种OLED显示面板的驱动方法，包括如下步骤：
    步骤S1、提供OLED显示面板，所述OLED显示面板包括：多个像素单元电路以及与多个像素单元电路均连接的外部补偿单元；
    步骤S2、所述外部补偿单元对每个像素单元电路进行外部补偿，获取每个像素单元电路的驱动薄膜晶体管的初始阈值电压，并将初始阈值电压与该像素单元电路对应的输入信号进行叠加后得到一叠加数据信号，将该叠加数据信号输入至每个像素单元电路中；
    步骤S3、所述像素单元电路根据叠加数据信号进行内部补偿，从而补偿驱动薄膜晶体管的实际阈值电压的漂移。
  7. 如权利要求6所述的OLED显示面板方法，其中，所述像素单元电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、存储电容及有机发光二极管；
    所述第一薄膜晶体管的栅极电性连接第一节点，源极电性连接第二节点，漏极接入电源正电压；该第一薄膜晶体管为驱动薄膜晶体管；
    所述第二薄膜晶体管的栅极电性连接第一控制信号，源极接入叠加数据信号，漏极电性连接第一节点；
    所述第三薄膜晶体管的栅极电性连接第二控制信号，源极接入初始电压，漏极电性连接第二节点；
    所述存储电容的一端电性连接第一节点，另一端电性连接第二节点；
    所述有机发光二极管的阳极电性连接第二节点，阴极接入电源负电压。
  8. 如权利要求7所述的OLED显示面板方法，其中，所述第一薄膜晶体管、第二薄膜晶体管以及第三薄膜晶体管均为N型薄膜晶体管。
  9. 如权利要求8所述的OLED显示面板方法，其中，所述步骤S3中，所述第一控制信号、第二控制信号、叠加数据信号及初始电压相组合，先后对应于一初始化阶段、一电压编程阶段、一数据信号输入阶段以及一显示发光阶段。
  10. 如权利要求9所述的OLED显示面板方法，其中，在所述初始化阶段中，所述第一控制信号为高电位，所述第二控制信号为高电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位；
    在所述电压编程阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和基准电压，所述初始电压为低电位；所述基准电压的电位大于初始电压的电位；
    在所述数据信号输入阶段中，所述第一控制信号为高电位，所述第二控制信号为低电位，所述叠加数据信号为叠加后的初始阈值电压和数据信号电压，所述初始电压为低电位；所述数据信号电压的电位大于基准电压的电位；
    在所述显示发光阶段中，所述第一控制信号为低电位，所述第二控制信号为低电位，所述叠加数据信号为初始电压的电位，所述初始电压为低电位。
PCT/CN2019/088665 2019-04-19 2019-05-27 Oled 显示面板及其驱动方法 WO2020211167A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/496,444 US11308882B2 (en) 2019-04-19 2019-05-27 Organic light-emitting diode display panel and driving method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910319983.8A CN110070833B (zh) 2019-04-19 2019-04-19 Oled显示面板及其驱动方法
CN201910319983.8 2019-04-19

Publications (1)

Publication Number Publication Date
WO2020211167A1 true WO2020211167A1 (zh) 2020-10-22

Family

ID=67368230

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/088665 WO2020211167A1 (zh) 2019-04-19 2019-05-27 Oled 显示面板及其驱动方法

Country Status (3)

Country Link
US (1) US11308882B2 (zh)
CN (1) CN110070833B (zh)
WO (1) WO2020211167A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109920373B (zh) * 2017-12-13 2021-05-18 京东方科技集团股份有限公司 电路驱动补偿方法、电路驱动方法及装置、显示装置
CN110491326A (zh) 2019-08-28 2019-11-22 深圳市华星光电半导体显示技术有限公司 像素电路、显示面板及显示装置
CN111179793B (zh) * 2020-01-06 2022-03-25 京东方科技集团股份有限公司 显示基板的检测方法及装置
CN111312160B (zh) * 2020-03-31 2021-06-01 深圳市华星光电半导体显示技术有限公司 像素驱动电路及显示面板
CN111429853B (zh) 2020-04-28 2022-10-04 深圳市华星光电半导体显示技术有限公司 背光模组和显示设备
CN114787906B (zh) 2020-10-28 2024-06-14 京东方科技集团股份有限公司 显示装置、电压采集电路和方法
CN113112953B (zh) * 2021-04-16 2022-07-12 深圳市华星光电半导体显示技术有限公司 显示面板的显示控制方法及显示装置
CN114927102B (zh) * 2022-05-30 2023-12-05 京东方科技集团股份有限公司 像素驱动电路及其驱动方法、显示面板、显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103700347A (zh) * 2014-01-10 2014-04-02 深圳市华星光电技术有限公司 有机发光二极管的驱动电路
CN106991969A (zh) * 2017-06-09 2017-07-28 京东方科技集团股份有限公司 显示面板、像素的补偿电路和补偿方法
CN107393477A (zh) * 2017-08-24 2017-11-24 深圳市华星光电半导体显示技术有限公司 顶发射amoled像素电路及其驱动方法
CN107863067A (zh) * 2017-12-05 2018-03-30 京东方科技集团股份有限公司 显示装置、像素电路及其补偿方法和补偿装置
KR20180058268A (ko) * 2016-11-23 2018-06-01 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그의 구동 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101359440B (zh) * 2007-07-31 2013-02-06 奇美电子股份有限公司 改善阈值电压偏移的补偿电路及其方法
KR101065418B1 (ko) * 2010-02-19 2011-09-16 삼성모바일디스플레이주식회사 표시 장치 및 그 구동 방법
CN106128366B (zh) * 2016-09-19 2018-10-30 成都京东方光电科技有限公司 像素驱动电路及其驱动方法和显示装置
CN107492344A (zh) * 2017-08-18 2017-12-19 深圳市华星光电半导体显示技术有限公司 用于oled显示设备的像素驱动电路、oled显示设备

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103700347A (zh) * 2014-01-10 2014-04-02 深圳市华星光电技术有限公司 有机发光二极管的驱动电路
KR20180058268A (ko) * 2016-11-23 2018-06-01 삼성디스플레이 주식회사 유기 발광 표시 장치 및 그의 구동 방법
CN106991969A (zh) * 2017-06-09 2017-07-28 京东方科技集团股份有限公司 显示面板、像素的补偿电路和补偿方法
CN107393477A (zh) * 2017-08-24 2017-11-24 深圳市华星光电半导体显示技术有限公司 顶发射amoled像素电路及其驱动方法
CN107863067A (zh) * 2017-12-05 2018-03-30 京东方科技集团股份有限公司 显示装置、像素电路及其补偿方法和补偿装置

Also Published As

Publication number Publication date
US20220028339A1 (en) 2022-01-27
US11308882B2 (en) 2022-04-19
CN110070833B (zh) 2020-08-04
CN110070833A (zh) 2019-07-30

Similar Documents

Publication Publication Date Title
WO2020211167A1 (zh) Oled 显示面板及其驱动方法
WO2020037767A1 (zh) Amoled像素驱动电路、驱动方法及显示面板
US9812082B2 (en) Pixel circuit, driving method, display panel and display device
WO2018045667A1 (zh) Amoled像素驱动电路及驱动方法
WO2016145693A1 (zh) Amoled像素驱动电路及像素驱动方法
JP2023103232A (ja) 画素
JP6039690B2 (ja) 画素回路及びその駆動方法
WO2019148559A1 (zh) Oled显示装置
WO2018149008A1 (zh) Amoled像素驱动电路及amoled像素驱动方法
WO2017031909A1 (zh) 像素电路及其驱动方法、阵列基板、显示面板及显示装置
WO2015180278A1 (zh) 像素电路及其驱动方法、显示装置
WO2016119304A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2016123855A1 (zh) Amoled像素驱动电路及像素驱动方法
TW201803108A (zh) 像素、使用其之有機發光顯示裝置以及驅動有機發光顯示裝置的方法
WO2016165529A1 (zh) 像素电路及其驱动方法、显示装置
WO2019037300A1 (zh) Amoled像素驱动电路
WO2016123852A1 (zh) Amoled像素驱动电路
WO2019242147A1 (zh) Amoled像素驱动电路及驱动方法
WO2019085485A1 (zh) 一种像素电路及其驱动方法、显示装置
WO2015192399A1 (zh) 有机发光二极管的像素驱动电路及像素驱动方法
US20170018226A1 (en) Pixel driving circuit, pixel driving method, and display device
WO2016119305A1 (zh) Amoled像素驱动电路及像素驱动方法
TWM573056U (zh) Pixel circuit and display device
CN106935201A (zh) 像素电路及其驱动方法和有源矩阵有机发光显示器
CN107369412B (zh) 一种像素电路及其驱动方法、显示装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19924950

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19924950

Country of ref document: EP

Kind code of ref document: A1