WO2023216148A1 - 电子设备和通信系统 - Google Patents

电子设备和通信系统 Download PDF

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Publication number
WO2023216148A1
WO2023216148A1 PCT/CN2022/092234 CN2022092234W WO2023216148A1 WO 2023216148 A1 WO2023216148 A1 WO 2023216148A1 CN 2022092234 W CN2022092234 W CN 2022092234W WO 2023216148 A1 WO2023216148 A1 WO 2023216148A1
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Prior art keywords
power
mode
electronic device
power divider
input port
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PCT/CN2022/092234
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English (en)
French (fr)
Inventor
崔科技
高鹏
余永长
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华为技术有限公司
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Priority to PCT/CN2022/092234 priority Critical patent/WO2023216148A1/zh
Publication of WO2023216148A1 publication Critical patent/WO2023216148A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/401—Circuits for selecting or indicating operating mode

Definitions

  • the present disclosure relates to the field of communication systems, and in particular to an electronic device and a communication system.
  • Radio frequency (RF) is a high-frequency alternating electromagnetic wave, which represents electromagnetic frequencies that can be radiated into space.
  • a radio frequency chip refers to an electronic component that converts radio signal communication into a certain radio signal waveform and sends it out through antenna resonance. It generally includes a power amplifier, a low-noise amplifier and an antenna switch.
  • the radio frequency chip architecture usually includes two parts: the receiving channel and the transmitting channel.
  • the frequencies between the modulation/demodulation (baseband) signal and the RF signal may be significantly different, which may require multiple frequency conversion stages.
  • an intermediate frequency (IF) is generated in the upconversion/downconversion stages between the RF signal and the baseband signal.
  • the so-called intermediate frequency refers to a signal form of intermediate frequency.
  • Intermediate frequency is relative to baseband signals and radio frequency signals.
  • Intermediate frequency can have one or more levels. It is the bridge between baseband and radio frequency.
  • general receivers In order to make the amplifier work stably and reduce interference, general receivers must convert high-frequency signals into intermediate-frequency signals.
  • radio frequency transceivers are usually switched with multiple arrays or multi-chip arrays.
  • the method of multi-array switching or multi-chip array is usually driven by an IF transceiver.
  • the mid-frequency drive network using this mode in traditional solutions often has problems such as high design complexity, high cost, and transient power jumps.
  • the present disclosure relates to technical solutions regarding an intermediate frequency drive network, and specifically provides an electronic device such as an intermediate frequency transceiver and a communication system using the electronic device.
  • an electronic device in a first aspect of the present disclosure, includes a power splitter array, including a total input port and a plurality of divided output ports, wherein the power splitter array has a switchable filter mode and a power splitter mode, and in the power splitter mode, the The power divider array is used to realize power distribution of signals from the main input port to the multiple sub-output ports; in the filter mode, the power divider array is used to divide the main input port and the The signals transmitted between multiple sub-output ports are filtered.
  • Electronic devices according to embodiments of the present disclosure can reduce board-level wiring complexity by providing a power splitter array capable of switching working modes. Reducing the complexity of board-level wiring is beneficial to the miniaturization of electronic devices and can reduce design difficulty.
  • the power divider array includes a first power divider array and a second power divider array, and the first power divider array and the second power divider array each include at least one power divider.
  • each power splitter in the at least one power splitter includes a mode switching circuit, the mode switching circuit is used to switch the working mode of the power splitter array.
  • the power splitter switches in a first mode and a second mode according to the state of the mode switching circuit, the first mode corresponds to the power splitter mode, and the second mode Corresponds to the filter mode.
  • each power divider further includes a power divider input port, a first radio frequency side port and a second radio frequency side port; a pair of transmission lines with equal equivalent lengths are respectively provided at the first radio frequency side port. and between the power division input port and the second radio frequency side port and the power division input port; and a resistor branch including coupling between the first radio frequency side port and the second radio frequency side port The resistance.
  • the mode switching circuit includes: a first switch connected in series with the resistor in the resistance branch; and a pair of adjustment branches respectively coupled to the first radio frequency side port and the second radio frequency side port.
  • the side port is used to adjust the impedance to ground.
  • the adjustment branch includes a first capacitor and a second switch coupled in series between the first radio frequency side port and the reference ground; and a first capacitor and a second switch coupled between the second radio frequency side port and the reference ground.
  • a second capacitor and a third switch are connected in series between the ground reference.
  • the adjustment branch has the characteristics of a low-pass filter for filtering out high-frequency noise. This approach allows the power splitter array to implement a low-pass filter mode.
  • the power divider switches between the first mode and the second mode according to the states of the first switch, the second switch and the third switch.
  • the power divider switches from the power divider to the second mode.
  • the signal input by the input port is divided into two paths to be output at the first radio frequency side port and the second radio frequency side port respectively; and in the second mode, the first radio frequency side port is configured to output no signal, so
  • the branch of the signal transmitted between the second radio frequency side port and the power division input port is configured as a low-pass filter characteristic.
  • the first switch in the first mode, the first switch is closed, the second switch and the third switch are open, and in the second mode, the first switch is open, One of the second switch and the third switch is open and the other is closed.
  • the at least one power divider includes a multi-stage power divider connected in a cascade manner, and the multi-stage power divider includes a first-stage power divider, and the first-stage power divider
  • the power dividing input port of the power divider in the power divider is used as the total input port of the power divider array, and the first power divider of each power divider in the last stage power divider in the multi-stage power divider is
  • the radio frequency side port and the second radio frequency side port serve as branch output ports of the power splitter array.
  • the multi-stage power divider further includes an N-th stage power divider, having 2 (N-1) pairs of power dividers, and each of the two power dividers of the N-th stage power divider has The power division input ports are respectively coupled to the first radio frequency side port and the second radio frequency side port of one power divider in the upper stage power divider, where N is an integer greater than 1.
  • the electronic device further includes a first duplexer, including a first input port and a second input port, and an output port.
  • the first input port of the first duplexer is used to receive a control data signal.
  • the second input port of the first duplexer is used to receive the first intermediate frequency signal
  • the output port of the first duplexer is used to couple with the total input port of the first power divider array;
  • the second duplexer A duplexer including a third input port and a fourth input port, and an output port.
  • the third input port of the second duplexer is used to receive a clock signal.
  • the fourth input port of the second duplexer is used to A second intermediate frequency signal is received, and the output port of the second duplexer is used to couple with the total input port of the second power splitter array.
  • the equivalent length of the transmission line is one quarter of the center wavelength corresponding to the frequency of the intermediate frequency signal processed by the power splitter.
  • the power splitter array is used to achieve average power distribution of signals from the total input port to the plurality of divided output ports.
  • the frequencies of the first intermediate frequency signal and the second intermediate frequency signal at least partially overlap.
  • the electronic device is an intermediate frequency transceiver.
  • a communication system includes the electronic device described in the first aspect above, and a plurality of radio frequency transceivers coupled to branch output ports of a power splitter array of the electronic device.
  • the first input port of the first duplexer of the electronic device is used to receive the control data signal
  • the second input port of the first duplexer is used to receive the first intermediate frequency signal
  • the The output port of the first duplexer is used to couple with the general input port of the first power divider array of the electronic device
  • the third input port of the second duplexer of the electronic device is used to receive a clock signal
  • the fourth input port of the second duplexer is used to receive the second intermediate frequency signal
  • the output port of the second duplexer is used to couple with the total input port of the second power divider array of the electronic device
  • Each of the radio frequency transceivers is coupled to a corresponding sub-output port of the first and second power splitter arrays.
  • the communication system when the power splitter in the electronic device works in the first mode, the communication system works in the small base station mode, and when the power splitter works in the second mode, The communication system works in user terminal mode.
  • Figures 1 to 4 illustrate the wiring method of the phased array system in the traditional solution in an exemplary manner
  • Figure 5 shows a wiring pattern of a phased array system including electronic equipment according to an embodiment of the present disclosure
  • Figure 6 shows a schematic diagram of a conventional power splitter and a power splitter according to an embodiment of the present disclosure
  • Figure 7 shows a simulation result diagram of a power divider according to an embodiment of the present disclosure.
  • FIGS. 8 and 9 illustrate schematic diagrams of operating modes of a power splitter array according to embodiments of the present disclosure.
  • the term “includes” and similar expressions shall be understood to be open-ended, ie, “including, but not limited to.”
  • the term “based on” should be understood to mean “based at least in part on.”
  • the terms “one embodiment” or “the embodiment” should be understood to mean “at least one embodiment”.
  • the terms “first”, “second”, etc. may refer to different or the same objects and are used only to distinguish the objects referred to and do not imply a specific spatial order, temporal order, importance of the objects referred to. Sexual order, etc.
  • circuit refers to one or more of: (a) a hardware circuit implementation only (such as an implementation of analog and/or digital circuits only); and (b) a combination of hardware circuitry and software, Such as, if applicable: (i) a combination of analog and/or digital hardware circuitry with software/firmware, and (ii) any part of a hardware processor with software (including working together to enable a device, such as a communications device or other electronic device etc., digital signal processors, software and memory that perform various functions); and (c) hardware circuitry and/or processors, such as microprocessors or portions of microprocessors that require software (e.g., firmware) for operation , but can be without software when it is not required for operation.
  • software e.g., firmware
  • circuitry as used herein also covers implementations of only a hardware circuit or processor (or processors), or a portion of a hardware circuit or processor, or accompanying software or firmware.
  • circuit also covers baseband integrated circuits or similar integrated circuits in processor integrated circuits, network equipment, terminal equipment or other equipment.
  • Coupled can be understood as direct coupling and/or indirect coupling.
  • Direct coupling can also be called “electrical connection”, which is understood as the physical contact and electrical conduction of components; it can also be understood as the printed circuit board (PCB) copper foil or wires between different components in the circuit structure.
  • PCB printed circuit board
  • indirect coupling can be understood as two conductors being electrically connected through space/non-contact.
  • indirect coupling may also be called capacitive coupling, for example, signal transmission is achieved by forming an equivalent capacitance through coupling between a gap between two conductive members.
  • Transmission line also called feeder line, refers to the connection line between the antenna's transceiver and radiator. Transmission lines can directly transmit current waves or electromagnetic waves depending on the frequency and form.
  • the connection point on the radiator to the transmission line is usually called the feed point.
  • Transmission lines include wire transmission lines, coaxial transmission lines, waveguides, or microstrip lines, etc.
  • the transmission line may include a bracket antenna body, a glass antenna body, etc.
  • the transmission line can be implemented by LCP (liquid crystal polymer, liquid crystal polymer material), FPC (flexible printed circuit, flexible printed circuit board), or PCB (printed circuit board, printed circuit board), etc.
  • Reference ground/ground plane It can generally refer to at least part of any ground layer, or ground plane, or ground plate, or ground metal layer, etc. in an electronic device, or any combination of any of the above ground layers, or ground plates, or ground components, etc. At least part of the "reference ground/ground plane” can be used for grounding components within electronic equipment. For example, it is suitable for providing a ground reference point for radio frequency signals, which can include DC ground and AC ground.
  • the "reference ground/ground plane” may be the ground layer of the circuit board of the electronic device, or it may be the ground plate formed by the middle frame of the electronic device or the ground metal layer formed by the metal film under the screen.
  • the circuit board includes a dielectric substrate, a ground layer and a wiring layer, and the wiring layer and the ground layer are electrically connected through vias.
  • components such as a display, touch screen, input buttons, transmitter, processor, memory, battery, charging circuit, system on chip (SoC) structure, etc. may be mounted on or connected to the circuit board; Or electrically connected to trace and/or ground planes in the circuit board.
  • SoC system on chip
  • the RF source is placed on the wiring layer.
  • Resonance frequency band/communication frequency band/working frequency band No matter what type of antenna, it always works within a certain frequency range (frequency band width).
  • the working frequency band of an antenna that supports the B40 frequency band includes frequencies in the range of 2300MHz to 2400MHz, or in other words, the working frequency band of the antenna includes the B40 frequency band.
  • the frequency range that meets the index requirements can be regarded as the working frequency band of the antenna.
  • the width of the working frequency band is called the working bandwidth.
  • the operating bandwidth of an omnidirectional antenna may reach 3-5% of the center frequency.
  • the operating bandwidth of a directional antenna may be 5-10% of the center frequency.
  • Bandwidth can be thought of as a range of frequencies on either side of a center frequency (e.g., the resonant frequency of a dipole) in which the antenna characteristics are within acceptable values for the center frequency.
  • Equivalent length Due to factors such as the transmission distance, the set capacitance and/or inductance, and radiation impedance, electromagnetic waves will cause phase differences when they are transmitted on the transmission medium. If the phase difference caused is the same as the phase difference caused when the guided wave is transmitted through a transmission line of a predetermined length, a predetermined dielectric constant and no radiation capability, then the equivalent length transmitted in the transmission medium is equal to the predetermined length of the transmission line .
  • the equivalent length may be affected by the physical length of the corresponding transmission line in the transmission medium, the capacitance and/or inductance provided in the transmission medium, the phase shifter provided, the position at which the transmission line is coupled to the radiator, etc.
  • the physical length can be shortened while the equivalent length remains basically unchanged.
  • the relationship between the physical length L and the equivalent length Le can satisfy: (1-1/3)Le ⁇ L ⁇ (1+1/3)Le, or (1-1/4 )Le ⁇ L ⁇ (1+1/4)Le.
  • Baseband/Baseband signal It can also be translated as the inherent frequency band (frequency bandwidth) of the original electrical signal without modulation (spectrum movement and transformation) emitted by the "information source” (information source, also called the transmitting terminal), which is called the basic Frequency band, referred to as baseband.
  • Baseband corresponds to frequency band.
  • Frequency band the frequency bandwidth occupied by the baseband signal before modulation (the difference from the lowest frequency to the highest frequency occupied by a signal).
  • baseband signals are transmitted without modulation, that is, the frequency range of the signal does not have any shift, and the frequency is very low, including the frequency band from close to 0Hz to a higher cutoff frequency or maximum bandwidth.
  • baseband is also used to refer to the communication module (modem) of a mobile phone, as well as to the corresponding control software (firmware).
  • Radio frequency (RF) It is a high-frequency alternating electromagnetic wave, which represents the electromagnetic frequency that can be radiated into space.
  • a radio frequency chip refers to an electronic component that converts radio signal communication into a certain radio signal waveform and sends it out through antenna resonance. It generally includes a power amplifier, a low-noise amplifier and an antenna switch.
  • the radio frequency chip architecture usually includes two parts: the receiving channel and the transmitting channel.
  • Intermediate frequency The frequency between the modulation/demodulation (baseband) signal and the radio frequency signal may be very different, which may require multiple frequency conversion stages. In these cases, an upconversion/downconversion stage is created between the RF signal and the baseband signal.
  • the so-called intermediate frequency refers to a signal form of intermediate frequency. Intermediate frequency is relative to baseband signals and radio frequency signals. Intermediate frequency can have one or more levels. It is the bridge between baseband and radio frequency. In order to make the amplifier work stably and reduce interference, general receivers must convert high-frequency signals into intermediate-frequency signals.
  • a phased array is an antenna composed of many radiating units arranged in an array. The radiation energy and phase relationship between each unit can be controlled.
  • a typical phased array uses an electronic computer to control a phase shifter to change the phase distribution on the antenna aperture to achieve spatial scanning of the beam, that is, electronic scanning, or electrical scanning for short.
  • Phase control can adopt phase method, real-time method, frequency method and electronic feed switch method.
  • Arranging several radiating units in one dimension is called a linear array, and arranging several radiating units in two dimensions is called a planar array.
  • the radiating elements can also be arranged on a curve or a curved surface. This type of antenna is called a conformal array antenna.
  • Conformal array antennas can overcome the shortcomings of small scanning angles of linear arrays and planar arrays, and can achieve full airspace electrical scanning with one antenna.
  • Common conformal array antennas include ring array, circular array, conical array, cylindrical array, hemispheric array, etc.
  • a duplexer is a passive device that implements frequency domain multiplexing. Two ports (such as L and H) are multiplexed to a third port (such as S). The signals on ports L and H occupy disjoint frequency bands. Therefore, signals on ports L and H can coexist on port S without interfering with each other.
  • a duplexer allows two signal paths to be used on the same transmission line (such as an antenna). This is achieved through filters that separate the frequencies of interest, allowing two signals of different frequencies (such as control signals and communication signals) to be sent and received from the same antenna.
  • a multiplexer also called a data selector or multiplexer, is a device that can select one signal from multiple analog or digital input signals for output.
  • a data selector with 2 n input terminals has n selectable input-output lines, and one of the signals can be selected as the output through the control terminal.
  • Data selectors are primarily used to increase the amount of data that can be sent over the network within a certain amount of time and bandwidth.
  • a power splitter is a device that divides one input signal energy into two or more channels to output equal or unequal energy. It can also combine multiple channels of signal energy into one output. In this case, it can also be called a combiner.
  • Wilkinson power splitter is a common power splitter, which is implemented using a 1/4 wavelength transmission line. Wilkinson power splitter has many advantages: 1) simple implementation; 2) low cost; 3) good isolation between ports.
  • Insertion loss is the loss of energy or gain when certain devices or branch circuits (filters, impedance matchers, etc.) are added to a circuit. It refers to the loss of energy or gain somewhere in the transmission system due to components or devices.
  • the load power loss that occurs due to the insertion of the component or device is expressed as the ratio in decibels of the power received by the load before the component or device is inserted and the power received by the same load after insertion.
  • High-impedance state also called high-impedance state
  • the high resistance state is equivalent to the isolation state.
  • the low resistance state is equivalent to a short-circuit state, and the input of the component affects the output.
  • the IF drive network driven by the IF transceiver is shown in Figure 1.
  • the IF transceiver drives the subsequent RF transceiver.
  • the IF driver network shown in Figure 1 can be applied to terminal application scenarios or small base station scenarios. When used in terminal application scenarios such as mobile phones, the radio frequency transceiver or its specific radiation unit points in different directions to improve spatial coverage.
  • the four radio frequency transceivers will switch to select the radio frequency transceiver that points appropriately.
  • RF transceivers usually use multi-chip arrays to improve the transmitting equivalent isotropically radiated power (EIRP) and receiving sensitivity.
  • EIRP equivalent isotropically radiated power
  • the array of four RF transceiver chips it can form a 1 ⁇ 4 (shown in Figure 1) or 2 ⁇ 2 array.
  • the EIRP can be increased by 12dB for the transmitting side and the sensitivity can be increased by 6dB for the receiving side. Therefore, the use of radio frequency transceiver chip arrays can greatly increase the transmission and reception distance.
  • multiple RF transceiver chips in order to achieve the array effect, multiple RF transceiver chips generally need to be phase synchronized, so the intermediate frequency drivers of multiple RF transceivers need to be synchronized.
  • each RF transceiver chip requires two intermediate frequency inputs (IF_V and IF_H) to drive it. Dual polarized output.
  • each chip requires at least two digital lines to control inputs, namely data (DATA) input and clock (CLOCK, CLK) input. Therefore, the IF transceiver chip 500 needs to drive 8 IF and 8 digital lines, which greatly increases the difficulty of board-level wiring design.
  • a duplexer 605 is integrated inside the IF transceiver 600, as shown in Figure 2.
  • duplexer 605 may also be implemented by external components.
  • the duplexer 605 combines intermediate frequency communication signals (typically frequencies >1GHz) and digital control signals (typically frequencies ⁇ 1GHz) into a single output.
  • the input of the RF transceiver chip has been adjusted accordingly so that it can receive and process control signals as well as communication signals. Therefore, the traces between the IF transceiver 600 and each radio frequency transceiver 601 are reduced to two. This method can be adapted to user terminal and small base station scenarios at the same time, which reduces the wiring complexity by half.
  • the duplexer 605 is manufactured using special processes such as integrated passive device (IPD), its cost is high. Only the solution using 4 RF transceivers 601 uses 8 duplexers 605, so its cost is relatively high.
  • the IF transceiver 600 of this solution is output by multiple IF communication signals, in the user terminal scenario, generally only a single RF transceiver is required to work. Therefore, the IF driver stage design is redundant, which is not conducive to reducing the user terminal scenario. Inferior costs.
  • some IF transceivers 700 adopt an architecture based on duplexers and power dividers, as shown in Figure 3 .
  • this embodiment only two duplexers 705 are used in an IF transceiver.
  • Each duplexer drives a 1/4 power divider 707, and the power divider 707 drives four RF transceiver chips 701. .
  • this solution can use power dividers to drive multiple RF transceiver chips.
  • the closing impedance of the intermediate frequency input port in the other turned off radio frequency transceiver 701 chip needs to be reasonably designed to avoid affecting the work.
  • the radio frequency transceiver in the device is affected.
  • This additional design of the IF input port significantly increases the design complexity of the circuit.
  • the output power of the IF transceiver 700 needs to maintain and drive the same power as in the small base station mode due to the insertion loss introduced by the power splitter 707 , which increases the power consumption in the user terminal mode. .
  • the IF transceiver 800 adopts a duplexer 805 and a switch architecture 808, as shown in FIG. 4 .
  • an IF transceiver 800 it is the same as the solution mentioned above, using two duplexers 805, followed by a 4-to-1 switch component 808.
  • the four outputs of the switch component 808 are respectively connected to four radio frequency transceivers 801.
  • the 4-to-1 switches In the user terminal mode, only one of the 4-to-1 switches is turned on, and the other switches are turned off. By controlling the turning on and off of different switches, the array switching of the radio frequency transceiver 801 is realized.
  • the IF transceiver 800 using the architecture of Figure 4 can only be used in user terminal scenarios and cannot be applied in small base station scenarios.
  • the other RF transceiver chip required for switching needs to be pre-opened (numeric and analog conduction, RF closure).
  • EVM Transient error vector magnitude
  • embodiments of the present disclosure provide an electronic device such as an intermediate frequency transceiver, which can simultaneously support the needs of user terminals and small base station scenarios, and can Significantly reduce the board-level wiring complexity of multi-chip arrays in phased array systems with low cost and low complexity.
  • the insertion loss of the intermediate frequency drive network is low, which is beneficial to reducing power consumption.
  • CPE customer premise equipment
  • SIM subscriber identification module
  • FIG. 5 shows a schematic diagram of an intermediate frequency driving network of an electronic device architecture according to an embodiment of the present disclosure.
  • an intermediate frequency driving network includes electronic equipment such as an intermediate frequency transceiver.
  • the electronic device includes a power splitter array 107 .
  • the electronic device 100 may further include a duplexer 105 coupled to the power splitter array 107.
  • each duplexer 105 includes two input ports (ie, baseband side port 1053) respectively coupled to a control signal processor and a communication signal (ie, intermediate frequency signal) processor.
  • the electronic device may include two duplexers 105, as shown in Figure 5.
  • the two duplexers 105 may be referred to as first duplexer 1051 and second duplexer 1052 respectively.
  • a data port in the control signal processor that provides a control data (DATA) signal is coupled to a first input port of the first duplexer 1051, and a clock port that provides a clock (CLK) signal is coupled to the second duplexer 1052.
  • the first duplexer 1051 also has a second input port coupled to a first communication signal processor, and the first communication signal processor is configured to provide a first intermediate frequency (IF) signal.
  • the second duplexer 1052 also has a fourth input port coupled to a second communications signal processor for providing a second intermediate frequency signal.
  • the first intermediate frequency signal and the second intermediate frequency signal may be in the same or similar frequency band.
  • the frequencies of the communication signals provided by the first communication signal processor and the second communication signal processor at least partially overlap.
  • the embodiment in which the electronic device adopts two duplexers 105 is only illustrative and is not intended to limit the scope of the present disclosure. It is possible to have any other suitable number of duplexers 105 in the electronic device depending on the ports to be connected.
  • an electronic device having two duplexers 105 shown in FIG. 5 will be mainly used as an example to describe the inventive concept according to the present disclosure. It should be understood that the electronic device having other numbers of duplexers 105 is also similar. , will not be described separately below.
  • the power splitter array 107 has a main input port and a plurality of divided output ports. Each main input port is coupled to the output port 1054 of the duplexer 105, and the plurality of sub-output ports are coupled to the plurality of radio frequency transceivers 201 respectively.
  • FIG. 5 shows two power divider arrays corresponding to the first duplexer 1051 and the second duplexer 1052, that is, the first power divider array 1071 and the second power divider array 1072.
  • the output port 1054 of the first duplexer 1051 is coupled to the general input port of the first power divider array 1071
  • the output port of the second duplexer 1052 is coupled to the general input port of the second power divider array 1072 .
  • the four output ports of the first power splitter array 1071 shown in Figure 5 are respectively coupled to the first feed interfaces IF1_V, IF2_V, IF3_V and IF4_V of the four radio frequency transceivers 201, and the second power splitter array 1072
  • the four sub-output ports are respectively coupled to the second feed interfaces IF1_H, IF2_H, IF3_H and IF4_H of the four radio frequency transceivers 201. It should be understood that if there are other numbers of duplexers 105, there will be a corresponding number of power divider arrays 107.
  • the power divider array 107 in the electronic equipment can operate in the filter mode and the power divider mode, and the two modes can be switched through a specific circuit (this will be discussed below for further explanation).
  • the power splitter mode the power splitter array 107 can achieve power distribution of signals from the main input port to multiple sub-output ports.
  • power splitter array 107 can achieve average power distribution of signals from a total input port to multiple split output ports.
  • the filter mode the power splitter array 107 can be used to filter signals transmitted between the main input port and the plurality of divided output ports.
  • a part of the multiple branch output ports is configured to output no signal, while the signal transmitted between another part of the output port and the main input port exhibits low-pass filter characteristics, which This will be further explained below with reference to the accompanying drawings.
  • the electronic device 100 according to the embodiment of the present disclosure can reduce the board-level wiring complexity when the electronic device 100 is applied between intermediate frequency and radio frequency by providing a power splitter array 107 capable of switching operating modes. Reducing the complexity of board-level wiring is beneficial to the miniaturization of electronic equipment and even the entire communication system and can reduce the difficulty of design.
  • Each power divider array 107 includes at least one power divider 1073 . It is shown in FIG. 5 that each power splitter array 107 includes three power splitters 1073 connected in a cascade manner. The inventive concept according to the present disclosure will also be described below mainly by taking an example in which each power divider array 107 has three power dividers 1073 shown in FIG. 5 . It should be understood that other numbers of power splitters 1073 are possible depending on the number of radio frequency transceivers 201 required to be connected, as will be explained further below.
  • Each power divider 1073 adopts an improved power divider, which includes a mode switching circuit, so that the working mode of the power divider array 107 can be switched.
  • the power divider array 107 can implement at least two modes, namely, a power divider mode and a filter mode.
  • the improvement of the power divider 2073 and the principle of realizing the two modes will be described below with reference to FIG. 6 .
  • Figure 6(A) shows a conventional Wilkinson power divider 5073. Usually the Wilkinson power splitter 5073 is implemented using two sections of quarter-wavelength transmission lines 5079.
  • Each section of the transmission line 5079 can be made of microstrip lines, and its characteristic impedance is Its basic function is to evenly distribute the input power input from the power division input port 5076 to the two output ports (i.e., the first RF side port 5077 and the second RF side port 5078). At this time, both S21 and S32 are -3dB ( When the power divider has no time consumption).
  • a resistor is provided between the first radio frequency side port 5077 and the second radio frequency side port 5078 5070, the impedance of the resistor is 2Zo, used to improve the isolation between the two output ports 1054.
  • the power divider 2073 used in the electronic device according to the embodiment of the present disclosure is shown in Figures 6(B) and (C). Compared with the traditional Wilkinson power divider 5073, in addition to the above components, it also Includes mode switching circuit. That is, the power divider 2073 according to the embodiment of the present disclosure includes a power divider input port 2076, a first radio frequency side port 2077 and a second radio frequency side port 2078, and a pair of transmission lines 2079 with equal equivalent lengths. The equivalent length of each transmission line 2079 can be one-quarter of the center wavelength corresponding to the frequency of the communication signal where the power splitter is located, and its impedance can be In addition, the power divider also includes a resistor branch. The resistor branch is coupled between the first RF side port 2077 and the second RF side port 2078 and has a resistor 2070 with an impedance of 2Zo.
  • the mode switching circuit of the power splitter 2073 includes a series-connected switch in a resistor branch (hereinafter referred to as the first switch 2080), and a switch between the first radio frequency side port 2077 and the first RF side port 2077.
  • Adjustment branches are added at port 2078 on the two radio frequency side.
  • Each adjusting branch is used to adjust the impedance to ground.
  • adjusting the impedance to ground may be accomplished through capacitors and switches.
  • a pair of regulation branches may include a first capacitor 2081 and a second switch 2082 coupled between the first RF side port 2077 and the reference ground and a second RF side port 2078 and a second switch 2082 .
  • the second capacitor 2083 and the third switch 2084 are between the reference ground.
  • the power splitter 2073 can switch between the first mode and the second mode. Specifically, when the first switch 2080 is closed and the second switch 2082 and the third switch 2084 are open, the power divider 2073 shown in FIG. 6(B) operates in the first mode. At this time, the power divider 2073 becomes the same structure as Figure 6(A). If all power dividers 1073 in the power divider array 107 in FIG. 5 operate in the first mode, the power divider array 107 operates in the power divider mode. At this time, the signal entering from the main input port (whether it is a control signal or a communication signal) can be equally divided into multiple channels and fed into multiple radio frequency transceivers 201 from the branch output ports respectively.
  • the power splitter 2073 When the first switch 2080 is turned off, one of the second switch 2082 and the third switch 2084 is turned off and the other is turned on, the power splitter 2073 operates in the second mode. If all power dividers 1073 in the power divider array 107 in Figure 5 operate in the second mode, the power divider array 107 operates in the filter mode, as shown in Figure 6(C).
  • Figure 6(C) shows that when the first switch 2080 and the second switch 2082 are open and the third switch 2084 is closed, the second capacitor 2083 at the second radio frequency side port 2078 will be connected to the network.
  • the characteristic of the second capacitor 2083 is that it is in a high resistance state at low frequency f0 (for example, less than or equal to the first frequency, such as the frequency of the control signal), that is, close to an open circuit, and at high frequency f1 (for example, greater than or equal to the second frequency,
  • f0 for example, less than or equal to the first frequency, such as the frequency of the control signal
  • high frequency f1 for example, greater than or equal to the second frequency
  • the impedance viewed from the power input port 2076 to the second radio frequency side port 2078 shows that the low frequency f0 is 50ohm (close to the second radio frequency side port 1078 Characteristic impedance), which is reflected in a high resistance state at high frequency f1, that is, close to an open circuit.
  • the adjustment branch has the characteristics of a low-pass filter for filtering out high-frequency noise.
  • FIG. 6(C) only shows one situation in the second mode, that is, the situation where the first switch 2080 and the second switch 2082 are disconnected and the third switch 2084 is closed.
  • the filter mode corresponding to the second mode of a single power divider can achieve more by combining the states of the switches of the power divider between different stages.
  • the required radio frequency transceivers can be controllably stimulated to operate.
  • the power The insertion loss from the sub-input port 2076 to the first radio frequency side port 2077 and the second radio frequency side port 2078 is close to -3dB.
  • the control signals can be effectively transmitted to the radio frequency transceiver 201.
  • the insertion loss from the power division input port 2076 to the second radio frequency side port 2078 is close to infinity, and the insertion loss from the power division input port 2076 to the first radio frequency side port 2077 is close to 0dB.
  • the filter mode in which the first switch 2080 and the third switch 2084 are turned off and the second switch 2082 is turned on is also similar, and will not be described in detail below.
  • the simulation results of the power divider 2073 used in the electronic device according to the embodiment of the present disclosure are shown in Figure 7.
  • the digital low-frequency signal is 0.1GHz and the intermediate-frequency signal is 10GHz.
  • the dotted line in the figure is the simulation result of the power divider 2073 in the first mode.
  • the power divider input port 2076 shown in Figure 6(B) is connected to the first radio frequency side port 2077 and the second radio frequency side port 2078.
  • the losses are all about -3.8dB (high and low frequencies are basically the same).
  • the second mode as shown in FIG.
  • the insertion loss from the power input port 2076 to the first RF side port 2077 and the second RF side port 2078 is still -3.8dB.
  • the insertion loss from the power division input port 2076 to the first radio frequency side port 2077 is about -1.5dB, that is, compared with the power division mode, the insertion loss is reduced by about 2.3dB.
  • the insertion loss from the power division input port 2076 to the second radio frequency side port 2078 is about -21dB.
  • the power divider 2073 is still in the first mode; at high frequency f1, the power divider input port 2076 is directly connected to the first radio frequency side port 2077, and the power divider input port 2076 is connected to the second radio frequency side.
  • Port 2078 is short-circuited, thereby achieving no signal output at the first radio frequency side port, and the signal transmitted between the second radio frequency side port and the power division input port exhibits low-pass filtering characteristics. That is to say, the adjustment branch has the characteristics of a low-pass filter and is used to filter out high-frequency noise, so that the signal transmitted between the second radio frequency side port and the power division input port exhibits low-pass filter characteristics.
  • a splitter array may be formed by cascading power splitters having two modes according to embodiments of the present disclosure as a phased array system IF driver network.
  • the one-to-four power division network uses multiple power dividers 3073 with two modes in cascade according to the embodiment of the present disclosure, as shown in Figure 8 .
  • Figure 8 shows two-stage power dividers 3074 and 3075 connected in a cascade manner.
  • the first stage power divider 3074 includes a power divider 3073, the power divider input port 3076 of the power divider 3073 is coupled to the output port of the corresponding duplexer.
  • the second stage power divider 3075 includes two power dividers 3073 .
  • the power input port 3076 of each power divider 3073 in the second stage power divider 3075 is coupled to the first radio frequency side port 3077 and the second radio frequency side port 3078 of the first stage power divider 3074 respectively.
  • the four radio frequency side ports of the second stage power splitter 3075 are respectively coupled to one port of four radio frequency transceivers.
  • the other port of the four RF transceivers also uses a similar drive structure.
  • the power divider array 307 works in filter mode, and the electronic device works in user terminal mode, as shown in Figure 8(B).
  • the communication signal can be transmitted to the required radio frequency transceiver, or the required radio frequency transceiver can be used to transmit the communication signal to the required radio frequency transceiver.
  • the signal is transmitted to the baseband side for processing.
  • the electronic device can simultaneously support the operation of multiple radio frequency transceivers in user terminal and small base station modes.
  • the insertion loss of electronic equipment is low, which is beneficial to reducing power consumption.
  • the first switch 3080 and the third switch 3084 of each power splitter 3073 in the first-stage power divider 3074 and the second-stage power divider 3075 are disconnected.
  • the second switch 3082 is closed.
  • each of the first-stage power divider 3074 and the second-stage power divider 3075 This can be achieved by opening the first switch 3080 and the second switch 3082 of the power splitter 3073 and closing the third switch 3084.
  • the situation where other radio frequency transceivers need to be excited is similar, and it only needs to be adjusted accordingly to the status of the switch.
  • the method shown in FIG. 5 only uses an array of four radio frequency transceivers 201 as an example to describe the cascading method of the power divider 1073 in an electronic device according to an embodiment of the present disclosure.
  • radio frequency transceivers 201 When other numbers of radio frequency transceivers 201 are used in an array, it is only necessary to use corresponding series of power dividers 1073 to be cascaded.
  • a one-stage power divider 1073 architecture needs to be used in an electronic device such as an intermediate frequency transceiver.
  • eight radio frequency transceivers 201 are required to form an array, a three-level power divider 1073 architecture is required. In other words, using the N-level power divider 1073 architecture in electronic equipment can realize an array of 2 N radio frequency transceivers 201.
  • each stage of power divider operates in the same mode when a multi-stage power divider cascade structure is adopted. It should be understood that this is for illustration only and is not intended to limit the scope of the present disclosure. Any other suitable situations are also possible.
  • the multi-stage power splitter may adopt different modes respectively.
  • the first-stage power divider operates in a first mode
  • the second-stage power divider operates in a second mode
  • Figure 9 shows a two-stage power splitter structure connected in this cascade manner.
  • the first switch 4080 of the power divider 4073 in the first-stage power divider 4074 is closed, and the second switch 4082 and the third switch 4084 are both turned off, that is, the power divider 4073 operates in the first mode.
  • the first switch 4080 and the second switch 4082 of one power splitter are open
  • the third switch 4084 is closed
  • the first switch 4080 and the third switch 4084 of the other power splitter are open.
  • the second switch 4082 is closed, that is, both operate in the second mode.
  • electronic equipment using this mode of power divider array can drive two RF transceiver chips to achieve the required functions.
  • each power divider of each stage can be configured to work in any appropriate mode as needed, thereby achieving more Many different needs and patterns. For example, in a certain stage with multiple power dividers, some power dividers can work in the first mode and some power dividers can work in the second mode to achieve different functions. These will not be discussed below. Let’s discuss them separately.
  • the power splitter array can be switched between the power splitter mode and the filter mode, so that a network can be used simultaneously Just small cell mode and user terminal mode.
  • this electronic device reduces the wiring complexity of multi-chip arrays in phased array systems with low area and low cost.
  • the central drive network insertion loss is low, which is beneficial to reducing power consumption.
  • Electronic devices according to embodiments of the present disclosure are widely used in various phased array systems. By properly setting the port impedance according to requirements, functions such as spurious suppression or multiplexer can be achieved.

Abstract

本公开提出了一种电子设备和通信系统。该电子设备包括功分器阵列，包括总输入端口和多个分输出端口，其中所述功分器阵列具有可切换的滤波器模式和功分器模式，在所述功分器模式，所述功分器阵列用于实现信号从所述总输入端口到所述多个分输出端口的功率分配；在所述滤波器模式，所述功分器用于对所述总输入端口和所述多个分输出端口之间传输的信号进行滤波。通过采用能够切换工作模式的功分器阵列，该电子设备能够降低板级走线复杂度。板级走线复杂度的降低有利于电子设备的小型化并且能够降低设计难度。

Description

电子设备和通信系统 技术领域
本公开涉及通信系统领域，并且具体地涉及一种电子设备和通信系统。
背景技术
射频(radio frequency，RF)是一种高频交流变化电磁波，表示可以辐射到空间的电磁频率。射频芯片指的就是将无线电信号通信转换成一定的无线电信号波形，并通过天线谐振发送出去的一个电子元器件，它一般包括功率放大器、低噪声放大器和天线开关。射频芯片架构通常包括接收通道和发射通道两大部分。
调制/解调(基带)信号与射频信号之间的频率可能相差甚远，从而可能需要多个变频级。在这些情况下，射频信号和基带信号之间的上变频/下变频级中会产生一个中频(intermediate frequency,IF)。所谓中频，顾名思义，是指一种中间频率的信号形式。中频是相对于基带信号和射频信号来讲的，中频可以有一级或多级，它是基带和射频之间过渡的桥梁。为了使放大器能够稳定的工作和减小干扰，一般的接收机都要将高频信号变为中频信号。
随着5G通信技术的蓬勃发展，为了提高诸如毫米波射频收发机等收发机的收发距离，通常会将射频收发机采用多阵面切换或者多片拼阵的方式。采用多阵面切换或者多片拼阵的方式通常由中频收发机驱动。传统方案中采用这种模式的中频驱动网络往往具有设计复杂度较高、成本较高以及瞬态功率跳变等问题。
发明内容
本公开涉及关于中频驱动网络的技术方案，并且具体提供了一种诸如中频收发机的电子设备以及使用该电子设备的通信系统。
在本公开的第一方面，提供了一种电子设备。该电子设备包括功分器阵列，包括总输入端口和多个分输出端口，其中所述功分器阵列具有可切换的滤波器模式和功分器模式，在所述功分器模式，所述功分器阵列用于实现信号从所述总输入端口到所述多个分输出端口的功率分配；在所述滤波器模式，所述功分器阵列用于对所述总输入端口和所述多个分输出端口之间传输的信号进行滤波。根据本公开实施例的电子设备通过设置能够切换工作模式的功分器阵列，能够降低板级走线复杂度。板级走线复杂度的降低有利于电子设备的小型化并且能够降低设计难度。
在一种实现方式中，所述功分器阵列包括第一功分器阵列和第二功分器阵列，所述第一功分器阵列和第二功分器阵列分别包括至少一个功分器，所述至少一个功分器中的每个功分器包括模式切换电路，所述模式切换电路用于切换所述功分器阵列的工作模式。
在一种实现方式中，功分器根据所述模式切换电路的状态而在第一模式和第二模式下切换，所述第一模式对应于所述功分器模式，并且所述第二模式对应于所述滤波器模式。
在一种实现方式中，每个功分器还包括功分输入端口、第一射频侧端口和第二射频侧端口；等效长度相等的一对传输线，分别设置在所述第一射频侧端口和所述功分输入端口之间以及所述第二射频侧端口和所述功分输入端口之间；以及电阻支路，包括耦合 在所述第一射频侧端口和第二射频侧端口之间的电阻。
在一种实现方式中，模式切换电路包括：第一开关，与所述电阻串联在所述电阻支路中；以及一对调节支路，分别耦合至所述第一射频侧端口和第二射频侧端口，用于调节对地阻抗。以此方式，通过使用简单的电路实现了功分器阵列的模式切换。
在一种实现方式中，调节支路包括耦合在所述第一射频侧端口以及参考地之间的串联连接的第一电容和第二开关；以及耦合在所述第二射频侧端口以及所述参考地之间的串联连接的第二电容和第三开关。以此方式，进一步简化了模式切换电路的实现方式，并能够进一步降低成本。
在一种实现方式中，调节支路具有低通滤波器的特性，用于滤除高频噪声。这种方式使得功分器阵列可以实现低通滤波器模式。
在一种实现方式中，所述功分器根据第一开关、第二开关和第三开关的状态而在第一模式和第二模式下切换，在所述第一模式，从所述功分输入端口输入的信号被分成两路以分别在所述第一射频侧端口和第二射频侧端口输出；以及在所述第二模式，所述第一射频侧端口被配置为无信号输出，所述第二射频侧端口和所述功分输入端口之间传输的信号的支路被配置为低通滤波特性。
在一种实现方式中，在所述第一模式，所述第一开关闭合，所述第二开关和所述第三开关断开，在所述第二模式，所述第一开关断开，所述第二开关和所述第三开关中的一个断开，另一个闭合。
在一些实现方式中，所述至少一个功分器包括以级联方式连接的多级功分器，并且所述多级功分器包括第一级功分器，所述第一级功分器中的功分器的所述功分输入端口作为所述功分器阵列的总输入端口，并且所述多级功分器中的最后一级功分器中的每个功分器的第一射频侧端口和第二射频侧端口作为所述功分器阵列分输出端口。
在一种实现方式中，多级功分器还包括第N级功分器，具有2 (N-1)对功分器，并且所述第N级功分器的每两个功分器的功分输入端口分别耦合至上一级功分器中的一个功分器的第一射频侧端口和第二射频侧端口，其中N为大于1的整数。
在一种实现方式中，电子设备还包括第一双工器，包括第一输入端口和第二输入端口，以及输出端口，所述第一双工器的第一输入端口用于接收控制数据信号，所述第一双工器的第二输入端口用于接收第一中频信号，所述第一双工器的输出端口用于与第一功分器阵列的总输入端口耦合；以及第二双工器，包括第三输入端口和第四输入端口，以及输出端口，所述第二双工器的第三输入端口用于接收时钟信号，所述第二双工器的第四输入端口用于接收第二中频信号，所述第二双工器的输出端口用于与第二功分器阵列的总输入端口耦合。
在一种实现方式中，传输线的等效长度为所述功分器所处理的中频信号的频率对应的中心波长的四分之一。
在一种实现方式中，所述功分器阵列用于实现信号从所述总输入端口到所述多个分输出端口的平均功率分配。
在一种实现方式中，第一中频信号和第二中频信号的频率至少部分地重叠。
在一种实现方式中，电子设备是中频收发机。
根据本公开的第二方面，提供了一种通信系统。所述通信系统包括前文中第一方面所描述的电子设备，以及多个射频收发机，耦合至所述电子设备的功分器阵列的分输出 端口。
在一些实现方式中，所述电子设备的第一双工器的第一输入端口用于接收控制数据信号，所述第一双工器的第二输入端口用于接收第一中频信号，所述第一双工器的输出端口用于与所述电子设备的第一功分器阵列的总输入端口耦合；所述电子设备的第二双工器的第三输入端口用于接收时钟信号，所述第二双工器的第四输入端口用于接收第二中频信号，所述第二双工器的输出端口用于与所述电子设备的第二功分器阵列的总输入端口耦合；并且每个所述射频收发机耦合至所述第一功分器阵列和第二功分器阵列的对应的分输出端口。通过使用具有能够切换工作模式的功分器阵列的电子设备，能够降低具有多片射频收发机阵列拼阵的通信系统的板级走线复杂度
在一些实现方式中，当所述电子设备中的功分器工作在第一模式的情况下，所述通信系统工作在小型基站模式，当所述功分器工作在第二模式的情况下，所述通信系统工作在用户终端模式。
应当理解，发明内容部分中所描述的内容并非旨在限定本公开的关键或重要特征，亦非用于限制本公开的范围。本公开的其他特征通过以下的描述将变得容易理解。
附图说明
通过参考附图阅读下文的详细描述，本公开的实施例的上述以及其他目的、特征和优点将变得容易理解。在附图中，以示例性而非限制性的方式示出了本公开的若干实施例。
图1至图4以示例性的方式示出了传统方案中相控阵系统的走线方式；
图5示出了包括根据本公开实施例的电子设备的相控阵系统的走线方式；
图6示出了传统的功分器以及根据本公开实施例的功分器的示意图；
图7示出了根据本公开实施例的功分器的仿真结果图；以及
图8和图9示出了根据本公开实施例的功分器阵列的工作模式的示意图。
贯穿所有附图，相同或者相似的参考标号被用来表示相同或者相似的组件。
具体实施方式
下文将参考附图中示出的若干示例性实施例来描述本公开的原理和精神。应当理解，描述这些具体的实施例仅是为了使本领域的技术人员能够更好地理解并实现本公开，而并非以任何方式限制本公开的范围。在以下描述和权利要求中，除非另有定义，否则本文中使用的所有技术和科学术语具有与所属领域的普通技术人员通常所理解的含义。
如本文所使用的，术语“包括”及其类似用语应当理解为开放性包含，即“包括但不限于”。术语“基于”应当理解为“至少部分地基于”。术语“一个实施例”或“该实施例”应当理解为“至少一个实施例”。术语“第一”、“第二”等等可以指代不同的或相同的对象，并且仅用于区分所指代的对象，而不暗示所指代的对象的特定空间顺序、时间顺序、重要性顺序，等等。
本文使用的术语“电路”是指以下的一项或多项：(a)仅硬件电路实现方式(诸如仅模拟和/或数字电路的实现方式)；以及(b)硬件电路和软件的组合，诸如(如果适用)：(i)模拟和/或数字硬件电路与软件/固件的组合，以及(ii)硬件处理器的任何部分与软件(包括一起工作以使装置，诸如通信设备或其他电子设备等，执行各种功能 的数字信号处理器、软件和存储器)；以及(c)硬件电路和/或处理器，诸如微处理器或者微处理器的一部分，其要求软件(例如固件)用于操作，但是在不需要软件用于操作时可以没有软件。电路的定义适用于此术语在本申请中(包括权利要求中)的所有使用场景。作为另一示例，在此使用的术语“电路”也覆盖仅硬件电路或处理器(或多个处理器)、或者硬件电路或处理器的一部分、或者随附软件或固件的实现方式。例如，如果适用于特定权利要求元素，术语“电路”还覆盖基带集成电路或处理器集成电路、网络设备、终端设备或其他设备中的类似集成电路。
应理解，在本申请中，“耦合”可理解为直接耦合和/或间接耦合。直接耦合又可以称为“电连接”，理解为元器件物理接触并电导通；也可理解为线路构造中不同元器件之间通过印制电路板(printed circuit board，PCB)铜箔或导线等可传输电信号的实体线路进行连接的形式；“间接耦合”可理解为两个导体通过隔空/不接触的方式电导通。在一个实施例中，间接耦合也可以称为电容耦合，例如通过两个导电件间隔的间隙之间的耦合形成等效电容来实现信号传输。
传输线，又叫馈电线，指天线的收发机与辐射体之间的连接线。传输线可随频率和形式不同，直接传输电流波或电磁波。辐射体上与传输线相连的连接处通常称为馈电点。传输线包括导线传输线、同轴线传输线、波导、或微带线等。传输线根据实现形式不同可以包括支架天线体、或玻璃天线体等。传输线根据载体不同可以由LCP(liquid crystal polymer，液晶聚合物材料)、FPC(flexible printed circuit，柔性印刷电路板)、或PCB(printed circuit board，印刷电路板)等来实现。
参考地/接地面：可泛指电子设备内任何接地层、或接地面、或接地板、或接地金属层等的至少一部分，或者上述任何接地层、或接地板、或接地部件等的任意组合的至少一部分，“参考地/接地面”可用于电子设备内元器件的接地，例如适用于提供射频信号的地参考点，可以包括直流地和交流地。一个实施例中，“参考地/接地面”可以是电子设备的电路板的接地层，也可以是电子设备中框形成的接地板或屏幕下方的金属薄膜形成的接地金属层。一个实施例中，电路板包括介质基板、接地层和走线层，走线层和接地层通过过孔进行电连接。一个实施例中，诸如显示器、触摸屏、输入按钮、发射器、处理器、存储器、电池、充电电路、片上系统(system on chip，SoC)结构等部件可以安装在电路板上或连接到电路板；或者电连接到电路板中的走线层和/或接地层。例如，射频源设置于走线层。
谐振频段/通信频段/工作频段：无论何种类型的天线，总是在一定的频率范围(频段宽度)内工作。例如，支持B40频段的天线，其工作频段包括2300MHz～2400MHz范围内的频率，或者是说，该天线的工作频段包括B40频段。满足指标要求的频率范围可以看作天线的工作频段。工作频段的宽度称为工作带宽。全向天线的工作带宽可能达到中心频率的3-5％。定向天线的工作带宽可能达到中心频率的5-10％。带宽可以认为是中心频率(例如，偶极子的谐振频率)两侧的一段频率范围，其中天线特性在中心频率的可接受值范围内。
dB：就是分贝，是一个以十为底的对数概念。分贝只用来评价一个物理量和另一个物理量之间的比例关系，它本身并没有物理量纲。两个量之间的比例每增加10倍，则它们的差可以表示为10个分贝。比如说：A＝"100"，B＝"10"，C＝"5"，D＝"1"，则，A/D＝20dB；B/D＝10dB；C/D＝7dB；B/C＝3dB。也就是说，两个量差10分贝就是差10倍，差 20分贝就是差100倍，依此类推。差3dB就是两个量之间差2倍。
等效长度：由于传输距离、所设置的电容和/或电感以及辐射阻抗等因素，电磁波在传输介质上传输时会引起相位差。如果所引起的相位差与导波在预定长度的、具有预定介电常数并且不具备辐射能力的传输线传输时所引起的相位差相同，则在传输介质所传输的等效长度等于传输线的预定长度。等效长度可以受传输介质中对应传输线的物理长度、传输介质中所设置的电容和/或电感、所设置的移相器以及传输线耦合至辐射体的位置等的影响。具体而言，通过设置电容或电感，可以在等效长度基本不变的情况下缩短物理长度。例如，通过设置电容或者电感等器件，物理长度L和等效长度Le的关系可以满足：(1-1/3)Le≤L≤(1+1/3)Le、或(1-1/4)Le≤L≤(1+1/4)Le。
基带/基带信号：也可以翻译为“信源”(信息源，也称发终端)发出的没有经过调制(进行频谱搬移和变换)的原始电信号所固有的频带(频率带宽)，称为基本频带，简称基带。基带和频带相对应，频带：对基带信号调制前所占用的频率带宽(一个信号所占有的从最低的频率到最高的频率之差)。基带是频率范围非常窄的信号，也就是说幅度谱仅在原点(f＝0)附近才是非零的，其他频率几乎可以忽略。在电信与信号处理中，基带信号是无调变传输的，即该信号的频率范围没有任何移位，而且频率很低，包含频带从接近0Hz到更高截止频率或最大带宽。“基带”这个词也用于俗称手机的通信模块(调制解调器)，也用于指称对应的控制软件(固件)。
射频(radio frequency，RF)：是一种高频交流变化电磁波，表示可以辐射到空间的电磁频率。射频芯片指的就是将无线电信号通信转换成一定的无线电信号波形，并通过天线谐振发送出去的一个电子元器件，它一般包括功率放大器、低噪声放大器和天线开关。射频芯片架构通常包括接收通道和发射通道两大部分。
中频(intermediate frequency,IF)：调制/解调(基带)信号与射频信号之间的频率可能相差甚远，从而可能需要多个变频级。在这些情况下，射频信号和基带信号之间的上变频/下变频级中会产生一个。所谓中频，顾名思义，是指一种中间频率的信号形式。中频是相对于基带信号和射频信号来讲的，中频可以有一级或多级，它是基带和射频之间过渡的桥梁。为了使放大器能够稳定的工作和减小干扰，一般的接收机都要将高频信号变为中频信号。
相控阵，就是由许多辐射单元排成阵列形式构成的走向天线，各单元之间的辐射能量和相位关系是可以控制的。典型的相控阵是利用电子计算机控制移相器改变天线孔径上的相位分布来实现波束在空间扫描，即电子扫描，简称电扫。相位控制可采用相位法、实时法、频率法和电子馈电开关法。在一维上排列若干辐射单元即为线阵，在两维上排列若干辐射单元称为平面阵。辐射单元也可以排列在曲线上或曲面上.这种天线称为共形阵天线。共形阵天线可以克服线阵和平面阵扫描角小的缺点，能以一部天线实现全空域电扫。通常的共形阵天线有环形阵、圆面阵、圆锥面阵、圆柱面阵、半球面阵等。
双工器(diplexer)：双工器是一种实现频域复用的无源器件。两个端口(例如L和H)复用到第三个端口(例如S)。端口L和H上的信号占用不相交的频段。因此，端口L和H上的信号可以在端口S上共存，而不会相互干扰。双工器允许在同一传输线(例如天线)上使用两条信号路径。这是通过分离感兴趣频率的滤波器实现的，允许从同一天线发送和接收两个不同频率的信号(例如控制信号和通信信号)。
多工器，又叫数据选择器，或多路复用器，是一种可以从多个模拟或数字输入信号 中选择一个信号进行输出的器件。一个有2 n输入端的数据选择器有n个可选择的输入－输出线路，可以通过控制端来选择其中一个信号被选择作为输出。数据选择器主要用于增加一定量的时间和带宽内的可以通过网络发送的数据量。
功分器，是一种将一路输入信号能量分成两路或多路输出相等或不相等能量的器件，也可反过来将多路信号能量合成一路输出，此时可也称为合路器。威尔金森功分器一种常见的功分器，其采用1/4波长传输线来实现的。威尔金森功分器具有诸多优点：1)实现简单；2)成本低；3)端口之间的隔离度好。
插入损耗，简称为插损，将某些器件或分支电路(滤波器、阻抗匹配器等)加进某一电路时，能量或增益的损耗，其是指在传输系统的某处由于元件或器件的插入而发生的负载功率的损耗，它表示为该元件或器件插入前负载上所接收到的功率与插入后同一负载上所接收到的功率以分贝为单位的比值。
高阻状态，又叫高阻态，是一个数字电路里常见的术语，指的是部件的一种输出状态。高阻态相当于隔断状态。当某一部件处于高阻态时，无论该部件的输入如何变化，都不会对其输出有贡献。与之相对的是低阻状态。低阻状态相当于短路状态，部件的输入会对输出产生影响。
在5G通信系统中，为了提高射频收发器的收发距离，通常会将多个射频收发器采用多阵面切换或多片拼阵的方式。为了便于控制各个射频收发器辐射能量以及相位关系，其与中频收发机驱动的中频驱动网络如图1所示，图中中频收发机驱动后级的射频收发机。图1所示的中频驱动网络可以应用于终端应用场景或小型基站场景。在诸如手机等的终端应用场景中使用时，射频收发机或者其具体的辐射单元分别指向不同的方向以提高空间覆盖范围，同时这4个射频收发机会进行切换以选择指向合理的射频收发机工作。在小型基站场景下，射频收发机通常采用多片拼阵的方式提高发射等效全向辐射功率(equivalent isotropically radiated power，EIRP)和接收灵敏度。以4颗射频收发机芯片拼阵为例，其可以组成1×4(图1中所示)或2×2的阵列。以此方式，对于发射侧，EIRP可增加12dB，对于接收侧，灵敏度可以增加6dB。因此采用射频收发机芯片拼阵的方式可以极大地增加收发距离。此外，在小型基站场景下，为了实现拼阵的效果，一般需要多颗射频收发机芯片相位同步，因此多颗射频收发机的中频驱动需要同步。
从图1可以看出，在4片(仅以4片为例)射频收发机501驱动双极化天线的场景下，每颗射频收发机芯片需要两个中频输入(IF_V和IF_H)来驱动其双极化输出。同时每颗芯片都需要至少两根数字线控制输入，分别为数据(DATA)输入和时钟(CLOCK，CLK)输入。因此中频收发机芯片500需要驱动8路中频及8路数字线，这极大地增加了板级走线的设计难度。
在一些实施例中，为了降低板级走线复杂度，中频收发机600内部集成了双工器605，如图2所示。在一些替代的实施例中，双工器605也可以由外部器件来实现。该双工器605将中频通信信号(通常频率>1GHz)和数字控制信号(通常频率<1GHz)合并为一个输出。此外，还对射频收发机芯片的输入进行了相应的调整，使得其能够接收并处理通信信号的同时，也能够接收并处理控制信号。因此中频收发机600和每个射频收发机601之间的走线都被降低为两根。该方法可以同时适配用户终端及小型基站场景，其降低了一半的走线复杂度。
然而，采用这种方式也有各种问题。例如，由于双工器605采用诸如集成无源器件 (integrated passive device，IPD)等特殊工艺制造，其成本高昂。仅对于采用4片射频收发机601的方案就采用了8个双工器605，因此其成本较高。此外，由于这种方案的中频收发机600由多个中频通信信号输出，在用户终端场景下，一般只需要单个射频收发机工作，因此其中频的驱动级设计冗余，不利于降低用户终端场景下等成本。
在一些实施例中，为了降低双工器带来的高成本，有的中频收发机700采用基于双工器和功分器的架构，如图3所示。在这种实施例中，在一个中频收发机中仅采用2个双工器705，每个双工器驱动1分4的功分器707，功分器707再驱动四颗射频收发机芯片701。在用户终端及小型基站场景，这种方案均可采用功分器驱动多颗射频收发机芯片。
采用这种架构的中频驱动网络在用户终端场景下，当仅有一个射频收发机701工作时，其他关闭的射频收发机701芯片中的中频输入端口关闭阻抗需要合理设计，由此来避免对工作中的射频收发机造成影响。这种对中频输入端口的额外设计显著增大了电路的设计复杂度。此外，在用户终端场景下，中频收发机700的输出功率由于功分器707引入的插损，导致其需要保持和驱动与小型基站模式下相同的功率，这增加了用户终端模式下的功耗。
在一些实施例中，还有一种方案的中频收发机800采用双工器805和开关架构808，如图4所示。在一个中频收发机800中，和前文中提到的方案相同，其采用两个双工器805，后面在接入一个4选1开关组件808。开关组件808的4个输出分别连接4颗射频收发机801。在用户终端模式下，4选1开关仅有一个开关接通，另外的开关断开，通过控制不同的开关的接通和断开，实现了射频收发机801的阵面切换。
然而，采用图4这种架构的中频收发机800仅能够用于用户终端场景，而不能应用于小型基站场景。此外，在用户终端场景下，假如第一颗射频收发机芯片保持开启，如果需要阵面切换的情况下，需要切换所需的另一颗射频收发机芯片预开启(数值和模拟导通，射频关闭)。此时，需要同时导通开关组件中第一颗射频发射机芯片和所需的另一个射频发射机芯片对应的开关，这会导致第一颗射频发射机芯片的瞬态功率跳变，从而引起瞬态误差向量幅度(error vector magnitude，EVM)问题。
为了解决或者至少部分地解决上述技术方案中所存在或者其他潜在问题，根据本公开的实施例提供了一种诸如中频收发机的电子设备，其能够同时支持用户终端和小型基站场景的需求，能够以低成本和低复杂度显著减小相控阵系统多片拼阵的板级走线复杂程度。此外，根据本公开实施例的电子设备在用户终端模式下，中频驱动网络的插损低，有利于降低功耗。
应当理解的是，对于根据本公开实施例的电子设备所适用的用户终端而言，可以包括客户前置设备(customer premise equipment，CPE)。CPE是一种信号中继设备，其不仅仅可以中继Wi-Fi信号，还可以通过内置用户身份识别模块(subscriber identification module,SIM)卡中继运营商基站发射出的4G或5G网络信号，再将4G或5G信号变成Wi-Fi信号，供给其他设备连接。CPE在形态上与小型基站类似，通常也需要驱动多颗射频收发机芯片同时工作。
图5示出了根据本公开实施例的电子设备架构的中频驱动网络的示意图。从图5中可以看出，根据本公开实施例的中频驱动网络包括诸如中频收发机的电子设备。该电子设备包括功分器阵列107。在图5所示的实施例中，电子设备100还可以包括与功分器 阵列107耦合的双工器105。对于双工器105而言，每个双工器105包括两个输入端口(即，基带侧端口1053)，分别耦合至控制信号处理器和通信信号(即，中频信号)处理器。例如，在一些实施例中，电子设备可以包括两个双工器105，如图5所示。两个双工器105分别可以被称为第一双工器1051和第二双工器1052。控制信号处理器中提供控制数据(DATA)信号的数据端口耦合至第一双工器1051的第一输入端口，并且提供时钟(clock，CLK)信号的时钟端口耦合至第二双工器1052的第三输入端口。同时，第一双工器1051还具有耦合至第一通信信号处理器的第二输入端口，第一通信信号处理器用于提供第一中频(intermediate frequency，IF)信号。第二双工器1052还具有耦合至第二通信信号处理器的第四输入端口，第二通信信号处理器用于提供第二中频信号。第一中频信号和第二中频信号可以在相同或者相近频段。例如，在一些实施例中，所述第一通信信号处理器和所述第二通信信号处理器所提供的通信信号的频率至少部分地重叠。
当然，应当理解的是，电子设备采用两个双工器105的实施例只是示意性的，并不旨在限制本公开的保护范围。根据所要连接的端口，在电子设备中具有其他任意适当数目的双工器105也是可能的。下文中将主要以图5所示出的具有两个双工器105的电子设备为例来描述根据本公开的发明构思，应当理解的是，对于具有其他数目双工器105的电子设备也是类似的，在下文中将不再分别赘述。
功分器阵列107具有总输入端口和多个分输出端口。每个总输入端口耦合至双工器105的输出端口1054，并且多个分输出端口分别耦合至多个射频收发机201。图5中示出了具有与第一双工器1051和第二双工器1052分别对应的两个功分器阵列，即，第一功分器阵列1071和第二功分器阵列1072。第一双工器1051的输出端口1054耦合至第一功分器阵列1071的总输入端口，第二双工器1052的输出端口耦合至第二功分器阵列1072的总输入端口。图5中所示的第一功分器阵列1071的四个分输出端口分别耦合至四个射频收发机201的第一馈电接口IF1_V、IF2_V、IF3_V和IF4_V，第二功分器阵列1072的四个分输出端口分别耦合至四个射频收发机201的第二馈电接口IF1_H、IF2_H、IF3_H和IF4_H。应当理解的是，如果有其他数目的双工器105，会存在与之对应数目的功分器阵列107。
不同于传统的电子设备，根据本公开实施例的电子设备中的功分器阵列107可以工作在滤波器模式和功分器模式，并且两个模式可以通过特定的电路来切换(这将在下文中做进一步阐述)。在功分器模式，功分器阵列107能够实现信号从总输入端口到多个分输出端口的功率分配。例如，在一些实施例中，功分器阵列107能够实现信号从总输入端口到多个分输出端口的平均功率分配。在滤波器模式，功分器阵列107能够用于对总输入端口和多个分输出端口之间传输的信号进行滤波。在一些实施例中，在滤波器模式下，多个分输出端口中的一部分端口被配置为无信号输出，而另一部分输出端口与总输入端口之间传输的信号呈现低通滤波器特性，这将在下文中结合附图进一步阐述。根据本公开实施例的电子设备100通过设置能够切换工作模式的功分器阵列107，能够降低电子设备100应用于中频和射频之间时的板级走线复杂度。板级走线复杂度的降低有利于电子设备乃至整个通信系统的小型化并且能够降低设计难度。
每个功分器阵列107包括至少一个功分器1073。图5中示出了每个功分器阵列107包括以级联方式连接的三个功分器1073。下文中也将主要以图5中示出了每个功分器阵列107具有三个功分器1073为例来描述根据本公开的发明构思。应当理解的是，根据所 需要连接的射频收发机201的数目，其他数目的功分器1073也是可能的，这将在下文中进一步阐述。
每个功分器1073采用了经改进的功分器，其包括模式切换电路，从而使得功分器阵列107的工作模式能够被切换。功分器阵列107至少能够实现两种模式，即，功分器模式和滤波器模式。下面将结合图6来描述下对功分器2073的改进和实现两种模式的原理。图6(A)示出了常规的威尔金森功分器5073。通常威尔金森功分器5073采用两段四分之一波长的传输线5079实现，每一段传输线5079可以由微带线制成，其特征阻抗为
Figure PCTCN2022092234-appb-000001
其基本作用是将功分输入端口5076输入的输入功率平均分配到两个输出端口(即，第一射频侧端口5077和第二射频侧端口5078)上，此时S21和S32均为-3dB(当功分器无耗时)。此外，为了提高两个输出端口(即，第一射频侧端口5077和第二射频侧端口5078)之间的隔离度，在第一射频侧端口5077和第二射频侧端口5078之间设置有电阻5070，电阻的阻抗为2Zo，用于提高两个输出端口1054之间的隔离度。
根据本公开实施例的电子设备中所使用的功分器2073如图6(B)和(C)所示，相比于传统的威尔金森功分器5073，其除了包括上述部件外，还包括模式切换电路。也就是说，根据本公开实施例的功分器2073包括功分输入端口2076、第一射频侧端口2077和第二射频侧端口2078以及等效长度相等的一对传输线2079。每条传输线2079的等效长度可以是功分器所处的通信信号的频率对应的中心波长的四分之一，其阻抗可以为
Figure PCTCN2022092234-appb-000002
除此之外，功分器还包括电阻支路。该电阻支路耦合在第一射频侧端口2077和第二射频侧端口2078之间，并且具有阻抗为2Zo的电阻2070。
不同于传统的功分器，根据本公开实施例的功分器2073的模式切换电路包括电阻支路中串联的开关(下称为第一开关2080)，以及在第一射频侧端口2077和第二射频侧端口2078处分别增加的调节支路。每个调节支路用于调节对地阻抗。在一些实施例中，调节对地阻抗可以通过电容和开关来实现。具体而言，在一些实施例中，一对调节支路可以包括耦合至第一射频侧端口2077以及参考地之间的第一电容2081和第二开关2082以及耦合至第二射频侧端口2078和参考地之间的第二电容2083和第三开关2084。
当然，应当理解的是，通过电容和开关实现可调的对地阻抗的实施例只是示意性的，并不旨在限制本公开的保护范围。其他任意适当的实现方式也是可能的。下文中将主要以电容和开关实现调节支路为例来描述根据本公开的发明构思，应当理解的是，对于其他实现方式也是类似的，在下文中将不再分别赘述。
通过上述模式调节电路，功分器2073可以在第一模式和第二模式之间切换。具体而言，在第一开关2080闭合，第二开关2082和第三开关2084断开的情况下，图6(B)中所示的功分器2073工作在第一模式。此时该功分器2073即变成和图6(A)一样的结构。如果图5中的功分器阵列107中的所有功分器1073都工作在第一模式，则功分器阵列107工作在功分器模式。此时，从总输入端口进入的信号(无论是控制信号还是通信信号)都能被等分为多路而分别从分输出端口馈入到多个射频收发机201。
当第一开关2080断开，第二开关2082和第三开关2084中的一个断开而另一闭合的情况下，功分器2073工作在第二模式。如果图5中的功分器阵列107中的所有功分器1073都工作在第二模式，则功分器阵列107工作在滤波器模式，如图6(C)所示。图6(C)示出了在第一开关2080和第二开关2082断开，第三开关2084闭合的情况下，第二射频侧端口2078处的第二电容2083会接入网络中。该第二电容2083的特性为在低频 f0(例如小于或等于第一频率，例如控制信号的频率)处呈高阻状态，即，接近开路，在高频f1(例如大于或等于第二频率，第一频率小于第二频率，例如通信信号的频率)处呈低阻状态，即，接近短路，第一电容2081具有类似的特性。以此方式，在经过四分之一波长传输线2079后，从功分输入端口2076侧向第二射频侧端口2078处看去的阻抗即表现出在低频f0为50ohm(接近第二射频侧端口1078的特征阻抗)，在高频f1处即体现为高阻状态，即，接近开路。以此方式，使得调节支路具有低通滤波器的特性，用于滤除高频噪声。
当然，应当理解的是，图6(C)只是示出了第二模式中的一种情况下，即第一开关2080和第二开关2082断开，第三开关2084闭合的情况。根据第二开关2082和第三开关2084的状态，还具有第二种情况，即，第一开关2080和第三开关2084断开，第二开关2082闭合的情况，这种情况与图6(C)所示的情况相反。此外，在功分器阵列具有多级功分器的情况下，通过不同级之间的功分器的开关的状态的组合，对应于单个功分器的第二模式的滤波器模式可以实现更多种情况。以此方式，可以可控地激励所需要的射频收发机来进行工作。
因此，在图6(C)所示的第二模式(对应于功分器阵列107的滤波器模式)下，对于诸如控制信号(例如，数据控制信号和时钟信号)的低频信号而言，功分输入端口2076到第一射频侧端口2077和第二射频侧端口2078的插损都接近于-3dB，此时控制信号都能够有效地传输到射频收发机201中。对于诸如中频通信信号的高频信号而言，从功分输入端口2076到第二射频侧端口2078的插损接近无穷大，从功分输入端口2076到第一射频侧端口2077的插损接近于0dB。当然，对于第一开关2080和第三开关2084断开，第二开关2082闭合的滤波器模式也是类似的，在下文中将不再分别赘述。
根据本公开实施例的电子设备中所使用的功分器2073仿真结果如图7所示。在仿真结果中，以数字低频信号0.1GHz，中频信号为10GHz为例。图中虚线即为功分器2073在第一模式下的仿真结果，此时图6(B)中所示的功分输入端口2076到第一射频侧端口2077和第二射频侧端口2078的插损均为-3.8dB左右(高低频基本相同)。在如图6(C)所示的第二模式下，对于诸如控制信号的低频频率信号而言，功分输入端口2076到第一射频侧端口2077和第二射频侧端口2078的插损仍然为-3.8dB。对于诸如中频通信信号的高频频率信号而言，功分输入端口2076到第一射频侧端口2077的插损约-1.5dB，即，相比于功分模式，插损降低约2.3dB。功分输入端口2076到第二射频侧端口2078的插损的插损约-21dB。换句话说，在低频f0处，该功分器2073仍处于第一模式；在高频f1处，功分输入端口2076到第一射频侧端口2077直通，功分输入端口2076到第二射频侧端口2078短路，从而实现了在第一射频侧端口无信号输出，而第二射频侧端口和功分输入端口之间传输的信号呈低通滤波特性。也就是说，调节支路具有低通滤波器的特性，用于滤除高频噪声，使得第二射频侧端口和功分输入端口之间传输的信号呈现低通滤波特性。
以此方式，在一些实施例中，如前文中所提到的，可以通过将根据本公开实施例的具有两种模式的功分器级联来形成功分器阵列，以作为相控阵系统的中频驱动网络。以4片射频收发机拼阵为例，一分四的功分网络采用根据本公开实施例中的具有两种模式的多个功分器3073级联，如图8所示。图8示出了采用级联方式连接的两级功分器3074、3075。第一级功分器3074包括一个功分器3073，该功分器3073的功分输入端口3076 耦合至对应的双工器的输出端口。第二级功分器3075包括两个功分器3073。第二级功分器3075中的每个功分器3073的功分输入端口3076分别耦合至第一级功分器3074的第一射频侧端口3077和第二射频侧端口3078。第二级功分器3075的四个射频侧端口分别耦合至4个射频收发机的一个端口。4个射频收发机的另一个端口也采用类似的驱动结构。
如图8(A)所示，当两级功分器3074、3075中的功分器3073工作在第一模式时，即第一开关3080闭合、第二开关3082和第三开关3084都断开，此时功分器阵列307工作在功分器模式，电子设备工作在小型基站模式。此时，从总输入端口进入的信号(无论是控制信号还是通信信号)都能被等分为多路而分别从分输出端口馈入到多个射频功分器。当两级功分器3074、3075中的功分器3073都工作在第二模式时，例如第一开关3080断开、第二开关3082断开并且第三开关3084闭合，此时功分器阵列307工作在滤波器模式，电子设备工作在用户终端模式，如图8(B)所示。此时，通过调节功分器阵列307中每个功分器3073里的模式调节电路里的开关状态，可以使得通信信号传输到所需要的射频收发机中，或者使用所需要的射频收发机将信号传输至基带侧来进行处理。也就是说，根据本公开实施例的电子设备能够同时支持用户终端和小型基站模式下多个射频收发机工作。此外，在用户终端模式下，电子设备的插损低，有利于降低功耗。
例如，在用户终端模式下，假如仅需要一个射频收发机被激发(例如图5中最左侧的射频收发机)，此时，对于图5中所示的第一功分器阵列1071，只需要按图8(C)所示的设置方式，即，使第一级功分器3074和第二级功分器3075中每个功分器3073的第一开关3080和第三开关3084断开、第二开关3082闭合。对于图5中所示的第二功分器阵列1072，只需要按图8(B)所示的设置方式，即，使第一级功分器3074和第二级功分器3075中每个功分器3073的第一开关3080和第二开关3082断开、第三开关3084闭合即可实现。对于需要激发其他射频收发机的情况也是类似的，只需要相应地调整开关的状态即可实现。
当然，应当理解的是，图5所示出的方式只是以4个射频收发机201拼阵为例来描述了根据本公开实施例的功分器1073在电子设备中的级联方式，当具有其他数目的射频收发机201拼阵时，只需要采用相应级数的功分器1073级联即可。例如，当驱动2个射频收发机201时，诸如中频收发机的电子设备中只需要采用一级功分器1073架构。当需要8个射频收发机201拼阵时，则需要3级功分器1073架构。也就是说，电子设备中采用N级功分器1073架构可以实现2 N个射频收发机201拼阵。
前文中通过示例描述了在采用多级功分器级联的结构时，每一级功分器工作在同一模式的实施例。应当理解的是，这只是示意性的，并不旨在限制本公开的保护范围。其他任意适当的情况也是可能的。例如，在一些实施例中，多级功分器可以分别采用不同的模式。
例如，在一些实施例中，第一级功分器工作在第一模式，而第二级功分器工作在第二模式。例如，图9示出了采用这种级联方式连接的两级功分器结构。第一级功分器4074中的功分器4073的第一开关4080闭合、第二开关4082和第三开关4084都断开，即，工作在第一模式。第二级功分器4075中的一个功分器的第一开关4080和第二开关4082断开，第三开关4084闭合，而另一个功分器的第一开关4080和第三开关4084断开，第二开关4082闭合，即，两者工作在第二模式。在这种情况下，使用该模式功分器阵列的 电子设备可以驱动两颗射频收发机芯片工作，从而实现所需的功能。
在电子设备存在二级功分器或者更多级功分器结构的情况下，每一级功分器种每个功分器可以根据需要而被配置成工作在任意适当的模式，从而实现更多种不同的需求和模式。例如，在具有多个功分器的某一级中，有的功分器可以工作在第一模式，有的功分器可以工作在第二模式，从而实现不同的功能，这些在下文中将不再分别赘述。
以此方式，通过对根据本公开实施例的电子设备中的功分器的开关进行控制，能够使得功分器阵列在功分器模式和滤波器模式之间切换，从而能够使用一种网络同时只是小型基站模式和用户终端模式。另外，该电子设备以低面积和低成本降低了相控阵系统多片拼阵的走线复杂程度。此外，在用户终端模式下，该中心驱动网络插损低，有利于降低功耗。根据本公开实施例的电子设备广泛应用于各种相控阵系统中。通过根据需求来合理地设置端口阻抗，能够实现杂散抑制或者多工器等功能。
尽管已经以特定于结构特征和/或方法动作的语言描述了本申请，但是应当理解，所附权利要求中限定的主题并不限于上文描述的特定特征或动作。相反，上文描述的特定特征和动作是作为实现权利要求的示例形式而被公开的。

Claims (19)

  1. 一种电子设备，包括：
    功分器阵列，包括总输入端口和多个分输出端口，
    其中所述功分器阵列具有可切换的滤波器模式和功分器模式，在所述功分器模式，所述功分器阵列用于实现信号从所述总输入端口到所述多个分输出端口的功率分配；在所述滤波器模式，所述功分器阵列用于对所述总输入端口和所述多个分输出端口之间传输的信号进行滤波。
  2. 根据权利要求1所述的电子设备，其中所述功分器阵列包括第一功分器阵列和第二功分器阵列，所述第一功分器阵列和第二功分器阵列分别包括至少一个功分器，所述至少一个功分器中的每个功分器包括模式切换电路，所述模式切换电路用于切换所述功分器阵列的工作模式。
  3. 根据权利要求2所述的电子设备，其中所述至少一个功分器根据所述模式切换电路的状态而在第一模式和第二模式下切换，所述第一模式对应于所述功分器模式，并且所述第二模式对应于所述滤波器模式。
  4. 根据权利要求2或3所述的电子设备，其中每个功分器还包括：
    功分输入端口、第一射频侧端口和第二射频侧端口；
    等效长度相等的一对传输线，分别设置在所述第一射频侧端口和所述功分输入端口之间以及所述第二射频侧端口和所述功分输入端口之间；以及
    电阻支路，包括耦合在所述第一射频侧端口和第二射频侧端口之间的电阻。
  5. 根据权利要求4所述的电子设备，其中所述模式切换电路包括：
    第一开关，与所述电阻串联在所述电阻支路中；以及
    一对调节支路，分别耦合至所述第一射频侧端口和第二射频侧端口，用于调节对地阻抗。
  6. 根据权利要求5所述的电子设备，其中所述调节支路包括：
    耦合在所述第一射频侧端口以及参考地之间的串联连接的第一电容和第二开关；以及
    耦合在所述第二射频侧端口以及所述参考地之间的串联连接的第二电容和第三开关。
  7. 根据权利要求5-6所述的电子设备，所述调节支路具有低通滤波器的特性，用于滤除高频噪声。
  8. 根据权利要求6或7所述的电子设备，其中所述功分器根据第一开关、第二开关和第三开关的状态而在第一模式和第二模式下切换，
    在所述第一模式，从所述功分输入端口输入的信号被分成两路以分别在所述第一射频侧端口和第二射频侧端口输出；以及
    在所述第二模式，所述第一射频侧端口被配置为无信号输出，所述第二射频侧端口和所述功分输入端口之间的传输的信号的支路被配置为低通滤波特性。
  9. 根据权利要求8所述的电子设备，其中在所述第一模式，所述第一开关闭合，所述第二开关和所述第三开关断开，
    在所述第二模式，所述第一开关断开，所述第二开关和所述第三开关中的一个断开，另一个闭合。
  10. 根据权利要求2-9中任一项所述的电子设备，其中所述至少一个功分器包括以级联方式连接的多级功分器，并且
    所述多级功分器包括：
    第一级功分器，所述第一级功分器中的功分器的所述功分输入端口作为所述功分器阵列的总输入端口，并且
    所述多级功分器中的最后一级功分器中的每个功分器的第一射频侧端口和第二射频侧端口作为所述功分器阵列的分输出端口。
  11. 根据权利要求10所述的电子设备，其中所述多级功分器还包括：
    第N级功分器，具有2 (N-1)对功分器，并且所述第N级功分器的每两个功分器的功分输入端口分别耦合至上一级功分器中的一个功分器的第一射频侧端口和第二射频侧端口，其中N为大于1的整数。
  12. 根据权利要求2-11中任一项所述的电子设备，还包括：
    第一双工器，包括第一输入端口和第二输入端口，以及输出端口，所述第一双工器的第一输入端口用于接收控制数据信号，所述第一双工器的第二输入端口用于接收第一中频信号，所述第一双工器的输出端口用于与第一功分器阵列的总输入端口耦合；以及
    第二双工器，包括第三输入端口和第四输入端口，以及输出端口，所述第二双工器的第三输入端口用于接收时钟信号，所述第二双工器的第四输入端口用于接收第二中频信号，所述第二双工器的输出端口用于与第二功分器阵列的总输入端口耦合。
  13. 根据权利要求2-12中任一项所述的电子设备，其中所述传输线的等效长度为所述功分器所处理的中频信号的频率对应的中心波长的四分之一。
  14. 根据权利要求12所述的电子设备，其中所述第一中频信号和所述第二中频信号的频率至少部分地重叠。
  15. 根据权利要求1-14中任一项所述的电子设备，其中所述功分器阵列用于实现信号从所述总输入端口到所述多个分输出端口的平均功率分配。
  16. 根据权利要求1-15中任一项所述的电子设备，其中所述电子设备是中频收发机。
  17. 一种通信系统，包括：
    根据权利要求1-16中任一项所述的电子设备；以及
    多个射频收发机，耦合至所述电子设备的功分器阵列的分输出端口。
  18. 根据权利要求17所述的通信系统，其中所述电子设备的第一双工器的第一输入端口用于接收控制数据信号，所述第一双工器的第二输入端口用于接收第一中频信号，所述第一双工器的输出端口用于与所述电子设备的第一功分器阵列的总输入端口耦合；
    所述电子设备的第二双工器的第三输入端口用于接收时钟信号，所述第二双工器的第四输入端口用于接收第二中频信号，所述第二双工器的输出端口用于与所述电子设备的第二功分器阵列的总输入端口耦合；并且
    每个所述射频收发机耦合至所述第一功分器阵列和第二功分器阵列的对应的分输出端口。
  19. 根据权利要求17或18所述的通信系统，其中所述通信系统被配置为当所述电子设备中的功分器工作在第一模式的情况下，所述通信系统工作在小型基站模式，当所述功分器工作在第二模式的情况下，所述通信系统工作在用户终端模式。
PCT/CN2022/092234 2022-05-11 2022-05-11 电子设备和通信系统 WO2023216148A1 (zh)

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CN111034042A (zh) * 2017-08-28 2020-04-17 株式会社村田制作所 滤波器装置、多工器、高频前端电路以及通信装置
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