WO2023201807A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2023201807A1
WO2023201807A1 PCT/CN2022/093288 CN2022093288W WO2023201807A1 WO 2023201807 A1 WO2023201807 A1 WO 2023201807A1 CN 2022093288 W CN2022093288 W CN 2022093288W WO 2023201807 A1 WO2023201807 A1 WO 2023201807A1
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Prior art keywords
layer
display panel
substrate
light
shielding
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PCT/CN2022/093288
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English (en)
French (fr)
Inventor
肖溪
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US17/779,227 priority Critical patent/US20240172492A1/en
Publication of WO2023201807A1 publication Critical patent/WO2023201807A1/zh
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/126—Shielding, e.g. light-blocking means over the TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs

Definitions

  • the present application relates to the field of display technology, and specifically to a display panel and a display panel preparation method.
  • pixels are usually divided into transparent parts and non-transparent parts.
  • the non-transparent part includes the light-shielding layer, gate layer, source and drain layer, body part and other wiring, and the transparent part includes the active layer, capacitor, and anode.
  • small transparent areas are formed between the traces of the light shielding layer 20, the gate layer 60, and the source and drain layers 80. These small transparent areas form grating gaps 6, which are prone to diffraction effects, resulting in visibility through the transparent display panel. Objects have ghosting.
  • the existing display panel has a technical problem of ghosting.
  • Embodiments of the present application provide a display panel and a display panel preparation method, which can alleviate the technical problem of ghosting in existing display panels.
  • An embodiment of the present application provides a display panel, including:
  • the TFT device is disposed above the substrate, and the TFT device includes a light-shielding layer disposed above the substrate, a gate layer disposed on a side of the light-shielding layer away from the substrate, a source The drain layer and the passivation layer provided on the source and drain layer.
  • the source and drain layer includes a source and a drain. The source and drain layer is provided on the gate layer. The light shielding layer is away from the One side of the substrate;
  • a flat layer, the flat layer is provided on the passivation layer
  • a light-emitting device includes an anode, the anode is provided on the flat layer, and a via hole penetrating the flat layer and the passivation layer is provided on the side of the source electrode away from the substrate, The anode and the source are electrically connected through the via hole;
  • a shielding protective layer includes a body part and an extension part connected to the body part, the body part is disposed in the via hole, and the body part covers the source;
  • a plurality of grating slits are formed between the light shielding layer, the gate electrode layer, and the source and drain electrode layers, and the extension part covers at least one of the grating slits.
  • the width of the body part is the same as the width of the extension part.
  • the display panel further includes data lines arranged along a first direction and scan lines arranged along a second direction.
  • the length of the body part is the same as the length of the body part.
  • the lengths of the extensions are the same.
  • the front projection of the shielding protective layer on the substrate covers the front projection of the TFT device on the substrate.
  • the TFT device further includes an active layer, the active layer is disposed on the side of the substrate, the light-shielding layer is away from the substrate, and the active layer
  • the source layer is made of transparent indium gallium zinc oxide material.
  • the extension part has a grid-like structure
  • the extension part includes a light-blocking part and a hollow part, and in the thickness direction of the film layer, the light-blocking part covers the A grating slit is provided, and the hollow portion is provided correspondingly to the light-shielding layer, the gate layer, and the source-drain layer.
  • the electrical conductivity of the body part is greater than the electrical conductivity of the extension part.
  • the TFT device and the light-emitting device are disposed in a staggered position.
  • the light-emitting device further includes a light-emitting layer disposed on the side of the anode away from the substrate, and a light-emitting layer disposed on the side of the anode away from the substrate.
  • the light-emitting layer is away from the cathode on the side of the substrate, and the preparation materials of the anode and the cathode are both transparent materials.
  • the display panel further includes a surface-cathode overlap area, and in the surface-cathode overlap area, the shielding protective layer and the cathode are arranged in parallel.
  • the shielding protective layer further includes an auxiliary electrode part located in the surface cathode overlap area, and the auxiliary electrode part is spaced apart from the body part and the extension part. , the auxiliary electrode part overlaps the cathode and is used to reduce the cathode impedance.
  • the shielding protective layer is arranged in a special-shaped structure in the surface cathode overlapping area.
  • the shielding protective layer and the anode are provided in the same layer.
  • the anode has a single-layer structure, and the anode is made of indium tin oxide.
  • the shielding protective layer is provided on a side surface of the passivation layer away from the substrate.
  • the shielding protective layer is made of at least one material selected from molybdenum, aluminum, and titanium.
  • the light-shielding layer, the gate electrode layer, and the source-drain electrode layer are all made of light-shielding materials.
  • the shielding protective layer is made of the same material as the source and drain layer.
  • the thickness of the shielding protective layer ranges from 20 nanometers to 200 nanometers.
  • Embodiments of the present application provide a display panel preparation method, which includes:
  • the array substrate includes a source and drain layer and a passivation layer disposed on the source and drain layer;
  • a flat layer is prepared on the array substrate, and a via hole is formed through the flat layer and the passivation layer;
  • a shielding protective layer is prepared on the side of the passivation layer away from the substrate, and the shielding protective layer covers at least one grating slit;
  • An anode, a luminescent layer, a cathode, and an encapsulation layer are prepared on the side of the flat layer away from the substrate.
  • the shielding protective layer includes a body portion and an extension portion formed by extending the body portion.
  • the extension portion covers at least one grating slit, shields the grating slit, and alleviates the ghosting phenomenon in existing display panels. question.
  • Figure 1 is a schematic top view of an existing display panel
  • Figure 2 is a schematic cross-sectional view of the current display panel A-A
  • FIG. 3 is a schematic top view of the display panel provided by this application.
  • Figure 4 is a schematic cross-sectional view of the display panel B-B provided by this application.
  • FIG. 5 is another cross-sectional schematic diagram of the display panel provided by this application.
  • Figure 6 is a schematic flow chart of a display panel preparation method provided by this application.
  • the display panel provided by this application includes a substrate 10, a TFT device 5, a flat layer 100, a light-emitting device, and a shielding protective layer 110.
  • the TFT device 5 is disposed above the substrate 10.
  • the TFT device 5 includes a light-shielding layer 20 disposed above the substrate 10, a gate layer 60 disposed on a side of the light-shielding layer 20 away from the substrate, a source-drain layer 80, and a source-drain layer 80 disposed on the source-drain layer.
  • the source and drain layer 80 includes a source electrode 801 and a drain electrode 802, the source and drain layer 80 is disposed on the gate layer 60, and the light shielding layer 20 is away from the substrate
  • the flat layer 100 is disposed on the passivation layer 90.
  • the light-emitting device includes an anode 120.
  • the anode 120 is disposed on the flat layer 100.
  • the source electrode 801 is away from the substrate.
  • One side is provided with a via hole penetrating the flat layer 100 and the passivation layer 90.
  • the shielding protective layer 110 includes a body part 1101 and an extension part 1102 connected to the body part 1101.
  • the body part 1101 is provided with In the via hole, and the body portion 1101 covers the source 801, the shielding protective layer 110 is made of a light-shielding material, wherein in the thickness direction of the display panel, the light-shielding layer 20.
  • a plurality of grating slits 6 are formed between the gate layer 60 and the source and drain layer 80 , and the extension 1102 is provided to cover at least one of the grating slits 6 .
  • the anode 120 and the source electrode 801 can be electrically connected through the via hole; further, the body portion 1101 is provided on a side surface of the source electrode 801 away from the substrate 10. One end of the portion 1101 is connected to the anode 801 , and the opposite end of the body portion 1101 is connected to the source 801 .
  • a plurality of grating gaps 6 are formed between the light-shielding layer 20 , the gate layer 60 , and the source-drain layer 80 , and the grating gaps 6 are prone to ghosting.
  • the extension 1102 to further increase the coverage area of the grating slit 6, the diffraction at the grating slit 6 between the metal traces of the light-shielding layer 20, the gate layer 60, and the source and drain layer 80 can be reduced, thereby improving the display effect.
  • the TFT device 5 also includes a buffer layer 30, a gate insulating layer 50, and an interlayer insulating layer 70.
  • the buffer layer 30 is provided on the substrate 10 and the light-shielding layer 20.
  • the gate insulating layer 50 Disposed on the active layer 40 , the interlayer insulating layer 70 is disposed on the gate layer 60 and the buffer layer 30 .
  • a pixel definition layer 160 is also provided on the flat layer 100 .
  • the ghost phenomenon can be effectively alleviated by blocking the grating gap 6; further, the body portion 1101 is disposed in the via hole and covers the source 801. By making the body The portion 1101 extends to the grating slit 6 and blocks at least one grating slit 6, thereby reducing the occurrence of ghosting.
  • the body part 1101 is extended to form an extension part 1102.
  • the extension part 1102 is provided to cover at least one grating slit 6 and shield the grating slit 6, thereby alleviating the technical problem of ghosting in existing display panels.
  • the shielding protective layer 110 may be disposed on the source electrode 801 and the passivation layer 90 .
  • the shielding protective layer 110 can also be disposed on the source 801 and the flat layer 100 .
  • the display panel further includes data lines 4 arranged along the first direction and scan lines 3 arranged along the second direction.
  • the width of the body part 1101 along the second direction is the same as the width of the extension part 1102 The width in the second direction is the same.
  • the display panel includes a plurality of regularly arranged pixel units, and any of the pixel units is disposed between adjacent data lines 4 and adjacent scan lines 3 .
  • the length of the extension portion 1102 and the length of the main body portion 1101 may also be the same.
  • the pixel unit includes three sub-pixel units of different colors, the sub-pixel unit includes a light-emitting area 1, and a spacing area 2 is included between adjacent sub-pixel units.
  • the width of the light-emitting area 1 may be 51.5 microns, and the width of the spacing area 2 may be 14 microns.
  • extension portion 1102 is equivalent to the body portion 1101 extending in the first direction without changing the width.
  • the width or length of the extension part 1102 is made the same as the main part 1101, which simplifies the preparation process of the extension part 1102 and reduces the cost.
  • the shielding protective layer 110 is disposed on a side surface of the passivation layer 90 away from the substrate 10 .
  • the front projection of the shielding protective layer 110 on the substrate 10 covers the front projection of the TFT device 5 on the substrate 10 .
  • the orthographic projection of the shielding protective layer 110 on the substrate 10 may completely coincide with the orthographic projection of the TFT device 5 on the substrate 10 .
  • the shielding protective layer 110 is arranged to cover the TFT device 5 along the thickness direction of the display panel, completely shielding the grating gap 6 existing in the TFT device 5 and reducing the ghosting phenomenon.
  • the shielding protective layer 110 and the anode 120 are arranged in the same layer.
  • the body part 1101 and the extension part 1102 can not only extend along the first direction, but also extend along the second direction, breaking the periodic structure of the longitudinal wiring and weakening the grating effect.
  • the extending portion 1102 by further extending the extending portion 1102 in the first direction and the second direction, covers part of the data line 4 and the scanning line 3, and further surrounds the data line 4 and the scanning line 3.
  • the existing grating gap 6 is shielded, thereby weakening the grating effect.
  • the TFT device 5 and the light-emitting device are disposed in an offset position.
  • the light-emitting device further includes a luminescent layer 130 disposed on the side of the anode 120 away from the substrate. 130 is away from the cathode 140 on the side of the substrate, and the anode 120 and the cathode 140 are made of transparent materials.
  • the anode 120 has a single-layer structure, and the preparation material of the anode 120 may be indium tin oxide.
  • the display panel may be a double-sided display panel.
  • no reflective layer or semi-reflective layer is provided on both sides of the light-emitting device away from the substrate and below.
  • the TFT device 5 and the light-emitting device are disposed in a misaligned manner, and the TFT device 5 will not block the light emitted from the substrate 10 side of the light-emitting device.
  • the grating effect of the double-sided display panel is more serious than that of the single-sided display panel.
  • the structural design of the shielding protective layer 110 weakens the grating effect and further reduces the ghosting phenomenon of the transparent display.
  • the TFT device 5 further includes an active layer 40.
  • the active layer 40 is disposed on the side of the substrate 10 and the light-shielding layer 20 away from the substrate.
  • the layer 40 is made of transparent indium gallium zinc oxide material.
  • the light-shielding layer 20 , the gate layer 60 , and the source-drain layer 80 are all made of light-shielding materials.
  • the shielding protective layer 110 is made of the same material as the source and drain layer 80 .
  • the shielding protective layer 110 and the source and drain layer 80 can be prepared in the same process.
  • the preparation cost of the display panel can also be reduced by simplifying the preparation process of the shielding protective layer 110 .
  • the shielding protective layer 110 is made of at least one material selected from molybdenum, aluminum, and titanium.
  • the shielding protective layer 110 may also include other opaque metal materials.
  • the electrical conductivity of the body part 1101 may be greater than the electrical conductivity of the extension part 1102 .
  • the body part 1101 needs to ensure certain conductive performance. Therefore, the conductive performance of the body part 1101 may be greater than the conductive performance of the source electrode 801 or the anode 120 .
  • the shielding protective layer 110 by limiting the material of the shielding protective layer 110, not only has light-shielding properties, but also has certain conductive properties, thereby improving the stability of the display panel.
  • the thickness of the shielding protective layer 110 ranges from 20 nanometers to 200 nanometers.
  • the extension portion 1102 has a grid-like structure.
  • the extension part 1102 may include a light-blocking part and a hollow part.
  • the light-blocking part is arranged corresponding to the grating slit 6; further, in the thickness direction of the display panel, the light-blocking part is arranged to cover the grating slit 6.
  • the hollow portion may be provided corresponding to the metal wiring of the light shielding layer 20 , the gate layer 60 , and the source and drain layer 80 .
  • the grating slit 6 covered by the light blocking portion has a very small orthographic projection range on the substrate 10 and has a minimal impact on the transmittance of the display panel.
  • the extension part 1102 by arranging the extension part 1102 into a grid-like structure, it not only blocks the grating gap 6 and thereby reduces the technical effect of the ghost phenomenon; at the same time, the setting of the hollow part also reduces the risk of ghosting. Effect of display panel transmittance.
  • the display panel further includes a surface cathode 140 overlapping area. In the surface cathode 140 overlapping area, the cathode 140 is disposed in contact with the shielding protective layer 110 .
  • the shielding protective layer also includes an auxiliary electrode part located in the overlapping area of the cathode.
  • the auxiliary electrode part is spaced apart from the body part and the extension part.
  • the auxiliary electrode part is used to overlap with the cathode. , thereby reducing the cathode impedance.
  • the cathode 140 and the shielding protective layer 110 may be arranged in surface contact.
  • the shielding protective layer 110 and the cathode 140 are arranged in parallel, which can reduce the resistance of the cathode 140, further reduce the signal transmission loss of the cathode 140 of the display panel, and improve the stability of the display panel.
  • the shielding protective layer 110 may be arranged in a special-shaped structure in the overlapping area of the surface cathode 140 .
  • the special-shaped structure can increase the contact area with the cathode 140, reduce contact resistance, and further reduce the resistance of the cathode 140.
  • the display panel preparation method disclosed in this application includes:
  • S1 Provide an array substrate, which includes a source and drain layer 80 and a passivation layer 90 disposed on the source and drain layer 80;
  • An anode 120, a luminescent layer 130, a cathode 140, and an encapsulation layer 150 are prepared on the side of the flat layer 100 away from the substrate.
  • the array substrate includes a light-shielding layer 20 , a gate layer 60 , and a source-drain layer 80 .
  • a plurality of grating slits 6 are formed between the metal traces of the light-shielding layer 20 , the gate layer 60 , and the source-drain layer 80 .
  • the shielding protection layer 110 includes a body part 1101 and an extension part 1102.
  • the body part 1101 is located in the via hole and covers the source 801.
  • the extension part 1102 is connected to the body part 1101, wherein the The shielding protective layer 110 is provided to cover at least one grating slit 6 .
  • the array substrate includes a source and drain layer 80 and a passivation layer 90 disposed on the source and drain layer 80 .
  • the via hole is located on the side of the source electrode 801 away from the substrate.
  • This application also proposes a display device and a display module.
  • the display module and the display device both include the above-mentioned display panel, which will not be described again here.
  • the display panel provided in this embodiment includes a substrate, a TFT device, a flat layer, a light-emitting device, and a shielding protective layer.
  • the TFT device is disposed above the substrate.
  • the TFT device includes a light-shielding device disposed above the substrate.
  • the source-drain layer includes a source electrode and a drain electrode
  • the source and drain layers are disposed on the side of the gate layer and the light-shielding layer away from the substrate, the flat layer is disposed on the passivation layer, the light-emitting device includes an anode, and the anode is disposed On the flat layer, a via hole penetrating the flat layer and the passivation layer is provided on the side of the source electrode away from the substrate. The anode and the source electrode are electrically connected through the via hole.
  • the shielding protection layer includes a body part and an extension part connected to the body part, the body part is arranged in the via hole, and the body part covers the source electrode, the shielding protection layer
  • the preparation material is a light-shielding material, wherein in the thickness direction of the display panel, a plurality of grating slits are formed between the light-shielding layer, the gate layer, and the source-drain layer, and the extension portion is at least Covering one of the grating slits; extending the body part to form an extension part, the extension part covering at least one of the grating slits, shielding the grating slits, and alleviating the technical problem of ghosting in existing display panels.

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Abstract

一种显示面板、一种显示面板制备方法，显示面板包括衬底（10）、遮光层（20）、栅极层（60）、源漏极层（80）、遮蔽保护层（110），遮光层（20）、栅极层（60）、源漏极层（80）之间形成有多个光栅缝隙（6），遮蔽保护层（110）包括本体部（1101）、与本体部（1101）相连的延伸部（1102），延伸部（1102）至少覆盖一光栅缝隙（6）设置；通过延伸部（1102）遮蔽光栅缝隙（6），避免光栅缝隙（6）产生光栅效应，减弱重影现象。

Description

显示面板及其制备方法 技术领域
本申请涉及显示技术领域，具体涉及一种显示面板、一种显示面板制备方法。
背景技术
现请参阅图1、图2，在现有显示面板中，尤其对于双面显示或透明显示的显示面板，像素通常分为透明部分和非透明部分。非透明部分包括遮光层、栅极层、源漏极层、本体部等走线，透明部分包括有源层、电容、阳极。
同时，遮光层20、栅极层60、源漏极层80的走线之间形成小块透明区域，这些小的透明区域形成光栅缝隙6，容易发生衍射效应，导致透过透明显示面板看到的物体有重影现象。
技术问题
因此，现有显示面板存在有重影现象的技术问题。
技术解决方案
本申请实施例提供一种显示面板、一种显示面板制备方法，可以缓解现有显示面板存在有重影现象的技术问题。
本申请实施例提供一种显示面板，包括：
衬底；
TFT器件，所述TFT器件设置于所述衬底上方，所述TFT器件包括设置于所述衬底上方的遮光层、设置于所述遮光层远离所述衬底一侧的栅极层、源漏极层、设置于源漏极层上的钝化层，所述源漏极层包括源极、漏极，所述源漏极层设置于所述栅极层、所述遮光层远离所述衬底一侧；
平坦层，所述平坦层设置于所述钝化层上；
发光器件，所述发光器件包括阳极，所述阳极设置于所述平坦层上，在所述源极远离所述衬底一侧设置有一贯穿所述平坦层、所述钝化层的过孔，所述阳极与所述源极通过所述过孔电连接；以及
遮蔽保护层，所述遮蔽保护层包括本体部、与所述本体部相连的延伸部， 所述本体部设置于所述过孔内，且所述本体部覆盖所述源极；
其中，在所述显示面板的厚度方向上，所述遮光层、所述栅极层、所述源漏极层之间形成有多个光栅缝隙，所述延伸部至少覆盖一所述光栅缝隙。
可选的，在本申请的一些实施例中，所述本体部的宽度与所述延伸部的宽度相同。
可选的，在本申请的一些实施例中，所述显示面板还包括沿第一方向设置的数据线、沿第二方向设置的扫描线，沿第一方向，所述本体部的长度与所述延伸部的长度相同。
可选的，在本申请的一些实施例中，所述遮蔽保护层在所述衬底的正投影覆盖所述TFT器件在所述衬底的正投影。
可选的，在本申请的一些实施例中，所述延伸部在所述衬底上的正投影与所述数据线或所述扫描线在所述衬底上的正投影存在重叠区域。
可选的，在本申请的一些实施例中，所述TFT器件还包括有源层，所述有源层设置于所述衬底、所述遮光层远离所述衬底一侧，所述有源层的制备材料为透明铟镓锌氧化物材料。
可选的，在本申请的一些实施例中，所述延伸部呈网格状结构，所述延伸部包括挡光部分、镂空部分，在膜层厚度方向上，所述挡光部分覆盖所述光栅缝隙设置，所述镂空部分与所述遮光层、所述栅极层、所述源漏极层对应设置。
可选的，在本申请的一些实施例中，所述本体部的导电性能大于所述延伸部的导电性能。
可选的，在本申请的一些实施例中，所述TFT器件与所述发光器件错位设置，所述发光器件还包括设置于所述阳极远离所述衬底一侧的发光层、设置于所述发光层远离所述衬底一侧的阴极，所述阳极、所述阴极的制备材料均为透明材料。
可选的，在本申请的一些实施例中，所述显示面板还包括面阴极搭接区，在所述面阴极搭接区，所述遮蔽保护层与所述阴极呈并联设置。
可选的，在本申请的一些实施例中，所述遮蔽保护层还包括位于所述面阴极搭接区的辅助电极部，所述辅助电极部与所述本体部、所述延伸部间隔设置，所述辅助电极部与所述阴极搭接，用于降低所述阴极阻抗。
可选的，在本申请的一些实施例中，所述遮蔽保护层在所述面阴极搭接区呈异形结构设置。
可选的，在本申请的一些实施例中，所述遮蔽保护层与所述阳极同层设置。
可选的，在本申请的一些实施例中，所述阳极为单层结构，所述阳极的制备材料为氧化铟锡。
可选的，在本申请的一些实施例中，所述遮蔽保护层设置于所述钝化层远离所述衬底的一侧表面。
可选的，在本申请的一些实施例中，所述遮蔽保护层的制备材料包括钼、铝、钛中的至少一种。
可选的，在本申请的一些实施例中，所述遮光层、所述栅极层、所述源漏极层的制备材料均为遮光材料。
可选的，在本申请的一些实施例中，所述遮蔽保护层的制备材料与所述源漏极层的制备材料相同。
可选的，在本申请的一些实施例中，所述遮蔽保护层的厚度范围为20纳米至200纳米。
本申请实施例提供一种显示面板制备方法，其包括：
提供一阵列基板，所述阵列基板包括源漏极层、设置于所述源漏极层上的钝化层；
在所述阵列基板上制备得到平坦层，形成一贯穿平坦层、钝化层的过孔；
在所述钝化层远离所述衬底的一侧制备得到遮蔽保护层，所述遮蔽保护层至少覆盖一光栅缝隙设置；
在所述平坦层远离所述衬底一侧制备得到阳极、发光层、阴极、封装层。
有益效果
通过设置遮蔽保护层，遮蔽保护层包括本体部、本体部延伸形成的延伸部，所述延伸部至少覆盖一光栅缝隙设置，遮蔽所述光栅缝隙，缓解现有显示面板存在有重影现象的技术问题。
附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所 需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是现有显示面板的俯视示意图；
图2是现显示面板A-A处的截面示意图；
图3是本申请提供的显示面板的俯视示意图；
图4是本申请提供的显示面板B-B处的截面示意图；
图5是本申请提供的显示面板的另一截面示意图；
图6是本申请提供的显示面板制备方法的流程示意图。
附图标记说明：
Figure PCTCN2022093288-appb-000001
本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清 楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。此外，应当理解的是，此处所描述的具体实施方式仅用于说明和解释本申请，并不用于限制本申请。在本申请中，在未作相反说明的情况下，使用的方位词如“上”和“下”通常是指装置实际使用或工作状态下的上和下，具体为附图中的图面方向；而“内”和“外”则是针对装置的轮廓而言的。
请参阅图3、图4，本申请提供的显示面板包括衬底10、TFT器件5、平坦层100、发光器件、遮蔽保护层110，所述TFT器件5设置于所述衬底10上方，所述TFT器件5包括设置于所述衬底10上方的遮光层20、设置于所述遮光层20远离所述衬底一侧的栅极层60、源漏极层80、设置于源漏极层80上的钝化层90，所述源漏极层80包括源极801、漏极802，所述源漏极层80设置于所述栅极层60、所述遮光层20远离所述衬底一侧，所述平坦层100设置于所述钝化层90上，所述发光器件包括阳极120，所述阳极120设置于所述平坦层100上，在所述源极801远离所述衬底一侧设置有一贯穿所述平坦层100、所述钝化层90的过孔，所述遮蔽保护层110包括本体部1101、与所述本体部1101相连的延伸部1102，所述本体部1101设置于所述过孔内，且所述本体部1101覆盖所述源极801设置，所述遮蔽保护层110的制备材料为遮光材料，其中，在所述显示面板的厚度方向上，所述遮光层20、所述栅极层60、所述源漏极层80之间形成有多个光栅缝隙6，所述延伸部1102至少覆盖一所述光栅缝隙6设置。
其中，所述阳极120与所述源极801可以通过所述过孔电连接；进一步的，所述源极801远离所述衬底10的一侧表面设置有所述本体部1101，所述本体部1101的一端与所述阳极801连接，所述本体部1101的相对另一端与所述源极801连接。
其中，所述遮光层20、所述栅极层60、所述源漏极层80之间形成有多个光栅缝隙6，光栅缝隙6容易产生重影现象。
其中，通过设置延伸部1102进一步增加对光栅缝隙6的覆盖面积，可减小遮光层20、栅极层60、源漏极层80金属走线之间光栅缝隙6处的衍射，提 高显示效果。
其中，所述TFT器件5还包括缓冲层30、栅绝缘层50、层间绝缘层70，所述缓冲层30设置于所述衬底10、所述遮光层20上，所述栅绝缘层50设置于所述有源层40上，所述层间绝缘层70设置于所述栅极层60、所述缓冲层30上。
其中，所述平坦层100上还设置有像素定义层160。
可以理解的是，通过遮挡所述光栅缝隙6能有效缓解重影现象的发生；进一步的，所述本体部1101设置于所述过孔内且覆盖所述源极801设置，通过使所述本体部1101延伸至光栅缝隙6处，并至少遮挡一光栅缝隙6，即可起到减少重影现象的发生。
本申请通过使本体部1101延伸形成延伸部1102，所述延伸部1102至少覆盖一光栅缝隙6设置，遮蔽所述光栅缝隙6，缓解现有显示面板存在有重影现象的技术问题。
现结合具体实施例对本申请的技术方案进行描述。
在一种实施例中，所述遮蔽保护层110可以设置于所述源极801、所述钝化层90上。
在另一种实施例中，请参阅图2，所述遮蔽保护层110还可以设置于所述源极801、所述平坦层100上。
在一种实施例中，所述显示面板还包括沿第一方向设置的数据线4、沿第二方向设置的扫描线3，所述本体部1101沿第二方向的宽度与所述延伸部1102沿第二方向的宽度相同。
其中，所述显示面板包括多个呈规则排布的像素单元，任一所述像素单元设置于相邻数据线4、相邻扫描线3之间。
其中，沿第一方向，所述延伸部1102的长度与所述本体部1101的长度也可以相同。
其中，所述像素单元包括三个不同颜色的子像素单元，所述子像素单元包括发光区域1，相邻所述子像素单元之间包括间隔区域2。
其中，沿第二方向，所述发光区域1的宽度可以为51.5微米，所述间隔 区域2的宽度可以为14微米。
可以理解的是，所述延伸部1102相当于所述本体部1101在宽度不变的情况下，朝着所述第一方向延伸得到。
在本实施例中，使延伸部1102的宽度或长度与本体部1101相同，简化所述延伸部1102的制备工艺，降低了成本。
在一种实施例中，请参阅图4，所述遮蔽保护层110设置于所述钝化层90远离所述衬底10的一侧表面。
在一种实施例中，请参阅图5，所述遮蔽保护层110在所述衬底10的正投影覆盖所述TFT器件5在所述衬底10的正投影。
其中，所述遮蔽保护层110在所述衬底10上的正投影可以与所述TFT器件5在所述衬底10上的正投影完全重合。
可以理解的是，所述TFT器件5的遮光层20、栅极层60、源漏极层80的金属走线之间存在多个光栅缝隙6，将所述TFT器件5完全覆盖，则完全遮蔽了TFT器件5存在的所有光栅缝隙6，进一步提升了减少重影现象的效果。
在本实施例中，沿着显示面板的厚度方向，所述遮蔽保护层110覆盖所述TFT器件5设置，完全遮蔽了TFT器件5内存在的光栅缝隙6，减少了重影现象。
在一种实施例中，请参阅图5，所述遮蔽保护层110与所述阳极120同层设置。
在一种实施例中，所述延伸部1102在所述衬底10上的正投影与所述数据线4或所述扫描线3在所述衬底10上的正投影存在重叠区域。
其中，所述数据线4和所述扫描线3与所述金属走线之间也存在光栅缝隙6。
可以理解的是，本体部1101及延伸部1102不仅可以沿着第一方向延伸，也可沿着第二方向延伸，破环纵向走线的周期结构，减弱了光栅效应。
在本实施例中，通过延伸部1102进一步向第一方向、第二方向延伸，使延伸部1102覆盖部分所述数据线4、所述扫描线3设置，进一步对数据线4、扫描线3周围存在的光栅缝隙6进行遮蔽，从而减弱了光栅效应。
在一种实施例中，所述TFT器件5与所述发光器件错位设置，所述发光 器件还包括设置于所述阳极120远离所述衬底一侧的发光层130、设置于所述发光层130远离所述衬底一侧的阴极140，所述阳极120、所述阴极140的制备材料均为透明材料。
其中，所述阳极120为单层结构，所述阳极120的制备材料可以为氧化铟锡。
其中，所述显示面板可以为双面显示面板。
其中，在所述发光器件的远离所述衬底一侧、下方两侧均未设置反射层或半反半透层。
可以理解的是，所述TFT器件5与所述发光器件错位设置，所述TFT器件5不会遮挡所述发光器件的衬底10一侧发出的光线。
在本实施例中，所述双面显示面板的光栅效应较单侧显示面板更严重，通过遮蔽保护层110的结构设计，减弱了光栅效应，进一步减弱了透明显示的重影现象。
在一种实施例中，所述TFT器件5还包括有源层40，所述有源层40设置于所述衬底10、所述遮光层20远离所述衬底一侧，所述有源层40的制备材料为透明铟镓锌氧化物材料。
在一种实施例中，所述遮光层20、所述栅极层60、所述源漏极层80的制备材料均为遮光材料。
在一种实施例中，所述遮蔽保护层110的制备材料与所述源漏极层80的制备材料相同。
其中，所述遮蔽保护层110可以与所述源漏极层80同一步工序制备得到。
在本实施例中，也能通过简化遮蔽保护层110的制备工序，降低显示面板的制备成本。
在一种实施例中，所述遮蔽保护层110的制备材料包括钼、铝、钛中的至少一种。
其中，所述遮蔽保护层110还可以包括其他不透光金属材料。
其中，所述本体部1101的导电性能可以大于所述延伸部1102的导电性能。
可以理解的是，所述本体部1101需要保证一定的导电性能，因此，所述本体部1101的导电性能可以大于所述源极801或所述阳极120的导电性能。
在本实施例中，通过对所述遮蔽保护层110制备材料的限定，使遮蔽保护层110在具备遮光性能的同时，还具备一定的导电性能，提高了显示面板的稳定性。
在一种实施例中，所述遮蔽保护层110的厚度范围为20纳米至200纳米。
在一种实施例中，所述延伸部1102呈网格状结构。
其中，所述延伸部1102可以包括挡光部分、镂空部分。
其中，所述挡光部分与所述光栅缝隙6对应设置；进一步的，在显示面板的厚度方向上，所述挡光部分覆盖所述光栅缝隙6设置。
其中，所述镂空部分可以与所述遮光层20、所述栅极层60、所述源漏极层80的金属走线对应设置。
需要注意的是，挡光部分遮盖的光栅缝隙6在衬底10上正投影的范围极小，对显示面板的透过率影响极小。
在本实施例中，通过将所述延伸部1102设置为网格状结构，不仅起到对光栅缝隙6遮挡，从而减弱重影现象的技术效果；同时，还通过镂空部的设置，降低了对显示面板透过率的影响。
在一种实施例中，所述显示面板还包括面阴极140搭接区，在所述面阴极140搭接区，所述阴极140与所述遮蔽保护层110接触设置。
具体的，所述遮蔽保护层还包括位于面阴极搭接区的辅助电极部，所述辅助电极部与所述本体部、所述延伸部间隔设置，所述辅助电极部用于与阴极搭接，从而降低阴极阻抗。
其中，所述阴极140与所述遮蔽保护层110可以呈面接触设置。
可以理解的是，所述遮蔽保护层110与所述阴极140呈并联设置，能降低所述阴极140的电阻，进一步减少显示面板阴极140信号传输的损失，提升所述显示面板的稳定性。
在一种实施例中，所述遮蔽保护层110在所述面阴极140搭接区可以呈异形结构设置。
在本实施例中，所述异形结构可以增加与所述阴极140的接触面积，降低接触阻抗，进一步降低了所述阴极140的电阻。
请参阅图6，本申请公开的显示面板制备方法，包括：
S1：提供一阵列基板，所述阵列基板包括源漏极层80、设置于所述源漏极层80上的钝化层90；
S2：在所述阵列基板上制备得到平坦层100，形成一贯穿平坦层100、钝化层90的过孔；
S3：在所述钝化层90远离所述衬底10的一侧制备得到遮蔽保护层110，所述遮蔽保护层110至少覆盖一光栅缝隙6设置；
S4：在所述平坦层100远离所述衬底一侧制备得到阳极120、发光层130、阴极140、封装层150。
其中，所述阵列基板包括遮光层20、栅极层60、源漏极层80，遮光层20、栅极层60、源漏极层80的金属走线之间形成有多个光栅缝隙6。
其中，所述遮蔽保护层110包括本体部1101和延伸部1102，本体部1101位于所述过孔内，且覆盖所述源极801设置，延伸部1102与所述本体部1101连接，其中，所述遮蔽保护层110至少覆盖一光栅缝隙6设置。
其中，所述阵列基板包括源漏极层80、设置于所述源漏极层80上的钝化层90。
其中，所述过孔位于所述源极801远离所述衬底一侧。
本申请还提出了一种显示装置、一种显示模组，所述显示模组和所述显示装置均包括上述显示面板，此处不再赘述。
本实施例提供的显示面板包括衬底、TFT器件、平坦层、发光器件、遮蔽保护层，所述TFT器件设置于所述衬底上方，所述TFT器件包括设置于所述衬底上方的遮光层、设置于所述遮光层远离所述衬底一侧的栅极层、源漏极层、设置于源漏极层上的钝化层，所述源漏极层包括源极、漏极，所述源漏极层设置于所述栅极层、所述遮光层远离所述衬底一侧，所述平坦层设置于所述钝化层上，所述发光器件包括阳极，所述阳极设置于所述平坦层上，在所述源极远离所述衬底一侧设置有一贯穿所述平坦层、所述钝化层的过孔，所述阳极与所述源极通过所述过孔电连接，所述遮蔽保护层包括本体部、与所述本体部相连的延伸部，所述本体部设置于所述过孔内，且所述本体部覆盖所述源极设置，所述遮蔽保护层的制备材料为遮光材料，其中，在所述显示面板的厚度方向上， 所述遮光层、所述栅极层、所述源漏极层之间形成有多个光栅缝隙，所述延伸部至少覆盖一所述光栅缝隙设置；通过使本体部延伸形成延伸部，所述延伸部至少覆盖一光栅缝隙设置，遮蔽所述光栅缝隙，缓解现有显示面板存在有重影现象的技术问题。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述的部分，可以参见其他实施例的相关描述。
以上对本申请实施例所提供的一种显示面板、一种显示面板制备方法进行了详细介绍，本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请的方法及其核心思想；同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种显示面板，其包括：
    衬底；
    TFT器件，所述TFT器件设置于所述衬底上方，所述TFT器件包括设置于所述衬底上方的遮光层、设置于所述遮光层远离所述衬底一侧的栅极层、源漏极层、设置于源漏极层上的钝化层，所述源漏极层包括源极、漏极，所述源漏极层设置于所述栅极层、所述遮光层远离所述衬底一侧；
    平坦层，所述平坦层设置于所述钝化层上；
    发光器件，所述发光器件包括阳极，所述阳极设置于所述平坦层上，在所述源极远离所述衬底一侧设置有一贯穿所述平坦层、所述钝化层的过孔，所述阳极与所述源极通过所述过孔电连接；以及
    遮蔽保护层，所述遮蔽保护层包括本体部、与所述本体部相连的延伸部，所述本体部设置于所述过孔内，且所述本体部覆盖所述源极；
    其中，在所述显示面板的厚度方向上，所述遮光层、所述栅极层、所述源漏极层之间形成有多个光栅缝隙，所述延伸部至少覆盖一所述光栅缝隙。
  2. 如权利要求1所述的显示面板，其中，所述本体部的宽度与所述延伸部的宽度相同。
  3. 如权利要求2所述的显示面板，其中，所述显示面板还包括沿第一方向设置的数据线、沿第二方向设置的扫描线，沿第一方向，所述本体部的长度与所述延伸部的长度相同。
  4. 如权利要求2所述的显示面板，其中，所述遮蔽保护层在所述衬底的正投影覆盖所述TFT器件在所述衬底的正投影。
  5. 如权利要求3所述的显示面板，其中，所述延伸部在所述衬底上的正投影与所述数据线或所述扫描线在所述衬底上的正投影存在重叠区域。
  6. 如权利要求1所述的显示面板，其中，所述TFT器件还包括有源层，所述有源层设置于所述衬底、所述遮光层远离所述衬底一侧，所述有源层的制备材料为透明铟镓锌氧化物材料。
  7. 如权利要求6所述的显示面板，其中，所述延伸部呈网格状结构，所述延伸部包括挡光部分、镂空部分，在膜层厚度方向上，所述挡光部分覆盖所 述光栅缝隙设置，所述镂空部分与所述遮光层、所述栅极层、所述源漏极层对应设置。
  8. 如权利要求1所述的显示面板，其中，所述本体部的导电性能大于所述延伸部的导电性能。
  9. 如权利要求1所述的显示面板，其中，所述TFT器件与所述发光器件错位设置，所述发光器件还包括设置于所述阳极远离所述衬底一侧的发光层、设置于所述发光层远离所述衬底一侧的阴极，所述阳极、所述阴极的制备材料均为透明材料。
  10. 如权利要求1所述的显示面板，其中，所述显示面板还包括面阴极搭接区，在所述面阴极搭接区，所述遮蔽保护层与所述阴极呈并联设置。
  11. 如权利要求10所述的显示面板，其中，所述遮蔽保护层还包括位于所述面阴极搭接区的辅助电极部，所述辅助电极部与所述本体部、所述延伸部间隔设置，所述辅助电极部与所述阴极搭接，用于降低所述阴极的阻抗。
  12. 如权利要求11所述的显示面板，其中，所述遮蔽保护层在所述面阴极搭接区呈异形结构设置。
  13. 如权利要求1所述的显示面板，其中，所述遮蔽保护层与所述阳极同层设置。
  14. 如权利要求13所述的显示面板，其中，所述阳极为单层结构，所述阳极的制备材料为氧化铟锡。
  15. 如权利要求1所述的显示面板，其中，所述遮蔽保护层设置于所述钝化层远离所述衬底的一侧表面。
  16. 如权利要求1所述的显示面板，其中，所述遮蔽保护层的制备材料包括钼、铝、钛中的至少一种。
  17. 如权利要求1所述的显示面板，其中，所述遮光层、所述栅极层、所述源漏极层的制备材料均为遮光材料。
  18. 如权利要求17所述的显示面板，其中，所述遮蔽保护层的制备材料与所述源漏极层的制备材料相同。
  19. 如权利要求1所述的显示面板，其中，所述遮蔽保护层的厚度范围为20纳米至200纳米。
  20. 一种显示面板制备方法，其包括：
    提供一阵列基板，所述阵列基板包括源漏极层、设置于所述源漏极层上的钝化层；
    在所述阵列基板上制备得到平坦层，形成一贯穿平坦层、钝化层的过孔；
    在所述钝化层远离所述衬底的一侧制备得到遮蔽保护层，所述遮蔽保护层至少覆盖一光栅缝隙设置；
    在所述平坦层远离所述衬底一侧制备得到阳极、发光层、阴极、封装层。
PCT/CN2022/093288 2022-04-22 2022-05-17 显示面板及其制备方法 Ceased WO2023201807A1 (zh)

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