WO2023153476A1 - 発光デバイスの製造方法および製造装置並びにレーザ素子基板 - Google Patents

発光デバイスの製造方法および製造装置並びにレーザ素子基板 Download PDF

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Publication number
WO2023153476A1
WO2023153476A1 PCT/JP2023/004376 JP2023004376W WO2023153476A1 WO 2023153476 A1 WO2023153476 A1 WO 2023153476A1 JP 2023004376 W JP2023004376 W JP 2023004376W WO 2023153476 A1 WO2023153476 A1 WO 2023153476A1
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Prior art keywords
light
substrate
solder
emitting device
manufacturing
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/JP2023/004376
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English (en)
French (fr)
Japanese (ja)
Inventor
佳伸 川口
賢太郎 村川
剛 神川
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Kyocera Corp
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Kyocera Corp
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Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2023580318A priority Critical patent/JPWO2023153476A1/ja
Priority to CN202380020305.6A priority patent/CN118648205A/zh
Priority to EP23752940.9A priority patent/EP4478564A4/en
Priority to US18/836,213 priority patent/US20250118943A1/en
Publication of WO2023153476A1 publication Critical patent/WO2023153476A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0233—Mounting configuration of laser chips
    • H01S5/02345—Wire-bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0235—Method for mounting laser chips
    • H01S5/02355—Fixing laser chips on mounts
    • H01S5/0237—Fixing laser chips on mounts by soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/023—Mount members, e.g. sub-mount members
    • H01S5/02315—Support members, e.g. bases or carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H29/00—Integrated devices, or assemblies of multiple devices, comprising at least one light-emitting semiconductor element covered by group H10H20/00
    • H10H29/01—Manufacture or treatment
    • H10H29/02—Manufacture or treatment using pick-and-place processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/02208—Mountings; Housings characterised by the shape of the housings
    • H01S5/02216—Butterfly-type, i.e. with electrode pins extending horizontally from the housings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/0233—Mounting configuration of laser chips
    • H01S5/0234—Up-side down mountings, e.g. Flip-chip, epi-side down mountings or junction down mountings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/04—Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042—Electrical excitation ; Circuits therefor
    • H01S5/0425—Electrodes, e.g. characterised by the structure
    • H01S5/04256—Electrodes, e.g. characterised by the structure characterised by the configuration
    • H01S5/04257—Electrodes, e.g. characterised by the structure characterised by the configuration having positive and negative electrodes on the same side of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/40—Arrangement of two or more semiconductor lasers, not provided for in groups H01S5/02 - H01S5/30
    • H01S5/4025—Array arrangements, e.g. constituted by discrete laser diodes or laser bar
    • H01S5/4031—Edge-emitting structures

Definitions

  • the present disclosure relates to a light-emitting device manufacturing method and manufacturing apparatus, and a laser element substrate.
  • Patent Document 1 discloses a method of transferring a semiconductor element to a circuit board.
  • a method for manufacturing a light emitting device includes steps of preparing a first substrate having a plurality of light emitters, a conductive first joint, and a first pad electrically connected to the first joint. and a first solder regulating portion located between the first joint portion and the first pad portion, the step of preparing a second substrate having solder formed on the first joint portion; bonding a first object selected from the plurality of light emitters and the second substrate with the solder; and separating the first and second substrates to separate the first object from the second substrate. and transferring.
  • FIG. 4 is a plan view showing the configuration of a second substrate in FIGS. 1 to 3;
  • FIG. 11 is a plan view showing another configuration of the second substrate;
  • FIG. 11 is a plan view showing another configuration of the second substrate;
  • FIG. 11 is a plan view showing another configuration of the second substrate;
  • FIG. 4 is a cross-sectional view showing another method of manufacturing a light emitting device;
  • FIG. 9 is a plan view showing a second substrate of FIG. 8;
  • FIG. 11 is a plan view showing another configuration of the second substrate; It is sectional drawing which shows the joining state of a 2nd board
  • 1 is a perspective view showing the configuration of a laser element substrate;
  • FIG. FIG. 4 is a perspective view showing another configuration of the laser element substrate;
  • 1 is a perspective view showing the configuration of a laser element;
  • FIG. 3 is a cross-sectional view showing a configuration example of a base substrate
  • FIG. 4 is a cross-sectional view showing a configuration example of a first substrate
  • FIG. 1 is a flow chart showing a method for manufacturing a light emitting device according to this embodiment.
  • 2 and 3 are cross-sectional views showing a method of manufacturing a light-emitting device.
  • FIG. 4 is a plan view showing the configuration of the second substrate in FIGS. 1 to 3.
  • the method for manufacturing a light emitting device according to the present embodiment includes steps of preparing a first substrate 10 having a plurality of light emitters 2, a conductive first joint S1, It has a first pad portion P1 electrically connected to the first joint portion S1, and a first solder restricting portion KF positioned between the first joint portion S1 and the first pad portion P1.
  • a step of preparing a second substrate 20 having solder H1 formed thereon a step of joining a first target object 2A selected from a plurality of light emitters 2 to the second substrate 20; and transferring the first object 2A to the second substrate 20 while separating 10 and 20 from each other.
  • the first bonding portion S1 having the solder H1 formed on the upper surface is used for bonding (solder bonding) with the light emitter 2, and the conductive first pad portion P1 is used for connection with the outside (for example, wire bonding). be done.
  • the light emitting element substrate 25 By selectively transferring the first object group FG including the first object 2A to the second substrate 20, the light emitting element substrate 25 (light emitting device) can be obtained.
  • the light-emitting element substrate 25 may be divided into a plurality of pieces (described later), or the light-emitting element substrate 25 may be separated into individual pieces to obtain laser elements (light-emitting devices).
  • the first solder regulating portion KF regulates the wetting and spreading of the melted solder H1 on the first joint portion S1. This reduces the possibility that the solder H1 will wet and spread to areas other than the first object 2A (selective transfer target), resulting in selective transfer failure. In addition, the possibility that the melted solder H1 wets and spreads to the first pads P1 to interfere with subsequent steps (for example, wire bonding failure) is reduced.
  • Each light emitter 2 has a first electrode D1, and while heating at least one of the first and second substrates 10 and 20, the first and second substrates 10 and 20 are brought close to melt solder H1;
  • the first electrode D1 of the first object 2A selected from a plurality of light emitters 2 may be brought into contact.
  • a plurality of light emitters 2 may be arranged in the X direction, and the first joint portions S1 and the first pad portions P1 may be arranged in the X direction.
  • the interval between adjacent light emitters 2 may be smaller than the size of the first pad portion P1 in the X direction, and may be smaller than the size of the first joint portion S1 in the X direction.
  • the wettability of the solder H1 of the first solder restricting portion KF may be lower than that of the first joint portion S1.
  • the first solder restricting portion KF may be recessed from the first joint portion S1.
  • Each of the first joint portion S1 and the first pad portion may be a single layer or laminate containing at least one of gold (Au), chromium (Cr), and platinum (Pt).
  • the first solder restricting portion KF may be non-conductive.
  • the first substrate 10 includes a base substrate BS (substrate for crystal growth), and the second substrate 20 includes a base substrate JS.
  • the base substrate JS may be exposed at the first solder restricting portion KF.
  • the exposed base substrate surface (first solder restricting portion KF) has lower wettability with the solder H1 than the first joint portion S1.
  • the base substrate JS for example, a silicon substrate or a silicon carbide (SiC) substrate can be used.
  • Monocrystalline silicon or silicon carbide has a lower wettability of the solder H1 than the first joint portion S1 made of metal.
  • the base substrate JS When the base substrate BS includes a silicon substrate (main substrate), the base substrate JS may be a silicon substrate, and when the base substrate BS includes a silicon carbide substrate, the base substrate JS may be a silicon carbide substrate.
  • the second substrate 20 is provided with two conductive bridge portions B1 facing each other in the Y direction so as to sandwich the first solder restricting portion KF. and the first pad portion P1 may be electrically connected via two bridging portions B1.
  • the sum of the size of the first joint portion S1 in the X direction and the size of the first pad portion P1 in the X direction may be larger than the size of the light emitter 2 in the X direction.
  • the first electrode D1 may be an anode.
  • the first pad portion P1, the first joint portion S1, and the bridging portion B1 may be composed of the metal pattern M1 formed in the same process, and the first solder restricting portion KF may be an opening in the metal pattern. good. That is, the first pad portion P1, the first joint portion S1, and the bridging portions B1 and B2 may be formed in the same layer and with the same material.
  • the metal pattern M1 may be a laminated pattern in which Cr (chromium), Pt (platinum), and Au (gold) are laminated in this order.
  • the first pad portion P1 may be larger in size in the Y direction than the first joint portion S1.
  • the size of the solder H1 in the Y direction may be larger than that of the first solder restricting portion KF.
  • the bridging portion B1 may be smaller in size in the Y direction than the first joint portion S1 and the first pad portion P1.
  • the second substrate 20 may include a second pad portion P2 electrically insulated from the first pad portion P1.
  • connection portion CB between the base substrate BS and the light emitter 2 may be broken by an external force applied after the solder H1 is solidified, or may be broken by itself when the solder H1 is solidified.
  • the second object 2B selected from the plurality of light emitters 2 remaining on the first substrate 10 may be transferred to the third substrate 30.
  • all the light emitters 2 can be transferred to a plurality of second substrates.
  • FIG. 5 is a plan view showing another configuration of the second substrate.
  • the first solder restricting portion KF may protrude more than the first joint portion S1.
  • the first solder restricting portion KF may contain a dielectric material.
  • the first joint portion S1, the bridging portions B1 and B2, the base portion U1 below the first solder restricting portion, and the first pad portion P1 may be configured by the metal pattern M1 formed in the same process.
  • the first solder regulating portion KF may be made of a dielectric material having wettability lower than that of the metal pattern M1 formed thereon.
  • the dielectric may be an insulating film such as a silicon nitride film or a silicon oxide film.
  • FIG. 6 is a plan view showing another configuration of the second substrate.
  • the first solder restricting portion KF may be recessed from the first joint portion S1.
  • the first solder restricting portion KF may be conductive and electrically connected to the first joint portion S1.
  • the first pad portion P1, the first joint portion S1, and the bridging portions B1 and B2 may be composed of a metal pattern M1 (a lamination pattern of the lower layer portion MA and the upper layer portion MB) formed in the same process.
  • One solder restricting portion KF may be an opening (exposed lower layer portion MA) in the upper layer portion MB.
  • the lower layer MA may contain Pt
  • the upper layer MB may contain Au.
  • the solder H1 contains Au (gold), the surface (upper layer portion MB) of the first joint portion S1 is made of Au (gold), and the first solder restricting portion KF (exposed lower layer portion MA) is made of Pt (platinum).
  • Pt platinum
  • FIG. 7 is a plan view showing another configuration of the second substrate.
  • one bridging portion B1 is positioned between the first joint portion S1 and the first pad portion P1 arranged in the X direction, and both sides of the bridging portion B1 in the Y direction are located.
  • a first solder restricting portion KF may be formed on each. That is, two first solder restricting portions KF aligned in the Y direction are formed between the first joint portion S1 and the first pad portion P1 aligned in the X direction, and between the two first solder restricting portions KF ( A bridging portion B1 that electrically connects the first bonding portion S1 and the first pad portion P1 may be provided.
  • the first solder restricting portion KF may be made of a semiconductor, a conductor, or a dielectric as long as the wettability is lower than that of the first joint portion S1.
  • FIG. 8 is a cross-sectional view showing another method of manufacturing a light-emitting device.
  • 9 is a plan view showing the second substrate of FIG. 8.
  • the light emitter 2 has a second electrode D2
  • the second substrate 20 includes a conductive first junction S1 and a second substrate electrically connected to the first junction S1.
  • the solder H1 may be formed on the first joint S1, and the solder H2 may be formed on the second joint S2.
  • the melted solder H1 on the first joint S1 and the first electrode D1 of the first object 2A are brought into contact with each other, and the melted solder H2 on the second joint S2 and the first object
  • the first object 2A may be transferred to the second substrate 20 by separating the first and second substrates 10 and 20 after contacting the second electrode D2 of 2A.
  • the first joint portion S1 and the first pad portion P1 are electrically connected via the bridge portion B1, and the second joint portion S2 and the second pad portion P2 are electrically connected via the bridge portion B2.
  • the first electrode D1 may be an anode and the second electrode D2 may be a cathode.
  • FIG. 10 is a plan view showing another configuration of the second substrate.
  • the first joint portion S1 and the first pad portion P1 are electrically connected via a bent bridge portion B1, and the second joint portion S2 and the second pad portion P2 are connected to each other in a bent shape. It may be electrically connected via the bridging portion B2.
  • the bridging portion B1 has a shape that repeats bending a plurality of times, and has a plurality of extending portions YF extending in the Y direction.
  • a first solder restricting portion KF may be formed.
  • the bridging portion B2 has a shape that repeats bending a plurality of times, and has a plurality of extending portions YS extending in the Y direction.
  • a second solder restricting portion KS may be formed.
  • FIG. 11 is a cross-sectional view showing the bonded state of the second substrate and the light emitter.
  • the first electrode D1 of the light emitter 2 is joined to the first pad P1 on the underlying substrate JS via solder H1.
  • the light emitter 2 includes, in this order, a base semiconductor portion 8 containing a nitride semiconductor (for example, a GaN-based semiconductor), an n-type semiconductor portion 9n, an active portion 9a, a p-type semiconductor portion 9p, and a first electrode D1 (anode).
  • the base semiconductor portion 8 may be n-type.
  • the light emitter 2 may be an LED (light emitting diode).
  • a cathode (not shown) may be formed on the back surface of the base semiconductor portion 8 after the light emitter 2 is transferred, and the cathode may be electrically connected to the second pad P2.
  • FIG. 12 is a cross-sectional view showing the bonded state of the second substrate and the light emitter.
  • the first electrode D1 (anode) of the light emitter 2 is joined to the first pad P1 on the underlying substrate JS via solder H1, and the second electrode D2 (cathode) of the light emitter 2 is soldered. It is joined to the second pad P2 on the base substrate JS through H2.
  • the light emitter 2 includes a base semiconductor portion 8 including a nitride semiconductor (for example, a GaN semiconductor), an n-type semiconductor portion 9n, an active portion 9a, a p-type semiconductor portion 9p including a ridge RJ, and a first electrode D1 in this order.
  • the base semiconductor portion 8 may be n-type.
  • the light emitter 2 may be an edge emitting semiconductor laser body (chip).
  • the first object 2A is placed on the second substrate 20 so that the Y direction orthogonal to the X direction in which the light emitters 2 are arranged and the resonator length direction of the first object 2A (light emitter 2) are aligned. may be transcribed to
  • FIG. 13 is a block diagram showing the configuration of a light-emitting device manufacturing apparatus according to this embodiment.
  • a light emitting device manufacturing apparatus 50 includes an apparatus N1 for preparing a first substrate 10 having a plurality of light emitters 2, a conductive first joint S1, and a first conductive joint S1 electrically connected to the first joint S1.
  • a second substrate 20 having a pad portion P1, a first joint portion S1 and a first solder restricting portion KF positioned between the first pad portion P1, and a solder H1 formed on the first joint portion S1.
  • the first object 2A selected from the plurality of light emitters 2, and the second substrate 20 After bonding the device N2 to be prepared, the first object 2A selected from the plurality of light emitters 2, and the second substrate 20, the first and second substrates 10 and 20 are separated to form the first object 2A. It includes a device N3 for transferring to the second substrate 20 and a device N4 for controlling the devices N1-N3.
  • FIG. 14 is a perspective view showing the configuration of the laser element substrate.
  • the light emitting element substrate 25 onto which the plurality of light emitters 2 are transferred can be referred to as a laser element substrate 25 (light emitting device).
  • a recess HL is formed in the base substrate JS, and the light emitter 2 (first target) is placed on the second substrate so that the light emitting end of the light emitter 2 (first target) is positioned above the recess HL. 20 may be transferred.
  • FIG. 15 is a perspective view showing another configuration of the laser element substrate.
  • a one-dimensional arrangement type laser element substrate 25 as shown in FIG. 15 may be obtained.
  • a step of forming a reflective film RF on the cavity facet of each semiconductor laser body 2 (so-called facet coating) may be performed.
  • the laser element substrate 25 of FIG. 15 includes a base substrate JS and a plurality of semiconductor laser bodies 2.
  • a conductive first joint S1 and a conductive first joint S1 are electrically connected to the first joint S1.
  • a first solder restricting portion KF positioned between the first joint portion S1 and the first pad portion P1, and the first joint portion S1 and the first pad P1 are arranged in the X direction (the first pad portion P1). 1 direction), and each semiconductor laser body 2 (semiconductor laser chip 2) is solder-connected to the first joint portion S1 so that the cavity length direction is orthogonal to the X direction.
  • 2 has a concave portion (hollow portion) HL positioned below the light emitting end.
  • FIG. 16 is a perspective view showing the configuration of a laser element.
  • FIG. 17 is a perspective view showing the configuration of the laser module.
  • the laser module 29 (light-emitting device) in FIG. 17 is a surface-mounted package, and includes a housing 35 and a laser element substrate 25 .
  • the laser element substrate 25 includes a plurality of light emitters 2 (semiconductor laser chips), and is provided so that the side surface (surface parallel to the resonance end surface) of the support ST faces the bottom surface 31 of the housing 35. . Therefore, the emission surface (resonance end surface on the emission side) of each light emitter 2 faces the top surface 34 (transparent plate) of the housing 35 , and laser light is emitted from the top surface 34 of the housing 35 .
  • Light emitter 2 is connected to external connection pin 33 via wire 31 .
  • the light emitter 2 has first and second pad portions P1 and P2 of sizes necessary for wire bonding on the support ST. are electrically connected to the first and second electrodes D1 and D2 of the light emitter 2 (semiconductor laser chip), so that the external connection pins 33 of the package and the first and second pad portions P1 and P2 are connected to each other. An electrical connection via wire 31 is sufficient.
  • FIG. 18 are cross-sectional views showing a method for manufacturing the first substrate.
  • a base portion 4 containing a nitride semiconductor is formed on the main substrate 1 , and a mask pattern 6 including a plurality of striped mask portions 5 is provided on the base portion 4 .
  • the mask portion 5 is made of, for example, a silicon nitride film with a film thickness of 100 nm and a width of 52 ⁇ m, and the longitudinal direction is the X direction.
  • the pitch of the stripes of the mask portion 5 is, for example, 55 ⁇ m.
  • a resist stripe pattern is formed by photolithography on the base substrate BS on which the nitride semiconductor film is formed as the underlying portion 4 .
  • a silicon nitride film having a film thickness of, for example, 100 nm is formed on the entire surface by a sputtering method.
  • the silicon nitride film is patterned by a lift-off method to form a mask pattern 6 (stripe pattern).
  • the base semiconductor portion 8 is grown on the mask pattern 6 by, for example, metal-organic chemical vapor deposition (MOCVD) using trimethylgallium (TMG) and ammonia (NH 3 ) (ELO method).
  • MOCVD metal-organic chemical vapor deposition
  • TMG trimethylgallium
  • NH 3 ammonia
  • the base semiconductor portion 8 contains a nitride semiconductor as a main material.
  • a GaN-based semiconductor is a semiconductor containing gallium atoms (Ga) and nitrogen atoms (N), and typical examples include GaN, AlGaN, AlGaInN, and InGaN.
  • the base substrate BS and the mask 6 are sometimes called a template substrate TS.
  • an initial growth portion is formed above the underlying portion 4 (including, for example, the seed portion) exposed in the opening KB of the mask 6 .
  • the initial growth portion serves as a starting point for lateral growth of the base semiconductor portion 8 .
  • the initial growth portion can be formed with a thickness of, for example, 30 nm to 1000 nm, 50 nm to 400 nm, or 70 nm to 350 nm.
  • the growth of the base semiconductor portion 8 in the c-axis direction (thickness direction) is suppressed by laterally growing the initial growth portion from a state in which it slightly protrudes from the mask portion 5, and the base semiconductor portion 8 is grown at high speed and with high crystallinity. It can grow laterally with good resilience.
  • the base semiconductor portion 8 (crystal body of a nitride semiconductor such as GaN) having a thin and wide width and low defects can be formed at a low cost.
  • the base semiconductor portions 8 laterally grown in opposite directions from two adjacent openings KB do not contact (meet) on the mask portion 5 and have a gap (gap) GP, thereby reducing the internal stress of the base semiconductor portion 8. can be reduced. As a result, cracks and defects (dislocations) occurring in the base semiconductor portion 8 can be reduced. This effect is particularly effective when the main substrate 1 is a different substrate (a substrate having a lattice constant different from that of the base semiconductor portion 8).
  • the width of the gap GP can be, for example, 10 ⁇ m or less, 5 ⁇ m or less, 3 ⁇ m or less, or 2 ⁇ m or less.
  • the portion located on the initial growth portion becomes a dislocation inheriting portion with many threading dislocations, and the portion (wing portion) on the mask portion 5 has a higher threading dislocation density than the dislocation inheriting portion. It becomes a low defect portion LK which is 1/10 or less.
  • a threading dislocation is a dislocation (defect) extending in the c-axis direction ( ⁇ 0001> direction) of the base semiconductor portion 8 .
  • the threading dislocation density of the low-defect portion LK can be, for example, 5 ⁇ 10 6 [dislocations/cm 2 ] or less.
  • a compound semiconductor section 9 including an active section and a p-type semiconductor section, as well as a first electrode D1 and a second electrode D2 can be formed on the base semiconductor section 8 .
  • the active portion active layer
  • the light-emitting portion can be arranged above the low-defect portion LK (overlapping the low-defect portion LK in plan view).
  • the base semiconductor portion 8 and the compound semiconductor portion 9 may be divided on the template substrate TS (for example, by dividing into m-plane cross sections) to form a plurality of light emitters.
  • the mask 6 may be removed before the phosphor transfer.
  • the ratio of the size in the a-axis direction to the thickness can be set to, for example, 2.0 or more. Using the approach of FIG. 18, this size ratio can be 1.5 or greater, 2.0 or greater, 4.0 or greater, 5.0 or greater, 7.0 or greater, or 10.0 or greater. It has been found that setting the size ratio to 1.5 or more facilitates the division of the base semiconductor portion 8 (for example, the division into m-plane cross sections) in a later process. Moreover, the internal stress of the base semiconductor portion 8 is reduced, and the warp of the second substrate 20 is reduced.
  • the aspect ratio (the ratio of the size in the X direction to the thickness) of the base semiconductor portion 8 is 3.5 or more, 5.0 or more, 6.0 or more, 8.0 or more, 10 or more, 15 or more, 20 or more, 30 or more. , or 50 or more.
  • the ratio of the size of the base semiconductor portion 8 in the X direction to the width of the opening KB is 3.5 or more, 5.0 or more, 6.0 or more, 8.0 or more, 10 or more, It can be 15 or more, 20 or more, 30 or more, or 50 or more, and the ratio of the low defect portion LK can be increased.
  • the base semiconductor portion 8 (including the initial growth portion) shown in FIG. 18 can be a nitride semiconductor crystal (eg, GaN crystal, AlGaN crystal, InGaN crystal, or InAlGaN crystal).
  • a nitride semiconductor crystal eg, GaN crystal, AlGaN crystal, InGaN crystal, or InAlGaN crystal.
  • FIG. 19 is a cross-sectional view showing a configuration example of the base substrate.
  • the base substrate BS may include the main substrate 1 and the underlying portion 4 on the main substrate 1 .
  • the underlying portion 4 may contain a GaN-based semiconductor.
  • the underlying portion 4 may include at least one of a seed portion and a buffer portion.
  • a GaN-based semiconductor can be used as the seed portion.
  • a GaN-based semiconductor, AlN, SiC, or the like can be used as the buffer portion.
  • the base substrate BS may be composed of a self-supporting single crystal substrate such as GaN or SiC (for example, a wafer cut from a bulk crystal), and the mask 6 may be arranged on the single crystal substrate.
  • FIG. 20 is a cross-sectional view showing a configuration example of the first substrate.
  • the first substrate 10 includes a template substrate TS having a seed area SA and a growth suppression area YA. It may overlap with the growth-restricted region YA (when viewed with a line of sight parallel to the direction).
  • the seed region SA may be composed of a nitride semiconductor such as AlN.
  • the growth suppression region YA may be made of a material that suppresses vertical growth (for example, growth in the c-axis direction) of the base semiconductor portion 8 (nitride semiconductor portion).
  • an amorphous material such as silicon nitride or silicon oxide may be used.
  • the coupling width WK between the first target object 2A and the seed region SA is 1 ⁇ 5 or less of the width WA of the first target object 2A. It may be 7 or less, or 1/10 or less.

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PCT/JP2023/004376 2022-02-10 2023-02-09 発光デバイスの製造方法および製造装置並びにレーザ素子基板 Ceased WO2023153476A1 (ja)

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CN202380020305.6A CN118648205A (zh) 2022-02-10 2023-02-09 发光器件的制造方法以及制造装置、和激光元件基板
EP23752940.9A EP4478564A4 (en) 2022-02-10 2023-02-09 PRODUCTION METHOD AND PRODUCTION DEVICE FOR ELECTROLUMINESCENT DEVICES, AND LASER ELEMENT SUBSTRATE
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