WO2023124048A1 - 异质结太阳电池、其制备方法及发电装置 - Google Patents

异质结太阳电池、其制备方法及发电装置 Download PDF

Info

Publication number
WO2023124048A1
WO2023124048A1 PCT/CN2022/108484 CN2022108484W WO2023124048A1 WO 2023124048 A1 WO2023124048 A1 WO 2023124048A1 CN 2022108484 W CN2022108484 W CN 2022108484W WO 2023124048 A1 WO2023124048 A1 WO 2023124048A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
doped
doped region
doping
back field
Prior art date
Application number
PCT/CN2022/108484
Other languages
English (en)
French (fr)
Inventor
蓝仕虎
张丽平
赵晖
张海川
石建华
付昊鑫
孟凡英
刘正新
Original Assignee
中威新能源(成都)有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中威新能源(成都)有限公司 filed Critical 中威新能源(成都)有限公司
Priority to AU2022348884A priority Critical patent/AU2022348884A1/en
Priority to EP22871100.8A priority patent/EP4231364A4/en
Publication of WO2023124048A1 publication Critical patent/WO2023124048A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1872—Recrystallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present application relates to the technical field of solar cells, in particular to a heterojunction solar cell, its preparation method and power generation device.
  • Silicon heterojunction solar cells usually include a doped amorphous silicon layer and an N-type single crystal silicon layer that constitute the heterojunction, and an intrinsic amorphous silicon layer interposed between the two, which realizes the heterojunction Good passivation effect of the interface.
  • Silicon heterojunction solar cells have the advantages of low-temperature preparation process, high open-circuit voltage, good temperature characteristics, and thin silicon wafers.
  • open circuit voltage, short circuit current and fill factor are three important parameters, where the fill factor is the product of current and voltage when the battery has the maximum output power and the product of short circuit current and open circuit voltage ratio.
  • Short-circuit current and open-circuit voltage are also the two most important parameters of the battery.
  • Higher short-circuit current and open-circuit voltage are the basis for higher energy conversion efficiency. When the open circuit voltage and short circuit current are constant, the conversion efficiency of the battery depends on the fill factor, and the energy conversion efficiency is high when the fill factor is large.
  • increasing the doping concentration and increasing the thickness of the doped amorphous silicon layer has the effect of improving the conductivity of the doped amorphous silicon layer and can increase the fill factor.
  • increasing the doping concentration of the amorphous silicon layer will also promote the diffusion of impurities into the passivation layer, which reduces the passivation effect of the passivation layer and reduces the open circuit voltage of the heterojunction solar cell.
  • too much impurity will also cause defects in the passivation layer, resulting in the recombination of photogenerated carriers, which in turn leads to a decrease in short-circuit current.
  • a heterojunction solar cell which includes: a substrate layer, a first passivation layer, a second passivation layer, an emitting part, and a back field part;
  • the doping type of the substrate layer is N-type or P-type
  • the first passivation layer is disposed on the first surface of the substrate layer
  • the emitting component is disposed on the first passivation layer away from the On one side surface of the substrate layer
  • the second passivation layer is arranged on the second surface of the substrate layer opposite to the first surface
  • the back field component is arranged on the second passivation layer away from the On one side surface of the substrate layer
  • both the emitting part and the back field part include a doped layer, a conductive layer and an electrode layer arranged in sequence along a direction away from the substrate, and all of the back field parts
  • the doping type of the doping layer is the same as the doping type of the substrate layer, and the doping type of the doping layer in the emitting part is opposite to the doping type of the substrate layer;
  • the emission component and the back field component have an electrical contact enhancement structure
  • the electrical contact enhancement structure is: the doped layer includes a first doped region and is disposed on the first doped region. The second doped region between the regions is shielded by the electrode layer, and one or both of doping concentration and crystallization degree of the second doped region are higher than that of the first doped region.
  • the electrode layer includes a gate line electrode, the gate line electrode shields the second doped region, and the width of the gate line electrode is less than the width of the second doped region. above.
  • the width of the second doped region is 5 ⁇ m ⁇ 200 ⁇ m.
  • the second doped region is exposed from a surface of the doped layer away from the substrate and contacts the conductive layer.
  • the doped layer in the emitting component is an emitting doped layer
  • the first doped region in the emitting doped layer is doped amorphous silicon, so The thickness of the emitting doped layer is 6nm-15nm.
  • the first doped region in the emitting doped layer is doped microcrystalline silicon, and the thickness of the emitting doped layer is 15 nm ⁇ 30 nm.
  • the doped layer in the back field component is a back field doped layer
  • the first doped region in the back field doped layer is a doped amorphous Silicon
  • the thickness of the back field doped layer is 4nm-10nm.
  • the first doped region in the back field doped layer is doped microcrystalline silicon, and the back field doped layer has a thickness of 15 nm ⁇ 30 nm.
  • a method for manufacturing a heterojunction solar cell includes: a substrate layer, a first passivation layer, a second passivation layer, an emission component, and a back field component ;
  • the doping type of the substrate layer is the first doping type
  • the first passivation layer is disposed on the first surface of the substrate layer
  • the emitting component is disposed on the first passivation layer away from the On one side surface of the substrate layer
  • the second passivation layer is arranged on the second surface of the substrate layer opposite to the first surface
  • the back field component is arranged on the second passivation layer away from the On one side surface of the substrate layer
  • both the emitting part and the back field part include a doped layer, a conductive layer and an electrode layer arranged in sequence along a direction away from the substrate, and all of the back field parts
  • the doping type of the doping layer is the first doping type
  • the doping type of the doping layer in the emitting part is the second doping type
  • One or both of the emitting component and the back field component have an electrical contact enhancement structure, and one or both of steps a and b are included when forming the electrical contact enhancement structure:
  • both the doping concentration and crystallization degree of the second doped region are higher than those of the first doped region.
  • the laser-induced crystallization treatment is performed on the second doped region while the laser doping treatment is performed.
  • the electrode layer includes a gate line electrode, the gate line electrode shields the second doped region, and the width of the gate line electrode is less than the width of the second doped region. above.
  • the width of the second doped region is 5 ⁇ m ⁇ 200 ⁇ m.
  • the second doped region is exposed from a surface of the doped layer away from the substrate and contacts the conductive layer.
  • the doped layer in the emitting component is an emitting doped layer
  • the first doped region in the emitting doped layer is doped amorphous silicon, so The thickness of the emitting doped layer is 6nm-15nm.
  • the first doped region in the emitting doped layer is doped microcrystalline silicon, and the thickness of the emitting doped layer is 15 nm ⁇ 30 nm.
  • the doped layer in the back field component is a back field doped layer
  • the first doped region in the back field doped layer is a doped amorphous Silicon
  • the thickness of the back field doped layer is 4nm-10nm.
  • the first doped region in the back field doped layer is doped microcrystalline silicon, and the back field doped layer has a thickness of 15 nm ⁇ 30 nm.
  • a power generation device includes the heterojunction solar cell in the above embodiments.
  • FIG. 1 is a schematic structural view of a heterojunction solar cell according to some embodiments
  • 100 substrate layer; 101, first passivation layer; 102, second passivation layer; 111, emission doped layer; 1111, first emission doped region; 1112, second emission doped region; 112, emission conductive layer; 113, emitter electrode layer; 121, back field doped layer; 1211, first back field doped region; 1212, second back field doped region; 122, back field conductive layer; 123, back field electrode layer.
  • first and second are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity or order of the indicated technical features.
  • the features defined as “first” and “second” may explicitly or implicitly include at least one of these features.
  • “plurality” means at least two, such as two, three, etc., unless otherwise specifically defined.
  • a heterojunction solar cell includes: a substrate layer, a first passivation layer, a second passivation layer, an emission component and a back field component.
  • the first passivation layer is disposed on the first surface of the substrate layer
  • the emitting component is disposed on the surface of the first passivation layer away from the substrate layer
  • the second passivation layer is disposed on the substrate layer opposite to the first surface
  • the back field component is disposed on the surface of the second passivation layer away from the substrate layer.
  • Both the emitting part and the back field part include a doped layer, a conductive layer and an electrode layer arranged in sequence along the direction away from the substrate, the emitting part and/or the back field part have an electrical contact enhancement structure, and the electrical contact enhancement structure is: the doping layer includes The first doped region and the second doped region disposed between the first doped region and covered by the electrode layer, the doping concentration and/or crystallization degree of the second doped region is higher than that of the first doped region.
  • the second doped region since the second doped region has a higher doping concentration and/or crystallization degree, the second doped region has better conductivity, and the second doped region and the conductive layer A good contact can be formed between the conductive layer and the electrode layer directly above the second doped region, and the fill factor of the heterojunction solar cell is improved.
  • the second doping region Compared with increasing the doping concentration of the entire doping layer, only the second doping region has a high doping concentration, which can effectively reduce the impurities diffused into the first passivation layer and/or the second passivation layer, thereby suppressing open circuits Problems with reduced voltage or reduced short-circuit current.
  • Increasing the doping concentration of the second doping region can also make better electrical contact between the second doping region and the conductive layer and electrode layer located thereon, although the second doping region with high doping concentration will still Causes impurities to diffuse into the passivation layer, but compared with increasing the doping concentration of the entire doping layer, only increasing the doping concentration of the second doping region can greatly reduce the impurity amount of the passivation layer, thereby effectively suppressing the open circuit Problems with reduced voltage or reduced short-circuit current.
  • the doping type of the substrate layer is the first doping type
  • the doping type of the doped layer in the back field component is the first doping type
  • the doping type of the doping layer in the emitting component is the first doping type.
  • Semiconductors include intrinsic semiconductors and doped semiconductors. Doped semiconductors refer to doping on the basis of intrinsic semiconductors.
  • the doping type of doped semiconductors is n-type doping or p-type doping.
  • the first doping type and the second doping type are respectively selected from different doping types. For ease of illustration, the first doping type in this embodiment is n-type, and the second doping type is p-type.
  • the base material of the substrate layer is selected from silicon, more preferably single crystal silicon.
  • the substrate layer is n-type single crystal silicon, and the first passivation layer, the second passivation layer, the emitter component and the back field component can be prepared on the basis of the n-type single crystal silicon substrate.
  • the thickness of the substrate layer may be 50 ⁇ m ⁇ 300 ⁇ m.
  • the base material of the first passivation layer is selected from intrinsic semiconductors, such as intrinsic amorphous silicon.
  • the base material of the second passivation layer is also selected from intrinsic semiconductors, such as intrinsic amorphous silicon.
  • the first passivation layer and/or the second passivation layer may be hydrogen-containing intrinsic amorphous silicon.
  • the thickness of the first passivation layer and/or the second passivation layer may be between 1nm and 20nm, mainly for passivation. Unless otherwise specified, the passivation layer in this article can be understood as "the first passivation layer and/or the second passivation layer" according to the semantics of the context.
  • both the emission components disposed on the first passivation layer and the back field components disposed on the second passivation layer can be composed of sequentially disposed doped layers , conductive layer and electrode layer.
  • the doped layer refers to a semiconductor layer that has been doped with a specific type, and the base material of the doped layer may be amorphous silicon or microcrystalline silicon.
  • the doping type of the doped layer in the back field component is the same as that of the substrate layer, which is n-type doping, and the doping type of the doped layer in the emission component is different from that of the substrate layer, which is p-type Doped to form a heterojunction with the substrate layer.
  • the electrode layer includes a gate line electrode, the gate line electrode shields the second doped region, and the width of the gate line electrode is greater than the width of the second doped region.
  • the grid line electrode refers to a line-shaped electrode arranged on the conductive layer, and the grid line electrode can be used to collect photo-generated carriers generated by the solar cell.
  • the width of the gate line electrode is greater than the width of the second doped region, specifically, the width of the second doped region may be equal to or smaller than the width of the gate line electrode.
  • the width of the gate line is usually designed to be very small, so setting the width of the gate line electrode above the width of the second doped region can not only It ensures good electrical contact effect between the second doped region and the electrode layer, and can also prevent the second doped region from bringing impurities into the passivation layer as much as possible.
  • the multiple second doped regions there are multiple second doped regions, and the multiple second doped regions are arranged at intervals, and there are also multiple gate line electrodes, and the plurality of gate line electrodes are arranged at intervals.
  • Dispersed multiple grid line electrodes can enhance its ability to collect carriers.
  • the scattered multiple second electrodes can enhance the electrical contact effect between the second doped region and the electrode layer in the doped layer while avoiding Impurities concentrate in a certain part of the first passivation layer and/or the second passivation layer and infiltrate to reduce the influence on the open-circuit voltage and short-circuit current.
  • the width of the second doped region can be set to be 5 ⁇ m ⁇ 200 ⁇ m; optionally, the width of the second doped region is 8 ⁇ m ⁇ 150 ⁇ m. More preferably, the width of the second doped region is 10 ⁇ m ⁇ 100 ⁇ m.
  • the second doped region with the above width basically does not bring obvious impurities into the passivation layer, and also has better electrical contact effect with the electrode layer.
  • the second doped region is exposed from the surface of the doped layer on a side away from the substrate, so that the second doped region is in direct contact with the conductive layer.
  • the thickness of the second doped region and the doped layer can be the same, or the thickness of the second doped region can also be smaller than that of the doped layer. It can be understood that when the thickness of the second doped region is the same as that of the doped layer, the surface of the doped layer of the second doped region layer close to the substrate is exposed; when the thickness of the second doped region is different from that of the doped layer, Then the side of the second doped region close to the substrate is further provided with the first doped region.
  • the thickness of the second doped region is smaller than that of the doped layer, and the first doped region can play a buffer role to reduce impurities penetrating into the passivation layer.
  • the doped layer in the emitting component is an emitting doped layer
  • the first doped region in the emitting doped layer is doped amorphous silicon
  • the thickness of the emitting doped layer is 6nm ⁇ 15nm. It can be understood that the doping concentration of the second doping region in the emission doping layer may be higher than that of the first doping region.
  • the doping concentration of the first doping region is 1 ⁇ 10 8 ⁇ 1 ⁇ 10 17 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 9 ⁇ 1 ⁇ 10 21 /cm 3
  • the doping concentration of the second doping region may be 1 ⁇ 10 10 -5 ⁇ 10 20 /cm 3
  • the doping concentration of the first doping region is 1 ⁇ 10 9 -5 ⁇ 10 16 /cm 3
  • the doping concentration of the second doping region may be 1 ⁇ 10 11 to 1 ⁇ 10 20 /cm 3
  • the doping concentration of the first doping region is 1 ⁇ 10 9 to 1 ⁇ 10 16 /cm 3 .
  • the emission doped layer can significantly increase the doping concentration of the second doping region while appropriately reducing the doping concentration of the first doping region, and select the corresponding thin film
  • the thickness can also reduce the absorption of photogenerated carriers by the doped layer and increase the short-circuit current of the heterojunction solar cell.
  • the second doped region when the first doped region in the emission doped layer is doped amorphous silicon, the second doped region can also be set to be microcrystalline silicon, and the crystallization rate of the second doped region can be 1% to 70%. In order to significantly improve its conductivity, the crystallization rate of the second doped region can be 10%-70%. Optionally, the crystallization rate of the second doped region may be 30%-70%. Further, the crystallization rate of the second doped region may be 50%-70%. It is easy to know that the crystallization rate can be obtained by performing a Raman test on the sample and calculating the intensity of the corresponding peak.
  • the first doped region in the emitting doped layer may be doped microcrystalline silicon, and in this case, the thickness of the first doped region may be set to be 15 nm ⁇ 30 nm. Microcrystalline silicon can have higher thickness and doping concentration.
  • the doping concentration of the first doping region is 1 ⁇ 10 8 -1 ⁇ 10 17 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 9 -5 ⁇ 10 21 /cm 3 .
  • the doping concentration of the first doping region is 1 ⁇ 10 9 to 5 ⁇ 10 16 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 10 to 5 ⁇ 10 21 /cm 3 .
  • the doping concentration of the first doping region is 1 ⁇ 10 9 to 1 ⁇ 10 16 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 10 to 1 ⁇ 10 21 /cm 3 .
  • the crystallization rate of the second doped region may also be set to be higher than that of the first doped region.
  • the crystallization rate of the first doped region is 5%-50%, and the crystallization rate of the second doped region may be 10%-70%.
  • the crystallization rate of the second doped region may be 15%-70%.
  • the crystallization rate of the second doped region may be 30%-70%.
  • the crystallization rate of the second doped region may be 50%-70%.
  • the doped layer in the emission part and the doped layer in the back field part may have different thicknesses.
  • the doped layer in the back field component is a back field doped layer.
  • the first doped region in the back field doped layer is doped amorphous silicon, and the thickness of the back field doped layer is 4nm ⁇ 10nm.
  • the doping concentration of the second doping region in the back field doping layer may be higher than that of the first doping region.
  • the doping concentration of the first doping region is 1 ⁇ 10 9 to 1 ⁇ 10 19 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 11 to 1 ⁇ 10 21 /cm 3 .
  • the doping concentration of the second doping region may be 1 ⁇ 10 12 to 5 ⁇ 10 20 /cm 3 , and the doping concentration of the first doping region is 1 ⁇ 10 10 to 5 ⁇ 10 18 /cm 3 . Further optionally, the doping concentration of the second doping region may be 1 ⁇ 10 12 to 1 ⁇ 10 20 /cm 3 , and the doping concentration of the first doping region is 1 ⁇ 10 10 to 1 ⁇ 10 18 /cm 3 .
  • the back field doped layer can significantly increase the doping concentration of the second doping region while appropriately reducing the doping concentration of the first doping region, and select the corresponding
  • the thickness of the film can also reduce the absorption of photogenerated carriers by the doped layer and increase the short-circuit current of the heterojunction solar cell.
  • the second doped region when the first doped region in the back field doped layer is doped amorphous silicon, the second doped region can also be set to be crystalline silicon, and the crystallization rate of the second doped region can be 1% to 70%. In order to significantly improve its conductivity, the crystallization rate of the second doped region can be 10%-70%. Optionally, the crystallization rate of the second doped region may be 30%-70%. Further, the crystallization rate of the second doped region may be 50%-70%.
  • the first doped region of the back field doped layer may be doped microcrystalline silicon, and in this case, the thickness of the first doped region may be set to be 15 nm ⁇ 30 nm. Microcrystalline silicon can have higher thickness and doping concentration.
  • the doping concentration of the first doping region is 1 ⁇ 10 9 to 1 ⁇ 10 19 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 11 to 1 ⁇ 10 21 /cm 3 .
  • the doping concentration of the first doping region is 1 ⁇ 10 10 to 5 ⁇ 10 18 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 12 to 5 ⁇ 10 20 /cm 3 .
  • the doping concentration of the first doping region is 1 ⁇ 10 10 to 1 ⁇ 10 18 /cm 3
  • the doping concentration of the second doping region is 1 ⁇ 10 12 to 1 ⁇ 10 20 /cm 3 .
  • the crystallization rate of the second doped region may also be set to be higher than that of the first doped region.
  • the crystallization rate of the first doped region is 5%-40%, and the crystallization rate of the second doped region may be 6%-70%. Further, the crystallization rate of the second doped region may be 15%-70%.
  • the crystallization rate of the second doped region may be 30%-70%. Further, the crystallization rate of the second doped region may be 50%-70%.
  • the conductive layer is a transparent conductive film, and the conductive layer covers the entire doped layer.
  • the conductive layer in the emitting component is an emitting conductive layer, and the emitting conductive layer covers the entire emitting doped layer;
  • the conductive layer in the back field component is a back field conductive layer, and the back field conductive layer covers the entire back field doped layer.
  • the electrode layer includes gate line electrodes.
  • the electrode layer is a metal grid line electrode.
  • the thickness of the metal grid electrode may be 5 ⁇ m ⁇ 200 ⁇ m, and the pattern of the metal grid electrode may coincide with the corresponding pattern of the second doped region.
  • the electrode layer in the emitting part is the emitting electrode layer, and the pattern of the emitting electrode layer and the second doped region in the emitting doped layer overlaps; the electrode layer in the back field part is the back field electrode layer, and the back field electrode layer It coincides with the pattern of the second doped region assembled in the back field doped layer.
  • the preparation of the electrical contact enhancing structure in the above embodiments may include the following steps. forming a precursor of a doped layer with a uniform doping concentration, and adopting laser doping treatment on the region of the preset second doping region to increase the doping concentration of the second doping region; and/or, forming a The precursor of the doped layer with a uniform doping concentration, and adopting laser-induced crystallization treatment on the preset second doped region to improve the crystallization degree of the second doped region.
  • a conductive layer covering the doped layer as a whole may be further formed, and an electrode layer shielding the second doped region may also be formed. It can be understood that this preparation step is mainly used to illustrate how to prepare the doped layer having the second doped region, and other layers can be prepared by a skilled person in an appropriate manner.
  • laser doping refers to the use of laser bombardment of doping sources and semiconductor materials, and the use of local high energy density of lasers to incorporate impurity atoms into semiconductor materials.
  • Laser-induced crystallization refers to the use of lasers to generate thermal energy effects on the surface of semiconductor materials, so that the temperature of semiconductor materials can reach extremely high instantly so that they have sufficient phase transition energy and can be transformed into crystalline states to increase the crystallization rate.
  • a major advantage of using laser doping and/or laser-induced crystallization lies in the high positioning accuracy of the laser, which helps to form the second doped region with a very small width.
  • only one laser irradiation device can be used to increase the crystallization rate or increase the doping concentration. It can be understood that the crystallization rate, doping concentration and thickness of the second doped region can be controlled by controlling various parameters in the specific preparation process.
  • the doping concentration and the degree of crystallization of the second doped region are higher than that of the first doped region, and the doping concentration and the degree of crystallization of the second doped region are set to be higher than those of the first doped region. It helps to further significantly improve the fill factor, open circuit voltage and short circuit current of heterojunction solar cells.
  • laser-induced crystallization treatment can be performed on the second doped region at the same time, so that only one process is required to simultaneously Completing a process that normally takes two steps to complete.
  • the present disclosure also provides a preparation method of a heterojunction solar cell, which specifically may include the following steps.
  • Step S1 performing texturing cleaning on the N-type single crystal silicon substrate.
  • Step S2 depositing a first passivation layer and a second passivation layer on the front and back of the N-type single crystal silicon substrate respectively.
  • the first passivation layer and the second passivation layer can be deposited by plasma-enhanced chemical vapor deposition, catalytic chemical vapor deposition, and the like.
  • Step S3 depositing an emission doped layer on the first passivation layer, and depositing a back field doped layer on the second passivation layer.
  • a silicon film with P-type doping can be deposited by plasma-enhanced chemical vapor deposition, catalytic chemical vapor deposition, etc., and then laser doped and laser-induced crystallization are performed to form the second doped region.
  • the region to be treated is the first doped region, and the doping concentration and crystallization degree of the second doped region are higher than those of the first doped region.
  • Parameters such as laser power, irradiation time, and amount of dopant sources can be controlled to control parameters such as doping concentration, crystallization degree, and thickness of the second doped region.
  • the back field doped layer it can also be prepared in a similar manner, except that the back field doped layer is N-type doped.
  • Step S4 preparing a conductive layer on the surface of the emitter doped layer and the back field doped layer away from the substrate.
  • the conductive layer is a transparent conductive film.
  • the specific way of preparing the conductive layer may be radio frequency sputtering, direct current sputtering or pulse sputtering.
  • Step S5 preparing an electrode layer on the surface of the conductive layer on both sides away from the substrate.
  • the electrode layer is a metal grid line electrode.
  • the method of preparing the metal grid line electrode may be methods such as screen printing, vapor deposition, magnetron sputtering and inkjet printing.
  • the emitter conductive layer 112 , the emitter electrode layer 113 , the second passivation layer 102 , the back field doped layer 121 , the back field conductive layer 122 and the back field electrode layer 123 are sequentially stacked on the front side of the substrate layer 100, the second passivation layer 102, the back field doped layer 121, the back field conductive layer 122 and the back field electrode layer 123 are sequentially stacked on the back of the substrate layer 100 .
  • the emitting doped layer 111 , the emitting conductive layer 112 and the emitting electrode layer 113 constitute the emitting part
  • the back field doped layer 121 , the back field conductive layer 122 and the back field electrode layer 123 constitute the back field part.
  • the substrate layer 100 is a cleaned and textured n-type single crystal silicon substrate with a thickness of 200 ⁇ m. Both the first passivation layer 101 and the second passivation layer 102 are hydrogen-containing intrinsic amorphous silicon. The thicknesses of the first passivation layer 101 and the second passivation layer 102 are 10 nm.
  • the emission doped layer 111 is made of p-type doped silicon material as a whole.
  • the emission doped layer 111 contains a first emission doping region 1111 and a second emission doping region 1112 .
  • the second doped emission region 1112 is located between the first doped emission regions 1111 , and the doping concentration and crystallization degree of the second doped emission region 1112 are higher than those of the first doped emission region 1111 .
  • the emitting conductive layer 112 covers and covers the first doped layer, and the emitting conductive layer 112 is a transparent conductive layer.
  • the emitter electrode layer 113 is a gate line electrode, which is designed to correspond to the position of the second doped emission region 1112 , and the width of the gate line electrode is equal to the width of the second doped emission region 1112 .
  • FIG. 1 only shows the case that there are two second emission doping regions 1112 , and in an actual heterojunction solar cell, there may be more second emission doping regions 1112 .
  • the back field doped layer 121 is entirely made of n-type doped silicon material.
  • the back field doped layer 121 contains a first back field doped region 1211 and a second back field doped region 1212 .
  • the second back field doped region 1212 is located between the first back field doped regions 1211 , and the doping concentration and crystallization degree of the second back field doped region 1212 are higher than that of the first back field doped region 1211 .
  • the back field conductive layer 122 covers and covers the second doped layer, and the back field conductive layer 122 is a transparent conductive layer.
  • the back field electrode layer 123 is a gate line electrode, the gate line electrode is designed corresponding to the position of the second back field doped region 1212 , and the width of the gate line electrode is equal to the width of the second back field doped region 1212 .
  • Fig. 1 only shows the case that there are two second back field doped regions 1212, and in an actual heterojunction solar cell, there may be more second back field doped regions 1212.
  • Another embodiment of the present disclosure provides a power generation device, which includes the heterojunction solar cell in the above embodiment.
  • a heterojunction solar cell which is prepared by the following method:
  • a P-type doped amorphous silicon film is deposited on the first passivation layer, laser doping is performed on the preset area in the dopant source, and the energy of the laser irradiation is increased at the same time to carry out laser-induced crystallization, so that the pre-set
  • the region form the second doped region the untreated region is the first doped region, wherein the doping concentration of the first doped region is 5 ⁇ 10 17 , the crystallization rate is 0%, and the doped region of the second doped region
  • the impurity concentration is 5 ⁇ 10 19 , the crystallization rate is 10%, and the width of the second doped region is 20um;
  • An N-type doped amorphous silicon film is deposited on the second passivation layer, laser doping is performed on the preset area in the dopant source, and the energy of the laser irradiation is increased at the same time to carry out laser-induced crystallization, so that the pre-set
  • the region form the second doped region, and the untreated region is the first doped region, wherein the doping concentration of the first doped region is 5 ⁇ 10 18 , the crystallization rate is 0, and the doping of the second doped region The concentration is 5 ⁇ 10 19 , the crystallization rate is 15%, and the width of the second doped region is 25um;
  • a metal silver grid line electrode is screen printed.
  • Embodiment 2 is substantially the same as Embodiment 1, the main difference being that in the process of depositing the P-type doped amorphous silicon thin film and the N-type doped amorphous silicon thin film, only laser doping treatment is performed, and no laser-induced crystallization treatment is performed. .
  • Embodiment 3 is substantially the same as Embodiment 1, the main difference being that in the process of depositing P-type doped amorphous silicon thin film and N-type doped amorphous silicon thin film, only laser-induced crystallization treatment is performed, and laser doping treatment is not performed. .
  • Comparative Example 1 is substantially the same as Example 1, the main difference being that neither laser-induced crystallization nor laser doping Miscellaneous processing.
  • Example 1 1.0047 1.0002 1.0009 1.0059
  • Example 2 1.0027 1.0003 1.0011 1.0032
  • Example 3 1.0021 0.9999 1.0009 1.0021 Comparative example 1 1.0000 1.0000 1.0000 1.0000

Landscapes

  • Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)
  • Hybrid Cells (AREA)

Abstract

本公开涉及一种异质结太阳电池，包括：衬底层、第一钝化层、第二钝化层、发射部件和背场部件；发射部件和背场部件均包括沿远离衬底方向依次设置的掺杂层、导电层和电极层。发射部件和背场部件中的一个或两个具有电接触增强结构，电接触增强结构为：掺杂层包括第一掺杂区和设置于第一掺杂区之间的被电极层遮蔽的第二掺杂区，第二掺杂区的掺杂浓度和晶化程度中的一个或两个高于第一掺杂区。

Description

异质结太阳电池、其制备方法及发电装置
本申请要求于2021年12月30日提交中国专利局、申请号为2021116678058、发明名称为“异质结太阳电池、其制备方法及发电装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及太阳电池技术领域，特别是涉及一种异质结太阳电池、其制备方法及发电装置。
背景技术
硅异质结太阳电池中通常包括构成异质结的掺杂非晶硅层和N型单晶硅层以及插入于二者之间的一层本征非晶硅层，其实现了异质结界面的良好钝化效果。硅异质结太阳电池具有低温制备工艺、高开路电压、温度特性好、薄硅片化等优势。
对于太阳电池来说，开路电压、短路电流和填充因子(Fill Factor，FF)是三个重要的参数，其中填充因子为电池具有最大输出功率时的电流和电压的乘积与短路电流和开路电压乘积的比值。短路电流和开路电压也是电池最重要的两个参数，较高的短路电流和开路电压是产生较高能量转化效率的基础。在开路电压和短路电流一定时，电池的转化效率就取决于填充因子，填充因子大的能量转化效率就高。
对于异质结太阳电池来说，提高掺杂非晶硅层的掺杂浓度并增加厚度具有提高掺杂非晶硅层的导电性的作用，能够提高填充因子。但是提高非晶硅层的掺杂浓度也会促使杂质扩散入钝化层内，使得钝化层的钝化效果降低，导致异质结太阳电池的开路电压降低。并且过多的杂质还会使得钝化层内产生缺陷，导致光生载流子复合，进而导致短路电流降 低。
发明内容
根据本公开的一些实施例，提供了一种异质结太阳电池，其包括：衬底层、第一钝化层、第二钝化层、发射部件和背场部件；
所述衬底层的掺杂类型为N型或P型，所述第一钝化层设置于所述衬底层的第一表面上，所述发射部件设置于所述第一钝化层远离所述衬底层的一侧表面上，所述第二钝化层设置于所述衬底层的与所述第一表面相对的第二表面上，所述背场部件设置于所述第二钝化层远离所述衬底层的一侧表面上；所述发射部件和所述背场部件均包括沿远离所述衬底方向依次设置的掺杂层、导电层和电极层，所述背场部件中的所述掺杂层的掺杂类型与所述衬底层的掺杂类型相同，所述发射部件中的所述掺杂层的掺杂类型与所述衬底层的掺杂类型相反；
所述发射部件和所述背场部件中的一个或两个具有电接触增强结构，所述电接触增强结构为：所述掺杂层包括第一掺杂区和设置于所述第一掺杂区之间的被所述电极层遮蔽的第二掺杂区，所述第二掺杂区的掺杂浓度和晶化程度中的一个或两个高于所述第一掺杂区。
在本公开的其中一些实施例中，所述电极层包括栅线电极，所述栅线电极遮蔽所述第二掺杂区，所述栅线电极的宽度在所述第二掺杂区的宽度之上。
在本公开的其中一些实施例中，所述第二掺杂区有多个，多个所述第二掺杂区间隔设置，所述栅线电极也有多个，多个所述栅线电极间隔设置。
在本公开的其中一些实施例中，所述第二掺杂区的宽度为5μm～200μm。
在本公开的其中一些实施例中，所述第二掺杂区从所述掺杂层远离所述衬底的一侧表面露出并接触所述导电层。
在本公开的其中一些实施例中，所述发射部件中的所述掺杂层为发射掺杂层，所述发射掺杂层中的所述第一掺杂区为掺杂非晶硅，所述发射掺杂层的厚度为6nm～15nm。
在本公开的其中一些实施例中，所述发射掺杂层中的所述第一掺杂区为掺杂微晶硅，所述发射掺杂层的厚度为15nm～30nm。
在本公开的其中一些实施例中，所述背场部件中的所述掺杂层为背场掺杂层，所述背场掺杂层中的所述第一掺杂区为掺杂非晶硅，所述背场掺杂层的厚度为4nm～10nm。
在本公开的其中一些实施例中，所述背场掺杂层中的所述第一掺杂区为掺杂微晶硅，所述背场掺杂层的厚度为15nm～30nm。
根据本公开的又一些实施例，一种异质结太阳电池的制备方法，所述异质结太阳电池包括：衬底层、第一钝化层、第二钝化层、发射部件和背场部件；
所述衬底层的掺杂类型为第一掺杂类型，所述第一钝化层设置于所述衬底层的第一表面上，所述发射部件设置于所述第一钝化层远离所述衬底层的一侧表面上，所述第二钝化层设置于所述衬底层的与所述第一表面相对的第二表面上，所述背场部件设置于所述第二钝化层远离所述衬底层的一侧表面上；所述发射部件和所述背场部件均包括沿远离所述衬底方向依次设置的掺杂层、导电层和电极层，所述背场部件中的所述掺杂层的掺杂类型为所述第一掺杂类型，所述发射部件中的所述掺杂层的掺杂类型为所述第二掺杂类型；
所述发射部件和所述背场部件中的一个或两个具有电接触增强结构，形成所述电接触增强结构时包括步骤a和步骤b中的一个或两个：
a.形成所述掺杂层的前体膜层，并在预设区域上采用激光掺杂处理，提高所述预设区域的掺杂浓度，以形成所述第二掺杂区；
b.形成所述掺杂层的前体膜层，并在预设区域上采用激光诱导晶化处理，提高所述预设区域的晶化程度，以形成所述第二掺杂区。
在本公开的其中一些实施例中，在所述电接触增强结构中，所述第二掺杂区的掺杂浓度和晶化程度均高于所述第一掺杂区。
在本公开的其中一些实施例中，在形成所述电接触增强结构时，对所述第二掺杂区域进行激光掺杂处理的同时进行所述激光诱导晶化处理。
在本公开的其中一些实施例中，所述电极层包括栅线电极，所述栅线电极遮蔽所述第二掺杂区，所述栅线电极的宽度在所述第二掺杂区的宽度之上。
在本公开的其中一些实施例中，所述第二掺杂区有多个，多个所述第二掺杂区间隔设置，所述栅线电极也有多个，多个所述栅线电极间隔设置。
在本公开的其中一些实施例中，所述第二掺杂区的宽度为5μm～200μm。
在本公开的其中一些实施例中，所述第二掺杂区从所述掺杂层远离所述衬底的一侧表面露出并接触所述导电层。
在本公开的其中一些实施例中，所述发射部件中的所述掺杂层为发射掺杂层，所述发射掺杂层中的所述第一掺杂区为掺杂非晶硅，所述发射掺杂层的厚度为6nm～15nm。
在本公开的其中一些实施例中，所述发射掺杂层中的所述第一掺杂区为掺杂微晶硅，所述发射掺杂层的厚度为15nm～30nm。
在本公开的其中一些实施例中，所述背场部件中的所述掺杂层为背场掺杂层，所述背场掺杂层中的所述第一掺杂区为掺杂非晶硅，所述背场掺杂层的厚度为4nm～10nm。
在本公开的其中一些实施例中，所述背场掺杂层中的所述第一掺杂区为掺杂微晶硅，所述背场掺杂层的厚度为15nm～30nm。
根据本公开的再一实施例，一种发电装置，其包括上述实施例中的异质 结太阳电池。
本发明的一个或多个实施例的细节在下面的附图和描述中提出。本发明的其它特征、目的和优点将从说明书、附图以及权利要求书变得明显。
附图说明
为了更好地描述和说明本申请的实施例和/或示例，可以参考一幅或多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的发明、目前描述的实施例和/或示例以及目前理解的这些发明的最佳模式中的任何一者的范围的限制。
图1为根据一些实施例的异质结太阳电池的结构示意图；
其中，各附图标记及其具体含义如下：
100、衬底层；101、第一钝化层；102、第二钝化层；111、发射掺杂层；1111、第一发射掺杂区；1112、第二发射掺杂区；112、发射导电层；113、发射电极层；121、背场掺杂层；1211、第一背场掺杂区；1212、第二背场掺杂区；122、背场导电层；123、背场电极层。
具体实施方式
为了便于理解本申请，下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的较佳实施例。但是，本申请可以以许多不同的形式来实现，并不限于本文所描述的实施例。应该理解，提供这些实施例的目的是使对本申请的公开内容的理解更加透彻全面。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或顺序。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具 体的限定。
在描述位置关系时，除非另有规定，否则当一元件例如层、膜或基板被指为在另一膜层“上”时，其能直接在其他膜层上或亦可存在中间膜层。进一步说，当层被指为在另一层“下”时，其可直接在下方，亦可存在一或多个中间层。亦可以理解的是，当层被指为在两层“之间”时，其可为两层之间的唯一层，或亦可存在一或多个中间层。
除非相反地提及，否则单数形式的术语可以包括复数形式，并不能理解为其数量为一个。
除非另有定义，本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本申请。
根据本公开的一个实施例，一种异质结太阳电池，其包括：衬底层、第一钝化层、第二钝化层、发射部件和背场部件。其中，第一钝化层设置于衬底层的第一表面上，发射部件设置于第一钝化层远离衬底层的一侧表面上，第二钝化层设置于衬底层的与第一表面相对的第二表面上，背场部件设置于第二钝化层远离衬底层的一侧表面上。
发射部件和背场部件均包括沿远离衬底方向依次设置的掺杂层、导电层和电极层，发射部件和/或背场部件具有电接触增强结构，电接触增强结构为：掺杂层包括第一掺杂区和设置于第一掺杂区之间的被电极层遮蔽的第二掺杂区，第二掺杂区的掺杂浓度和/或晶化程度高于第一掺杂区。
在上述异质结太阳电池中，由于第二掺杂区具有较高的掺杂浓度和/或晶化程度，因此第二掺杂区具有更好的导电性能，第二掺杂区与导电层和位于第二掺杂区正上方的导电层和电极层之间能够形成良好的接触，提升该异质结太阳电池的填充因子。相较于提高整个掺杂层的掺杂浓度，仅设置第二掺杂区具有高掺杂浓度，能够有效减少扩散入第一钝化层和/或第二钝化 层的杂质，进而抑制开路电压降低或短路电流降低的问题。
其中可以理解地，提高第二掺杂区的晶化程度能够使得第二掺杂区与位于其上的导电层和电极层之间具有更良好的电接触，提升其填充因子；同时提高晶化程度并不会产生杂质扩散入钝化层内的负面效果，因而能够较好地避免开路电压降低或短路电流降低的问题。提高第二掺杂区的掺杂浓度也能够使得第二掺杂区与位于其上的导电层和电极层之间具有更良好的电接触，尽管高掺杂浓度的第二掺杂区仍会导致杂质扩散入钝化层，但相较于提高整个掺杂层的掺杂浓度，仅仅提高第二掺杂区的掺杂浓度，能够大幅减少钝化层的杂质量，进而也能够有效抑制开路电压降低或短路电流降低的问题。
其中可以理解地，衬底层的掺杂类型为第一掺杂类型，背场部件中的掺杂层的掺杂类型为第一掺杂类型，发射部件中的掺杂层的掺杂类型为第二掺杂类型。半导体包括本征半导体和掺杂半导体，掺杂半导体指的是在本征半导体的基础上进行掺杂，掺杂半导体的掺杂类型为n型掺杂或p型掺杂，第一掺杂类型和第二掺杂类型分别选自不同的掺杂类型。为了便于阐述，本实施例中的第一掺杂类型为n型，第二掺杂类型为p型。
在本实施例中，作为可选的方案，衬底层的基材选自硅，进一步可优选为单晶硅。具体地，该衬底层为n型单晶硅，第一钝化层、第二钝化层、发射部件和背场部件可以在该n型单晶硅衬底的基础上进行制备。该衬底层的厚度可以是50μm～300μm。
在其中一个具体示例中，第一钝化层的基材选自本征半导体，具体地例如本征非晶硅。类似地，第二钝化层的基材也选自本征半导体，具体地例如本征非晶硅。第一钝化层和/或第二钝化层可以是含氢本征非晶硅。第一钝化层和/或第二钝化层的厚度可以在1nm～20nm之间，主要起到钝化作用。如无特别标注，文中的钝化层可以依据前后文语义理解为“第一钝化层和/ 或第二钝化层”。
可以理解地，由于异质结太阳电池具有结构对称的优点，因此在第一钝化层上设置的发射部件和在第二钝化层上设置的背场部件均可以由依次设置的掺杂层、导电层和电极层构成。掺杂层指的是进行特定类型掺杂后的半导体层，掺杂层的基材可以是非晶硅或微晶硅。背场部件中的掺杂层的掺杂类型与衬底层的掺杂类型相同，为n型掺杂，发射部件中的掺杂层的掺杂类型与衬底层的掺杂类型不同，为p型掺杂，以与衬底层之间构成异质结。
在其中一个具体示例中，电极层包括栅线电极，栅线电极遮蔽第二掺杂区，栅线电极的宽度在第二掺杂区的宽度之上。栅线电极指的是设置于导电层上的呈线状的电极，栅线电极可以用于收集太阳电池产生的光生载流子。栅线电极的宽度在第二掺杂区的宽度之上，具体可以是第二掺杂区的宽度与栅线电极的宽度相等或小于栅线电极的宽度。为了尽可能减少栅线电极对照射入异质结中的光线的影响，栅线的宽度通常被设计得很小，因此设置栅线电极的宽度在第二掺杂区的宽度之上，不仅能够保证第二掺杂区与电极层之间具有较好的电接触效果，还能够尽可能避免第二掺杂区给钝化层中带来杂质。
在其中一个具体示例中，第二掺杂区有多个，多个第二掺杂区间隔设置，栅线电极也有多个，多个栅线电极间隔设置。分散的多个栅线电极能够增强其收集载流子的能力。而对于掺杂浓度较高的第二掺杂区来说，分散的多个第二电极则能够在增强掺杂层中的第二掺杂区与电极层之间的电接触效果的同时，避免杂质集中在第一钝化层和/或第二钝化层的某个局部渗入，降低对开路电压和短路电流的影响。
在其中一个具体示例中，可以设置第二掺杂区的宽度为5μm～200μm；可选地，第二掺杂区的宽度为8μm～150μm。较为优选地，第二掺杂区的宽度为10μm～100μm。具有如上宽度的第二掺杂区基本不会为钝化层中带来 明显的杂质，还与电极层之间具有较好的电接触效果。
在其中一个具体示例中，第二掺杂区从掺杂层远离衬底的一侧表面露出，以使得第二掺杂区与导电层直接接触。其中，第二掺杂区与掺杂层的厚度可以相同，或是第二掺杂区的厚度也可以小于掺杂层。可以理解，第二掺杂区与掺杂层的厚度相同时，则第二掺杂区层掺杂层靠近衬底的一侧表面露出；第二掺杂区与掺杂层的厚度不同时，则第二掺杂区靠近衬底的一侧还设置有第一掺杂区。可选地，第二掺杂区的厚度小于掺杂层的厚度，第一掺杂区能够起到一定的缓冲作用，减少渗入钝化层中的杂质。
在其中一个具体示例中，发射部件中的掺杂层为发射掺杂层，发射掺杂层中的第一掺杂区为掺杂非晶硅，发射掺杂层的厚度为6nm～15nm。可以理解，发射掺杂层中的第二掺杂区的掺杂浓度可以高于第一掺杂区的掺杂浓度。具体地，第一掺杂区的掺杂浓度为1×10 8～1×10 17/cm 3，第二掺杂区的掺杂浓度为1×10 9～1×10 21/cm 3，可选地，第二掺杂区的掺杂浓度可以为1×10 10～5×10 20/cm 3，第一掺杂区的掺杂浓度为1×10 9～5×10 16/cm 3。进一步可选地，第二掺杂区的掺杂浓度可以为1×10 11～1×10 20/cm 3，第一掺杂区的掺杂浓度为1×10 9～1×10 16/cm 3。由于与电极层的栅线电极的电接触主要通过第二掺杂区，因此显著提高第二掺杂区的掺杂浓度能够使得第二掺杂区形成p++掺杂区域，进一步提升场钝化和异质结效应，以提升使该异质结太阳电池的开路电压。同时相较于传统技术中的发射掺杂层，该发射掺杂层可以在显著提升第二掺杂区的掺杂浓度的同时适当降低第一掺杂区的掺杂浓度，并选取对应的薄膜厚度，还能够减少掺杂层对光生载流子的吸收，提升该异质结太阳电池的短路电流。
在其中一个具体示例中，发射掺杂层中的第一掺杂区为掺杂非晶硅时，也可以设置第二掺杂区为微晶硅，第二掺杂区的晶化率可以为1％～70％。为了显著提高其导电性，第二掺杂区的晶化率可以为10％～70％。可选地，第 二掺杂区的晶化率可以为30％～70％。进一步地，第二掺杂区的晶化率可以为50％～70％。容易知道，晶化率可以通过对样品进行拉曼测试并对相应峰的强度进行计算得到。
又或者，发射掺杂层中的第一掺杂区可以为掺杂微晶硅，此时可以设置第一掺杂区的厚度为15nm～30nm。微晶硅可以具有更高的厚度及掺杂浓度。第一掺杂区的掺杂浓度为1×10 8～1×10 17/cm 3，第二掺杂区的掺杂浓度为1×10 9～5×10 21/cm 3。可选地，第一掺杂区的掺杂浓度为1×10 9～5×10 16/cm 3，第二掺杂区的掺杂浓度为1×10 10～5×10 21/cm 3。进一步可选地，第一掺杂区的掺杂浓度为1×10 9～1×10 16/cm 3，第二掺杂区的掺杂浓度为1×10 10～1×10 21/cm 3。
在其中一个具体示例中，发射掺杂层中的第一掺杂区为掺杂微晶硅时，也可以设置第二掺杂区的晶化率高于第一掺杂区。例如，第一掺杂区的晶化率为5％～50％，第二掺杂区的晶化率可以为10％～70％。进一步地，第二掺杂区的晶化率可以为15％～70％。可选地，第二掺杂区的晶化率可以为30％～70％。进一步地，第二掺杂区的晶化率可以为50％～70％。
发射部件中的掺杂层与背场部件中的掺杂层可以具有不同的厚度。在其中一个具体示例中，背场部件中的掺杂层为背场掺杂层。可选地，在背场掺杂层中的第一掺杂区为掺杂非晶硅，背场掺杂层的厚度为4nm～10nm。可以理解，背场掺杂层中的第二掺杂区的掺杂浓度可以高于第一掺杂区的掺杂浓度。具体地，第一掺杂区的掺杂浓度为1×10 9～1×10 19/cm 3，第二掺杂区的掺杂浓度为1×10 11～1×10 21/cm 3。可选地，第二掺杂区的掺杂浓度可以为1×10 12～5×10 20/cm 3，第一掺杂区的掺杂浓度为1×10 10～5×10 18/cm 3。进一步可选地，第二掺杂区的掺杂浓度可以为1×10 12～1×10 20/cm 3，第一掺杂区的掺杂浓度为1×10 10～1×10 18/cm 3。
同时相较于传统技术中的背场掺杂层，该背场掺杂层可以在显著提升 第二掺杂区的掺杂浓度的同时适当降低第一掺杂区的掺杂浓度，并选取对应的薄膜厚度，还能够减少掺杂层对光生载流子的吸收，提升该异质结太阳电池的短路电流。
在其中一个具体示例中，背场掺杂层中的第一掺杂区为掺杂非晶硅时，也可以设置第二掺杂区为晶体硅，第二掺杂区的晶化率可以为1％～70％。为了显著提高其导电性，第二掺杂区的晶化率可以为10％～70％。可选地，第二掺杂区的晶化率可以为30％～70％。进一步地，第二掺杂区的晶化率可以为50％～70％。
又或者，背场掺杂层的第一掺杂区可以为掺杂微晶硅，此时可以设置第一掺杂区的厚度为15nm～30nm。微晶硅可以具有更高的厚度及掺杂浓度。第一掺杂区的掺杂浓度为1×10 9～1×10 19/cm 3，第二掺杂区的掺杂浓度为1×10 11～1×10 21/cm 3。可选地，第一掺杂区的掺杂浓度为1×10 10～5×10 18/cm 3，第二掺杂区的掺杂浓度为1×10 12～5×10 20/cm 3。进一步可选地，第一掺杂区的掺杂浓度为1×10 10～1×10 18/cm 3，第二掺杂区的掺杂浓度为1×10 12～1×10 20/cm 3。
在其中一个具体示例中，背场掺杂层中的第一掺杂区为掺杂微晶硅时，也可以设置第二掺杂区的晶化率高于第一掺杂区。例如，第一掺杂区的晶化率为5％～40％，第二掺杂区的晶化率可以为6％～70％。进一步地，第二掺杂区的晶化率可以为15％～70％。可选地，第二掺杂区的晶化率可以为30％～70％。进一步地，第二掺杂区的晶化率可以为50％～70％。
在其中一个具体示例中，导电层为透明导电薄膜，导电层覆盖掺杂层整体。具体地，发射部件中的导电层为发射导电层，发射导电层覆盖发射掺杂层整体；背场部件中的导电层为背场导电层，背场导电层覆盖背场掺杂层整体。
在其中一个具体示例中，电极层包括栅线电极。可选地，电极层为金属 栅线电极。金属栅线电极的厚度可以是5μm～200μm，金属栅线电极的图形可以和对应的第二掺杂区的图形重合。具体地，发射部件中的电极层为发射电极层，发射电极层与发射掺杂层中的第二掺杂区的图形重合；背场部件中的电极层为背场电极层，背场电极层与背场掺杂层汇总的第二掺杂区的图形重合。
另一方面，上述实施例中的电接触增强结构在制备时可以包括如下步骤。形成具有均一掺杂浓度的掺杂层的前体，并在预设的第二掺杂区的区域上采用激光掺杂处理以提高第二掺杂区的掺杂浓度；和/或，形成具有均一掺杂浓度的掺杂层的前体，并在预设的第二掺杂区的区域上采用激光诱导晶化处理以提高第二掺杂区的晶化程度。在形成第二掺杂区之后，可以进一步形成整体覆盖掺杂层的导电层，进而还可以形成遮蔽第二掺杂区的电极层。可以理解，该制备步骤主要用于示出如何制备具有第二掺杂区的掺杂层，其他的各层可以由技术人员选取合适的方式进行制备。
其中，激光掺杂指的是在采用激光轰击掺杂源和半导体材料，利用激光的局部高能量密度将杂质原子掺入半导体材料中。激光诱导晶化指的是通过采用激光在半导体材料表面产生热能效应，使半导体材料的温度瞬间达到极高从而具有足够的相变能并转化为晶态，提高晶化率。采用激光掺杂和/或激光诱导晶化的一大优点在于激光的定位精度高，有助于形成极小宽度的第二掺杂区。同时，在实际制备过程中可以只需一个激光照射设备实现晶化率的提升或掺杂浓度的提高。可以理解，第二掺杂区的晶化率、掺杂浓度以及厚度等可以通过控制具体制备过程中的各参数进行控制。
较为优选地，第二掺杂区的掺杂浓度和晶化程度均高于第一掺杂区，设置第二掺杂区的掺杂浓度和晶化程度均高于第一掺杂区，有助于进一步显著提升异质结太阳电池的填充因子、开路电压和短路电流。同时，在形成电接触增强结构时，可以通过控制激光掺杂时的激光照射能量，对第二掺杂区 域进行激光掺杂处理的同时进行激光诱导晶化处理，这样只需要一个工序即可同时完成一般需要两步才能完成的处理。
结合上述电接触增强结构的制备方法，本公开还提供了一种异质结太阳电池的制备方法，其具体可以包括如下步骤。
步骤S1，对N型单晶硅衬底进行制绒清洗。
步骤S2，在N型单晶硅衬底的正面和背面分别沉积第一钝化层和第二钝化层。第一钝化层和第二钝化层可以采用等离子体增强化学气相沉积法、催化化学气相沉积法等进行沉积。
步骤S3，在第一钝化层上沉积发射掺杂层，及在第二钝化层上沉积背场掺杂层。
具体地，可以先采用等离子体增强化学气相沉积法、催化化学气相沉积法等沉积具有P型掺杂的硅薄膜，再进行激光掺杂和激光诱导晶化，以形成第二掺杂区，未进行处理的区域为第一掺杂区，第二掺杂区的掺杂浓度和晶化程度均高于第一掺杂区。可以控制激光功率、照射时间、掺杂源的量等参数对应控制第二掺杂区的掺杂浓度、晶化程度及厚度等参数。在形成背场掺杂层时，也可以采用类似的方式进行制备，只不过背场掺杂层为N型掺杂。
步骤S4，在发射掺杂层以及背场掺杂层远离衬底的一侧表面制备导电层。具体地，该导电层为透明导电薄膜。制备导电层的具体方式可以为射频溅射、直流溅射或脉冲溅射。
步骤S5，在位于两侧的导电层远离衬底的一侧表面上制备电极层。具体地，该电极层为金属栅线电极。制备金属栅线电极的方式可以是丝网印刷、蒸镀、磁控溅射和喷墨打印等方法。
为了便于理解上述实施例中的异质结太阳电池，参照图1所示，一种异质结太阳电池的具体结构，其包括衬底层100、第一钝化层101、发射掺 杂层111、发射导电层112、发射电极层113、第二钝化层102、背场掺杂层121、背场导电层122和背场电极层123。第一钝化层101、发射掺杂层111、发射导电层112和发射电极层113依次层叠设置于衬底层100的正面，第二钝化层102、背场掺杂层121、背场导电层122和背场电极层123依次层叠设置于衬底层100的背面。其中，发射掺杂层111、发射导电层112和发射电极层113构成发射部件，背场掺杂层121、背场导电层122和背场电极层123构成背场部件。
衬底层100为经清洗制绒的n型单晶硅衬底，厚度为200μm。第一钝化层101和第二钝化层102均为含氢本征非晶硅。第一钝化层101与第二钝化层102的厚度是10nm。
发射掺杂层111整体为p型掺杂的硅材料。发射掺杂层111中含有第一发射掺杂区1111和第二发射掺杂区1112。第二发射掺杂区1112位于第一发射掺杂区1111之间，第二发射掺杂区1112的掺杂浓度和晶化程度均高于第一发射掺杂区1111。发射导电层112覆盖在第一掺杂层上方且覆盖第一掺杂层，发射导电层112为透明导电层。发射电极层113为栅线电极，栅线电极对应第二发射掺杂区1112的位置设计，且栅线电极的宽度与第二发射掺杂区1112的宽度相等。图1中仅示出了第二发射掺杂区1112有两个的情况，在实际的异质结太阳电池中，第二发射掺杂区1112可以有更多个。
背场掺杂层121整体为n型掺杂的硅材料。背场掺杂层121中含有第一背场掺杂区1211和第二背场掺杂区1212。第二背场掺杂区1212位于第一背场掺杂区1211之间，第二背场掺杂区1212的掺杂浓度和晶化程度均高于第一背场掺杂区1211。背场导电层122覆盖在第二掺杂层上方且覆盖第二掺杂层，背场导电层122为透明导电层。背场电极层123为栅线电极，栅线电极对应第二背场掺杂区1212的位置设计，且栅线电极的宽度与第二背场掺杂区1212的宽度相等。图1中仅示出了第二背场掺杂区1212有两 个的情况，在实际的异质结太阳电池中，第二背场掺杂区1212可以有更多个。
本公开的又一实施例提供了一种发电装置，其包括上述实施例中的异质结太阳电池。
为了更易于理解及实现本发明，以下还提供了如下较易实施的、更为具体详细的实施例及对比例作为参考。通过下述具体实施例和对比例的描述及性能结果，本发明的各实施例及其优点也将显而易见。
实施例1
一种异质结太阳电池，其采用如下方法进行制备：
对N型单晶硅衬底进行制绒清洗；
在N型单晶硅衬底的正面和背面分别沉积含氢本征非晶硅薄膜，分别作为第一钝化层和第二钝化层；
在第一钝化层上沉积P型掺杂非晶硅薄膜，在掺杂源中对预设区域采用激光照射的方式进行激光掺杂，并同时提高激光照射的能量进行激光诱导结晶，使得预设区域形成第二掺杂区，未处理的区域为第一掺杂区，其中第一掺杂区的掺杂浓度为5×10 17，晶化率为0％，第二掺杂区的掺杂浓度为5×10 19，晶化率为10％，第二掺杂区的宽度为20um；
在第二钝化层上沉积N型掺杂非晶硅薄膜，在掺杂源中对预设区域采用激光照射的方式进行激光掺杂，并同时提高激光照射的能量进行激光诱导结晶，使得预设区域形成第二掺杂区，未处理的区域为第一掺杂区，其中第一掺杂区的掺杂浓度为5×10 18，晶化率为0，第二掺杂区的掺杂浓度为5×10 19，晶化率为15％，第二掺杂区的宽度为25um；
在发射掺杂层以及背场掺杂层远离衬底的一侧溅射沉积导电层；
在位于两侧的导电层远离衬底的一侧表面上丝印金属银栅线电极。
实施例2
实施例2与实施例1大体相同，主要区别在于：在沉积P型掺杂非晶硅薄膜和N型掺杂非晶硅薄膜的过程中，仅进行激光掺杂处理，不进行激光诱导结晶处理。
实施例3
实施例3与实施例1大体相同，主要区别在于：在沉积P型掺杂非晶硅薄膜和N型掺杂非晶硅薄膜的过程中，仅进行激光诱导结晶处理，不进行激光掺杂处理。
对比例1
对比例1与实施例1大体相同，主要区别在于，在沉积P型掺杂非晶硅薄膜和N型掺杂非晶硅薄膜的过程中，既不进行激光诱导结晶处理，也不进行激光掺杂处理。
测试上述实施例1～实施例3及对比例1的开路电压、短路电流及填充因子，具体测试结果可见于表1(以对比例1的结果为1.0，对实施例1～实施例3的各结果进行归一化处理)。
表1
  转换效率 开路电压 短路电流 填充因子
实施例1 1.0047 1.0002 1.0009 1.0059
实施例2 1.0027 1.0003 1.0011 1.0032
实施例3 1.0021 0.9999 1.0009 1.0021
对比例1 1.0000 1.0000 1.0000 1.0000
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范 围应以所附权利要求为准，说明书及附图可以用于解释权利要求的内容。

Claims (21)

  1. 一种异质结太阳电池，其包括：衬底层、第一钝化层、第二钝化层、发射部件和背场部件；
    所述衬底层的掺杂类型为N型或P型，所述第一钝化层设置于所述衬底层的第一表面上，所述发射部件设置于所述第一钝化层远离所述衬底层的一侧表面上，所述第二钝化层设置于所述衬底层的与所述第一表面相对的第二表面上，所述背场部件设置于所述第二钝化层远离所述衬底层的一侧表面上；所述发射部件和所述背场部件均包括沿远离所述衬底方向依次设置的掺杂层、导电层和电极层，所述背场部件中的所述掺杂层的掺杂类型与所述衬底层的掺杂类型相同，所述发射部件中的所述掺杂层的掺杂类型与所述衬底层的掺杂类型相反；
    所述发射部件和所述背场部件中的一个或两个具有电接触增强结构，所述电接触增强结构为：所述掺杂层包括第一掺杂区和设置于所述第一掺杂区之间的被所述电极层遮蔽的第二掺杂区，所述第二掺杂区的掺杂浓度和晶化程度中的一个或两个高于所述第一掺杂区。
  2. 根据权利要求1所述的异质结太阳电池，所述电极层包括栅线电极，所述栅线电极遮蔽所述第二掺杂区，所述栅线电极的宽度在所述第二掺杂区的宽度之上。
  3. 根据权利要求2所述的异质结太阳电池，所述第二掺杂区有多个，多个所述第二掺杂区间隔设置，所述栅线电极也有多个，多个所述栅线电极间隔设置。
  4. 根据权利要求2所述的异质结太阳电池，所述第二掺杂区的宽度为5μm～200μm。
  5. 根据权利要求1～4任一项所述的异质结太阳电池，所述第二掺杂区从所述掺杂层远离所述衬底的一侧表面露出并接触所述导电层。
  6. 根据权利要求5所述的异质结太阳电池，所述发射部件中的所述掺杂层 为发射掺杂层，所述发射掺杂层中的所述第一掺杂区为掺杂非晶硅，所述发射掺杂层的厚度为6nm～15nm。
  7. 根据权利要求5所述的异质结太阳电池，所述发射掺杂层中的所述第一掺杂区为掺杂微晶硅，所述发射掺杂层的厚度为15nm～30nm。
  8. 根据权利要求6或7所述的异质结太阳电池，所述背场部件中的所述掺杂层为背场掺杂层，所述背场掺杂层中的所述第一掺杂区为掺杂非晶硅，所述背场掺杂层的厚度为4nm～10nm。
  9. 根据权利要求6或7所述的异质结太阳电池，所述背场掺杂层中的所述第一掺杂区为掺杂微晶硅，所述背场掺杂层的厚度为15nm～30nm。
  10. 一种异质结太阳电池的制备方法，所述异质结太阳电池包括：衬底层、第一钝化层、第二钝化层、发射部件和背场部件；
    所述衬底层的掺杂类型为第一掺杂类型，所述第一钝化层设置于所述衬底层的第一表面上，所述发射部件设置于所述第一钝化层远离所述衬底层的一侧表面上，所述第二钝化层设置于所述衬底层的与所述第一表面相对的第二表面上，所述背场部件设置于所述第二钝化层远离所述衬底层的一侧表面上；所述发射部件和所述背场部件均包括沿远离所述衬底方向依次设置的掺杂层、导电层和电极层，所述背场部件中的所述掺杂层的掺杂类型为所述第一掺杂类型，所述发射部件中的所述掺杂层的掺杂类型为所述第二掺杂类型；
    所述发射部件和所述背场部件中的一个或两个具有电接触增强结构，形成所述电接触增强结构时包括步骤a和步骤b中的一个或两个：
    a.形成所述掺杂层的前体膜层，并在预设区域上采用激光掺杂处理，提高所述预设区域的掺杂浓度，以形成所述第二掺杂区；
    b.形成所述掺杂层的前体膜层，并在预设区域上采用激光诱导晶化处理，提高所述预设区域的晶化程度，以形成所述第二掺杂区。
  11. 根据权利要求10所述的异质结太阳电池的制备方法，在所述电接触增强结构中，所述第二掺杂区的掺杂浓度和晶化程度均高于所述第一掺杂区。
  12. 根据权利要求11所述的异质结太阳电池的制备方法，在形成所述电接 触增强结构时，对所述第二掺杂区域进行激光掺杂处理的同时进行所述激光诱导晶化处理。
  13. 根据权利要求10所述的异质结太阳电池的制备方法，所述电极层包括栅线电极，所述栅线电极遮蔽所述第二掺杂区，所述栅线电极的宽度在所述第二掺杂区的宽度之上。
  14. 根据权利要求13所述的异质结太阳电池的制备方法，所述第二掺杂区有多个，多个所述第二掺杂区间隔设置，所述栅线电极也有多个，多个所述栅线电极间隔设置。
  15. 根据权利要求13所述的异质结太阳电池的制备方法，所述第二掺杂区的宽度为5μm～200μm。
  16. 根据权利要求10～15任一项所述的异质结太阳电池的制备方法，所述第二掺杂区从所述掺杂层远离所述衬底的一侧表面露出并接触所述导电层。
  17. 根据权利要求16所述的异质结太阳电池的制备方法，所述发射部件中的所述掺杂层为发射掺杂层，所述发射掺杂层中的所述第一掺杂区为掺杂非晶硅，所述发射掺杂层的厚度为6nm～15nm。
  18. 根据权利要求16所述的异质结太阳电池的制备方法，所述发射掺杂层中的所述第一掺杂区为掺杂微晶硅，所述发射掺杂层的厚度为15nm～30nm。
  19. 根据权利要求17或18所述的异质结太阳电池的制备方法，所述背场部件中的所述掺杂层为背场掺杂层，所述背场掺杂层中的所述第一掺杂区为掺杂非晶硅，所述背场掺杂层的厚度为4nm～10nm。
  20. 根据权利要求17或18所述的异质结太阳电池的制备方法，所述背场掺杂层中的所述第一掺杂区为掺杂微晶硅，所述背场掺杂层的厚度为15nm～30nm。
  21. 一种发电装置，其包括根据权利要求1～9任一项所述的异质结太阳电池。
PCT/CN2022/108484 2021-12-30 2022-07-28 异质结太阳电池、其制备方法及发电装置 WO2023124048A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2022348884A AU2022348884A1 (en) 2021-12-30 2022-07-28 Heterojunction solar cell, preparation method thereof and power generation device
EP22871100.8A EP4231364A4 (en) 2021-12-30 2022-07-28 HETEROJUNCTION SOLAR CELL, PREPARATION METHOD THEREFOR AND POWER GENERATION APPARATUS

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202111667805.8A CN114335228B (zh) 2021-12-30 2021-12-30 异质结太阳电池、其制备方法及发电装置
CN202111667805.8 2021-12-30

Publications (1)

Publication Number Publication Date
WO2023124048A1 true WO2023124048A1 (zh) 2023-07-06

Family

ID=81020187

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2022/108484 WO2023124048A1 (zh) 2021-12-30 2022-07-28 异质结太阳电池、其制备方法及发电装置

Country Status (4)

Country Link
EP (1) EP4231364A4 (zh)
CN (1) CN114335228B (zh)
AU (1) AU2022348884A1 (zh)
WO (1) WO2023124048A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117457759A (zh) * 2023-12-22 2024-01-26 浙江爱旭太阳能科技有限公司 双面太阳能电池片、电池组件和光伏系统

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114335228B (zh) * 2021-12-30 2024-03-29 通威太阳能（成都）有限公司 异质结太阳电池、其制备方法及发电装置
CN115188835B (zh) * 2022-05-07 2024-04-19 天合光能股份有限公司 钝化接触的多层多晶硅电池及其制备方法
CN115172515B (zh) * 2022-06-30 2023-11-28 浙江晶科能源有限公司 一种太阳能电池及其制作方法、光伏组件

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985778A (zh) * 2014-05-21 2014-08-13 常州天合光能有限公司 具有选择性发射极的异质结太阳能电池及其制备方法
CN106328735A (zh) * 2016-11-15 2017-01-11 江南大学 一种c‑Si/a‑Si/mc‑Si太阳电池结构及其制备方法
CN110600577A (zh) * 2018-06-12 2019-12-20 君泰创新（北京）科技有限公司 一种异质结太阳能电池及其制备方法
CN111463306A (zh) * 2020-05-06 2020-07-28 晋能光伏技术有限责任公司 一种新型异质结电池及其制备方法
CN114335228A (zh) * 2021-12-30 2022-04-12 中威新能源(成都)有限公司 异质结太阳电池、其制备方法及发电装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8686283B2 (en) * 2010-05-04 2014-04-01 Silevo, Inc. Solar cell with oxide tunneling junctions
US9112068B2 (en) * 2012-10-05 2015-08-18 International Business Machines Corporation Laser doping of crystalline semiconductors using a dopant-containing amorphous silicon stack for dopant source and passivation
CN104134707B (zh) * 2014-08-11 2016-05-25 常州天合光能有限公司 有利于减少正面栅线数目的异质结电池及其制备方法
US10453983B2 (en) * 2015-12-18 2019-10-22 Lg Electronics Inc. Solar cell and method of manufacturing
CN106374002B (zh) * 2016-11-28 2017-12-12 常熟理工学院 环形深层绝缘结构的石墨烯硅基太阳能电池及其制备方法
CN108987488B (zh) * 2017-05-31 2024-01-30 国家电投集团新能源科技有限公司 硅异质结太阳电池及其制备方法
CN108321239A (zh) * 2017-12-21 2018-07-24 君泰创新（北京）科技有限公司 一种太阳能异质结电池及其制备方法
CN208608214U (zh) * 2018-06-12 2019-03-15 君泰创新（北京）科技有限公司 一种异质结太阳能电池
CN108831967B (zh) * 2018-06-25 2019-10-29 江苏悦阳光伏科技有限公司 一种新型hit太阳能电池及其制备方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103985778A (zh) * 2014-05-21 2014-08-13 常州天合光能有限公司 具有选择性发射极的异质结太阳能电池及其制备方法
CN106328735A (zh) * 2016-11-15 2017-01-11 江南大学 一种c‑Si/a‑Si/mc‑Si太阳电池结构及其制备方法
CN110600577A (zh) * 2018-06-12 2019-12-20 君泰创新（北京）科技有限公司 一种异质结太阳能电池及其制备方法
CN111463306A (zh) * 2020-05-06 2020-07-28 晋能光伏技术有限责任公司 一种新型异质结电池及其制备方法
CN114335228A (zh) * 2021-12-30 2022-04-12 中威新能源(成都)有限公司 异质结太阳电池、其制备方法及发电装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4231364A4 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117457759A (zh) * 2023-12-22 2024-01-26 浙江爱旭太阳能科技有限公司 双面太阳能电池片、电池组件和光伏系统
CN117457759B (zh) * 2023-12-22 2024-03-29 浙江爱旭太阳能科技有限公司 双面太阳能电池片、电池组件和光伏系统

Also Published As

Publication number Publication date
CN114335228B (zh) 2024-03-29
CN114335228A (zh) 2022-04-12
AU2022348884A1 (en) 2023-07-13
EP4231364A4 (en) 2024-05-01
EP4231364A1 (en) 2023-08-23

Similar Documents

Publication Publication Date Title
WO2023124048A1 (zh) 异质结太阳电池、其制备方法及发电装置
WO2021004525A1 (zh) 一种异质结电池分层氢钝化方法、氢钝化装置、电池、电池组件及太阳能供电站
CN108963005B (zh) 一种新型复合结构全背面异质结太阳电池及制备方法
EP3503210A1 (en) Heterojunction solar cell and fabrication method thereof
KR100847741B1 (ko) ｐ-ｎ접합 계면에 패시베이션층을 구비하는 점 접촉 이종접합 실리콘 태양전지 및 그의 제조방법
JP2009164544A (ja) 太陽電池のパッシベーション層構造およびその製造方法
KR101324292B1 (ko) 고효율 태양전지와 그 제조방법 및 이를 위한 태양전지제조장치
JP2007281156A (ja) 裏面電極型半導体へテロ接合太陽電池ならびにその製造方法と製造装置
CN115188837B (zh) 一种背接触太阳能电池及制备方法、电池组件
WO2023184955A1 (zh) 太阳能电池及其制备方法
JP5656330B2 (ja) 光電変換装置の作製方法
JP2015233140A (ja) 太陽電池の製造方法
JPH1084124A (ja) 光起電力素子、並びにその製造方法及び装置
CN115132852A (zh) 一种N型TOPCon太阳能电池及其制作方法
JP3702240B2 (ja) 半導体素子及びその製造方法
TW201242066A (en) Method of fabricating solar cell
JP2012023348A (ja) 光電変換装置及びその作製方法
KR20090078275A (ko) 요철 형태의 절연막을 포함하는 태양전지 및 그 제조방법
CN112768549A (zh) 一种高光电转换效率的hjt电池及其制备方法
KR20110008541A (ko) 태양전지 및 그 제조방법
CN116864548A (zh) 一种p型背结TOPCon电池及其制备方法
KR20200125067A (ko) 이종 접합 태양 전지 제조 방법
JP2012023342A (ja) 光電変換装置及びその作製方法
CN112349801B (zh) 叠层电池的中间串联层及生产方法、叠层电池
JPH0823114A (ja) 太陽電池

Legal Events

Date Code Title Description
ENP Entry into the national phase

Ref document number: 2022871100

Country of ref document: EP

Effective date: 20230330

ENP Entry into the national phase

Ref document number: 2022348884

Country of ref document: AU

Date of ref document: 20220728

Kind code of ref document: A