WO2023115653A1 - Fully transparent thin-film transistor based on indium tin oxide, and preparation method therefor - Google Patents

Fully transparent thin-film transistor based on indium tin oxide, and preparation method therefor Download PDF

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WO2023115653A1
WO2023115653A1 PCT/CN2022/070635 CN2022070635W WO2023115653A1 WO 2023115653 A1 WO2023115653 A1 WO 2023115653A1 CN 2022070635 W CN2022070635 W CN 2022070635W WO 2023115653 A1 WO2023115653 A1 WO 2023115653A1
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ito
layer
metallic
film transistor
transparent thin
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Chinese (zh)
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吴燕庆
熊雄
胡倩澜
童安宇
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北京超弦存储器研究院
北京大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film

Definitions

  • the invention relates to the technical field of fully transparent photoelectric display and wearable devices, in particular to a fully transparent thin film transistor and a preparation method thereof.
  • ITO is expected to solve this problem by replacing metal electrodes with ITO materials, highlighting the advantages of ITO materials in the field of radio and television display.
  • the present invention proposes to use indium tin oxide (ITO) materials to replace metal materials to make fully transparent thin film transistors, and indium tin oxide to replace metal materials and traditional oxide channel materials to make thin film transistors has the following Several advantages:
  • ITO indium tin oxide
  • ITO Indium tin oxide
  • ITO indium tin oxide
  • a fully transparent thin film transistor based on indium tin oxide comprising a substrate, a buffer layer, a gate electrode, a gate dielectric layer, a channel layer, and a source-drain electrode, characterized in that the material of the gate electrode and the source-drain electrode is metal ITO, the material of the channel layer is semiconductor ITO.
  • the fully transparent thin film transistor based on indium tin oxide of the present invention is sequentially provided with a substrate, a buffer layer, a metallic ITO gate electrode, a gate dielectric layer, a semiconductive ITO channel layer, and metallic ITO source and drain electrodes at both ends. pole.
  • the substrate can be a transparent rigid substrate, such as a glass substrate, a fused glass substrate, or a transparent flexible substrate, such as a polyester substrate such as polyethylene terephthalate (PET).
  • the buffer layer is preferably made of SiO 2 or SiN x , and its thickness is generally 20-40 nm.
  • the gate dielectric layer is a high ⁇ dielectric material, such as HfO 2 , with a thickness of preferably 20-30 nm.
  • the thickness of the metallic ITO gate electrode is 20-50 nm, and the thickness of the metallic ITO source-drain electrode is 20-60 nm.
  • the thickness of the semiconductor ITO channel layer is 5-10 nm, the channel length is several hundred nanometers to several microns, and the channel width is several microns to tens of microns.
  • the preparation method of the above-mentioned fully transparent thin film transistor based on indium tin oxide comprises the following steps:
  • the ITO and the buffer layer are grown by magnetron sputtering, atomic layer deposition, plasma chemical vapor deposition and other film preparation techniques.
  • the power of O2 when growing ITO the conversion between ITO metallicity and semiconductor performance is completed, and a series of micro-nano processing such as spin-coating photoresist, baking, exposure, development, oxygen plasma to remove residual glue, and stripping
  • the process completes the preparation of a fully transparent thin film transistor device.
  • the gate dielectric is grown by atomic layer deposition, and the performance of ITO channel is better than that of other oxide semiconductors. Since the active region, gate electrode and source and drain electrodes are all made of ITO material, less materials are used in the preparation process and the process is easier. Realization can also avoid cross-contamination of different materials in the process.
  • the photolithography process adopts the LOR10A/AZ5214E double-layer glue process, which is more stable in lithography.
  • step 2) first spin-coat HMDS (hexamethyldisilazane) on the buffer layer as an adhesion layer, then use LOR10A/AZ5214E double-layer photoresist process to form gate patterns, and then magnetron sputtering A certain thickness of metallic ITO, and finally peel off the photoresist to form a metallic ITO gate electrode.
  • the process parameters for growing metallic ITO by magnetron sputtering are RF 100W, Ar 1 : 34.8 sccm, Ar 2 : 20 sccm, no ion source, no O 2 , and room temperature.
  • step 4 the photolithography process for forming the channel pattern is the same as step 2), when growing semiconducting ITO by magnetron sputtering, RF100W, Ar1 : 34.8sccm, Ar2 : 12.2sccm, ion source power 50W, O2 : 7.57sccm, temperature 200 degrees Celsius.
  • step 5 the same process as step 2) is used to prepare metallic ITO source and drain electrodes.
  • the present invention proposes to use semiconductor indium tin oxide as a transistor channel and metallic indium tin oxide as a transistor electrode, thereby obtaining a fully transparent thin film transistor.
  • the semiconductor and metallic properties of indium tin oxide can be realized by adjusting the growth thickness and oxygen partial pressure of magnetron sputtering.
  • This field effect transistor device based on the ITO electrode can achieve better light transmission.
  • this design can greatly reduce the use of metal materials, further reducing the difficulty and cost of fabrication.
  • the device can provide better driving capability than other traditional oxide semiconductors.
  • Fig. 1 is a schematic structural diagram of a fully transparent thin film transistor based on indium tin oxide in the present invention, wherein: 1 is a substrate, 2 is a buffer layer, 3 is an indium tin oxide gate electrode, 4 is a gate dielectric layer, and 5 is an indium tin oxide trench 6 is the source and drain electrodes of indium tin oxide.
  • Fig. 2 is a schematic diagram of the preparation process of the fully transparent thin film transistor based on indium tin oxide of the present invention, wherein: Step 1 uses the standard RCA1 cleaning process to clean the glass substrate; Step 2 uses PECVD to plate the buffer layer SiNx; Step 3 spins the photoresist, A series of micro-nano processing techniques and sputtering processes such as baking, exposure, development, fixing, oxygen plasma to remove residual glue, metal evaporation, and stripping process to prepare indium tin oxide gate electrodes; Step 4 uses atomic layer deposition to grow high- ⁇ gate electrodes Dielectric layer; Step 5 uses magnetron sputtering, atomic layer deposition and other processes to grow semiconducting indium tin oxide layer as channel material; Step 6 spin-coats photoresist, bakes, exposes, develops, fixes, and removes residue with oxygen plasma The source and drain electrodes are prepared by a series of micro-nano processing techniques such as glue, metal evaporation, and peeling,
  • the first step substrate cleaning and passivation.
  • a transparent PET substrate was used, soaked in acetone at 70°C for 30 minutes, washed with isopropanol (IPA) and ultrapure water (DI) for 5 minutes each to clean particles and organic matter on the substrate, and dried with high-purity nitrogen after cleaning.
  • IPA isopropanol
  • DI ultrapure water
  • Second step growing silicon nitride (SiN x ) as a buffer layer using plasma chemical vapor deposition.
  • the third step prepare the indium tin oxide gate electrode by adopting process steps such as coating, baking, photolithography, developing, oxygen plasma cleaning, magnetron sputtering, etc., specifically including:
  • spin-coat HMDS hexamethyldisilazane
  • the spin-coating parameters are 4000rpm, 30s, and bake at 95°C for 60s after spin-coating;
  • developing solution is 2.38% TMAH (tetramethylammonium hydroxide), developing for 85s ⁇ 90s, rinsed with deionized water, and dried with N2 ;
  • TMAH tetramethylammonium hydroxide
  • Oxygen plasma cleaning the ratio of argon to oxygen is 4:1, 30W, 2min;
  • Step 4 grow a high- ⁇ dielectric HfO 2 with a thickness of 20 nm on the surface as a gate dielectric layer by using an atomic layer deposition system.
  • TEMAHf and O3 were used as precursors, and the growth temperature was 250 °C.
  • Step 5 Prepare active regions with different groove lengths and widths by using process steps such as coating, baking, photolithography, development, oxygen plasma cleaning, and magnetron sputtering, including:
  • spin-coat HMDS as the adhesion layer
  • the spin-coating parameters are 4000rpm, 30s, and bake at 95°C for 60s after spin-coating;
  • the developer is 2.38% TMAH, develop for 85s-90s, rinse with deionized water, and blow dry with N2 ;
  • Oxygen plasma cleaning the ratio of argon to oxygen is 4:1, 30W, 2min;
  • Step 6 Prepare indium tin oxide source-drain electrodes by using process steps such as coating, baking, photolithography, development, oxygen plasma cleaning, and magnetron sputtering, including:
  • spin-coat HMDS as the adhesion layer
  • the spin-coating parameters are 4000rpm, 30s, and bake at 95°C for 60s after spin-coating;
  • the developer is 2.38% TMAH, develop for 85s-90s, rinse with deionized water, and blow dry with N2 ;
  • Oxygen plasma cleaning the ratio of argon to oxygen is 4:1, 30W, 2min;

Abstract

A fully transparent thin-film transistor based on indium tin oxide (ITO). The fully transparent thin-film transistor comprises a substrate, a buffer layer, a gate electrode, a gate dielectric layer, a channel layer and source and drain electrodes, wherein the gate electrode and the source and drain electrodes are made of metallic ITO, and the channel layer is made of semiconducting ITO. The semiconducting and metallic properties of ITO can be achieved by means of adjusting growth thickness and oxygen partial pressure in magnetron sputtering. Such a field-effect transistor device based on an ITO electrode can achieve better transmission of light. In addition, compared with other conventional oxide semiconductor devices, the design can significantly reduce the use of metallic materials, thereby further reducing the preparation difficulty and cost; and by using high mobility semiconductor channel ITO, the device can provide a superior driving capability compared with other conventional oxide semiconductors.

Description

一种基于氧化铟锡的全透明薄膜晶体管及其制备方法A fully transparent thin film transistor based on indium tin oxide and its preparation method 技术领域technical field
本发明涉及全透明光电显示、可穿戴器件的技术领域，尤其涉及一种全透明薄膜晶体管及其制备方法。The invention relates to the technical field of fully transparent photoelectric display and wearable devices, in particular to a fully transparent thin film transistor and a preparation method thereof.
背景技术Background technique
半导体产品技术的发展、性能的进步和普及速度的快慢，最终几乎都和工艺相关，没有好的工艺，半导体产业几乎无法快速前行。传统的金属电极，除了价格昂贵工艺也相对复杂，在制备器件的过程中容易发生交叉污染，且金属电极不透光，这对于光电显示领域的器件是不利的。ITO作为透明的半导体材料，用ITO材料替代金属电极有望解决这一问题，在广电显示领域突显ITO材料的优势。The development of semiconductor product technology, the progress of performance, and the speed of popularization are all related to technology in the end. Without good technology, the semiconductor industry can hardly move forward quickly. Traditional metal electrodes, in addition to being expensive and relatively complicated, are prone to cross-contamination in the process of device preparation, and the metal electrodes are opaque, which is unfavorable for devices in the field of optoelectronic display. As a transparent semiconductor material, ITO is expected to solve this problem by replacing metal electrodes with ITO materials, highlighting the advantages of ITO materials in the field of radio and television display.
发明内容Contents of the invention
为制备低成本高性能的全透明薄膜晶体管，本发明提出用氧化铟锡(ITO)材料替代金属材料制作全透明薄膜晶体管，氧化铟锡替代金属材料和传统氧化物沟道材料制作薄膜晶体管有以下几种优势：In order to prepare low-cost and high-performance fully transparent thin film transistors, the present invention proposes to use indium tin oxide (ITO) materials to replace metal materials to make fully transparent thin film transistors, and indium tin oxide to replace metal materials and traditional oxide channel materials to make thin film transistors has the following Several advantages:
(1)氧化铟锡(ITO)作为一种透明电极，具有比金属材料更好的透光性，所以在应用方面，可用于制作全透明光电显示器件，还可以与柔性材料相结合制作出可穿戴全透明柔性检测器件；(1) As a transparent electrode, indium tin oxide (ITO) has better light transmittance than metal materials, so in terms of application, it can be used to make fully transparent photoelectric display devices, and can also be combined with flexible materials to produce flexible materials. Wear a fully transparent flexible detection device;
(2)氧化铟锡(ITO)可通过调节生长时O 2功率以及厚度，使其特性发生变化，可以使其半导体性和金属性相互转换，从而在器件制备过程中所需要的材料更少，这样工艺更容易实现，也大大降低了交叉污染的可能性； (2) Indium tin oxide (ITO) can change its characteristics by adjusting the O 2 power and thickness during growth, and can make its semiconducting and metallic properties interchangeable, so that less materials are required in the device preparation process, This process is easier to implement and greatly reduces the possibility of cross-contamination;
(3)氧化铟锡(ITO)材料本身性能好，较为稳定，开关比大，迁移率高，禁带宽度大，ITO沟道性能比较其他氧化物基半导体性能好。(3) The indium tin oxide (ITO) material itself has good performance, is relatively stable, has a large switching ratio, high mobility, and a large band gap. The performance of the ITO channel is better than that of other oxide-based semiconductors.
本发明的技术方案如下：Technical scheme of the present invention is as follows:
一种基于氧化铟锡的全透明薄膜晶体管，包括衬底、缓冲层、栅电极、栅介质层、沟道层和源漏电极，其特征在于，所述栅电极和源漏电极的材料为金属性ITO，所述沟道层的材料为半导体性ITO。A fully transparent thin film transistor based on indium tin oxide, comprising a substrate, a buffer layer, a gate electrode, a gate dielectric layer, a channel layer, and a source-drain electrode, characterized in that the material of the gate electrode and the source-drain electrode is metal ITO, the material of the channel layer is semiconductor ITO.
具体的，本发明基于氧化铟锡的全透明薄膜晶体管由下至上依次设置衬底、缓冲层、金 属性ITO栅电极、栅介质层、半导体性ITO沟道层及其两端的金属性ITO源漏电极。Specifically, the fully transparent thin film transistor based on indium tin oxide of the present invention is sequentially provided with a substrate, a buffer layer, a metallic ITO gate electrode, a gate dielectric layer, a semiconductive ITO channel layer, and metallic ITO source and drain electrodes at both ends. pole.
所述衬底可以是透明的刚性衬底，例如为玻璃衬底、熔融玻璃衬底，也可以是透明的柔性衬底，例如聚对苯二甲酸乙二醇酯(PET)等聚酯衬底。所述缓冲层的材料优选为SiO 2、SiN x，其厚度一般为20～40nm。 The substrate can be a transparent rigid substrate, such as a glass substrate, a fused glass substrate, or a transparent flexible substrate, such as a polyester substrate such as polyethylene terephthalate (PET). . The buffer layer is preferably made of SiO 2 or SiN x , and its thickness is generally 20-40 nm.
所述栅介质层为高κ介质材料，例如HfO 2，厚度优选为20～30nm。 The gate dielectric layer is a high κ dielectric material, such as HfO 2 , with a thickness of preferably 20-30 nm.
优选的，所述金属性ITO栅电极的厚度为20～50nm，所述金属性ITO源漏电极的厚度为20～60nm。所述半导体性ITO沟道层的厚度为5～10nm，沟道长度为数百纳米至数微米，沟道宽度为数微米至数十微米。Preferably, the thickness of the metallic ITO gate electrode is 20-50 nm, and the thickness of the metallic ITO source-drain electrode is 20-60 nm. The thickness of the semiconductor ITO channel layer is 5-10 nm, the channel length is several hundred nanometers to several microns, and the channel width is several microns to tens of microns.
上述基于氧化铟锡的全透明薄膜晶体管的制备方法包括以下步骤：The preparation method of the above-mentioned fully transparent thin film transistor based on indium tin oxide comprises the following steps:
1)清洗衬底，在衬底上生长缓冲层；1) cleaning the substrate, and growing a buffer layer on the substrate;
2)在缓冲层上制备金属性ITO栅电极；2) preparing a metallic ITO gate electrode on the buffer layer;
3)制备栅介质层覆盖金属性ITO栅电极；3) preparing a gate dielectric layer to cover the metallic ITO gate electrode;
4)在栅介质层上制备半导体性ITO沟道层；4) preparing a semiconductive ITO channel layer on the gate dielectric layer;
5)在沟道两端制备金属性ITO源漏电极。5) Prepare metallic ITO source and drain electrodes at both ends of the channel.
上述制备方法中，ITO和缓冲层采用磁控溅射、原子层沉积、等离子体化学气相沉积等薄膜制备工艺生长。通过改变生长ITO时O 2功率大小来完成ITO金属性与半导体性能之间的转换，通过旋涂光刻胶、烘烤、曝光、显影、氧等离子体去残胶、剥离等一系列微纳加工工艺完成全透明薄膜晶体管器件的制备。 In the above preparation method, the ITO and the buffer layer are grown by magnetron sputtering, atomic layer deposition, plasma chemical vapor deposition and other film preparation techniques. By changing the power of O2 when growing ITO, the conversion between ITO metallicity and semiconductor performance is completed, and a series of micro-nano processing such as spin-coating photoresist, baking, exposure, development, oxygen plasma to remove residual glue, and stripping The process completes the preparation of a fully transparent thin film transistor device.
栅介质采用原子层沉积法生长，ITO沟道性能较其他氧化物半导体性能更好，又因为有源区、栅电极和源漏电极同为ITO材料，制备过程中使用材料更少，工艺更容易实现，还可以避免不同材料在工艺中交叉污染现象，光刻工艺选用了LOR10A/AZ5214E双层胶工艺，更具有光刻的稳定性。The gate dielectric is grown by atomic layer deposition, and the performance of ITO channel is better than that of other oxide semiconductors. Since the active region, gate electrode and source and drain electrodes are all made of ITO material, less materials are used in the preparation process and the process is easier. Realization can also avoid cross-contamination of different materials in the process. The photolithography process adopts the LOR10A/AZ5214E double-layer glue process, which is more stable in lithography.
优选地，在步骤2)首先在缓冲层上旋涂HMDS(六甲基二硅氮烷)作为粘附层，接着采用LOR10A/AZ5214E双层光刻胶工艺形成栅极图形，然后磁控溅射一定厚度的金属性ITO，最后剥离光刻胶形成金属性ITO栅电极。在本发明的实施例中，磁控溅射生长金属性ITO的工艺参数为RF 100W，Ar 1：34.8sccm，Ar 2：20sccm，无离子源，无O 2，常温。 Preferably, in step 2) first spin-coat HMDS (hexamethyldisilazane) on the buffer layer as an adhesion layer, then use LOR10A/AZ5214E double-layer photoresist process to form gate patterns, and then magnetron sputtering A certain thickness of metallic ITO, and finally peel off the photoresist to form a metallic ITO gate electrode. In an embodiment of the present invention, the process parameters for growing metallic ITO by magnetron sputtering are RF 100W, Ar 1 : 34.8 sccm, Ar 2 : 20 sccm, no ion source, no O 2 , and room temperature.
在步骤4)，形成沟道图形的光刻工艺同步骤2)，通过磁控溅射生长半导体性ITO时，RF100W，Ar 1：34.8sccm，Ar 2：12.2sccm，离子源功率50W，O 2：7.57sccm，温度200摄氏度。 In step 4), the photolithography process for forming the channel pattern is the same as step 2), when growing semiconducting ITO by magnetron sputtering, RF100W, Ar1 : 34.8sccm, Ar2 : 12.2sccm, ion source power 50W, O2 : 7.57sccm, temperature 200 degrees Celsius.
在步骤5)采用与步骤2)相同的工艺制备金属性ITO源漏电极。In step 5), the same process as step 2) is used to prepare metallic ITO source and drain electrodes.
本发明提出使用半导体性氧化铟锡作为晶体管沟道，金属性氧化铟锡作为晶体管电极，从而获得了全透明薄膜晶体管。氧化铟锡的半导体性和金属性可通过调节磁控溅射生长厚度与氧分压来实现。这种基于ITO电极的场效应晶体管器件能实现更好的透光性。此外，相较于传统其他氧化物半导体器件，该设计可大幅减少金属材料的使用，进一步降低制备难度和成本。通过使用高迁移率半导体沟道ITO，相较于其他传统氧化物半导体，器件能提供更优异的驱动能力。The present invention proposes to use semiconductor indium tin oxide as a transistor channel and metallic indium tin oxide as a transistor electrode, thereby obtaining a fully transparent thin film transistor. The semiconductor and metallic properties of indium tin oxide can be realized by adjusting the growth thickness and oxygen partial pressure of magnetron sputtering. This field effect transistor device based on the ITO electrode can achieve better light transmission. In addition, compared with other traditional oxide semiconductor devices, this design can greatly reduce the use of metal materials, further reducing the difficulty and cost of fabrication. By using the high-mobility semiconductor channel ITO, the device can provide better driving capability than other traditional oxide semiconductors.
附图说明Description of drawings
图1为本发明基于氧化铟锡的全透明薄膜晶体管的结构示意图，其中：1为衬底，2为缓冲层，3为氧化铟锡栅电极，4为栅介质层，5为氧化铟锡沟道层，6为氧化铟锡源漏电极。Fig. 1 is a schematic structural diagram of a fully transparent thin film transistor based on indium tin oxide in the present invention, wherein: 1 is a substrate, 2 is a buffer layer, 3 is an indium tin oxide gate electrode, 4 is a gate dielectric layer, and 5 is an indium tin oxide trench 6 is the source and drain electrodes of indium tin oxide.
图2为本发明基于氧化铟锡的全透明薄膜晶体管的制备工艺示意图，其中：Step 1用标准RCA1清洗工艺清洗玻璃衬底；Step 2用PECVD镀缓冲层SiNx；Step 3旋涂光刻胶、烘烤、曝光、显影、定影、氧等离子体去残胶、蒸镀金属、剥离等一系列微纳加工工艺和溅射工艺制备氧化铟锡栅电极；Step 4采用原子层沉积工艺生长高κ栅介质层；Step 5采用磁控溅射、原子层沉积等工艺生长半导体性氧化铟锡层作为沟道材料；Step 6旋涂光刻胶、烘烤、曝光、显影、定影、氧等离子体去残胶、蒸镀金属、剥离等一系列微纳加工工艺或shutter mask蒸镀工艺制备源漏电极。Fig. 2 is a schematic diagram of the preparation process of the fully transparent thin film transistor based on indium tin oxide of the present invention, wherein: Step 1 uses the standard RCA1 cleaning process to clean the glass substrate; Step 2 uses PECVD to plate the buffer layer SiNx; Step 3 spins the photoresist, A series of micro-nano processing techniques and sputtering processes such as baking, exposure, development, fixing, oxygen plasma to remove residual glue, metal evaporation, and stripping process to prepare indium tin oxide gate electrodes; Step 4 uses atomic layer deposition to grow high-κ gate electrodes Dielectric layer; Step 5 uses magnetron sputtering, atomic layer deposition and other processes to grow semiconducting indium tin oxide layer as channel material; Step 6 spin-coats photoresist, bakes, exposes, develops, fixes, and removes residue with oxygen plasma The source and drain electrodes are prepared by a series of micro-nano processing techniques such as glue, metal evaporation, and peeling, or shutter mask evaporation processes.
具体实施方式Detailed ways
为了使本发明的目的、特征和优点更加的清晰，以下结合实施例具体工艺步骤及具体参数，对本发明的具体实施方式做出更为详细的说明，在下面的描述中，阐述了很多具体的细节以便于充分的理解本发明，但是本发明能够以很多不同于描述的其他方式来实施。因此，本发明不受以下公开的具体实施例的限制。In order to make the purpose, features and advantages of the present invention more clear, the specific process steps and specific parameters of the following examples are used to make a more detailed description of the specific implementation of the present invention. In the following description, many specific aspects are set forth. The details are given in order to provide a full understanding of the invention, but it can be practiced in many other ways than that described. Accordingly, the present invention is not limited to the specific Examples disclosed below.
基于氧化铟锡的全透明薄膜晶体管制备工艺流程：Manufacturing process of fully transparent thin film transistors based on indium tin oxide:
第一步：衬底清洗与钝化。The first step: substrate cleaning and passivation.
采用透明的PET衬底，丙酮70℃浸泡30min，异丙醇(IPA)和超纯水(DI)各清洗5min，清洗衬底上的颗粒、有机物，清洗完后高纯氮气吹干。A transparent PET substrate was used, soaked in acetone at 70°C for 30 minutes, washed with isopropanol (IPA) and ultrapure water (DI) for 5 minutes each to clean particles and organic matter on the substrate, and dried with high-purity nitrogen after cleaning.
第二步：使用等离子体化学气相沉积生长氮化硅(SiN x)作为缓冲层。 Second step: growing silicon nitride (SiN x ) as a buffer layer using plasma chemical vapor deposition.
第三步：采用匀胶、烘烤、光刻、显影、氧等离子清洗、磁控溅射等工艺步骤制备氧化 铟锡栅电极，具体包括：The third step: prepare the indium tin oxide gate electrode by adopting process steps such as coating, baking, photolithography, developing, oxygen plasma cleaning, magnetron sputtering, etc., specifically including:
(1)首先在第二步的基础上，旋涂HMDS(六甲基二硅氮烷)作为粘附层，旋涂参数为4000rpm，30s，旋涂后95℃烘烤60s；(1) First, on the basis of the second step, spin-coat HMDS (hexamethyldisilazane) as an adhesion layer, the spin-coating parameters are 4000rpm, 30s, and bake at 95°C for 60s after spin-coating;
(2)旋涂光刻胶，首先旋涂LOR10A，旋涂参数为3000rpm，30s，旋涂后150℃烘烤120s；然后旋涂AZ5214E，旋涂参数为4000rpm，30s，旋涂后95℃烘烤90s；(2) Spin-coat photoresist, first spin-coat LOR10A, the spin-coating parameters are 3000rpm, 30s, and bake at 150°C for 120s after spin-coating; then spin-coat AZ5214E, spin-coating parameters are 4000rpm, 30s, and bake at 95°C after spin-coating Bake for 90s;
(3)曝光2.2s，使栅极图形光刻胶图案化；(3) Exposure for 2.2s to pattern the gate pattern photoresist;
(4)显影：显影液为2.38％TMAH(四甲基氢氧化铵)，显影85s～90s，去离子水清洗干净，N 2吹干； (4) Developing: developing solution is 2.38% TMAH (tetramethylammonium hydroxide), developing for 85s～90s, rinsed with deionized water, and dried with N2 ;
(5)氧等离子清洗：氩气和氧气的比例为4:1，30W，2min；(5) Oxygen plasma cleaning: the ratio of argon to oxygen is 4:1, 30W, 2min;
(6)磁控溅射50nm金属性ITO：RF 100W，Ar 1：34.8sccm，Ar 2：20sccm，无离子源，无O 2，常温； (6) Magnetron sputtering 50nm metallic ITO: RF 100W, Ar 1 : 34.8sccm, Ar 2 : 20sccm, no ion source, no O 2 , normal temperature;
(7)剥离：在NMP(N-甲基吡咯烷酮)中120℃加热30min，异丙醇清洗8min，氮气吹干。(7) Peeling: heating in NMP (N-methylpyrrolidone) at 120° C. for 30 minutes, washing with isopropanol for 8 minutes, and drying with nitrogen.
第四步：用原子层淀积系统在表面生长厚度为20nm的高κ介质HfO 2作为栅介质层。采用TEMAHf和O 3作为前体，生长温度250℃。 Step 4: grow a high-κ dielectric HfO 2 with a thickness of 20 nm on the surface as a gate dielectric layer by using an atomic layer deposition system. TEMAHf and O3 were used as precursors, and the growth temperature was 250 °C.
第五步：采用匀胶、烘烤、光刻、显影、氧等离子清洗、磁控溅射等工艺步骤制备不同沟长沟宽有源区，具体包括：Step 5: Prepare active regions with different groove lengths and widths by using process steps such as coating, baking, photolithography, development, oxygen plasma cleaning, and magnetron sputtering, including:
(1)首先在第四步的基础上，旋涂HMDS作为粘附层，旋涂参数为4000rpm，30s，旋涂后95℃烘烤60s；(1) First, on the basis of the fourth step, spin-coat HMDS as the adhesion layer, the spin-coating parameters are 4000rpm, 30s, and bake at 95°C for 60s after spin-coating;
(2)旋涂光刻胶，首先旋涂LOR10A，旋涂参数为3000rpm，30s，旋涂后150℃烘烤120s；然后旋涂AZ5214E，旋涂参数为4000rpm，30s，旋涂后95℃烘烤90s；(2) Spin-coat photoresist, first spin-coat LOR10A, the spin-coating parameters are 3000rpm, 30s, and bake at 150°C for 120s after spin-coating; then spin-coat AZ5214E, spin-coating parameters are 4000rpm, 30s, and bake at 95°C after spin-coating Bake for 90s;
(3)曝光2.2s，使光刻胶图案化；(3) Exposure for 2.2s to pattern the photoresist;
(4)显影：显影液为2.38％TMAH，显影85s～90s，去离子水清洗干净，N 2吹干； (4) Development: The developer is 2.38% TMAH, develop for 85s-90s, rinse with deionized water, and blow dry with N2 ;
(5)氧等离子清洗：氩气和氧气的比例为4:1，30W，2min；(5) Oxygen plasma cleaning: the ratio of argon to oxygen is 4:1, 30W, 2min;
(6)磁控溅射5nm半导体性ITO；RF 100W，Ar 1：34.8sccm，Ar 2：12.2sccm，离子源功率50W，O 2：7.57sccm，温度200摄氏度； (6) Magnetron sputtering 5nm semiconductor ITO; RF 100W, Ar 1 : 34.8sccm, Ar 2 : 12.2sccm, ion source power 50W, O 2 : 7.57sccm, temperature 200 degrees Celsius;
(7)剥离：在NMP中120℃加热30min，异丙醇清洗8min，氮气吹干。(7) Peeling: heating in NMP at 120° C. for 30 minutes, washing with isopropanol for 8 minutes, and drying with nitrogen.
第六步：采用匀胶、烘烤、光刻、显影、氧等离子清洗、磁控溅射等工艺步骤制备氧化铟锡源漏电极，具体包括：Step 6: Prepare indium tin oxide source-drain electrodes by using process steps such as coating, baking, photolithography, development, oxygen plasma cleaning, and magnetron sputtering, including:
(1)首先在第五步的基础上，旋涂HMDS作为粘附层，旋涂参数为4000rpm，30s，旋涂后95℃烘烤60s；(1) First, on the basis of the fifth step, spin-coat HMDS as the adhesion layer, the spin-coating parameters are 4000rpm, 30s, and bake at 95°C for 60s after spin-coating;
(2)旋涂光刻胶，首先旋涂LOR10A，旋涂参数为3000rpm，30s，旋涂后150℃烘烤120s；然后旋涂AZ5214E，旋涂参数为4000rpm，30s，旋涂后95℃烘烤90s；(2) Spin-coat photoresist, first spin-coat LOR10A, the spin-coating parameters are 3000rpm, 30s, and bake at 150°C for 120s after spin-coating; then spin-coat AZ5214E, spin-coating parameters are 4000rpm, 30s, and bake at 95°C after spin-coating Bake for 90s;
(3)曝光2.2s，使光刻胶图案化；(3) Exposure for 2.2s to pattern the photoresist;
(4)显影：显影液为2.38％TMAH，显影85s～90s，去离子水清洗干净，N 2吹干； (4) Development: The developer is 2.38% TMAH, develop for 85s-90s, rinse with deionized water, and blow dry with N2 ;
(5)氧等离子清洗：氩气和氧气的比例为4:1，30W，2min；(5) Oxygen plasma cleaning: the ratio of argon to oxygen is 4:1, 30W, 2min;
(6)磁控溅射50nm金属性ITO：RF 100W，Ar 1：34.8sccm，Ar 2：20sccm，无离子源，无O 2，常温； (6) Magnetron sputtering 50nm metallic ITO: RF 100W, Ar 1 : 34.8sccm, Ar 2 : 20sccm, no ion source, no O 2 , normal temperature;
(7)剥离：在NMP中120℃加热30min，异丙醇清洗8min，氮气吹干。(7) Peeling: heating in NMP at 120° C. for 30 minutes, washing with isopropanol for 8 minutes, and drying with nitrogen.

Claims (10)

  1. 一种基于氧化铟锡的全透明薄膜晶体管，包括衬底、缓冲层、栅电极、栅介质层、沟道层和源漏电极，其特征在于，所述栅电极和源漏电极的材料为金属性ITO，所述沟道层的材料为半导体性ITO。A fully transparent thin film transistor based on indium tin oxide, comprising a substrate, a buffer layer, a gate electrode, a gate dielectric layer, a channel layer, and a source-drain electrode, characterized in that the material of the gate electrode and the source-drain electrode is metal ITO, the material of the channel layer is semiconductor ITO.
  2. 如权利要求1所述的全透明薄膜晶体管，其特征在于，所述全透明薄膜晶体管由下至上依次设置衬底、缓冲层、金属性ITO栅电极、栅介质层、半导体性ITO沟道层及其两端的金属性ITO源漏电极。The fully transparent thin film transistor according to claim 1, wherein the fully transparent thin film transistor is provided with a substrate, a buffer layer, a metallic ITO gate electrode, a gate dielectric layer, a semiconductive ITO channel layer and Metallic ITO source and drain electrodes at both ends.
  3. 如权利要求1所述的全透明薄膜晶体管，其特征在于，所述衬底是透明的刚性衬底或柔性衬底。The fully transparent thin film transistor according to claim 1, wherein the substrate is a transparent rigid substrate or a flexible substrate.
  4. 如权利要求1所述的全透明薄膜晶体管，其特征在于，所述缓冲层为SiO 2或氮化硅，其厚度为20～40nm。 The fully transparent thin film transistor according to claim 1, wherein the buffer layer is SiO 2 or silicon nitride, and its thickness is 20-40nm.
  5. 如权利要求1所述的全透明薄膜晶体管，其特征在于，所述栅介质层为高κ介质材料，厚度为20～30nm。The fully transparent thin film transistor according to claim 1, wherein the gate dielectric layer is a high κ dielectric material with a thickness of 20-30 nm.
  6. 如权利要求1所述的全透明薄膜晶体管，其特征在于，所述金属性ITO栅电极的厚度为20～50nm，所述金属性ITO源漏电极的厚度为20～60nm；所述半导体性ITO沟道层的厚度为5～10nm。The fully transparent thin film transistor according to claim 1, wherein the thickness of the metallic ITO gate electrode is 20-50 nm, and the thickness of the metallic ITO source-drain electrode is 20-60 nm; the semiconductive ITO The thickness of the channel layer is 5-10 nm.
  7. 权利要求1～6任一所述的全透明薄膜晶体管的制备方法，包括以下步骤：The method for preparing a fully transparent thin film transistor according to any one of claims 1 to 6, comprising the following steps:
    1)清洗衬底，在衬底上生长缓冲层；1) cleaning the substrate, and growing a buffer layer on the substrate;
    2)在缓冲层上制备金属性ITO栅电极；2) preparing a metallic ITO gate electrode on the buffer layer;
    3)制备栅介质层覆盖金属性ITO栅电极；3) preparing a gate dielectric layer to cover the metallic ITO gate electrode;
    4)在栅介质层上制备半导体性ITO沟道层；4) preparing a semiconductive ITO channel layer on the gate dielectric layer;
    5)在沟道两端制备金属性ITO源漏电极。5) Prepare metallic ITO source and drain electrodes at both ends of the channel.
  8. 如权利要求7所述的制备方法，其特征在于，步骤2)首先在缓冲层上旋涂六甲基二硅氮烷作为粘附层，接着采用LOR10A/AZ5214E双层光刻胶工艺形成栅极图形，然后磁控溅射一定厚度的金属性ITO，最后剥离光刻胶形成金属性ITO栅电极；步骤5)采用与步骤2)相同的工艺制备金属性ITO源漏电极。The preparation method as claimed in claim 7, characterized in that, step 2) first spin-coat hexamethyldisilazane on the buffer layer as an adhesion layer, and then use the LOR10A/AZ5214E double-layer photoresist process to form the gate pattern, then magnetron sputtering a certain thickness of metallic ITO, and finally peel off the photoresist to form a metallic ITO gate electrode; step 5) use the same process as step 2) to prepare metallic ITO source and drain electrodes.
  9. 如权利要求7所述的制备方法，其特征在于，步骤4)首先在栅介质层上旋涂六甲基二硅氮烷作为粘附层，接着采用LOR10A/AZ5214E双层光刻胶工艺形成沟道图形，然后磁控溅射一定厚度的半导体性ITO，最后剥离光刻胶形成半导体性ITO沟道层。The preparation method according to claim 7, characterized in that, step 4) first spin-coat hexamethyldisilazane on the gate dielectric layer as an adhesion layer, and then use the LOR10A/AZ5214E double-layer photoresist process to form a trench track pattern, then magnetron sputtering a certain thickness of semiconducting ITO, and finally peeling off the photoresist to form a semiconducting ITO channel layer.
  10. 如权利要求8或9所述的制备方法，其特征在于，步骤2)和5)中磁控溅射制备金属性ITO的工艺参数为RF 100W，Ar 1：34.8sccm，Ar 2：20sccm，无离子源，无O 2，常温；步骤4)磁控溅射制备半导体性ITO的工艺参数为RF 100W，Ar 1：34.8sccm，Ar 2：12.2sccm，离子源功率50W，O 2：7.57sccm，温度200摄氏度。 The preparation method according to claim 8 or 9, characterized in that, the process parameters for preparing metallic ITO by magnetron sputtering in steps 2) and 5) are RF 100W, Ar 1 : 34.8sccm, Ar 2 : 20sccm, no Ion source, no O 2 , normal temperature; Step 4) The process parameters for preparing semiconducting ITO by magnetron sputtering are RF 100W, Ar 1 : 34.8 sccm, Ar 2 : 12.2 sccm, ion source power 50W, O 2 : 7.57 sccm, The temperature is 200 degrees Celsius.
PCT/CN2022/070635 2021-12-20 2022-01-07 Fully transparent thin-film transistor based on indium tin oxide, and preparation method therefor WO2023115653A1 (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101183667A (en) * 2007-12-11 2008-05-21 西安交通大学 Method of producing ZnO based transparent film transistor array
KR20090065269A (en) * 2007-12-17 2009-06-22 한국전자통신연구원 Transparent thin transistor with polymer passivation layer and method for manufacturing the same
CN101615582A (en) * 2009-06-25 2009-12-30 浙江大学 A kind of preparation method of transparent thin-film transistor of alloyed oxide
CN102544108A (en) * 2012-01-12 2012-07-04 北京大学 Preparation method of zinc oxide film transistor
CN103021871A (en) * 2012-12-25 2013-04-03 青岛盛嘉信息科技有限公司 Process for manufacturing thin film transistor
CN103943683A (en) * 2013-12-06 2014-07-23 山东大学（威海） Indium tin zinc oxide homogeneous thin film transistor and preparation method thereof

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101183667A (en) * 2007-12-11 2008-05-21 西安交通大学 Method of producing ZnO based transparent film transistor array
KR20090065269A (en) * 2007-12-17 2009-06-22 한국전자통신연구원 Transparent thin transistor with polymer passivation layer and method for manufacturing the same
CN101615582A (en) * 2009-06-25 2009-12-30 浙江大学 A kind of preparation method of transparent thin-film transistor of alloyed oxide
CN102544108A (en) * 2012-01-12 2012-07-04 北京大学 Preparation method of zinc oxide film transistor
CN103021871A (en) * 2012-12-25 2013-04-03 青岛盛嘉信息科技有限公司 Process for manufacturing thin film transistor
CN103943683A (en) * 2013-12-06 2014-07-23 山东大学（威海） Indium tin zinc oxide homogeneous thin film transistor and preparation method thereof

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