CN102544108A

CN102544108A - Preparation method of zinc oxide film transistor

Info

Publication number: CN102544108A
Application number: CN2012100083236A
Authority: CN
Inventors: 韩德栋; 蔡剑; 王漪; 王薇; 王亮亮; 任奕成; 张盛东; 刘晓彦; 康晋锋
Original assignee: Peking University
Current assignee: BOE Technology Group Co Ltd
Priority date: 2012-01-12
Filing date: 2012-01-12
Publication date: 2012-07-04
Anticipated expiration: 2032-01-12
Also published as: CN102544108B

Abstract

The invention discloses a preparation method of a zinc oxide film transistor, and the method comprises the following steps that: first, the contacted areas between a source and a drain as well as a ditch material are increased through a semi-conductor buffer layer, the contact resistance of the source and the drain is reduced, and then a stripping process is adopted to strip a ditch layer, a gate medium layer and a gate electrode layer which grow continuously. According to the preparation method of the zinc oxide film transistor, a manufacturing process is simplified, the contact resistance of a source end and a drain end is effectively reduced, the growth processes of the three key layers, i.e. the ditch layer, the grate medium layer and the gate electrode layer are totally not separated from a vacuum environment, the characteristics of devices are improved, and the efficiency and the finished product rate are optimized.

Description

A kind of preparation method of zinc oxide thin-film transistor

Technical field

The present invention relates to a kind of manufacturing approach of zinc oxide thin-film transistor, belong to the flat panel display field.

Background technology

At present, the OLED flat panel display has begun fast-ripenin.This year; Except that Sony representes researching and developing on a large scale and produce the OLED TV; The Korea S leading enterprise of electronics industry---Samsung and lg electronics also give out information November in this year simultaneously, will on meeting (CES) is look in the International CES at the beginning of next year, release 55 inches Organic Light Emitting Diodes (OLED) TV.Industry generally believes that this measure will be drawn back the prelude of OLED TV market competition in advance.

And aspect active driving OLED display floater, all obviously be superior to traditional amorphous silicon film transistor and polycrystalline SiTFT aspect each main performance as the thin-film transistor of active area with zinc oxide and doped semiconductor materials thereof: one, zinc oxide and doped semiconductor materials thin-film transistor thereof have high mobility to adapt to OLED display mode, many patterns such as jumbotron liquid crystal display pattern and 3D display mode fast; Two, zinc oxide and doped semiconductor materials thin-film transistor thereof are the amorphous materials, have the electrology characteristic of good unanimity; Three, zinc oxide and doped semiconductor materials thin-film transistor thereof are compatible with present flat panel display, can be suitable for big glass substrate (low temperature process); Four, zinc oxide and doped semiconductor materials thin-film transistor thereof are more stable than amorphous silicon film transistor and OTFT; Five, zinc oxide and doped semiconductor materials thin-film transistor thereof also have other advantages, such as when size reduces, there not being short-channel effect, also do not have similar and kink effect monocrystalline silicon.

At present, how to prepare focus and the difficult point that zinc oxide thin-film transistor is this area efficiently.

Summary of the invention

The object of the present invention is to provide a kind of preparation method of zinc oxide thin-film transistor, can improve the performance of zinc oxide thin-film transistor device effectively.

Zinc oxide thin-film transistor provided by the invention is formed on the glass substrate, comprises the semiconductor resilient coating; One source region and a drain region, semiconductor conducting channel district, a gate insulation dielectric layer; One gate electrode; Said semiconductor buffer layer is positioned on glass or the plastic, and said source-drain electrode is positioned on the semiconductor buffer layer and with channel region and overlaps mutually, and said semiconductor conductivity channel layer is positioned on semiconductor buffer layer and the fraction source-drain electrode; Said gate insulation dielectric layer is positioned on the semiconductor conductivity channel layer, and said gate electrode layer is positioned on the gate insulation dielectric layer.

Zinc oxide thin-film transistor preparation method provided by the invention may further comprise the steps:

1) growth layer of semiconductor resilient coating on glass substrate at first;

2) growth layer of transparent conductive film on semiconductor buffer layer, photoetching and etching form source-drain electrode then;

3) get rid of one deck photoresist, between source-drain electrode, comprise the part source-drain electrode the zone in no photoresist, all the other zones are covered by photoresist, then the development, by the photoresist region covered be not the future channel region;

4) semiconductor material layer of sputter growth one deck zinc oxide and doping thereof is as the semiconductor conductivity channel layer;

5) on semiconductor material layer, grow layer of silicon dioxide, silicon nitride or high dielectric constant insulating material dielectric layer or the combination of its lamination as gate dielectric layer;

6) on gate dielectric layer, grow the layer of transparent conductive film as gate electrode layer;

7) stripping technology is removed and is grown in this three layer laminate of semiconductor material layer, gate dielectric layer and gate electrode layer on the photoresist;

8) growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage;

9) growth layer of metal film, photoetching and etching form metal electrode and interconnection.

Said method, step 1) institute grown oxide semiconductor layer resilient coating adopts zinc oxide and doped semiconductor materials thereof to form.

The conductive film of described manufacture method, step 2) being grown can be formed by transparent conductive material ITO etc.

Described manufacture method, step 4) institute grown oxide semiconductor layer adopts zinc oxide and doped semiconductor materials thereof to form.

The gate insulation dielectric layer that described manufacture method, step 5) are grown is formed by aluminium oxide, silicon dioxide, silicon nitride or high dielectric constant insulating material.

Described manufacture method, the conductive film that step 6) is grown can be formed by transparent conductive material.

Beneficial effect of the present invention:

The present invention at first utilizes semiconductor buffer layer to increase the contact area of source-drain electrode and channel material, reduces source drain contact resistance, and the channel layer, gate dielectric layer and the gate electrode layer that adopt stripping technology to grow are continuously then peeled off together.The present invention has simplified manufacturing process, has effectively reduced source drain terminal contact resistance, and crucial this growth course of three layers of channel layer, gate dielectric layer and gate electrode layer does not break away from vacuum environment fully.The present invention has optimized device property, has improved efficient and rate of finished products.

Description of drawings

Fig. 1 is the cross-sectional view of the described zinc oxide thin-film transistor of the specific embodiment of the invention;

Fig. 2 shows for the plan structure of the described zinc oxide thin-film transistor of the specific embodiment of the invention;

Fig. 3 (a)～(f) shows the main technique step of a manufacture method of thin-film transistor of the present invention successively, wherein:

Fig. 3 (b) has illustrated the processing step that the island semiconductor resilient coating forms;

Fig. 3 (c) has illustrated the processing step that source-drain electrode forms;

Fig. 3 (d) has illustrated the processing step of whirl coating photoetching;

Fig. 3 (e) has illustrated the processing step of semiconductor conductivity channel layer, gate insulation dielectric layer and gate electrode layer growth;

Fig. 3 (f) has illustrated stripping technology.

Embodiment

Through instance the present invention is further specified below.

Zinc oxide thin-film transistor of the present invention is formed on the glass substrate 1, and is as depicted in figs. 1 and 2.This thin-film transistor comprises the semiconductor resilient coating, 2, one sources, drain electrode 3, semiconductor conductivity channel layer 4, one gate insulation dielectric layers 5, one gate electrodes 6.Said source-drain electrode 3 is positioned on the glass substrate 2, and said semiconductor conductivity channel layer 4 is positioned on source-drain electrode 3 and the glass substrate 1, and gate medium 5 is positioned on the said semiconductor conductivity channel layer 4, and said gate electrode electrode 6 is positioned on the gate medium 5.

One instantiation of the manufacture method of said thin-film transistor, may further comprise the steps to shown in Fig. 3 (f) by Fig. 3 (a):

Shown in Fig. 3 (a), substrate is selected transparent glass substrate 1 for use.

Shown in Fig. 3 (b), the semiconductor oxide zno buffer layer of magnetron sputtering growth one deck 50～100 nanometer thickness on glass substrate 1, photoetching and etching form the semiconductor buffer layer 2 of island then, and anneal (temperature is between 150 ℃-300 ℃) are handled again.

Shown in Fig. 3 (c), the transparent conductive film or the metal A l such as ITO of magnetron sputtering growth one deck 50～100 nanometer thickness on glass or plastic base 1, Cr, Mo, photoetching and etching form source-drain electrode 3 then.

Shown in Fig. 3 (d), photoetching development is protected by photoresist 7 except that channel region;

Shown in Fig. 3 (e), with the semiconductor oxide zinc thin layer 4 of rf magnetron sputtering deposit one deck 50～500 nanometer thickness; Gate dielectric layer 5 with rf magnetron sputtering deposit one deck 50～500 nanometer thickness; With the transparent conductive film or the metal A l such as ITO of rf magnetron sputtering deposit one deck 50～500 nanometer thickness, Cr, Mo gate electrode layer 6.

Shown in Fig. 3 (f), peel off the generation zinc oxide thin-film transistor.

According to standard technology growth one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage subsequently, regrowth one deck Al or transparent electrically-conductive film material, and photoetching and etching form electrode and interconnection.

It should be noted that at last; The purpose of publicizing and implementing mode is to help further to understand the present invention; But it will be appreciated by those skilled in the art that: in the spirit and scope that do not break away from the present invention and appended claim, various replacements and to revise all be possible.Therefore, the present invention should not be limited to the disclosed content of embodiment, and the scope that the present invention requires to protect is as the criterion with the scope that claims define.

Claims

1. the preparation method of a zinc oxide thin-film transistor may further comprise the steps:

1) growth layer of semiconductor resilient coating on glass substrate;

2) growth layer of transparent conductive film on semiconductor buffer layer, photoetching and etching form source, drain electrode then;

3) get rid of one deck photoresist, between source, drain electrode, and comprise no photoresist in the zone of part source-drain electrode, all the other zones are covered by photoresist, develop then, and be not the channel region in future by the photoresist region covered;

5) on semiconductor material layer, grow layer of silicon dioxide, silicon nitride, high dielectric constant insulating material dielectric layer or the combination of their lamination as gate dielectric layer;

7) stripping technology is removed and is grown in semiconductor material layer, gate dielectric layer and the gate electrode layer on the photoresist;

8) growth one deck passivation dielectric layer, photoetching, etching form the fairlead of grid, source and leakage;

2. the method for claim 1 is characterized in that, the semiconductor buffer layer that step 1) is grown is zinc oxide and doped semiconductor materials thereof.

3. the method for claim 1 is characterized in that step 2) and the step 7) conductive film of growing be transparent conductive material ITO or metal A l, Cr, Mo.