CN102544108B - Preparation method of zinc oxide film transistor - Google Patents

Abstract

The invention discloses a preparation method of a zinc oxide film transistor, and the method comprises the following steps that: first, the contacted areas between a source and a drain as well as a ditch material are increased through a semi-conductor buffer layer, the contact resistance of the source and the drain is reduced, and then a stripping process is adopted to strip a ditch layer, a gate medium layer and a gate electrode layer which grow continuously. According to the preparation method of the zinc oxide film transistor, a manufacturing process is simplified, the contact resistance of a source end and a drain end is effectively reduced, the growth processes of the three key layers, i.e. the ditch layer, the grate medium layer and the gate electrode layer are totally not separated from a vacuum environment, the characteristics of devices are improved, and the efficiency and the finished product rate are optimized.

Description

A kind of preparation method of zinc oxide thin-film transistor

Technical field

The present invention relates to a kind of manufacture method of zinc oxide thin-film transistor, belong to flat display field.

Background technology

At present, OLED flat panel display starts fast-ripenin.This year, to research and develop and produce except OLED TV on a large scale except Sony represents, the leading enterprise of Korean electronics industry---Samsung and lg electronics also give out information November in this year simultaneously, upper release 55 inches of Organic Light Emitting Diode (OLED) TVs of meeting (CES) of the International CES at the beginning of next year being look at.Industry generally believes, this measure will pull open the prelude of OLED TV market competition in advance.

And in active matrix driving OLED display panel, in each main performance, be all obviously better than traditional amorphous silicon film transistor and polycrystalline SiTFT as the thin-film transistor of active area using zinc oxide and doped semiconductor materials: one, zinc oxide and doped semiconductor materials thin-film transistor thereof have high mobility to adapt to OLED display mode, fast all multi-modes such as jumbotron liquid crystal display mode and 3D display mode; Two, zinc oxide and doped semiconductor materials thin-film transistor thereof are non-crystalline materials, have well consistent electrology characteristic; Three, zinc oxide and doped semiconductor materials thin-film transistor thereof are compatible with present flat panel display, can be suitable for large glass substrate (low temperature process); Four, zinc oxide and doped semiconductor materials thin-film transistor thereof than amorphous silicon film transistor and OTFT more stable; Five, zinc oxide and doped semiconductor materials thin-film transistor thereof also have other advantages, such as do not have short-channel effect when size reduces, and also do not have kink effect that is similar and monocrystalline silicon.

At present, the focus that zinc oxide thin-film transistor is this area and difficult point how is prepared efficiently.

Summary of the invention

The object of the present invention is to provide a kind of preparation method of zinc oxide thin-film transistor, effectively can improve the performance of zinc oxide thin-film transistor device.

Zinc oxide thin-film transistor provided by the invention, be formed on glass substrate, comprise semiconductor resilient coating, one source region and a drain region, semiconductor conducting channel district, one gate insulation dielectric layer, one gate electrode, described semiconductor buffer layer is positioned on glass or plastic, described source-drain electrode to be positioned on semiconductor buffer layer and to overlap mutually with channel region, described semiconductor conducting channel layer is positioned on semiconductor buffer layer and fraction source-drain electrode, described gate insulation dielectric layer is positioned on semiconductor conducting channel layer, described gate electrode layer is positioned on gate insulation dielectric layer.

Zinc oxide thin-film transistor preparation method provided by the invention comprises the following steps:

1) layer of semiconductor resilient coating is grown first on a glass substrate;

2) on semiconductor buffer layer, grow layer of transparent conductive film, then photoetching and etching form source-drain electrode;

3) get rid of one deck photoresist, without photoresist in the region comprising part source-drain electrode between source-drain electrode, all the other regions are covered by photoresist, then develop, and region not covered by photoresist is following channel region;

4) semiconductor material layer of sputtering growth one deck zinc oxide and doping thereof is as semiconductor conducting channel layer;

5) on semiconductor material layer, layer of silicon dioxide, silicon nitride or high dielectric constant insulating material dielectric layer or its stack combinations is grown as gate dielectric layer;

6) on gate dielectric layer, layer of transparent conductive film is grown as gate electrode layer;

7) stripping technology removes growth this three layer laminate of semiconductor material layer, gate dielectric layer and gate electrode layer on photoresist;

8) grow one deck passivation dielectric layer, photoetching and etching form the fairlead of grid, source and leakage;

9) grow layer of metal film, photoetching and etching form metal electrode and interconnection.

Said method, step 1) the oxide semiconductor layer resilient coating that grows, adopt zinc oxide and doped semiconductor materials thereof to be formed.

Described manufacture method, step 2) conductive film that grows, can be formed by transparent conductive material ITO etc.

Described manufacture method, step 4) oxide semiconductor layer that grows, adopt zinc oxide and doped semiconductor materials thereof to be formed.

Described manufacture method, step 5) the gate insulation dielectric layer that grows, formed by aluminium oxide, silicon dioxide, silicon nitride or high dielectric constant insulating material.

Described manufacture method, step 6) conductive film that grows, can be formed by transparent conductive material.

Beneficial effect of the present invention:

First the present invention utilizes semiconductor buffer layer to increase the contact area of source-drain electrode and channel material, reduces source-drain contact resistance, then adopts stripping technology the channel layer grown continuously, gate dielectric layer to be peeled off together with gate electrode layer.This invention simplifies manufacturing process, effectively reduce source and drain end in contact resistance, and this growth course of three layers of the channel layer of key, gate dielectric layer and gate electrode layer does not depart from vacuum environment completely.Present invention optimizes device property, improve efficiency and rate of finished products.

Accompanying drawing explanation

The cross-sectional view of the zinc oxide thin-film transistor of Fig. 1 described by the specific embodiment of the invention;

The plan structure of the zinc oxide thin-film transistor of Fig. 2 described by the specific embodiment of the invention is shown;

Fig. 3 (a) ~ (f) sequentially show the main technological steps of a thin-film transistor of the present invention manufacture method, wherein:

Fig. 3 (b) illustrates the processing step that island semiconductor resilient coating is formed;

Fig. 3 (c) illustrates the processing step that source-drain electrode is formed;

Fig. 3 (d) illustrates the processing step of whirl coating photoetching;

Fig. 3 (e) illustrates the processing step of semiconductor conducting channel layer, gate insulation dielectric layer and gate electrode layer growth;

Fig. 3 (f) illustrates stripping technology.

Embodiment

Below by example, the present invention will be further described.

Zinc oxide thin-film transistor of the present invention is formed in glass substrate 1, as depicted in figs. 1 and 2.This thin-film transistor comprises semiconductor resilient coating, 2, one source, drain electrode 3, semiconductor conductivity channel layer 4, gate insulation dielectric layer 5, gate electrode 6.Described source-drain electrode 3 is positioned on glass substrate 2, and described semiconductor conducting channel layer 4 is positioned on source-drain electrode 3 and glass substrate 1, and gate medium 5 is positioned on described semiconductor conducting channel layer 4, and described gate electrode electrode 6 is positioned on gate medium 5.

One instantiation of the manufacture method of described thin-film transistor, by shown in Fig. 3 (a) to Fig. 3 (f), comprises the following steps:

As shown in Fig. 3 (a), substrate selects transparent glass substrate 1.

As shown in Fig. 3 (b), the semiconductor oxide zno buffer layer of Grown by Magnetron Sputtering one deck 50 ~ 100 nanometer thickness on glass substrate 1, then photoetching and etching form the semiconductor buffer layer 2 of island, then carry out (temperature is between 150 DEG C-300 DEG C) process of annealing.

As shown in Fig. 3 (c), transparent conductive film or the metal A l such as ITO of Grown by Magnetron Sputtering one deck 50 ~ 100 nanometer thickness on glass or plastic base 1, Cr, Mo, then photoetching and etching form source-drain electrode 3.

As shown in Fig. 3 (d), photoetching development, except channel region protect by photoresist 7;

As shown in Fig. 3 (e), with the semiconductor oxide zinc thin layer 4 of rf magnetron sputtering deposit one deck 50 ~ 500 nanometer thickness; With the gate dielectric layer 5 of rf magnetron sputtering deposit one deck 50 ~ 500 nanometer thickness; With transparent conductive film or metal A l such as the ITO of rf magnetron sputtering deposit one deck 50 ~ 500 nanometer thickness, Cr, Mo gate electrode layer 6.

As shown in Fig. 3 (f), peel off and generate zinc oxide thin-film transistor.

Grow one deck passivation dielectric layer according to standard technology subsequently, photoetching and etching form the fairlead of grid, source and leakage, regrowth one deck Al or transparent conductive film material, and photoetching and etching form electrode and interconnection.

It is finally noted that, the object publicizing and implementing mode is to help to understand the present invention further, but it will be appreciated by those skilled in the art that: without departing from the spirit and scope of the invention and the appended claims, various substitutions and modifications are all possible.Therefore, the present invention should not be limited to the content disclosed in embodiment, and the scope that the scope of protection of present invention defines with claims is as the criterion.

Claims (1)

1. a preparation method for zinc oxide thin-film transistor, comprises the following steps:

1) grow layer of semiconductor resilient coating on a glass substrate, described semiconductor buffer layer is zinc oxide and doped semiconductor materials thereof;

2) on semiconductor buffer layer, one deck ITO transparent conductive film or Al, Cr, Mo conductive film is grown, then photoetching and etching formation source, drain electrode;

3) get rid of one deck photoresist, between source, drain electrode, and without photoresist in the region comprising part source-drain electrode, all the other regions are covered by photoresist, then develop, and region not covered by photoresist is following channel region;

4) semiconductor material layer of sputtering growth one deck zinc oxide and doping thereof is as semiconductor conducting channel layer;

5) on semiconductor material layer, layer of silicon dioxide, silicon nitride layer or their stack combinations is grown as gate dielectric layer;

6) on gate dielectric layer, one deck ITO transparent conductive film or Al, Cr, Mo conductive film is grown as gate electrode layer;

7) stripping technology removes semiconductor material layer, gate dielectric layer and the gate electrode layer of growth on photoresist;

8) grow one deck passivation dielectric layer, photoetching, etching form the fairlead of grid, source and leakage;

9) grow layer of metal film, photoetching and etching form metal electrode and interconnection.