WO2023097772A1 - 显示面板的制作方法及显示面板 - Google Patents

显示面板的制作方法及显示面板 Download PDF

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Publication number
WO2023097772A1
WO2023097772A1 PCT/CN2021/137894 CN2021137894W WO2023097772A1 WO 2023097772 A1 WO2023097772 A1 WO 2023097772A1 CN 2021137894 W CN2021137894 W CN 2021137894W WO 2023097772 A1 WO2023097772 A1 WO 2023097772A1
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Prior art keywords
layer
auxiliary electrode
hole
electrode layer
anode
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PCT/CN2021/137894
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English (en)
French (fr)
Inventor
覃事建
张磊
Original Assignee
惠州华星光电显示有限公司
深圳市华星光电半导体显示技术有限公司
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Application filed by 惠州华星光电显示有限公司, 深圳市华星光电半导体显示技术有限公司 filed Critical 惠州华星光电显示有限公司
Priority to US17/622,823 priority Critical patent/US20240032332A1/en
Publication of WO2023097772A1 publication Critical patent/WO2023097772A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8052—Cathodes
    • H10K59/80522—Cathodes combined with auxiliary electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/81—Anodes
    • H10K50/814—Anodes combined with auxiliary electrodes, e.g. ITO layer combined with metal lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/87—Passivation; Containers; Encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass

Definitions

  • the invention relates to the field of display technology, in particular to a method for manufacturing a display panel and the display panel.
  • the transparent cathode of the self-emitting organic light-emitting diode display (Organic Light-Emitting Diode, OLED) is thinner due to the requirement of light transmission, resulting in a large square resistance and a panel current voltage drop (IR Drop) is serious, resulting in obvious brightness unevenness of the display panel, which seriously affects the display effect of the OLED display device.
  • OLED Organic Light-Emitting Diode
  • the design of large-size OLED panels generally uses the method of introducing backplane-assisted cathodes, mainly through the formation of under cut (undercut structure) connects the cathode to reduce IR drop, and in the existing OLED display panel manufacturing process, the support layer used as the cathode will recede during the formation of the under cut, resulting in a decrease in the support effect of the support layer, and there is a risk of collapse.
  • under cut undercut structure
  • the embodiment of the present application provides a method for manufacturing a display panel and a display panel to solve the problem of existing under There is a risk of cathode collapse in the cut process.
  • An embodiment of the present application provides a method for manufacturing a display panel, including:
  • An anode layer is formed on the surface of the planarization layer, the anode layer is electrically connected to the source through a first contact hole, and the anode layer is deposited on the surface of the auxiliary electrode layer through a second contact hole;
  • the step of removing the remaining anode layer includes retaining the anode layer deposited on the inner wall of the second contact hole.
  • the second contact hole includes a groove formed on the surface of the planarization layer and a first through hole formed on the bottom surface of the groove and communicated with the undercut cavity, the groove
  • the inner diameter of the inner diameter gradually decreases from the end away from the auxiliary electrode layer to the end close to the auxiliary electrode layer, the anode layer is deposited on the inner wall of the groove, and the inner diameter of the second opening on the anode layer is greater than or equal to the Describe the inner diameter of the first through hole.
  • the orthographic area of the first through hole on the surface of the auxiliary electrode layer is smaller than the orthographic area of the undercut cavity on the surface of the auxiliary electrode layer.
  • the step of sequentially forming a thin film transistor layer, an auxiliary electrode layer, a passivation layer and a planarization layer on the base substrate further includes: forming a second supporting layer on the surface of the passivation layer; The planarization layer covers the second support layer, and the second support layer is located above the auxiliary electrode layer; the second contact hole penetrates the planarization layer, the second support layer and the passivation layer.
  • the second contact hole includes a first through hole formed in the planarization layer and a second through hole formed in the second supporting layer and communicated with the first through hole, the first The inner diameter of a through hole gradually decreases from the end away from the auxiliary electrode layer to the end close to the auxiliary electrode layer, and the inner diameter of the second through hole is smaller than the inner diameter of the first through hole near the auxiliary electrode layer.
  • the orthographic area of the second through hole on the surface of the auxiliary electrode layer is smaller than the orthographic area of the undercut cavity on the surface of the auxiliary electrode layer.
  • the second support layer located outside the second through hole forms a cover for part of the undercut cavity.
  • the step of removing the remaining anode layer it also includes:
  • An organic light-emitting layer is formed by evaporation on the surface of the pixel definition layer, the organic light-emitting layer is deposited on the surface of the anode through the first via hole, and the organic light-emitting layer passes through the second via hole and the second contact hole deposited on the surface of the auxiliary electrode layer;
  • a cathode is formed by vapor deposition on the surface of the organic light-emitting layer, and the cathode overlaps with the auxiliary electrode layer through the second via hole and the second contact hole.
  • the embodiment of the present application also provides a display panel, including: a base substrate; a thin film transistor layer disposed on the surface of the base substrate; an auxiliary electrode layer disposed on one side of the surface of the thin film transistor; a passivation layer disposed on the surface of the thin film transistor On the surface of the thin film transistor layer, an undercut cavity is formed on the surface of the passivation layer corresponding to the auxiliary electrode layer, and the undercut cavity exposes at least part of the auxiliary electrode layer; a planarization layer is provided On the surface of the passivation layer, a groove is formed on the surface of the planarization layer corresponding to the auxiliary electrode layer, and a first through hole communicating with the undercut cavity is formed on the bottom surface of the groove; The first support layer is arranged on the inner wall of the groove, and the first support layer at least covers the inner bottom surface of the groove outside the first through hole; the anode is arranged on the surface of the planarization layer, and the anode is arranged on the surface of the planarization
  • the anode is electrically connected to the source of the thin film transistor layer; the pixel definition layer is arranged on the surface of the planarization layer, and the surface of the pixel definition layer is provided with a first via hole exposing at least part of the anode, and the pixel definition layer A second via hole communicating with the groove is opened on the surface of the layer; an organic light-emitting layer is arranged on the surface of the pixel definition layer, the organic light-emitting layer is electrically connected to the anode through the first via hole, and the organic light-emitting layer
  • the layer extends to the inside of the undercut cavity through the second via hole, the groove and the first through hole and covers part of the surface of the auxiliary electrode layer; the cathode is arranged on the surface of the organic light-emitting layer, and the cathode passes through The second via hole, the groove and the first via hole extend into the undercut cavity and are electrically connected to the auxiliary electrode layer.
  • the embodiment of the present application also provides a display panel, including: a base substrate; a thin film transistor layer disposed on the surface of the base substrate; an auxiliary electrode layer disposed on one side of the surface of the thin film transistor; a passivation layer disposed on the surface of the thin film transistor On the surface of the thin film transistor layer, an undercut cavity is formed on the surface of the passivation layer corresponding to the auxiliary electrode layer, and the undercut cavity exposes at least part of the auxiliary electrode layer; the second supporting layer, It is arranged on the surface of the passivation layer corresponding to the undercut cavity, and the surface of the second supporting layer is provided with a second through hole exposing part of the undercut cavity; the planarization layer is arranged on the On the surface of the passivation layer, a groove is provided on the surface of the planarization layer corresponding to the auxiliary electrode layer, and the bottom surface of the groove is provided with a first through hole communicating with the second through hole; the anode is provided with On the surface of the planarization layer
  • the anode is electrically connected, and the organic light-emitting layer extends to the inside of the undercut cavity through the second via hole, the groove, the first through hole and the second through hole and covers part of the The surface of the auxiliary electrode layer; the cathode is arranged on the surface of the organic light-emitting layer, and the cathode extends to the The undercut cavity is electrically connected to the auxiliary electrode layer.
  • the beneficial effect of the present application is: compared with the under cut structure formed by two processes of photolithography, humidification and etching in the existing method, the manufacturing method of the display panel provided by the present invention can form the under cut structure on the passivation layer by one etching process.
  • the cut structure saves production capacity, and forms a double-layer support for the organic light-emitting layer and the cathode through the cooperation of the planarization layer and the anode layer, which enhances the support strength for the cathode and the organic light-emitting layer and avoids the risk of collapse.
  • FIG. 1 is a schematic structural view of a display panel according to an exemplary embodiment of the present invention
  • FIG. 2 is a flowchart of a method for manufacturing a display panel according to an exemplary embodiment of the present invention
  • 3a to 3j are schematic flow charts of a method for manufacturing a display panel according to an exemplary embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a display panel according to another exemplary embodiment of the present invention.
  • 5a to 5i are schematic flowcharts of a manufacturing method of a display panel according to another exemplary embodiment of the present invention.
  • the fabrication method of the present invention can form the under cut structure on the passivation layer by one etching process.
  • the cut structure saves production capacity, and forms a double-layer support for the organic light-emitting layer and the cathode through the cooperation of the planarization layer and the anode layer, which enhances the support strength for the cathode and the organic light-emitting layer and avoids the risk of collapse.
  • the display panel can be applied to OLED large-size panels, and the OLED large-size panels include mobile phones, tablet computers, TV sets, monitors, notebook computers, and the like.
  • the display panel 100 provided by the present invention includes a base substrate 110 , a thin film transistor layer 120 formed on the base substrate 110 , a passivation layer formed on the thin film transistor layer 120 layer 130, a planarization layer 140 formed on the passivation layer 130, a pixel definition layer 150 formed on the planarization layer 140, and a light-emitting functional layer 160 formed on the pixel definition layer 150, the light-emitting functional layer 160 includes An anode 161 , an organic light emitting layer 162 and a cathode 163 are stacked.
  • the display panel 100 includes an undercut region 100a, a drive region 100b, a capacitance region 100c and a bonding region 100d arranged at intervals.
  • the thin film transistor layer 120 includes a light-shielding layer 121 and a first electrode plate 122 disposed on the base substrate 110 in the same layer, the light-shielding layer 121 corresponds to the driving region 100b, and the first electrode plate 122 corresponds to the capacitor area 100c, the base substrate 110 is provided with a buffer layer 111, the buffer layer 111 covers the light shielding layer 121 and the first electrode plate 122, the light shielding layer 121 is a metal layer, and the light shielding layer 121 and the first electrode plate 122 form the same layer of the first electrode plate 122.
  • a metal layer M1; the surface of the buffer layer 111 above the light shielding layer 121 is provided with a semiconductor layer 123, the surface of the semiconductor layer 123 is stacked with a gate insulating layer 124 and a gate 125, and the buffer layer above the first electrode plate 122
  • the surface of 111 is provided with a second electrode plate 126, and the first electrode plate 122 and the second electrode plate 126 form a capacitive structure.
  • An interlayer insulating layer 112 is formed on the buffer layer 111, and the surface of the interlayer insulating layer 112 is provided with a drain 127, a source 128, and a source-drain 129, and the drain 127 and the source 128 correspond to the driving region 100b.
  • the source and drain electrodes 129 correspond to the capacitor region 100c
  • the drain electrode 127 and the source electrode 128 are electrically connected to the semiconductor layer 123 respectively
  • the source electrode 128 is electrically connected to the light shielding layer 121 .
  • An auxiliary electrode layer 113 is disposed on the interlayer insulating layer 112 corresponding to the undercut region 100a, a bonding electrode layer 114 is disposed on the interlayer insulating layer 112 corresponding to the bonding region 100d, the auxiliary electrode layer 113, the drain electrode 127, the source electrode 128 , the source and drain electrodes 129 and the bonding electrode layer 114 are arranged in the same layer to form the second metal layer M2 .
  • the passivation layer 130 covers the auxiliary electrode layer 113, the drain electrode 127, the source electrode 128, the source drain electrode 129 and the bonding electrode layer 114, and an undercut cavity 131 is formed on the surface of the passivation layer 130 corresponding to the auxiliary electrode layer 113, The undercut cavity 131 exposes at least part of the auxiliary electrode layer 113 .
  • the surface of the passivation layer 130 corresponding to the bonding region 100d is provided with a bonding opening 132 exposing at least part of the bonding electrode layer 114, and the surface 130 of the passivation layer corresponding to the bonding opening 132 is provided with a bonding metal layer 133, the bonding metal layer 133 is electrically connected to the bonding electrode layer 114 through the bonding opening 132 .
  • the bonding metal layer 133 forms the third metal layer M3.
  • the planarization layer 140 is arranged on the surface of the passivation layer 130 corresponding to the undercut region 100a, the drive region 100b and the capacitance region 100c, the planarization layer 140 does not cover the surface of the passivation layer 130 corresponding to the bonding region 100d, the planarization layer 140 A first contact hole 141 exposing at least part of the source electrode 128 is opened on the surface, a groove 142 is opened on the surface of the planarization layer 140 corresponding to the auxiliary electrode layer 113, and a groove 142 is opened on the bottom surface of the groove 142 to penetrate the planarization layer 140 and connect with the undercut.
  • the cavity 131 communicates with the first through hole 143, the inner diameter of the groove 142 gradually decreases from the end away from the auxiliary electrode layer 113 to the end close to the auxiliary electrode layer 113, forming an inverted trapezoidal cross-sectional structure of the groove 142,
  • the passivation layer 130 located outside the first through hole 143 forms an annular protrusion 1431, and the protrusion 1431 forms a partial shield for the undercut cavity 131, so that the orthographic area of the first through hole 143 on the surface of the auxiliary electrode layer 113 is smaller than the orthographic projection area of the undercut cavity 131 on the surface of the auxiliary electrode layer 113 .
  • the first supporting layer 1432 is disposed on the upper surfaces of the two protrusions 1431 , that is, the first supporting layer 1432 at least covers the inner bottom surface of the groove 142 .
  • the first supporting layer 1432 in addition to covering the protrusion 1431 , also covers the inner surface of the side wall of the groove 142 adjacent to the protrusion 1431 .
  • the anode 161 is disposed on the surface of the planarization layer 140 corresponding to the first contact hole 141, the anode 161 is electrically connected to the source electrode 128 through the first contact hole 141, and the first supporting layer 1432 is made of the same material as the anode 161, both of which are IZO ( Indium zinc oxide) and APC alloy (silver-palladium-copper alloy) deposition structure, ie, IZO/APC/IZO.
  • IZO Indium zinc oxide
  • APC alloy silver-palladium-copper alloy
  • the pixel definition layer 150 is disposed on the surface of the planarization layer 140, the surface of the pixel definition layer 150 is provided with a first via hole 151 exposing at least part of the anode 161, and the surface of the pixel definition layer 150 is provided with a second via hole 152 communicating with the groove 142,
  • the organic light emitting layer 162 is disposed on the surface of the pixel definition layer 150, the organic light emitting layer 162 is electrically connected to the anode 161 through the first via hole 151, and the organic light emitting layer 162 passes through the second via hole 152, the groove 142 and the first through hole 143 Extend to the inside of the undercut cavity 131 and cover part of the surface of the auxiliary electrode layer 113 .
  • the cathode 163 is disposed on the surface of the organic light emitting layer 162, and the cathode 163 extends into the undercut cavity 131 through the second via hole 152, the groove 142 and the first through hole 143 and is connected to the auxiliary electrode layer 113 not covered by the organic light emitting layer 162. electrical connection.
  • the holes in the anode 161 and the electrons in the cathode 163 meet and combine in the organic light-emitting layer 162 under the conduction of current and voltage, thereby exciting the light-emitting material in the organic light-emitting layer 162 to emit light.
  • the groove 142 on the planarization layer 140 is used to cooperate with the first support layer 1432 to form a double-layer support structure for the organic light emitting layer 162 and the cathode 163, so as to ensure the support strength and strength of the organic light emitting layer 162 and the cathode 163 support stability and avoid the risk of collapse, and the protrusion 1431 located outside the first through hole 143 forms a partial shield for the undercut cavity 131, so that when the organic light emitting layer 162 is formed by evaporation, the organic light emitting layer 162 only Part of the auxiliary electrode layer 113 can be covered, and when the cathode 163 is formed by vapor deposition, the cathode 163 can be electrically connected to the auxiliary electrode layer 113 not covered by the organic light emitting layer 162 .
  • the manufacturing method of the display panel 100 described in this embodiment includes the following steps:
  • a thin film transistor layer 120, an auxiliary electrode layer 113, a passivation layer 130, and a planarization layer 140 are sequentially formed on the base substrate 110;
  • an anode layer 161a is formed on the surface of the planarization layer 140, the anode layer 161a is electrically connected to the source electrode 128 through the first contact hole 141, and the anode layer 161a is electrically connected to the source electrode 128 through the second contact hole 141a deposited on the surface of the auxiliary electrode layer 113;
  • a photoresist layer 161b is formed on the surface of the anode layer 161a, and a first opening 161c corresponding to the second contact hole 141a is formed on the surface of the photoresist layer 161b;
  • the anode layer 161a deposited on the inner wall of the second contact hole 141a is retained.
  • the second contact hole 141a includes a groove 142 and a first through hole 143 opened on the bottom of the groove 142, and the anode layer 161a deposited on the inner wall of the second contact hole 141a is the first support layer 1432 as mentioned above.
  • step S6 the photoresist layer 161b covers the anode layer 161a and the bonding metal layer 133, and the first opening 161c is formed on the surface of the photoresist layer 161b using a photolithography (PH) process.
  • the photomask used in the photolithography process the mask area corresponding to the first through hole 143 is a fully transparent area, the mask area corresponding to the anode 161 is a completely black area, and the mask area corresponding to other areas of the photoresist layer 161b is a semi-transparent area area.
  • wet etching is used to remove the anode layer 161a deposited on the surface of the auxiliary electrode layer 113 to form the second opening 161d.
  • step S8 wet etching is used to remove part of the passivation layer 130 to form the undercut cavity 131, and the etching solution is hydrofluoric acid.
  • step S9 the photoresist layer 161b is removed by dry ashing (DRY-ASH), but the photoresist layer 161b corresponding to the undercut region 100a and the photoresist layer 161b corresponding to the anode 161 remain.
  • step S10 the anode 161 is formed by wet etching and the remaining photoresist layer 161b in step S9 is removed.
  • the manufacturing method of the display panel 100 also includes:
  • an organic light-emitting layer 162 is formed by evaporation on the surface of the pixel definition layer 150, the organic light-emitting layer 162 is deposited on the surface of the anode 161 through the first via hole 151, and the organic light-emitting layer 162 passes through the first via hole 151.
  • the second via hole 152 and the second contact hole 141a are deposited on the surface of the auxiliary electrode layer 113;
  • a cathode 163 is formed by evaporation on the surface of the organic light-emitting layer 162, and the cathode 163 overlaps with the auxiliary electrode layer 113 through the second via hole 152 and the second contact hole 141a.
  • the vapor deposition angle for forming the organic light emitting layer 162 is different from that for forming the cathode 163 , for example, the vapor deposition angle for the organic light emitting layer 162 is 0-45°, and the vapor deposition angle for the cathode 163 is -45° to 0°. Due to the different evaporation angles, combined with the blocking of the auxiliary electrode layer 113 by the protrusions 1431 and the first supporting layer 1432, the organic light-emitting layer 162 can only cover part of the auxiliary electrode layer 113, and the cathode 163 can cover the organic light-emitting layer 162. At the same time, part of the auxiliary electrode layer 113 can be covered to realize the electrical connection between the cathode 163 and the auxiliary electrode layer 113 and reduce the voltage drop.
  • the undercut cavity 131 exposing at least part of the auxiliary electrode layer 113 can be formed on the passivation layer 130 through one etching process, which is different from the existing two processes of photolithography and etching. Compared with the process of forming an undercut cavity, it saves the production capacity of photolithography and avoids waste.
  • the display panel 100 ′ includes a base substrate 110 , a thin film transistor layer 120 formed on the base substrate 110 , a passivation layer 130 formed on the thin film transistor layer 120 , formed A planarization layer 140 on the passivation layer 130, a pixel definition layer 150 formed on the planarization layer 140, and a light-emitting functional layer 160 formed on the pixel definition layer 150, the light-emitting functional layer 160 includes an anode 161 stacked , an organic light emitting layer 162 and a cathode 163 .
  • the display panel 100' includes an undercut region 100a, a drive region 100b, a capacitor region 100c, and a bonding region 100d arranged at intervals, and a second support layer is provided on the surface of the passivation layer 130 corresponding to the undercut region 100a.
  • the second support layer 170 is a metal layer
  • the second support layer 170 and the bonding metal layer 133 are arranged on the same layer to form a third metal layer M3 .
  • a second through hole 171 corresponding to the first through hole 143 is opened on the surface of the second supporting layer 170 , and the inner diameter of the first through hole 143 is the same as that of the second through hole 171 .
  • the protrusions 1431 are disposed on the second support layer 170 located on both sides of the second through hole 171, and the grooves 142 on the planarization layer 140 cooperate with the second support layer 170 to form a double-layer support for the organic light-emitting layer 162 and the cathode 163.
  • the structure ensures the support strength and support stability of the organic light-emitting layer 162 and the cathode 163, avoiding the risk of collapse, and the second support layer 170 located outside the second through hole 171 forms a partial shield for the undercut cavity 131, Therefore, when the organic light-emitting layer 162 is formed by vapor deposition, the organic light-emitting layer 162 can only cover part of the auxiliary electrode layer 113; connect.
  • the preparation method of the display panel 100' includes the following steps:
  • an anode layer 161a is formed on the surface of the planarization layer 140, the anode layer 161a is electrically connected to the source electrode 128 through the first contact hole 141, and the anode layer 161a is electrically connected through the second contact hole 141a' is deposited on the surface of the auxiliary electrode layer 113;
  • the second contact hole 141a' in this embodiment includes a groove 142, a first through hole 143 opened on the bottom of the groove 142, and a second through hole 171 opened on the second supporting layer 170.
  • step S6' the photoresist layer 161b covers the anode layer 161a and the bonding metal layer 133, and the first opening 161c is formed on the surface of the photoresist layer 161b by using a photolithography (PH) process.
  • the mask area corresponding to the first through hole 143 is a fully transparent area
  • the mask area corresponding to the anode 161 is a completely black area
  • the mask area corresponding to other areas of the photoresist layer 161b is a semi-transparent area. light area.
  • step S9 the photoresist layer 161b is removed by dry ashing (DRY-ASH), but the photoresist layer 161b corresponding to the anode 161 remains.
  • step S10 the anode 161 is formed by wet etching and the remaining photoresist layer 161b in step S9 is removed.
  • the manufacturing method of the display panel 100' also includes:
  • an organic light-emitting layer 162 is formed by vapor deposition on the surface of the pixel definition layer 150, the organic light-emitting layer 162 is deposited on the surface of the anode 161 through the first via hole 151, and the organic light-emitting layer 162 passes through the first via hole 151.
  • the second via hole 152 and the second contact hole 141a are deposited on the surface of the auxiliary electrode layer 113;
  • a cathode 163 is formed by vapor deposition on the surface of the organic light-emitting layer 162, and the cathode 163 overlaps with the auxiliary electrode layer 113 through the second via hole 152 and the second contact hole 141a.

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Abstract

一种显示面板的制作方法及显示面板（100），与现有方法中通过光刻加湿蚀刻两道工艺形成under cut结构相比，制作方法通过一道蚀刻工艺即可在钝化层上形成under cut结构，节约产能，并且通过平坦化层（140）和阳极层（161a）的配合形成对有机发光层（162）和阴极（163）的双层支撑，增强对阴极（163）和有机发光层（162）的支撑强度，避免塌陷风险。

Description

显示面板的制作方法及显示面板 技术领域
本发明涉及显示技术领域，特别涉及一种显示面板的制作方法及显示面板。
 背景技术
自主发光的有机发光二极管显示器(Organic Light-Emitting Diode，OLED)的透明阴极因为透光需求，制作厚度较薄，造成方阻较大，面板电流压降（IR Drop）严重，导致显示面板有明显的亮度不均匀现象，严重影响了OLED显示装置的显示效果。目前OLED大尺寸面板设计一般使用背板辅助阴极引入的方法，主要是通过形成under cut（底切结构）连接阴极降低IR drop，而现有OLED显示面板制程中，作为阴极的支撑层在under cut形成过程中会出现后退，导致支撑层的支撑效果下降，存在塌陷风险。
 技术问题
本申请实施例提供一种显示面板的制作方法及显示面板，以解决现有under cut制程存在阴极塌陷风险的问题。
 技术解决方案
本申请实施例提供了一种显示面板的制作方法，包括：
提供衬底基板；
在所述衬底基板上依次形成薄膜晶体管层、辅助电极层、钝化层和平坦化层；
在所述平坦化层表面形成贯通所述平坦化层和所述钝化层以暴露至少部分所述薄膜晶体管层的源极的第一接触孔；
在所述平坦化层表面形成贯通所述平坦化层和所述钝化层以暴露部分所述辅助电极层的第二接触孔；
在所述平坦化层表面形成阳极层，所述阳极层通过第一接触孔与所述源极电连接，所述阳极层通过第二接触孔沉积至所述辅助电极层表面；
在所述阳极层表面形成光阻层，在所述光阻层表面形成与所述第二接触孔相对应的第一开孔；
蚀刻去除沉积在所述辅助电极层表面的阳极层以在所述阳极层表面形成与所述第一开孔相对应的第二开孔；
蚀刻覆盖所述辅助电极层的至少部分钝化层以形成暴露至少部分所述辅助电极层的底切腔体；
去除所述光阻层；
蚀刻所述阳极层形成阳极；
去除剩余阳极层。
可选的，所述去除剩余阳极层的步骤包括保留沉积于所述第二接触孔内壁的阳极层。
可选的，所述第二接触孔包括形成于所述平坦化层表面的凹槽以及形成于所述凹槽底面的、与所述底切腔体连通的第一通孔，所述凹槽的内径由远离所述辅助电极层一端向靠近所述辅助电极层一端逐渐减小，所述阳极层沉积于所述凹槽内壁，所述阳极层上的第二开孔的内径大于或者等于所述第一通孔的内径。
可选的，所述第一通孔在所述辅助电极层表面的正投影面积小于所述底切腔体在所述辅助电极层表面的正投影面积。
可选的，所述在所述衬底基板上依次形成薄膜晶体管层、辅助电极层、钝化层和平坦化层的步骤中还包括：在所述钝化层表面形成第二支撑层；所述平坦化层覆盖所述第二支撑层，所述第二支撑层位于所述辅助电极层上方；所述第二接触孔贯通所述平坦化层、所述第二支撑层和所述钝化层。
可选的，所述第二接触孔包括形成于所述平坦化层的第一通孔和形成于所述第二支撑层并与所述第一通孔连通的第二通孔，所述第一通孔的内径由远离所述辅助电极层一端向靠近所述辅助电极层一端逐渐减小，所述第二通孔的内径小于所述第一通孔靠近所述辅助电极层一端端口的内径。
可选的，所述第二通孔在所述辅助电极层表面的正投影面积小于所述底切腔体在所述辅助电极层表面的正投影面积。
可选的，位于所述第二通孔外侧的所述第二支撑层形成对部分所述底切腔体的遮盖。
可选的，在所述去除剩余阳极层的步骤之后还包括：
在所述平坦化层表面形成像素定义层；
在所述像素定义层表面形成暴露至少部分所述阳极的第一过孔；
在所述像素定义层表面形成暴露所述第二接触孔的第二过孔；
在所述像素定义层表面蒸镀形成有机发光层，所述有机发光层通过第一过孔沉积至所述阳极表面，所述有机发光层通过所述第二过孔和所述第二接触孔沉积至所述辅助电极层表面；
在所述有机发光层表面蒸镀形成阴极，所述阴极通过所述第二过孔和所述第二接触孔与所述辅助电极层搭接。
本申请的实施例还提供一种显示面板，包括：衬底基板；薄膜晶体管层，设置于所述衬底基板表面；辅助电极层，设置于所述薄膜晶体管表面一侧；钝化层，设置于所述薄膜晶体管层表面，与所述辅助电极层相对应的所述钝化层表面形成有底切腔体，所述底切腔体暴露至少部分所述辅助电极层；平坦化层，设置于所述钝化层表面，与所述辅助电极层相对应的所述平坦化层表面开设有一凹槽，所述凹槽的底面开设有与所述底切腔体连通的第一通孔；第一支撑层，设置于所述凹槽内壁，所述第一支撑层至少覆盖位于所述第一通孔外侧的所述凹槽内侧底面；阳极，设置于所述平坦化层表面，所述阳极与所述薄膜晶体管层的源极电连接；像素定义层，设置于所述平坦化层表面，所述像素定义层表面开设有暴露至少部分所述阳极的第一过孔，所述像素定义层表面开设有与所述凹槽连通的第二过孔；有机发光层，设置于所述像素定义层表面，所述有机发光层通过第一过孔与所述阳极电连接，所述有机发光层通过所述第二过孔、所述凹槽和第一通孔延伸至底切腔体内侧并覆盖部分所述辅助电极层表面；阴极，设置于所述有机发光层表面，所述阴极通过所述第二过孔、所述凹槽和所述第一通孔延伸至所述底切腔体内并所述辅助电极层电连接。
本申请的实施例还提供一种显示面板，包括：衬底基板；薄膜晶体管层，设置于所述衬底基板表面；辅助电极层，设置于所述薄膜晶体管表面一侧；钝化层，设置于所述薄膜晶体管层表面，与所述辅助电极层相对应的所述钝化层表面形成有底切腔体，所述底切腔体暴露至少部分所述辅助电极层；第二支撑层，设置于与所述底切腔体相对应的所述钝化层表面，所述第二支撑层表面开设有暴露部分所述底切腔体的第二通孔；平坦化层，设置于所述钝化层表面，与所述辅助电极层相对应的所述平坦化层表面开设有一凹槽，所述凹槽的底面开设有与所述第二通孔连通的第一通孔；阳极，设置于所述平坦化层表面，所述阳极与所述薄膜晶体管层的源极电连接；像素定义层，设置于所述平坦化层表面，所述像素定义层表面开设有暴露至少部分所述阳极的第一过孔，所述像素定义层表面开设有与所述凹槽连通的第二过孔；有机发光层，设置于所述像素定义层表面，所述有机发光层通过第一过孔与所述阳极电连接，所述有机发光层通过所述第二过孔、所述凹槽、所述第一通孔和所述第二通孔延伸至所述底切腔体内侧并覆盖部分所述辅助电极层表面；阴极，设置于所述有机发光层表面，所述阴极通过所述第二过孔、所述凹槽、所述第一通孔和所述第二通孔延伸至所述底切腔体内并所述辅助电极层电连接。
 有益效果
本申请的有益效果为：与现有方法中通过光刻加湿蚀刻两道工艺形成under cut结构相比，本发明所提供的显示面板的制作方法通过一道蚀刻工艺即可在钝化层上形成under cut结构，节约产能，并且通过平坦化层和阳极层的配合形成对有机发光层和阴极的双层支撑，增强对阴极和有机发光层的支撑强度，避免塌陷风险。
 附图说明
图1是本发明一示例性实施例的显示面板的结构示意图；
图2是本发明一示例性实施例的显示面板的制作方法流程图；
图3a~图3j是本发明一示例性实施例的显示面板的制作方法流程示意图；
图4是本发明另一示例性实施例的显示面板的结构示意图；
图5a~图5i是本发明另一示例性实施例的显示面板的制作方法流程示意图；
图中部件编号如下：
100、100’、显示面板，100a、底切区，100b、驱动区，100c、电容区，100d、邦定区，110、衬底基板，111、缓冲层，112、层间绝缘层，113、辅助电极层，120、薄膜晶体管层，121、遮光层，122、第一电极板，123、半导体层，124、栅极绝缘层，125、栅极，126、第二电极板，127、漏极，128、源极，129、源漏极，130、钝化层，131、底切腔体，132、邦定开口，133、绑定金属层，140、平坦化层，141、第一接触孔，141a、141a’、第二接触孔，142、凹槽，143、第一通孔，1431、凸起，1432、第一支撑层，150、像素定义层，151、第一过孔，152、第二过孔，160、发光功能层，161、阳极，161a、阳极层，161b、光阻层，161c、第一开孔，161d、第二开孔，162、有机光阻层，163、阴极，170、第二支撑层，171、第二通孔。
 本发明的实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
与现有方法中通过光刻加湿蚀刻两道工艺形成under cut结构相比，本发明所述制作方法通过一道蚀刻工艺即可在钝化层上形成under cut结构，节约产能，并且通过平坦化层和阳极层的配合形成对有机发光层和阴极的双层支撑，增强对阴极和有机发光层的支撑强度，避免塌陷风险。作为典型应用，所述显示面板可应用于OLED大尺寸面板上，所述OLED大尺寸面板包括手机、平板电脑、电视机、显示器、笔记本电脑等。
本发明的一个实施例中，参照图1，本发明所提供的显示面板100包括衬底基板110、形成于所述衬底基板110上的薄膜晶体管层120、形成于薄膜晶体管层120上的钝化层130、形成于钝化层130上的平坦化层140、形成于平坦化层140上的像素定义层150和形成于像素定义层150上的发光功能层160，所述发光功能层160包括层叠设置的阳极161、有机发光层162和阴极163。
所述显示面板100包括间隔排布的底切区100a、驱动区100b、电容区100c和邦定区100d。
所述薄膜晶体管层120包括同层设置于衬底基板110上的遮光层121和第一电极板122，所述遮光层121对应所述驱动区100b，所述第一电极板122对应所述电容区100c，所述衬底基板110上设置有缓冲层111，缓冲层111覆盖遮光层121和第一电极板122，遮光层121为金属层，遮光层121与第一电极板122同层形成第一金属层M1；位于遮光层121上方的缓冲层111表面设置有半导体层123，所述半导体层123表面层叠设置有栅极绝缘层124和栅极125，位于第一电极板122上方的缓冲层111表面设置有第二电极板126，第一电极板122与第二电极板126形成电容结构。所述缓冲层111上形成有层间绝缘层112，所述层间绝缘层112表面设置有漏极127、源极 128和源漏极129，所述漏极127和源极128对应驱动区100b，源漏极129对应电容区100c，漏极127和源极128分别与半导体层123电连接，源极128与遮光层121电连接。
对应底切区100a的层间绝缘层112上设置有辅助电极层113，对应邦定区100d的层间绝缘层112上设置有邦定电极层114，辅助电极层113、漏极127、源极128、源漏极129和邦定电极层114同层设置形成第二金属层M2。
钝化层130覆盖辅助电极层113、漏极127、源极128、源漏极129和邦定电极层114，与辅助电极层113相对应的钝化层130表面形成有底切腔体131，底切腔体131暴露至少部分辅助电极层113。对应邦定区100d的钝化层130表面开设有暴露至少部分邦定电极层114的邦定开口132，对应邦定开口132的钝化层表面130设置有邦定金属层133，邦定金属层133通过邦定开口132与邦定电极层114电连接。邦定金属层133形成第三金属层M3。
平坦化层140设置于与底切区100a、驱动区100b和电容区100c相对应的钝化层130表面，平坦化层140不覆盖对应邦定区100d的钝化层130表面，平坦化层140表面开设有暴露至少部分源极128的第一接触孔141，与辅助电极层113相对应的平坦化层140表面开设有一凹槽142，凹槽142底面开设有贯通平坦化层140并与底切腔体131连通的第一通孔143，所述凹槽142的内径由远离所述辅助电极层113一端向靠近所述辅助电极层113一端逐渐减小，形成凹槽142的倒梯形截面结构，位于第一通孔143外侧的钝化层130形成环形凸起1431，凸起1431形成对底切腔体131的部分遮挡，使得第一通孔143在所述辅助电极层113表面的正投影面积小于所述底切腔体131在所述辅助电极层113表面的正投影面积。在本实施例中，至少在两凸起1431的上表面分别设置有第一支撑层1432，即，第一支撑层1432至少覆盖凹槽142的内侧底面。在另一实施方式中，第一支撑层1432除覆盖凸起1431外，还覆盖与凸起1431相邻的凹槽142的侧壁内表面。
阳极161设置于与第一接触孔141相对应的平坦化层140表面，阳极161通过第一接触孔141与源极128电连接，第一支撑层1432与阳极161的材质相同，均为IZO（氧化铟锌）与APC合金（银-钯-铜合金）的沉积结构，即，IZO/APC/IZO。像素定义层150设置于平坦化层140表面，像素定义层150表面开设有暴露至少部分阳极161的第一过孔151，像素定义层150表面开设有与凹槽142连通的第二过孔152，有机发光层162设置于所述像素定义层150表面，有机发光层162通过第一过孔151与阳极161电连接，有机发光层162通过第二过孔152、凹槽142和第一通孔143延伸至底切腔体131内侧并覆盖部分辅助电极层113表面。阴极163设置于有机发光层162表面，阴极163通过第二过孔152、凹槽142和第一通孔143延伸至底切腔体131内并与未被有机发光层162覆盖的辅助电极层113电连接。所述阳极161中的空穴和阴极163中的电子在电流电压的传导下在所述有机发光层162中相遇并结合，从而激发有机发光层162中的发光材料发光。
本实施例中，采用平坦化层140上的凹槽142与第一支撑层1432配合形成对有机发光层162和阴极163的双层支撑结构，保证对有机发光层162和阴极163的支撑强度和支撑稳定性，避免出现塌陷风险，而且，位于第一通孔143外侧的凸起1431形成对底切腔体131的部分遮挡，从而使得在蒸镀形成有机发光层162时，有机发光层162仅能覆盖部分辅助电极层113，在蒸镀形成阴极163时，阴极163可与未被有机发光层162覆盖的辅助电极层113电连接。
参照图2以及图3a~图3j，本实施例所述的显示面板100的制作方法包括如下步骤：
S1、提供衬底基板110；
S2、参照图3a，在所述衬底基板110上依次形成薄膜晶体管层120、辅助电极层113、钝化层130和平坦化层140；
S3、参照图3a，在所述平坦化层140表面形成贯通所述平坦化层140和所述钝化层130以暴露至少部分所述薄膜晶体管层120的源极128的第一接触孔141；
S4、参照图3a，在所述平坦化层140表面形成贯通所述平坦化层140和所述钝化层130以暴露部分所述辅助电极层113的第二接触孔141a；
S5、参照图3b，在所述平坦化层140表面形成阳极层161a，所述阳极层161a通过第一接触孔141与所述源极128电连接，所述阳极层161a通过第二接触孔141a沉积至所述辅助电极层113表面；
S6、参照图3b，在所述阳极层161a表面形成光阻层161b，在所述光阻层161b表面形成与所述第二接触孔141a相对应的第一开孔161c；
S7、参照图3c，蚀刻去除沉积在所述辅助电极层113表面的阳极层161a以在所述阳极层161a表面形成与所述第一开孔161c相对应的第二开孔161d；
S8、参照图3d，蚀刻覆盖所述辅助电极层113的至少部分钝化层130以形成暴露至少部分所述辅助电极层113的底切腔体131；
S9、参照图3e和图3f，去除所述光阻层161b；
S10、参照图3g，蚀刻所述阳极层161a形成阳极161；
S11、去除剩余阳极层161a。
作为优选，在所述步骤S11中，参照图3g，保留沉积于所述第二接触孔141a内壁的阳极层161a。所述第二接触孔141a包括凹槽142和开设于凹槽142底面的第一通孔143，沉积于第二接触孔141a内壁的阳极层161a即如前所述的第一支撑层1432。
步骤S6中，光阻层161b覆盖阳极层161a以及邦定金属层133，采用光刻（PH）工艺在光阻层161b表面形成所述第一开孔161c，光刻工艺中所采用的光罩，与第一通孔143相对应的光罩区域为全透光区域，与阳极161相对应的光罩区域为全黑区域，与光阻层161b其他区域相对应的光罩区域为半透光区域。步骤S7中，采用湿蚀刻去除沉积在所述辅助电极层113表面的阳极层161a以形成第二开孔161d。步骤S8中，采用湿蚀刻去除部分钝化层130以形成底切腔体131，蚀刻液为氢氟酸。步骤S9中，采用干法灰化（DRY-ASH）去除光阻层161b，但保留与底切区100a相对应的光阻层161b以及与阳极161相对应的光阻层161b。步骤S10中，采用湿蚀刻形成阳极161并去除步骤S9中的剩余光阻层161b。
所述显示面板100的制作方法还包括：
S12、参照图3h，在所述平坦化层140表面形成像素定义层150；
S13、参照图3h，在所述像素定义层150表面形成暴露至少部分所述阳极161的第一过孔151；
S14、参照图3h，在所述像素定义层150表面形成暴露所述第二接触孔141a的第二过孔152；
S15、参照图3i，在所述像素定义层150表面蒸镀形成有机发光层162，所述有机发光层162通过第一过孔151沉积至所述阳极161表面，所述有机发光层162通过所述第二过孔152和所述第二接触孔141a沉积至所述辅助电极层113表面；
S16、参照图3j，在所述有机发光层162表面蒸镀形成阴极163，所述阴极163通过所述第二过孔152和所述第二接触孔141a与所述辅助电极层113搭接。
其中，形成有机发光层162的蒸镀角度与形成阴极163的蒸镀角度不同，例如有机发光层162的蒸镀角度为0~45°，阴极163的蒸镀角度为-45~0°。由于蒸镀角度的不同，结合凸起1431和第一支撑层1432对辅助电极层113的遮挡，使得有机发光层162仅能覆盖部分辅助电极层113，并使得阴极163在覆盖有机发光层162的同时还可覆盖部分辅助电极层113，实现阴极163与辅助电极层113的电连接，降低压降。
本实施例所提供的显示面板的制作方法，通过一道蚀刻工艺即可在钝化层130上形成暴露至少部分辅助电极层113的底切腔体131，与现有通过光刻加蚀刻两道工艺才能形成底切腔体的工艺相比，节省了光刻的产能，避免了浪费。
在另一实施例中，参照图4，显示面板100’包括衬底基板110、形成于所述衬底基板110上的薄膜晶体管层120、形成于薄膜晶体管层120上的钝化层130、形成于钝化层130上的平坦化层140、形成于平坦化层140上的像素定义层150和形成于像素定义层150上的发光功能层160，所述发光功能层160包括层叠设置的阳极161、有机发光层162和阴极163。
所述显示面板100’包括间隔排布的底切区100a、驱动区100b、电容区100c和邦定区100d,与底切区100a相对应的所述钝化层130表面设置有第二支撑层170，第二支撑层170为金属层，第二支撑层170与邦定金属层133同层设置形成第三金属层M3。
第二支撑层170表面开设有与第一通孔143相对应的第二通孔171，第一通孔143的内径与第二通孔171的内径相同。凸起1431设置于位于第二通孔171两侧的第二支撑层170上，平坦化层140上的凹槽142与第二支撑层170配合形成对有机发光层162和阴极163的双层支撑结构，保证对有机发光层162和阴极163的支撑强度和支撑稳定性，避免出现塌陷风险，而且，位于第二通孔171外侧的第二支撑层170形成对底切腔体131的部分遮挡，从而使得在蒸镀形成有机发光层162时，有机发光层162仅能覆盖部分辅助电极层113，在蒸镀形成阴极163时，阴极163可与未被有机发光层162覆盖的辅助电极层113电连接。
参照图5a~图5i，本实施例所提供的显示面板100’的制备方法包括如下步骤：
S1、提供衬底基板110；
S2’、参照图5a，在所述衬底基板110上依次形成薄膜晶体管层120、辅助电极层113、钝化层130、第二支撑层170和平坦化层140；
S3’、参照图5a，在所述平坦化层140表面形成贯通所述平坦化层140和所述钝化层130以暴露至少部分所述薄膜晶体管层120的源极128的第一接触孔141；
S4’、参照图5a，在所述平坦化层140表面形成贯通所述平坦化层140、第二支撑层170和所述钝化层130以暴露部分所述辅助电极层113的第二接触孔141a’；
S5’、参照图5b，在所述平坦化层140表面形成阳极层161a，所述阳极层161a通过第一接触孔141与所述源极128电连接，所述阳极层161a通过第二接触孔141a’沉积至所述辅助电极层113表面；
S6’、参照图5b，在所述阳极层161a表面形成光阻层161b，在所述光阻层161b表面形成与所述第二接触孔141a’相对应的第一开孔161c；
S7、参照图5c，蚀刻去除沉积在所述辅助电极层113表面的阳极层161a以在所述阳极层161a表面形成与所述第一开孔161c相对应的第二开孔161d；
S8、参照图5d，蚀刻覆盖所述辅助电极层113的至少部分钝化层130以形成暴露至少部分所述辅助电极层113的底切腔体131；
S9、参照图5e，去除所述光阻层161b；
S10、参照图5f，蚀刻所述阳极层161a形成阳极161；
S11、去除剩余阳极层161a。
其中，本实施例所述第二接触孔141a’包括凹槽142、开设于凹槽142底面的第一通孔143以及开设于第二支撑层170上的第二通孔171。
步骤S6’中，光阻层161b覆盖阳极层161a以及邦定金属层133，采用光刻（PH）工艺在光阻层161b表面形成所述第一开孔161c，光刻工艺中所采用的光罩，与第一通孔143相对应的光罩区域为全透光区域，与阳极161相对应的光罩区域为全黑区域，与光阻层161b其他区域相对应的光罩区域为半透光区域。步骤S9中，采用干法灰化（DRY-ASH）去除光阻层161b，但保留与阳极161相对应的光阻层161b。步骤S10中，采用湿蚀刻形成阳极161并去除步骤S9中的剩余光阻层161b。
所述显示面板100’的制作方法还包括：
S12、参照图5g，在所述平坦化层140表面形成像素定义层150；
S13、参照图5g，在所述像素定义层150表面形成暴露至少部分所述阳极161的第一过孔151；
S14、参照图5g，在所述像素定义层150表面形成暴露所述第二接触孔141a的第二过孔152；
S15、参照图5h，在所述像素定义层150表面蒸镀形成有机发光层162，所述有机发光层162通过第一过孔151沉积至所述阳极161表面，所述有机发光层162通过所述第二过孔152和所述第二接触孔141a沉积至所述辅助电极层113表面；
S16、参照图5i，在所述有机发光层162表面蒸镀形成阴极163，所述阴极163通过所述第二过孔152和所述第二接触孔141a与所述辅助电极层113搭接。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板的制作方法，其中，包括：
    提供衬底基板；
    在所述衬底基板上依次形成薄膜晶体管层、辅助电极层、钝化层和平坦化层；
    在所述平坦化层表面形成贯通所述平坦化层和所述钝化层以暴露至少部分所述薄膜晶体管层的源极的第一接触孔；
    在所述平坦化层表面形成贯通所述平坦化层和所述钝化层以暴露部分所述辅助电极层的第二接触孔；
    在所述平坦化层表面形成阳极层，所述阳极层通过第一接触孔与所述源极电连接，所述阳极层通过第二接触孔沉积至所述辅助电极层表面；
    在所述阳极层表面形成光阻层，在所述光阻层表面形成与所述第二接触孔相对应的第一开孔；
    蚀刻去除沉积在所述辅助电极层表面的阳极层以在所述阳极层表面形成与所述第一开孔相对应的第二开孔；
    蚀刻覆盖所述辅助电极层的至少部分钝化层以形成暴露至少部分所述辅助电极层的底切腔体；
    去除所述光阻层；
    蚀刻所述阳极层形成阳极；
    去除剩余阳极层。
  2. 如权利要求1所述的显示面板的制作方法，其中，所述去除剩余阳极层的步骤包括保留沉积于所述第二接触孔内壁的阳极层。
  3. 如权利要求2所述的显示面板的制作方法，其中，所述第二接触孔包括形成于所述平坦化层表面的凹槽以及形成于所述凹槽底面的、与所述底切腔体连通的第一通孔，所述凹槽的内径由远离所述辅助电极层一端向靠近所述辅助电极层一端逐渐减小，所述阳极层沉积于所述凹槽内壁，所述阳极层上的第二开孔的内径大于或者等于所述第一通孔的内径。
  4. 如权利要求3所述的显示面板的制作方法，其中，所述第一通孔在所述辅助电极层表面的正投影面积小于所述底切腔体在所述辅助电极层表面的正投影面积。
  5. 如权利要求1所述的显示面板的制作方法，其中，
    所述在所述衬底基板上依次形成薄膜晶体管层、辅助电极层、钝化层和平坦化层的步骤中还包括：在所述钝化层表面形成第二支撑层；
    所述平坦化层覆盖所述第二支撑层，所述第二支撑层位于所述辅助电极层上方；
    所述第二接触孔贯通所述平坦化层、所述第二支撑层和所述钝化层。
  6. 如权利要求5所述的显示面板的制作方法，其中，所述第二接触孔包括形成于所述平坦化层的第一通孔和形成于所述第二支撑层并与所述第一通孔连通的第二通孔，所述第一通孔的内径由远离所述辅助电极层一端向靠近所述辅助电极层一端逐渐减小，所述第二通孔的内径小于所述第一通孔靠近所述辅助电极层一端端口的内径。
  7. 如权利要求6所述的显示面板的制作方法，其中，所述第二通孔在所述辅助电极层表面的正投影面积小于所述底切腔体在所述辅助电极层表面的正投影面积。
  8. 如权利要求7所述的显示面板的制作方法，其中，位于所述第二通孔外侧的所述第二支撑层形成对部分所述底切腔体的遮盖。
  9. 如权利要求5所述的显示面板的制作方法，其中，
    在所述去除剩余阳极层的步骤之后还包括：
    在所述平坦化层表面形成像素定义层；
    在所述像素定义层表面形成暴露至少部分所述阳极的第一过孔；
    在所述像素定义层表面形成暴露所述第二接触孔的第二过孔；
    在所述像素定义层表面蒸镀形成有机发光层，所述有机发光层通过第一过孔沉积至所述阳极表面，所述有机发光层通过所述第二过孔和所述第二接触孔沉积至所述辅助电极层表面；
    在所述有机发光层表面蒸镀形成阴极，所述阴极通过所述第二过孔和所述第二接触孔与所述辅助电极层搭接。
  10. 如权利要求9所述的显示面板的制作方法，其中，形成所述有机发光层的蒸镀角度与形成所述阴极的蒸镀角度相异。
  11. 一种显示面板，其中，包括：
    衬底基板；
    薄膜晶体管层，设置于所述衬底基板表面；
    辅助电极层，设置于所述薄膜晶体管表面一侧；
    钝化层，设置于所述薄膜晶体管层表面，与所述辅助电极层相对应的所述钝化层表面形成有底切腔体，所述底切腔体暴露至少部分所述辅助电极层；
    平坦化层，设置于所述钝化层表面，与所述辅助电极层相对应的所述平坦化层表面开设有一凹槽，所述凹槽的底面开设有与所述底切腔体连通的第一通孔；
    第一支撑层，设置于所述凹槽内壁，所述第一支撑层至少覆盖位于所述第一通孔外侧的所述凹槽内侧底面；
    阳极，设置于所述平坦化层表面，所述阳极与所述薄膜晶体管层的源极电连接；
    像素定义层，设置于所述平坦化层表面，所述像素定义层表面开设有暴露至少部分所述阳极的第一过孔，所述像素定义层表面开设有与所述凹槽连通的第二过孔；
    有机发光层，设置于所述像素定义层表面，所述有机发光层通过第一过孔与所述阳极电连接，所述有机发光层通过所述第二过孔、所述凹槽和第一通孔延伸至底切腔体内侧并覆盖部分所述辅助电极层表面；
    阴极，设置于所述有机发光层表面，所述阴极通过所述第二过孔、所述凹槽和所述第一通孔延伸至所述底切腔体内并所述辅助电极层电连接。
  12. 如权利要求11所述的显示面板，其中，所述凹槽的内径由远离所述辅助电极层一端向靠近所述辅助电极层一端逐渐减小。
  13. 如权利要求12所述的显示面板，其中，所述第一通孔在所述辅助电极层表面的正投影面积小于所述底切腔体在所述辅助电极层表面的正投影面积。
  14. 如权利要求11所述的显示面板，其中，所述衬底基板上设置有缓冲层，所述缓冲层上设置有层间绝缘层，所述层间绝缘层上设置有邦定电极层，所述钝化层表面开设有暴露至少部分邦定电极层的邦定开口，对应邦定开口的所述钝化层表面设置有邦定金属层，邦定金属层通过邦定开口与邦定电极层电连接。
  15. 一种显示面板，其中，包括：
    衬底基板；
    薄膜晶体管层，设置于所述衬底基板表面；
    辅助电极层，设置于所述薄膜晶体管表面一侧；
    钝化层，设置于所述薄膜晶体管层表面，与所述辅助电极层相对应的所述钝化层表面形成有底切腔体，所述底切腔体暴露至少部分所述辅助电极层；
    第二支撑层，设置于与所述底切腔体相对应的所述钝化层表面，所述第二支撑层表面开设有暴露部分所述底切腔体的第二通孔；
    平坦化层，设置于所述钝化层表面，与所述辅助电极层相对应的所述平坦化层表面开设有一凹槽，所述凹槽的底面开设有与所述第二通孔连通的第一通孔；
    阳极，设置于所述平坦化层表面，所述阳极与所述薄膜晶体管层的源极电连接；
    像素定义层，设置于所述平坦化层表面，所述像素定义层表面开设有暴露至少部分所述阳极的第一过孔，所述像素定义层表面开设有与所述凹槽连通的第二过孔；
    有机发光层，设置于所述像素定义层表面，所述有机发光层通过第一过孔与所述阳极电连接，所述有机发光层通过所述第二过孔、所述凹槽、所述第一通孔和所述第二通孔延伸至所述底切腔体内侧并覆盖部分所述辅助电极层表面；
    阴极，设置于所述有机发光层表面，所述阴极通过所述第二过孔、所述凹槽、所述第一通孔和所述第二通孔延伸至所述底切腔体内并所述辅助电极层电连接。
  16. 如权利要求15所述的显示面板，其中，所述凹槽的内径由远离所述辅助电极层一端向靠近所述辅助电极层一端逐渐减小，所述第二通孔的内径小于所述第一通孔靠近所述辅助电极层一端端口的内径。
  17. 如权利要求16所述的显示面板，其中，所述第二通孔在所述辅助电极层表面的正投影面积小于所述底切腔体在所述辅助电极层表面的正投影面积。
  18. 如权利要求17所述的显示面板，其中，位于所述第二通孔外侧的所述第二支撑层形成对部分所述底切腔体的遮盖。
  19. 如权利要求15所述的显示面板，其中，所述衬底基板上设置有缓冲层，所述缓冲层上设置有层间绝缘层，所述层间绝缘层上设置有邦定电极层，所述钝化层表面开设有暴露至少部分邦定电极层的邦定开口，对应邦定开口的所述钝化层表面设置有邦定金属层，邦定金属层通过邦定开口与邦定电极层电连接。
  20. 如权利要求19所述的显示面板，其中，所述第二支撑层为金属层，所述第二支撑层与所述邦定金属层同层设置。
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