WO2023058493A1 - エピタキシャル層のキャリア濃度を均一化する方法及びそれらの方法により作製された構造 - Google Patents
エピタキシャル層のキャリア濃度を均一化する方法及びそれらの方法により作製された構造 Download PDFInfo
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Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B23/00—Single-crystal growth by condensing evaporated or sublimed materials
- C30B23/02—Epitaxial-layer growth
- C30B23/06—Heating of the deposition chamber, the substrate or the materials to be evaporated
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/36—Carbides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2015—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline semiconductor material, e.g. lattice adaptation, heteroepitaxy
Definitions
- the present invention relates to a method for uniformizing carrier concentration in an epitaxial layer and a structure manufactured by the method.
- SiC silicon carbide
- GaN gallium nitride
- Ga 2 O 3 gallium oxide
- silicon carbide has a dielectric breakdown field one order of magnitude larger, a bandgap three times larger, and a thermal conductivity three times higher than silicon. Therefore, silicon carbide is expected to be applied to power devices, high-frequency devices, high-temperature devices, and the like.
- Patent Literature 1 describes "a step of supplying a gas containing hydrogen into an epitaxial growth apparatus to heat the inside of the epitaxial growth apparatus for a predetermined time, and carrying a single crystal silicon carbide substrate into the epitaxial growth apparatus. and forming a single-crystal silicon carbide film on the single-crystal silicon carbide substrate by epitaxial growth by supplying a raw material gas, a carrier gas, and a dopant gas containing an impurity that determines a conductivity type.
- a method for manufacturing a silicon semiconductor substrate is described.
- Patent Document 2 describes a technique for growing an epitaxial layer of silicon carbide under a SiC—C equilibrium vapor pressure environment.
- Patent Document 3 describes a technique for growing an epitaxial layer of silicon carbide under a SiC—Si equilibrium vapor pressure environment.
- one of the causes of deterioration of on-resistance characteristics is the variation in carrier concentration in the epitaxial layer. If there is variation in carrier concentration within the plane of the epitaxial layer, it causes variation in the threshold voltage and on-resistance of the semiconductor device. Furthermore, variations in the threshold voltage and on-resistance not only lower the current-carrying ability, but also cause current concentration at a specific location, which can lead to destruction of the semiconductor device. Therefore, it is necessary to uniform the carrier concentration in the epitaxial layer.
- the problem to be solved by the present invention is to provide a new technique for uniformizing the carrier concentration in the epitaxial layer.
- the present invention which solves the above-mentioned problems, is a method for uniformizing carrier concentration in an epitaxial layer, including a growth step of growing an epitaxial layer on a bulk layer under an equilibrium vapor pressure environment.
- a preferred embodiment of the present invention includes a measurement step of measuring the average value and standard deviation of carrier concentrations.
- the measurement step comprises a measurement step of measuring the carrier concentration at a plurality of measurement points of the epitaxial layer, and calculating an average value and a standard deviation of the carrier concentration from the results of the plurality of measurement points. and a calculating step for
- the growth step is a step of growing an epitaxial layer having a variation coefficient of carrier concentration of 0.05 or less.
- the growing step is a step of growing an epitaxial layer having a standard deviation of carrier concentration of 1 ⁇ 10 17 cm ⁇ 3 or less.
- the growing step is a step of growing the epitaxial layer on a bulk layer having a diameter of at least 4 inches or more.
- the present invention also relates to a method for manufacturing a semiconductor substrate. That is, the present invention, which solves the above-described problems, is a method of manufacturing a semiconductor substrate including a growth step of growing an epitaxial layer on a bulk layer under an equilibrium vapor pressure environment.
- the invention also relates to a semiconductor substrate. That is, the present invention for solving the above problems is a semiconductor substrate, wherein the coefficient of variation of the carrier concentration in the epitaxial layer is 0.05 or less. Further, the present invention for solving the above problems is a semiconductor substrate, wherein the standard deviation of the carrier concentration in the epitaxial layer is 1 ⁇ 10 17 cm ⁇ 3 or less.
- a preferred form of the invention has a diameter of at least 4 inches or more.
- the present invention also relates to a method of manufacturing a semiconductor device. That is, the present invention for solving the above-mentioned problems comprises: a growth step of growing an epitaxial layer on a bulk layer under an equilibrium vapor pressure environment to obtain a substrate; A method of manufacturing a semiconductor device, comprising:
- the present invention also relates to semiconductor devices. That is, the present invention for solving the above-described problems is a semiconductor device including an epitaxial layer having a carrier concentration variation coefficient of 0.05 or less. Further, the present invention for solving the above-described problems is a semiconductor device comprising an epitaxial layer having a standard deviation of carrier concentration of 1 ⁇ 10 17 cm ⁇ 3 or less.
- a method for uniformizing the carrier concentration of an epitaxial layer according to the present invention includes a growth step S10 of growing an epitaxial layer 20 on a bulk layer 10 under an equilibrium vapor pressure environment, and a measurement step S20 of measuring the standard deviation.
- the present invention can suppress variations in carrier concentration in the epitaxial layer 20 by including the growth step S10 of growing the epitaxial layer 20 under an equilibrium vapor pressure environment. Variations in carrier concentration can cause destruction of semiconductor devices, and therefore uniform carrier concentration can contribute to an improvement in the yield of semiconductor devices.
- FIG. 1 is an explanatory diagram illustrating an embodiment of a method for uniformizing carrier concentration in an epitaxial layer.
- the method of equalizing the carrier concentration of the epitaxial layer according to this embodiment is to form an n - type bulk layer 10 of a compound semiconductor having a dopant concentration (doping concentration) lower than that of the n + -type bulk layer 10 . It includes a growth step S10 for growing the - type epitaxial layer 20 under an equilibrium vapor pressure environment.
- the term “equilibrium vapor pressure environment” refers to the vapor pressure environment when the material of the bulk layer 10 and the source material of the epitaxial layer 20 are in phase equilibrium via the gas phase.
- the growth step S10 for growing the silicon carbide epitaxial layer 20 will be described in detail below as an example.
- the "equilibrium vapor pressure environment" for growing the epitaxial layer 20 of silicon carbide includes "SiC--C equilibrium vapor pressure environment” and "SiC--Si equilibrium vapor pressure environment.”
- SiC-C equilibrium vapor pressure environment in this specification refers to the vapor pressure environment when SiC (solid phase) and C (solid phase) are in phase equilibrium via the gas phase.
- This SiC—C equilibrium vapor pressure environment can be formed by heat-treating a quasi-closed space having an atomic ratio Si/C of 1 or less.
- the manufacturing apparatus and growth conditions described in Patent Document 2 can be employed.
- a SiC substrate satisfying the stoichiometric ratio of 1:1 when placed in a SiC container satisfying the stoichiometric ratio of 1:1, the atomic ratio Si/C in the container is 1 becomes.
- a C vapor supply source such as C pellets
- C pellets may be arranged to set the atomic number ratio Si/C to 1 or less.
- SiC-Si equilibrium vapor pressure environment in this specification refers to the vapor pressure environment when SiC (solid phase) and Si (liquid phase) are in phase equilibrium via the gas phase.
- This SiC—Si equilibrium vapor pressure environment can be formed by heat-treating a quasi-enclosed space with an atomic ratio Si/C exceeding 1.
- the manufacturing apparatus and growth conditions described in Patent Document 3 can be employed.
- the atomic number ratio Si/C in the container is greater than one.
- the SiC-C equilibrium vapor pressure environment and the SiC-Si equilibrium vapor pressure environment in this specification include a near-thermal equilibrium vapor pressure environment that satisfies the relationship between the growth rate and the growth temperature derived from the theoretical thermal equilibrium environment.
- the term "semi-enclosed space” in this specification refers to a space in which the inside of the container can be evacuated, but at least part of the steam generated inside the container can be confined. This quasi-enclosed space can be formed within the container.
- FIGS. 2 and 3 are explanatory diagrams explaining how the epitaxial layer 20 is grown using the manufacturing apparatus employed in the method of growing silicon carbide according to the embodiment.
- a manufacturing apparatus that achieves an equilibrium vapor pressure environment includes a main container 30 that accommodates a base substrate (bulk layer 10), and a high-melting-point container 40 that accommodates this main container 30.
- FIG. 1 A manufacturing apparatus that achieves an equilibrium vapor pressure environment includes a main container 30 that accommodates a base substrate (bulk layer 10), and a high-melting-point container 40 that accommodates this main container 30.
- the underlying substrate (bulk layer 10) is accommodated in the main container 30, and the main container 30 is accommodated in the high-melting-point container 40. Heating is performed with a temperature gradient so that the underlying substrate has a low temperature, thereby increasing the temperature on the high-temperature side. Atoms are supplied to the underlying substrate from a part of the main container 30 to form the epitaxial layer 20 .
- FIG. 2 is an explanatory diagram for forming an SiC--C equilibrium vapor pressure environment by setting the atomic number ratio Si/C in the main container 30 to 1 or less.
- FIG. 3 is an explanatory diagram for forming a SiC—Si equilibrium vapor pressure environment such that the atomic number ratio Si/C in the main container 30 exceeds 1. As shown in FIG.
- any generally used compound semiconductor material can be employed.
- silicon carbide (SiC) is used in the detailed description, but other known group IV-IV compound semiconductor materials may be employed.
- the semiconductor material adopts known II-VI group compound semiconductor materials such as zinc oxide (ZnO), zinc sulfide (ZnS), zinc selenide (ZnSe), cadmium sulfide (CdS), and cadmium telluride (CdTe).
- semiconductor materials include, for example, boron nitride (BN), gallium arsenide (GaAs), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), gallium phosphide (GaP), indium phosphide ( InP), indium antimonide (InSb), and other known group III-V compound semiconductor materials may be employed.
- the semiconductor material for example, an oxide semiconductor material such as aluminum oxide (Al 2 O 3 ) or gallium oxide (Ga 2 O 3 ) may be employed.
- the bulk layer 10 may have a structure in which known additive atoms used depending on the material are appropriately added.
- the bulk layer 10 includes a wafer obtained by slicing an ingot produced by a sublimation method or the like into a disk shape, or a substrate obtained by processing a single crystal of a compound semiconductor into a thin plate. Any polytype can be employed as the crystal polymorph of the single crystal of the compound semiconductor.
- the dopant added to the bulk layer 10 may be any element that is doped in general semiconductor materials. Specifically, nitrogen (N), phosphorus (P), aluminum (Al), boron (B), and the like can be exemplified. In the embodiment, nitrogen or phosphorus that makes the bulk layer 10 n-type is used, but aluminum or boron that makes the bulk layer 10 p-type may be used.
- the dopant concentration of the bulk layer 10 is preferably higher than 1 ⁇ 10 17 cm ⁇ 3 , more preferably 1 ⁇ 10 18 cm ⁇ 3 or higher, still more preferably 1 ⁇ 10 19 cm ⁇ 3 or higher. be.
- the diameter of the bulk layer 10 is preferably 4 inches or more, more preferably 6 inches or more, and still more preferably 8 inches or more.
- the epitaxial layer 20 is a layer in which variations in carrier concentration are suppressed.
- the standard deviation of the carrier concentration of the epitaxial layer 20 is preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less, more preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 3.0 ⁇ 10 16 cm ⁇ 3 or less. 10 16 cm ⁇ 3 or less, more preferably 2.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 5.0 ⁇ 10 15 cm ⁇ 3 or less, more preferably 3.0 ⁇ 10 15 cm ⁇ 3 or less.
- the coefficient of variation (standard deviation/average value) of the carrier concentration in the plane of the epitaxial layer 20 is preferably 0.05 or less, more preferably 0.04 or less, and even more preferably 0.04. or less, more preferably 0.02 or less, and still more preferably 0.01 or less.
- the material of the epitaxial layer 20 in addition to silicon carbide, any material that can be epitaxially grown as a compound semiconductor material can generally be used.
- the material of epitaxial layer 20 can be any known material that can be employed as the material of bulk layer 10 described above, and can be any known material that can be epitaxially grown on bulk layer 10 .
- GaN, AlN, InN, ZnS, ZnSe, CdTe, GaP, GaAs, InP, InAs, InSb, etc. can be used as the material of the epitaxial layer 20, for example.
- the combination of the material of the bulk layer 10 and the material of the epitaxial layer 20 can be appropriately selected in consideration of the difference in lattice constant and thermal expansion coefficient between the two materials.
- the dopant concentration of the epitaxial layer 20 is preferably lower than 1 ⁇ 10 17 cm ⁇ 3 , more preferably 1 ⁇ 10 16 cm ⁇ 3 or less, even more preferably 1 ⁇ 10 15 cm ⁇ 3 or less. be.
- the main container 30 can accommodate the base substrate (bulk layer 10) and is configured to generate therein a vapor pressure of gas phase species containing elements of the semiconductor material to be grown.
- the main container 30 is made of a material containing polycrystalline SiC.
- the entire body container 30 is made of polycrystalline SiC.
- the environment inside the heat-treated main container 30 is preferably a vapor pressure environment of a mixed system of vapor phase species containing Si element and vapor phase species containing C element.
- Si, Si 2 , Si 3 , Si 2 C, SiC 2 and SiC can be exemplified as gas phase species containing Si element.
- Si 2 C, SiC 2 , SiC, and C can be exemplified as gas phase species containing the C element. That is, the SiC-based gas is present in the main container 30 .
- GaN, AlN, InN, ZnS, ZnSe, CdTe, GaP, GaAs, InP, InAs, InSb, etc. can be used as the material of the main container 30 .
- a desired epitaxial layer 20 can be obtained by adopting the same material for the main body container 30 as the epitaxial layer 20 to be grown.
- the dopant and dopant concentration of the main container 30 can be selected according to the desired dopant and dopant concentration of the epitaxial layer 20 .
- the epitaxial layer 20 having a dopant concentration lower than that of the bulk layer 10 can be grown.
- any structure can be adopted as long as it generates a vapor pressure of gas phase species containing the Si element and gas phase species containing the C element in the internal space during the heat treatment of the main container 30 .
- a configuration in which polycrystalline SiC is partially exposed on the inner surface, a configuration in which polycrystalline SiC is separately arranged inside the main container 30, or the like can be used.
- the main container 30 is a fitting container comprising an upper container 31 and a lower container 32 that can be fitted to each other, as shown in FIGS.
- a minute gap 33 is formed between the fitting portion of the upper container 31 and the lower container 32 , and the inside of the main container 30 can be exhausted (evacuated) through this gap 33 .
- a Si vapor supply source 34 is arranged as shown in FIG. Examples of the Si vapor supply source 34 include solid Si (Si pellets such as single crystal Si pieces and Si powder) and Si compounds.
- the growth step S10 is a step of transporting Si atoms and C atoms of the main container 30 to the surface of the bulk layer 10 using the temperature difference between the bulk layer 10 and the main container 30 as a driving force. That is, due to the temperature gradient formed by the heating furnace, at least part of the main container 30 (for example, the top surface of the upper container 31) becomes hotter than the bulk layer 10, so that the raw material is transported to the bulk layer 10. power is born.
- the temperature on the bulk layer 10 side is lower than the temperature on the upper container 31 side. heat up so that By forming a space in the main container 30 with a temperature difference between the bulk layer 10 and the upper container 31 in this way, Si atoms and C atoms in the upper container 31 are driven by this temperature difference. It can be transported to bulk layer 10 .
- the high-melting-point container 40 contains a high-melting-point material.
- C which is a general-purpose heat-resistant member, W, Re, Os, Ta, and Mo, which are high melting point metals, Ta 9 C 8 , HfC, TaC, NbC, ZrC, Ta 2 C, TiC, WC, and MoC, which are carbides, Nitrides HfN, TaN, BN, Ta 2 N, ZrN, TiN, borides HfB 2 , TaB 2 , ZrB 2 , NB 2 , TiB 2 , polycrystalline SiC, or the same material as the main container 30 , etc. can be exemplified.
- the high-melting-point container 40 is a fitting container that includes an upper container 41 and a lower container 42 that can be fitted to each other, similar to the main container 30, and is configured to accommodate the main container 30 therein.
- a minute gap 43 is formed in the fitting portion of the upper container 41 and the lower container 42 , and the inside of the high-melting-point container 40 can be evacuated (evacuated) through this gap 43 .
- the high-melting-point container 40 has a vapor supply source that internally generates a vapor pressure of vapor-phase species containing the elements of the semiconductor material to be grown.
- the high melting point container 40 has a Si vapor supply source 44 capable of supplying the vapor pressure of the vapor phase species containing Si element.
- the Si vapor supply source 44 may be configured to generate Si vapor in the high-melting-point container 40 during heat treatment, and examples include solid Si (Si pellets such as single-crystal Si pieces and Si powder) and Si compounds. can be done.
- a layer of a silicided high-melting-point material may be provided inside the high-melting-point container 40 described above.
- the measurement step S20 includes a measurement step S21 of measuring carrier concentrations at a plurality of measurement points P of the epitaxial layer 20, and a calculation step S22 of calculating an average value and standard deviation from the results of these plurality of measurement points P.
- Raman spectroscopy or capacitance (CV) measurement can be adopted as a method for measuring the carrier concentration in the measurement step S21. Also, any technique that can measure the carrier concentration of the epitaxial layer 20 can be employed.
- the entire epitaxial layer 20 is divided into a plurality of sections to set arbitrary areas A, and to arrange measurement points P in each arbitrary area A. It is desirable that at least five or more divisions be set for this arbitrary area A, and FIG. 5 illustrates how nine arbitrary areas A are set.
- the fan-shaped arbitrary area A is set on the concentric circles, but it can be set in an arbitrary shape and area, such as a grid shape or a spiral shape.
- the calculation step S22 is a step of calculating the average value and standard deviation from the carrier concentrations at the plurality of measurement points P obtained in the measurement step S21.
- the coefficient of variation may be calculated by dividing the obtained standard deviation by the average value.
- the variation in the carrier concentration of the epitaxial layer 20 is suppressed by including the growth step S10 of growing the epitaxial layer 20 under the equilibrium vapor pressure environment. be able to.
- the growth step S10 only needs to include a step of growing at least one epitaxial layer 20 under an equilibrium vapor pressure environment. Therefore, when growing two epitaxial layers 20 by changing the growth conditions, the carrier concentration may be uniformed by growing one of the layers under the equilibrium vapor pressure environment.
- FIG. 5 is an explanatory diagram explaining another embodiment of the method for uniformizing the carrier concentration of the epitaxial layer. Components that are basically the same as those in the previous embodiment are denoted by the same reference numerals, and descriptions thereof are simplified.
- a method for homogenizing the carrier concentration of an epitaxial layer includes a growth step S10 of growing an epitaxial layer 20 on a bulk layer 10, the growth step S10 being an n + type or n ⁇ A first growth step S11 of growing a first epitaxial layer 21 of n ⁇ type under an equilibrium vapor pressure environment, and a second growth step S11 of growing a second epitaxial layer 22 of n ⁇ type having a dopant concentration lower than that of the bulk layer 10 . and a growth step S12 of.
- the epitaxial layer 20 of another embodiment includes the bulk layer 10, the first epitaxial layer 21 having a uniform carrier concentration, and the first epitaxial layer 21 having a lower dopant concentration than the bulk layer 10. 2 epitaxial layers 22 .
- the n + -type first epitaxial layer 21 having a dopant concentration equivalent to that of the n + -type bulk layer 10 may be grown, or the dopant concentration may be higher than that of the bulk layer 10.
- a low n - type first epitaxial layer 21 may be grown. That is, the dopant concentration of the first epitaxial layer 21 is preferably 1 ⁇ 10 17 cm ⁇ 3 or less, more preferably 1 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1 ⁇ 10 15 cm ⁇ 3 or less . 3 or less, preferably 1 ⁇ 10 17 cm ⁇ 3 or more, more preferably 1 ⁇ 10 18 cm ⁇ 3 or more, still more preferably 1 ⁇ 10 19 cm ⁇ 3 or more.
- the same method as in the previous embodiment can be adopted.
- the first epitaxial layer 21 is a layer in which variations in carrier concentration are suppressed.
- the standard deviation of the carrier concentration of the first epitaxial layer 21 is preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less, more preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 3.0 ⁇ 10 16 cm ⁇ 3 or less.
- the coefficient of variation (standard deviation/average value) of the carrier concentration in the plane of the first epitaxial layer 21 is preferably 0.05 or less, more preferably 0.04 or less, and even more preferably It is 0.04 or less, more preferably 0.02 or less, and still more preferably 0.01 or less.
- the second growth step S12 can adopt a growth method different from that of the first growth step S11.
- known film formation techniques such as physical vapor deposition (PVD) and chemical vapor deposition (CVD) may be employed.
- the dopant concentration of the second epitaxial layer 22 is preferably lower than 1 ⁇ 10 17 cm ⁇ 3 , more preferably 1 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1 ⁇ 10 15 cm ⁇ 3 . 3 or less.
- the semiconductor substrates according to the present invention are substrates 100 and 101 manufactured using the above-described method for uniformizing the carrier concentration of the epitaxial layer, and include the epitaxial layer 20 with uniform carrier concentration. If the entire bulk layer 10 is removed in the substrate manufacturing process, the semiconductor substrate is composed of the epitaxial layer 20 .
- a semiconductor substrate 100 according to the embodiment has, as shown in FIG. 1, a single epitaxial layer 20 having a uniform carrier concentration.
- the standard deviation of the carrier concentration of the epitaxial layer 20 is preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less, more preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less, even more preferably. is 3.0 ⁇ 10 16 cm ⁇ 3 or less, more preferably 2.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 5 0 ⁇ 10 15 cm ⁇ 3 or less, more preferably 3.0 ⁇ 10 15 cm ⁇ 3 or less.
- the coefficient of variation (standard deviation/average value) of the carrier concentration in the plane of the epitaxial layer 20 is preferably 0.05 or less, more preferably 0.04 or less, and even more preferably 0.04. or less, more preferably 0.02 or less, and still more preferably 0.01 or less.
- the carrier concentration of the epitaxial layer 20 is measured at a plurality of measurement points P, and the average value and standard deviation of the carrier concentration are obtained from the results of these plurality of measurement points P. It is obtained by calculating the deviation.
- the entire epitaxial layer 20 is divided into nine sections to set arbitrary areas A, and measurement points P are arranged for each arbitrary area A. As shown in FIG.
- the dopant concentration of the epitaxial layer 20 is preferably lower than 1 ⁇ 10 17 cm ⁇ 3 , more preferably 1 ⁇ 10 16 cm ⁇ 3 or less, even more preferably 1 ⁇ 10 15 cm ⁇ 3 or less. be.
- the substrate 101 includes a first epitaxial layer 21 having a uniform carrier concentration and a second epitaxial layer having a dopant concentration lower than that of the bulk layer 10. 22 and.
- the first epitaxial layer 21 may be an n + -type epitaxial layer having a dopant concentration equivalent to that of the bulk layer 10, or an n ⁇ -type epitaxial layer having a dopant concentration lower than that of the bulk layer 10.
- the dopant concentration of the first epitaxial layer 21 is preferably 1 ⁇ 10 17 cm ⁇ 3 or less, more preferably 1 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1 ⁇ 10 15 cm ⁇ 3 or less . 3 or less, preferably 1 ⁇ 10 17 cm ⁇ 3 or more, more preferably 1 ⁇ 10 18 cm ⁇ 3 or more, still more preferably 1 ⁇ 10 19 cm ⁇ 3 or more.
- the standard deviation of the carrier concentration measured at a plurality of points in the plane of the first epitaxial layer 21 is preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less, more preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less, more preferably 3.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 2.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1.0 ⁇ 10 16 cm ⁇ 3 or less, more preferably 5.0 ⁇ 10 15 cm ⁇ 3 or less, and still more preferably 3.0 ⁇ 10 15 cm ⁇ 3 or less.
- the coefficient of variation (standard deviation/average value) of the carrier concentration in the plane of the first epitaxial layer 21 is preferably 0.05 or less, more preferably 0.04 or less, and still more preferably 0. 0.03 or less, more preferably 0.02 or less, and still more preferably 0.01 or less.
- the dopant concentration of the second epitaxial layer 22 is preferably lower than 1 ⁇ 10 17 cm ⁇ 3 , more preferably 1 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1 ⁇ 10 15 cm ⁇ 3 . 3 or less.
- the diameter of the bulk layer 10 is preferably 4 inches or more, more preferably 6 inches or more, and still more preferably 8 inches or more.
- FIG. 6 is an explanatory diagram for explaining the method of manufacturing the semiconductor device according to the embodiment.
- FIG. 7 is an explanatory diagram illustrating a method of manufacturing a silicon carbide semiconductor device according to another embodiment. Components that are basically the same as those in the previous embodiment are denoted by the same reference numerals, and descriptions thereof are simplified.
- the method of manufacturing a semiconductor device includes a growth step S10 of growing an epitaxial layer 20 on a bulk layer 10 under an equilibrium vapor pressure environment. and a device formation step S30 of forming the device region 50 in at least a part of the semiconductor substrate having the epitaxial layer 20 .
- the device region 50 is a structure necessary for functioning as a semiconductor device, and includes at least a doping region 51 , an insulating film 52 and an electrode 53 .
- the device forming step S30 includes, for example, a patterning step S31 of forming a circuit pattern on a substrate having an epitaxial layer 20, a doping step S32 of introducing a doping region 51 into the substrate using this circuit pattern, and an insulating film.
- An insulating film forming step S33 for forming the electrode 52 and an electrode forming step S34 for forming the electrode 53 are included.
- the patterning step S31 includes, for example, a resist coating step of applying a photoresist, an exposure step of exposing the photoresist through a photomask, a developing step of developing the exposed photoresist, and a layer below the photoresist. and a selective etching step that etches exposed surfaces. Through these steps, a circuit pattern can be formed on the substrate.
- the doping step S32 includes, for example, an ion implantation step of irradiating the substrate with dopant ions, which are ionized dopant atoms, and an activation step of heat-treating and activating the substrate irradiated with the dopant ions, can include
- the doping region 51 is formed.
- the doping region 51 include an n-type or p-type well region 511, an n-type or p-type contact region 512, an n-type or p-type drift region, a body region, a base region, a source region, and a collector region. , a field stop region, a pillar region, a buffer region, a recombination promoting region, or a buried region.
- the insulating film forming step S33 is a step of forming the insulating film 52.
- the insulating film 52 includes, for example, one or more of a gate insulating film, an interlayer insulating film for element isolation, or a cap layer for adjusting a flat band voltage or the like in the gate electrode.
- the electrode forming step S34 is a step of forming electrodes 53 for functioning as a semiconductor device.
- the electrode 53 for example, one or more of a gate electrode 531, a source electrode 532, a drain electrode 533, a base electrode, an emitter electrode, a collector electrode, an anode electrode, a cathode electrode, an ohmic electrode, or a Schottky electrode. include.
- the device forming step S30 may further include a removing step S35 of removing at least part of the bulk layer 10 from the back surface side.
- a removing step S35 of removing at least part of the bulk layer 10 from the back surface side.
- Semiconductor devices according to the present invention are semiconductor devices 200 and 201 manufactured using the above-described method for uniformizing the carrier concentration of the epitaxial layer, and the epitaxial layer (the epitaxial layer 20 or the first epitaxial layer) in which the carrier concentration is uniformized. epitaxial layer 21 ) and a device region 50 .
- the epitaxial layer (the epitaxial layer 20 or the first epitaxial layer 21) has suppressed variations in carrier concentration in the in-plane direction.
- the standard deviation of the carrier concentration of the epitaxial layer is preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less, more preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 3.0 ⁇ 10 16 cm ⁇ 3 or less, more preferably 2.0 ⁇ 10 16 cm ⁇ 3 or less, still more preferably 1.0 ⁇ 10 16 cm ⁇ 3 or less, and more preferably 5.0 ⁇ 10 16 cm ⁇ 3 or less. It is 0 ⁇ 10 15 cm ⁇ 3 or less, more preferably 3.0 ⁇ 10 15 cm ⁇ 3 or less.
- the coefficient of variation (standard deviation/average value) of carrier concentration in the plane of the epitaxial layer is preferably 0.05 or less, more preferably 0.04 or less, and still more preferably 0.03 or less. , more preferably 0.02 or less, and still more preferably 0.01 or less.
- the semiconductor devices 200 and 201 have epitaxial layers (the epitaxial layer 20 or the first epitaxial layer 21) with extremely small variations in carrier concentration, variations in threshold voltage and on-resistance are suppressed. It is possible to suppress the deterioration of the current-carrying ability. Furthermore, it is possible to suppress destruction of the semiconductor device due to current concentration at a specific location.
- semiconductor devices include Schottky barrier diodes, junction barrier Schottky diodes, thyristors, bipolar junction transistors, and PiN diodes.
- the apparatus used in the following examples is the apparatus described in Patent Document 2, and accommodates the main container 30, the high-melting-point container 40, and the main container 30 and the high-melting-point container 40 so that a temperature gradient is formed. and a heating furnace capable of heating to .
- the growth step S10 of growing the epitaxial layer 20 under the SiC—C equilibrium vapor pressure environment is performed on a silicon carbide substrate having a diameter of 4 inches and tilted 4 degrees in the ⁇ 11-20> direction. rice field. After that, a measuring step S20 of measuring the average value and standard deviation of the carrier concentration was performed on the grown epitaxial layer 20 .
- the measurement step S20 of measuring the average value and standard deviation of the carrier concentration was performed on a silicon carbide substrate having a diameter of 4 inches and tilted 4 degrees in the ⁇ 11-20> direction.
- the silicon carbide substrate was placed in the main container 30, and the main container 30 was further placed in the high-melting-point container 40 and heated at 1900° C. using a heating furnace.
- a container made of polycrystalline SiC was used for the main body container 30 .
- the atomic number ratio Si/C in the main container 30 in which the silicon carbide substrate was placed was 1.
- the silicon carbide substrate satisfying the stoichiometric ratio of 1:1 was placed in the main container 30 made of polycrystalline SiC satisfying the stoichiometric ratio of 1:1, the atomic number ratio in the main container 30 was Si/C was 1.
- the epitaxial layer 20 was grown in the SiC—C equilibrium vapor pressure environment by heating the main container 30 having an atomic ratio Si/C of 1 in the container.
- the epitaxial layer 20 was grown in the SiC--C equilibrium vapor pressure environment, but similar effects can be expected even when the SiC--Si equilibrium vapor pressure environment is employed.
- a TaC container having a tantalum silicide layer inside was used as the high melting point container 40 .
- a Si vapor pressure environment is formed in the high melting point container 40 by supplying Si vapor from the tantalum silicide layer into the container during heat treatment.
- Measurement step S20 Carrier concentration was measured at nine measurement points P shown in FIG. 5 for the epitaxial layer 20 grown in the growth step S10 (measurement step S21). Specifically, the measurement point P at the center, the measurement points P at positions 40 mm, 20 mm, -20 mm, -40 mm along the X direction with the center as the starting point, and 40 mm, 20 mm, -20 mm along the Y direction , -40 mm, and at nine measurement points P, the carrier concentration was measured. Using these results, the average value, standard deviation, and coefficient of variation were calculated (calculation step S22).
- Table 1 shows the results of Examples 1-5 and Comparative Examples 1-5. E+15 in the table indicates x1015 , E+16 in the table indicates x1016 , and E+17 in the table indicates x1018 .
- the standard deviation of the carrier concentration of the epitaxial layers according to Comparative Examples 1 to 5 was 1.0 ⁇ 10 17 cm ⁇ 3 or more, whereas the epitaxial layers according to Examples 1 to 5 had standard deviations of 1.0 ⁇ 10 17 cm ⁇ 3 or more.
- the standard deviation of carrier concentration was 1.0 ⁇ 10 17 cm ⁇ 3 or less.
- the standard deviation of the carrier concentration of the epitaxial layers according to Examples 1 to 4 is 2.0 ⁇ 10 16 cm ⁇ 3 or less
- the standard deviation of the carrier concentration of the epitaxial layer according to Example 5 is 3.0 ⁇ 10 16 cm ⁇ 3 . It was 0 ⁇ 10 15 cm ⁇ 3 or less. From the above, it was found that an epitaxial layer having a standard deviation of carrier concentration of 1.0 ⁇ 10 17 cm ⁇ 3 or less can be obtained by including a growth step of growing under an equilibrium vapor pressure environment.
- the variation coefficient of the carrier concentration of the epitaxial layers according to Comparative Examples 1 to 5 was 0.05 or more, whereas the variation of the carrier concentration of the epitaxial layers according to Examples 1 to 5 The coefficient was 0.05 or less.
- the variation coefficient of carrier concentration of the epitaxial layers according to Examples 3 and 5 is 0.03 or less
- the variation coefficient of carrier concentration of the epitaxial layers according to Examples 1 and 2 is 0.03. 02 or less
- the variation coefficient of the carrier concentration of the epitaxial layer according to Example 4 was 0.01 or less.
- Reference Signs List 100 101 semiconductor substrate 200, 201 semiconductor device 10 bulk layer 20 epitaxial layer 21 first epitaxial layer 22 second epitaxial layer 30 main container 31 upper container 32 lower container 33 gap 34 Si vapor supply source 40 high melting point container 41 Upper container 42 Lower container 43 Gap 44 Si vapor supply source 50 Device region 51 Doping region 52 Insulating film 53 Electrode S10 Growth step S20 Measurement step S21 Measurement step S22 Calculation step S30 Device formation step
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Abstract
Description
本発明にかかるエピタキシャル層のキャリア濃度を均一化する方法は、バルク層10の上にエピタキシャル層20を平衡蒸気圧環境下で成長させる成長工程S10と、前記エピタキシャル層20のキャリア濃度の平均値及び標準偏差を計測する計測工程S20と、を含む。
以下、実施の形態にかかる成長工程S10の成長条件について詳細に説明する。
本明細書における「平衡蒸気圧環境」とは、バルク層10の材料とエピタキシャル層20の原料とが気相を介して相平衡状態になっているときの蒸気圧の環境を指す。
以下、炭化ケイ素のエピタキシャル層20を成長させる成長工程S10を例にして、詳細に説明する。
バルク層10の半導体材料としては、一般的に用いられる化合物半導体の材料であれば採用することができる。例として、炭化ケイ素(SiC)を用いて詳細に説明するが、他の既知のIV-IV族化合物半導体材料を採用しても良い。また、半導体材料は、酸化亜鉛(ZnO)、硫化亜鉛(ZnS)、セレン化亜鉛(ZnSe)、硫化カドミウム(CdS)、テルル化カドミウム(CdTe)等の既知のII-VI族化合物半導体材料を採用しても良い。また、半導体材料は、例として、窒化ホウ素(BN)、ガリウムヒ素(GaAs)、窒化ガリウム(GaN)、窒化アルミニウム(AlN)、窒化インジウム(InN)、リン化ガリウム(GaP)、リン化インジウム(InP)、アンチモン化インジウム(InSb)等の既知のIII-V族化合物半導体材料を採用しても良い。また、半導体材料は、例として、酸化アルミニウム(Al2O3)、酸化ガリウム(Ga2O3)等の酸化物半導体材料を採用しても良い。なお、バルク層10は、その材料に応じて用いられる既知の添加原子が、適宜添加されている構成であってよい。
エピタキシャル層20は、キャリア濃度のバラツキが抑制された層である。エピタキシャル層20のキャリア濃度の標準偏差は、好ましくは、1.0×1017cm-3以下であり、より好ましくは5.0×1016cm-3以下であり、さらに好ましくは3.0×1016cm-3以下であり、さらに好ましくは2.0×1016cm-3以下であり、さらに好ましくは1.0×1016cm-3以下であり、さらに好ましくは5.0×1015cm-3以下であり、さらに好ましくは3.0×1015cm-3以下である。
本体容器30は、下地基板(バルク層10)を収容可能であり、成長させる半導体材料の元素を含む気相種の蒸気圧を内部に発生させるよう構成されている。例えば、炭化ケイ素のエピタキシャル層20を成長させる場合には、加熱処理時にSi元素を含む気相種及びC元素を含む気相種の蒸気圧を内部空間に発生させる構成であれば良い。例えば、本体容器30は、多結晶SiCを含む材料で構成されている。実施の形態においては、本体容器30の全体が多結晶SiCで構成されている。このような材料で構成された本体容器30を加熱することで、Si元素を含む気相種及びC元素を含む気相種の蒸気圧を発生させることができる。
高融点容器40は、高融点材料を含んで構成されている。例えば、汎用耐熱部材であるC、高融点金属であるW,Re,Os,Ta,Mo、炭化物であるTa9C8,HfC,TaC,NbC,ZrC,Ta2C,TiC,WC,MoC、窒化物であるHfN,TaN,BN,Ta2N,ZrN,TiN、ホウ化物であるHfB2,TaB2,ZrB2,NB2,TiB2,多結晶SiC、又は、本体容器30と同様の材料、等を例示することができる。
計測工程S20は、エピタキシャル層20の複数の測定点Pにおいてキャリア濃度を測定する測定工程S21と、これら複数の測定点Pの結果から平均値と標準偏差を算出する算出工程S22と、を有する。
本発明にかかる半導体の基板は、前述したエピタキシャル層のキャリア濃度を均一化する方法を用いて製造される基板100、101であり、キャリア濃度が均一化されたエピタキシャル層20を備える。なお、基板を製造する工程において、バルク層10の全てを除去する場合には、半導体の基板はエピタキシャル層20で構成される。
図6は、実施の形態にかかる半導体装置を製造する方法を説明する説明図である。図7は、他の実施の形態にかかる炭化ケイ素の半導体装置を製造する方法を説明する説明図である。なお、先の実施の形態に示した構成と基本的に同一の構成要素については、同一の符号を付してその説明を簡略化する。
デバイス形成工程S30は、例えば、エピタキシャル層20を有する基板の上に回路パターンを形成するパターニング工程S31と、この回路パターンを利用して基板中にドーピング領域51を導入するドーピング工程S32と、絶縁膜52を形成する絶縁膜形成工程S33と、電極53を形成する電極形成工程S34と、を含む。
本発明にかかる半導体装置は、前述したエピタキシャル層のキャリア濃度を均一化する方法を用いて製造される半導体装置200、201であり、キャリア濃度が均一化されたエピタキシャル層(エピタキシャル層20又は第1のエピタキシャル層21)と、デバイス領域50と、を備える。
成長工程S10は、炭化ケイ素の基板を本体容器30に収容し、さらに、本体容器30を高融点容器40に収容し、加熱炉を用いて1900℃で加熱した。
成長工程S10にて成長させたエピタキシャル層20に対し、図5に示す9つの測定点Pにおいてキャリア濃度を測定した(測定工程S21)。具体的には、中心部の測定点Pと、中心を起点としX方向に沿って40mm、20mm、-20mm、-40mmの位置の測定点Pと、Y方向に沿って40mm、20mm、-20mm、-40mmの位置の測定点Pと、の9つの測定点Pにおいてキャリア濃度を測定した。それらの結果を用いて平均値、標準偏差、及び、変動係数を算出した(算出工程S22)。
200、201 半導体装置
10 バルク層
20 エピタキシャル層
21 第1のエピタキシャル層
22 第2のエピタキシャル層
30 本体容器
31 上容器
32 下容器
33 間隙
34 Si蒸気供給源
40 高融点容器
41 上容器
42 下容器
43 間隙
44 Si蒸気供給源
50 デバイス領域
51 ドーピング領域
52 絶縁膜
53 電極
S10 成長工程
S20 計測工程
S21 測定工程
S22 算出工程
S30 デバイス形成工程
Claims (17)
- バルク層の上にエピタキシャル層を平衡蒸気圧環境下で成長させる成長工程を含む、エピタキシャル層のキャリア濃度を均一化する方法。
- 前記キャリア濃度の平均値と標準偏差を計測する計測工程を含む、請求項1に記載の前記方法。
- 前記計測工程は、前記エピタキシャル層の複数の測定点において前記キャリア濃度を測定する測定工程と、
前記複数の測定点の結果から前記キャリア濃度の平均値と標準偏差を算出する算出工程と、を有する、請求項2に記載の前記方法。 - 前記成長工程は、前記キャリア濃度の変動係数が0.05以下であるエピタキシャル層を成長させる工程である、請求項1~3の何れか一項に記載の前記方法。
- 前記成長工程は、前記キャリア濃度の標準偏差が1×1017cm-3以下である前記エピタキシャル層を成長させる工程である、請求項1~3の何れか一項に記載の前記方法。
- 前記成長工程は、少なくとも4インチ以上の径を有するバルク層の上に前記エピタキシャル層を成長させる工程である、請求項1~5の何れか一項に記載の前記方法。
- 請求項1~6の何れか一項に記載の方法を用いて半導体の基板を製造する方法。
- 請求項7に記載の方法により製造した半導体の基板であって、
前記エピタキシャル層における前記キャリア濃度の変動係数が0.05以下である、半導体の基板。 - 請求項7に記載の方法により製造した半導体の基板であって、
前記エピタキシャル層における前記キャリア濃度の標準偏差が1×1017cm-3以下である、半導体の基板。 - キャリア濃度の変動係数が0.05以下であるエピタキシャル層を備える、半導体の基板。
- キャリア濃度の標準偏差が1×1017cm-3以下であるエピタキシャル層を備える、半導体の基板。
- 少なくとも4インチ以上の径を有する、請求項8~11の何れか一項に記載の前記基板。
- 請求項1~6の何れか一項に記載の方法により成長させたエピタキシャル層を有する半導体の基板を用いて半導体装置を製造する方法であって、
前記基板の一部にデバイス領域を形成するデバイス形成工程を含む、半導体装置を製造する方法。 - 請求項13に記載の方法により製造した半導体装置であって、
前記エピタキシャル層のキャリア濃度の変動係数が0.05以下である、半導体装置。 - 請求項13に記載の方法により製造した半導体装置であって、
前記エピタキシャル層のキャリア濃度の標準偏差が1×1017cm-3以下である、半導体装置。 - キャリア濃度の変動係数が0.05以下であるエピタキシャル層を備える、半導体装置。
- キャリア濃度の標準偏差が1×1017cm-3以下であるエピタキシャル層を備える、半導体装置。
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JP2019121690A (ja) | 2018-01-05 | 2019-07-22 | 国立研究開発法人産業技術総合研究所 | 炭化珪素半導体基板および炭化珪素半導体基板の製造方法 |
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