WO2023032426A1 - Dispositif de conversion de puissance - Google Patents

Dispositif de conversion de puissance Download PDF

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Publication number
WO2023032426A1
WO2023032426A1 PCT/JP2022/024860 JP2022024860W WO2023032426A1 WO 2023032426 A1 WO2023032426 A1 WO 2023032426A1 JP 2022024860 W JP2022024860 W JP 2022024860W WO 2023032426 A1 WO2023032426 A1 WO 2023032426A1
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Prior art keywords
unit
converter
converters
voltage
multilevel
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PCT/JP2022/024860
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English (en)
Japanese (ja)
Inventor
卓郎 新井
洋平 久保田
元紀 西尾
正樹 金森
慶一 加藤
健太 山本
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東芝キヤリア株式会社
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Priority to JP2023545108A priority Critical patent/JP7532676B2/ja
Publication of WO2023032426A1 publication Critical patent/WO2023032426A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/49—Combination of the output voltage waveforms of a plurality of converters

Definitions

  • An embodiment of the present invention relates to a power converter that is connected in parallel with an air conditioner to a power line of an AC power supply system to which an air conditioner is connected via a breaker.
  • An active filter that is connected to a power line to which an air conditioner equipped with an inverter device that easily generates harmonics is connected and that supplies AC voltage to the power line to suppress harmonics generated by the air conditioner.
  • a power converter such as a two-level converter is used as such an active filter.
  • a breaker for overcurrent cutoff is placed on the power line to which the air conditioner is connected.
  • the breaker operates to cut off the power line when an excessive current flows in the power line. For example, when a system short-circuit current flows from the power supply line to the air conditioner due to an inverter, motor, or the like in the air conditioner, the breaker operates to prevent damage to the power system from spreading.
  • an object of the embodiments of the present invention is to provide a power converter that can suppress harmonics in an air conditioner and avoid unnecessary shutdown of the air conditioner.
  • the power conversion device of the embodiment is connected to a plurality of power lines of an AC power supply system to which an air conditioner is connected via a breaker in parallel with the air conditioner, and a plurality of switch elements and these switch elements are connected to each other.
  • a plurality of unit converters each including a capacitor connected to the output terminal via an on/off switching element for outputting a plurality of levels of DC voltage from the output terminal;
  • a connected multi-level converter was provided downstream of the breaker in each of the power supply lines.
  • FIG. 1 is a block diagram showing the configuration of an embodiment
  • FIG. 5 is a diagram showing the configuration of a voltage command value calculation unit in FIG. 4
  • FIG. 4 is a diagram showing waveforms of voltage and current of each part in one embodiment
  • FIG. 5 is a diagram showing the configuration of a cell failure detection unit in FIG. 4
  • FIG. 4 is a diagram showing changes in load current and cell output voltage before and after a short circuit fault in one embodiment; The figure which shows the change of the load current before and behind the short circuit failure in the modification of one embodiment, and a cell output voltage. The figure which shows the path
  • U-phase, V-phase, and W-phase power lines (first, second, and third power lines) Lu, Lv, and Lw of a three-phase AC system (including an electric power system and a distribution system) 1 have An air conditioner 2 is connected via a breaker B for overcurrent interruption.
  • the air conditioner 2 includes a rectifier circuit 3 that rectifies the system voltages (three-phase AC voltages) Eu, Ev, and Ew of the power lines Lu, Lv, and Lw by bridge-connected diodes 3a to 3f, and the output voltage of the rectifier circuit 3 is A DC capacitor 5 applied through a DC reactor 4, an inverter 6 converting the voltage of the DC capacitor 5 into an AC voltage of a predetermined frequency and outputting it, a compressor motor 7 operated by the output of the inverter 6, and the compressor It includes a current detector 8 that detects a current (motor current) flowing through the motor 7, and a controller 9 that controls the inverter 6 according to the detection result of the current detector 8 and a command from a control section 15, which will be described later.
  • a current detector 8 that detects a current (motor current) flowing through the motor 7, and a controller 9 that controls the inverter 6 according to the detection result of the current detector 8 and a command from a control section 15, which will be described later.
  • a power conversion device 10 of the present embodiment is connected in parallel with the air conditioner 2 between the breaker B and the air conditioner 2 on the power lines Lu, Lv, and Lw.
  • An electric device 30 such as another air conditioner is connected to the power lines Lu, Lv, and Lw between the breaker B and the upstream side of the connecting position of the power converter 10 .
  • the power conversion device 10 includes switch contacts (for example, normally closed relay contacts) Su, Sv, and Sw, buffer reactors 11u, 11v, and 11w, these switch contacts Su, Sv, and Sw, and the buffer reactors 11u, 11v, and 11w.
  • Multilevel converters (first, second and third multilevel converters) 12u having one end connected to the downstream side of the breaker B in the power supply lines Lu, Lv and Lw via and the other end interconnected (star connection) , 12v, 12w, and the power supply lines Lu, Lv, Lw, the system voltages Eu, Ev, Ew and the current flowing through the air conditioner 2 are arranged at positions closer to the air conditioner 2 than the connection positions of the switch contacts Su, Sv, Sw.
  • Detectors 13 for detecting ILu, ILv, and ILw are arranged in current paths between the buffer reactors 11u, 11v, and 11w and the multilevel converters 12u, 12v, and 12w, and the multilevel converters 12u, 12v, and 12w.
  • the operating voltage Vdd is, for example, 5V or 15V, and is also used as an operating voltage for voltage detectors 34, 44, 54 (described later) in the multilevel converters 12u, 12v, 12w.
  • the switch contacts Su, Sv, and Sw are controlled to be opened and closed by the control unit 15, and are normally in a closed state, and are opened in an emergency such as the occurrence of a short circuit.
  • a terminal of the potential G serving as a reference for the output voltage of the control power supply section 16 is connected to, for example, a neutral point K which is an interconnection point of the other ends of the multilevel converters 12u, 12v, and 12w.
  • This potential G terminal may be connected to the negative side terminal of the DC capacitor 5 for fixing the potential.
  • a multi-level converter 12u connected to a power supply line Lu includes a plurality of unit converters 21u, 22u, and 23u, each of which selectively generates and outputs a plurality of levels (multi-levels) of DC voltages by switching, connected in series (cascaded). connected), and the output voltages (cell output voltages) Vcu1, Vcu2, and Vcu3 of the unit converters 21u, 22u, and 23u are added to form a sine wave for reducing harmonics.
  • An AC voltage Vcu0 with a similar waveform is generated and output.
  • the multi-level converter 12v connected to the power supply line Lv is a so-called multi-serial converter formed by connecting in series a plurality of unit converters 21v, 22v, and 23v, each of which selectively generates and outputs a plurality of levels of DC voltage by switching.
  • the output voltages (cell output voltages) Vcv1, Vcv2, and Vcv3 of the unit converters 21v, 22v, and 23v, which are converter clusters, are added to generate an AC voltage Vcv0 with a waveform close to a sine wave for reducing harmonics. output.
  • a multilevel converter 12w connected to a power supply line Lw includes a plurality of unit converters (third unit converters) 21w, 22w, and 23w each selectively generating and outputting a plurality of levels of DC voltages by switching. It is a so-called multi-serial converter cluster formed by connecting, and the output voltages (cell output voltages) Vcw1, Vcw2, and Vcw3 of the unit converters 21w, 22w, and 23w are added to form a near sine wave for reducing harmonics. A waveform AC voltage Vcw0 is generated and output.
  • the number of unit converters 21, 22, and 23 included in each multilevel converter 12 is three here, any number of unit converters 21, 22, and 23 may be used as long as the number is two or more.
  • the control unit 15 controls compensation currents Icu, Icv, Icw to be added to the load currents ILu, ILv, ILw. are calculated respectively. Further, the control unit 15 calculates AC voltages Vcu0, Vcv0, Vcw0 required to supply the calculated compensation currents Icu, Icv, Icw, and unit converters 21u, 22u, 23u for obtaining the AC voltages Vcu0. to determine the output voltages Vcu1, Vcu2 and Vcu3. Then, the control section 15 controls the operation of each unit converter in the multilevel converters 12u, 12v, 12w so as to obtain the determined output voltages Vcu1, Vcu2, Vcu3.
  • AC voltages Vcu0, Vcv0, Vcw0 are supplied from the multilevel converters 12u, 12v, 12w to the power supply lines Lu, Lv, Lw, thereby compensating and suppressing harmonics contained in the load currents ILu, ILv, ILw. be able to. That is, the power converter 10 operates as a so-called active filter.
  • FIG. 2 shows the circuit configuration of the unit converters 21u, 22u, and 23u in the multilevel converter 12u.
  • the unit converter 21u has output terminals P1 and N1, a first switch element leg formed by connecting in series switch elements Q1a and Q1b each having a parasitic diode D, and switch elements Q1c and Q1d each having a parasitic diode D connected in series.
  • a second switch element leg connected in parallel to the first switch element leg, a capacitor C1 connected to the output terminals P1 and N1 through these switch elements Q1a to Q1d, and a switch according to a drive signal from the control unit 15.
  • a bypass switch for example, a bidirectional semiconductor switch
  • the unit converter 22u has output terminals P2 and N2, a first switch element leg formed by connecting in series switch elements Q2a and Q2b each having a parasitic diode D, and switch elements Q2c and Q2d each having a parasitic diode D connected in series.
  • a second switch element leg connected in parallel to the first switch element leg, a capacitor C2 connected to the output terminals P2 and N2 through these switch elements Q2a to Q2d, and a switch according to a drive signal from the control unit 15.
  • a buffer circuit 46 includes a bypass switch (for example, a bidirectional semiconductor switch) 47 connected to the output terminals P2 and N2. It generates and outputs a DC voltage Vcu2 of (positive level/zero level/negative level).
  • the unit converter 23u has output terminals P3 and N3, a first switch element leg formed by connecting in series switch elements Q3a and Q3b each having a parasitic diode D, and switch elements Q3c and Q3d each having a parasitic diode D connected in series.
  • a second switch element leg connected in parallel to the first switch element leg, a capacitor C3 connected to the output terminals P3 and N3 via these switch elements Q3a to Q3d, and a switch according to a drive signal from the control unit 15.
  • a buffer circuit 56 includes a bypass switch (for example, a bidirectional semiconductor switch) 57 connected to the output terminals P3 and N3. It generates and outputs a DC voltage Vcu3 of (positive level/zero level/negative level).
  • the switching elements Q1a to Q3d of the unit converters 21u, 22u, and 23u are semiconductor switching elements such as MOSFETs and IGBTs.
  • the bypass switches 37, 47, and 57 are controlled to be turned on and off by the control unit 15, and are normally in an off (open) state, and are turned on (closed) in an emergency such as when a short circuit occurs.
  • first, a second, a third, and a fourth energization paths as the plurality of energization paths formed by turning on and off the switch elements Q1a to Q1d in the unit converter 21u.
  • first to fourth conducting paths as a plurality of conducting paths formed by turning on and off the switching elements Q2a to Q2d in the unit converter 22u.
  • first to fourth energizing paths as the plurality of energizing paths formed by turning off.
  • the switching elements Q2a and Q2c are turned on and the switching elements Q2b and Q2d are turned off during the positive level period of the system voltage Eu.
  • Vcu2 zero level cell output voltage
  • the switching elements Q3a and Q3d are turned on and the switching elements Q3b and Q3c are turned off.
  • the output terminal P1 of the unit converter 21u is connected to the power supply line Lu via the switch contacts Su, Sv, Sw and the buffer reactor 11u as one end of the multilevel converter 12u, and the output terminal N1 of the unit converter 21u is used for unit conversion.
  • the output terminal P2 of the unit converter 22u is connected, the output terminal P3 of the unit converter 23u is connected to the output terminal N2 of the unit converter 22u, and the output terminal N3 of the unit converter 23u serves as the other end of the multilevel converter 12u. It is interconnected (star connection) with the other ends of the multilevel converters 12v and 12w.
  • FIG. 3 shows the relationship between the ON/OFF pattern of the switch elements Q1a to Q1d for obtaining the cell output voltage Vcu1 of multiple levels (positive level, zero level, negative level) from the unit converter 21u and the cell output voltage Vcu1.
  • PWM control pulse width modulation control
  • FIG. 3 shows the relationship between the ON/OFF pattern of the switch elements Q1a to Q1d for obtaining the cell output voltage Vcu1 of multiple levels (positive level, zero level, negative level) from the unit converter 21u and the cell output voltage Vcu1.
  • PWM control pulse width modulation control
  • a state in which all of the switch elements Q1a to Q1d in the unit converter 21u are turned off is called a gate block (GB) state.
  • GB gate block
  • conduction paths are formed between the output terminals P1, N1 and the capacitor C1 through the parasitic diodes D of the switch elements Q1a to Q1d, respectively.
  • the capacitor C1 is short-circuited through the switch elements Q1a-Q1d.
  • the voltage detection unit 34 of the unit converter 21u has an inverting input terminal (-) connected to one end of the capacitor C1 via the first voltage dividing resistor R1, and the other end of the capacitor C1 to the second voltage dividing resistor R2.
  • a non-inverting input terminal (+) connected to a common potential G through a third voltage dividing resistor R3, and connected to the inverting input terminal (-) through a fourth voltage dividing resistor R4.
  • the voltage detection section 44 of the unit converter 22u and the voltage detection section 54 of the unit converter 23u also detect voltages Vx2 and Vx3 at levels corresponding to the voltages (capacitor voltages) Vc2 and Vc3 across the capacitors C2 and C3, respectively. Output from each operational amplifier A.
  • Each of the operational amplifiers A of the unit converters 21u, 22u, and 23u has a positive power supply terminal to which a positive voltage +Vdd based on the operating voltage Vdd output from the control power supply section 16 shown in FIG. and a negative power supply terminal to which a negative voltage -Vdd is applied. If an offset circuit is provided to remove fluctuations in the potential of the negative power supply terminal, only the positive voltage +Vdd may be applied to the operational amplifier A as the operating voltage.
  • the configuration and operation of the multilevel converter 12u have been described so far, the configuration and operation are the same for the multilevel converters 12v and 12w.
  • control unit 15 includes a voltage command value calculation unit 61 and a PWM control unit 62 as control means for each unit converter of the multilevel converters 12u, 12v, and 12w.
  • a PWM control unit 62 as control means for each unit converter of the multilevel converters 12u, 12v, and 12w.
  • 12v, and 12w includes a cell failure detection section 63 as detection means for detecting a short circuit failure of each switch element.
  • An inverter circuit 64 and an AND circuit 65 are included as control means for turning off all switch elements Q1a to Q3d of each unit converter in the multilevel converters 12u, 12v, 12w.
  • a voltage command value calculator 61 calculates voltage command values Vcu sin ⁇ and Vcv sin( ⁇ 2 ⁇ / 3), Vcw sin ( ⁇ +2 ⁇ /3) is set, and as shown in FIG. 74 included.
  • a compensating current command unit 71 computes the load currents ILu, ILv, and ILw in rotational coordinates and removes low frequency components from the computation results, thereby obtaining a d-axis compensating current command value Id_comp and a q-axis compensating current command value for harmonic suppression.
  • Iq_comp is obtained, and the d-axis compensation current command value Id_comp is added with the current command value Id_avr for controlling the capacitor voltage average value and the d-axis negative-phase current command value Id_inv for suppressing the imbalance of the capacitor voltage average value.
  • the d-axis current command value Id_ref is obtained, and the q-axis negative-phase current command value Iq_inv for suppressing the imbalance between the phases of the capacitor voltage average value is added to the q-axis compensation current command value Iq_comp obtained above.
  • Id_ref Id_comp + Id_avr + Id_inv
  • Iq_ref Iq_comp + Iq_inv
  • the capacitor voltage average value command unit 72 calculates a proportional integral (PI) gain for the deviation between the cell voltage command value for each unit converter and the capacitor voltage average values Vcux, Vcvx, and Vcwx in the multilevel converters 12u, 12v, and 12w. to obtain the current command value Id_avr.
  • PI proportional integral
  • the capacitor voltage average value balance command unit 73 converts the capacitor voltage average values Vcux, Vcvx, and Vcwx in the multilevel converters 12u, 12v, and 12w into three phases and two phases according to the following equations.
  • the interphase deviations of the capacitor voltage average values Vcux, Vcvx, and Vcwx can be converted into the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb.
  • the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb are controlled to be zero, it is possible to suppress interphase imbalance of the capacitor voltage average values Vcux, Vcvx, and Vcwx.
  • the capacitor voltage average value balance command unit 73 multiplies the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb by a proportional integral gain, and converts the multiplication result into a rotating coordinate at a double angular frequency as shown in the following equation. , the d-axis negative-phase current command value Id_inv and the q-axis negative-phase current command value Iq_inv for suppressing the imbalance of the capacitor voltage average values Vcux, Vcvx, and Vcwx are obtained.
  • the compensation current control unit 74 Based on the d-axis current command value Id_ref and the q-axis current command value Id_ref obtained by the compensation current command unit 71, the compensation current control unit 74 converts AC voltages having substantially the same waveforms as the system voltages Eu, Ev, and Ew to the multilevel converter.
  • FIG. 6 shows waveforms of currents including the voltage of each part at this time and the d-axis reversed-phase current command value Id_inv and the q-axis reversed-phase current command value Iq_inv.
  • the PWM control unit 62 controls the voltage level of the triangular carrier signal and the voltage levels of the voltage command values Vcu sin ⁇ , Vcv sin( ⁇ 2 ⁇ /3), and Vcw sin( ⁇ +2 ⁇ /3) from the voltage command value calculation unit 61. is generated by pulse width modulation that compares . The generated gate signal is supplied to each unit converter of the multilevel converters 12u, 12v and 12w via one input terminal of the AND circuit 65.
  • a cell failure detection unit 63 detects a failure of each unit converter based on the voltage of all the capacitors C1 to C3 and the current flowing through all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w. It detects a failure and outputs a logic "1" cell failure signal when there is a failure, and includes comparison/determination units 81, 82, 83 and an OR circuit 84 as shown in FIG. The generated cell failure signal is supplied to the other input terminal of the AND circuit 65 with its logic inverted by the inverting circuit 64 and supplied to the controller 9 of the air conditioner 2 .
  • the comparison determination unit 81 determines that the capacitor with the smaller voltage exists. It is determined that there is a short-circuit fault in the switching element of the unit converter. For example, when the voltage of the capacitor C1 of the unit converter 21u (detected voltage of the voltage detector 34) Vc1 becomes smaller than the first threshold value, the comparison and determination unit 81 selects one of the switch elements Q1a to Q1d of the unit converter 21u. determines that there is a short circuit fault, and issues a logic "1" cell fault signal.
  • the comparison determination unit 82 Determine that there is some fault in the unit converter where the large voltage capacitor resides. For example, when the voltage of the capacitor C2 of the unit converter 21v (detected voltage of the voltage detector 44) Vc2 is greater than the second threshold (>first threshold), the comparison determination unit 82 determines that the unit converter 21v has some kind of failure. and issues a logic "1" cell failure signal.
  • the comparison determination unit 83 determines the unit in which the capacitor through which the current equal to or greater than the threshold exists. It is determined that there is a short-circuit fault in the switch element of the converter. For example, when the current flowing through the capacitor C2 of the unit converter 21v (the current detected via the shunt resistor 45) abnormally rises above the threshold value, the comparison determination unit 83 determines whether the switch elements Q1a to Q1d of the unit converter 21v It determines that there is a short circuit fault in either of them, and issues a logic "1" cell fault signal.
  • the cell failure signals generated from the comparison/determination units 81 , 82 , 83 are supplied to the inverting circuit 64 through an OR circuit 84 and to the controller 9 of the air conditioner 2 . That is, when the cell failure detection unit 63 does not detect a failure, the AND condition of the AND circuit 65 is established, so the gate signals output from the PWM control unit 62 are passed through the AND circuit 65 to the multilevel converters 12u, 12v, and 12w. Supplied to each unit converter. As a result, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w are repeatedly turned on and off.
  • the cell failure detection unit 63 detects a failure, the AND condition of the AND circuit 65 is not established, so the gate signal output from the PWM control unit 62 is interrupted by the AND circuit 65 and the multilevel converters 12u, 12v, Not supplied to each 12w unit converter. As a result, all the switch elements Q1a to Q3d in each unit converter are turned off (opened) and the off state is maintained.
  • the comparison determination section 81 of the cell fault detection section 63 issues a cell fault signal of logic "1". Also, if the cell short-circuit current is equal to or greater than the threshold, the cell failure signal of logic "1" is issued from the comparison/determination unit 83 of the cell failure detection unit 63 .
  • a logic "1" cell failure signal is issued, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w are turned off (opened) and the off state is maintained. In this case, control is performed to turn off all the switch elements Q1a to Q3d, but the switch elements Q1a and Q1b of the unit converter 21u in which the short-circuit failure has occurred remain short-circuited and do not operate.
  • the system short-circuit current based on the line voltage Euv of the power supply lines Lu and Lv flows along the path indicated by the thick arrow in FIG.
  • the system short-circuits through a path that passes through the diode D and the capacitors C2 and C3, through one of the short-circuited switch elements Q1a and Q1b in the unit converter 21u, and through the parasitic diode D of the switch elements Q1c and Q1d in the unit converter 21u. current tries to flow.
  • the path through which the system short-circuit current is to flow includes capacitors C1, C2, and C3 of unit converters 21v, 22v, and 23v, excluding capacitor C1 of unit converter 21u. 23u capacitors C2 and C3 are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc2, and Vc3 of these five intervening capacitors is higher than the line voltage Euv, no short-circuit current will flow. Euv ⁇ (Vc1+Vc2+Vc3+Vc2+Vc3)
  • the multi-level converter 12w with a short-circuit fault and the multi-level converter 12u with no short-circuit fault there is a unit conversion Except for the capacitor C1 of the unit 21u, the capacitors C1, C2 and C3 of the unit converters 21w, 22w and 23w are interposed, and the capacitors C2 and C3 of the unit converters 22u and 23u are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc2 and Vc3 of these intervening five capacitors is higher than the line voltage Ewu, no short-circuit current will flow. Ewu ⁇ (Vc1+Vc2+Vc3+Vc2+Vc3)
  • the path through which the system short-circuit current based on the line voltage Evw of the power supply lines Lv and Lw tries to flow includes the capacitors C1 of the unit converters 21v, 22v and 23v. , C2 and C3 are interposed, and further capacitors C1, C2 and C3 of unit converters 22w, 22w and 23w are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc1, Vc2, Vc3 of these intervening six capacitors is higher than the line voltage Evw, no short-circuit current will flow. Evw ⁇ (Vc1+Vc2+Vc3+Vc1+Vc2+Vc3)
  • the power supply lines Lu, Lv, and Lw are connected to the multilevel converters 12u, 12v, and 12v.
  • No system short-circuit current flows through 12w. Since the system short-circuit current does not flow, the breakers B of the power supply lines Lu, Lv, and Lw do not operate, and the air conditioner 2 can continue to operate. Furthermore, since the breaker B does not operate, the other electrical equipment 30 (see FIG. 1) connected in parallel with the air conditioner 2 can also continue to operate.
  • FIG. 9 shows changes in the load currents ILu, ILv, ILw and the cell output voltages Vcu1, Vcu2, Vcu3 of the unit converters 21u, 22u, 23u before and after the occurrence of the short-circuit fault.
  • the cell output voltage Vcu1 of the unit converter 21u drops due to the short-circuit fault, there is no problem such as a sudden increase in the load currents ILu, ILv, and ILw, and the waveform is simply in a state where harmonics are not suppressed. ing.
  • the comparison determination unit 81 determines whether any of the voltages Vc1 to Vc3 of all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w is The difference between the voltage smaller than the first threshold and the average value of the voltages Vc1, Vc2, and Vc3 of each capacitor in each unit converter of the multilevel converters 12u, 12v, and 12w is the second threshold ( >first threshold), it is determined that there is a short-circuit fault in the switch element of the unit converter having a capacitor with a voltage lower than the first threshold. It is possible to prevent erroneous detection of a short-circuit failure, such as at startup when the voltages Vc1, Vc2, and Vc3 of the capacitors have not sufficiently increased.
  • the control unit 15 When detecting a short-circuit fault, the control unit 15 turns off all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w, and then opens the switch contacts Su, Sv, Sw. By opening the switch contacts Su, Sv, and Sw, the multilevel converters 12u, 12v, and 12w are separated from the power lines Lu, Lv, and Lw.
  • the capacitors C2 and C3 in the unit converters 21v and 21w are turned off as all the switch elements Q1a to Q3d are turned off.
  • the supply voltage will be applied to the two, and overvoltage may be applied to these capacitors C2 and C3. Also, by opening the switch contacts Su, Sv, and Sw, this overvoltage problem can be resolved, and the power converter 10 can be stopped safely.
  • the unit converters 21w, 22w, and 23w of the multilevel converter 12w may be configured to turn off all the switch elements Q1a to Q3d.
  • the controller 15 controls all the unit converters 21u of the multilevel converter 12u. switch elements Q1a to Q3d are turned off.
  • the system short-circuit current based on the line-to-line voltage Euv of the power supply lines Lu and Lv flows along the path indicated by the thick arrow in FIG. try That is, through the unit converters 21v, 22v, 23v, through the parasitic diodes D and capacitors C2, C3 of all the switch elements Q1a to Q3d in the unit converters 22u, 23u, the short-circuited switch element Q1a in the unit converter 21u , Q1b and the parasitic diode D of the switch elements Q1c and Q1d in the unit converter 21u.
  • the unit converter 21u By turning on the bypass switch 37, the unit converter 21u enters the bypass state within the multilevel converter 12u, and only the unit converters 22u and 23u function within the multilevel converter 12u. Although the number of functioning unit transducers is reduced, harmonic suppression can continue with the remaining unit transducers 22u, 23u.
  • SYMBOLS 1 Three-phase AC power supply, Lu, Lv, Lw... Power supply line (1st, 2nd, 3rd power supply line), 3... Air conditioner, 10... Power converter, 12u, 12v, 12w... Multilevel converter , 15... control section, 21u, 22u, 23u... unit converters, 21v, 22v, 23v... unit converters, 21w, 22w, 23w... unit converters, Q1a to Q3d... switch elements, C1, C2, C3... capacitors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

La présente invention concerne un dispositif de conversion de puissance qui est connecté en parallèle avec un climatiseur à une pluralité de lignes d'alimentation électrique d'un système d'alimentation c.a. auquel le climatiseur est connecté avec un disjoncteur interposé. Le dispositif de conversion de puissance comprend une pluralité de convertisseurs unitaires comprenant une pluralité d'éléments de commutation et un condensateur connecté à une borne de sortie via ces éléments de commutation, une tension continue d'une pluralité de niveaux est délivrée en sortie à partir de la borne de sortie par mise sous tension et hors tension de chaque élément de commutation, et un convertisseur multi-niveau formé par connexion en série de ces convertisseurs unitaires est disposé au niveau du côté aval par rapport au disjoncteur dans chacune des lignes d'alimentation électrique.
PCT/JP2022/024860 2021-09-02 2022-06-22 Dispositif de conversion de puissance WO2023032426A1 (fr)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1141931A (ja) * 1997-07-14 1999-02-12 Toshiba Corp 電力変換装置
US6075350A (en) * 1998-04-24 2000-06-13 Lockheed Martin Energy Research Corporation Power line conditioner using cascade multilevel inverters for voltage regulation, reactive power correction, and harmonic filtering
JP2007181253A (ja) * 2005-12-27 2007-07-12 Mitsubishi Electric Corp 電力変換装置
JP2010524425A (ja) * 2007-04-16 2010-07-15 シーメンス アクチエンゲゼルシヤフト マルチレベル接続構成を有するアクティブフィルタ
JP2013223275A (ja) * 2012-04-13 2013-10-28 Fuji Electric Co Ltd 電力変換装置
WO2019064705A1 (fr) * 2017-09-26 2019-04-04 三菱電機株式会社 Dispositif de conversion de puissance
JP2021002970A (ja) * 2019-06-24 2021-01-07 ダイキン工業株式会社 空気調和機

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1141931A (ja) * 1997-07-14 1999-02-12 Toshiba Corp 電力変換装置
US6075350A (en) * 1998-04-24 2000-06-13 Lockheed Martin Energy Research Corporation Power line conditioner using cascade multilevel inverters for voltage regulation, reactive power correction, and harmonic filtering
JP2007181253A (ja) * 2005-12-27 2007-07-12 Mitsubishi Electric Corp 電力変換装置
JP2010524425A (ja) * 2007-04-16 2010-07-15 シーメンス アクチエンゲゼルシヤフト マルチレベル接続構成を有するアクティブフィルタ
JP2013223275A (ja) * 2012-04-13 2013-10-28 Fuji Electric Co Ltd 電力変換装置
WO2019064705A1 (fr) * 2017-09-26 2019-04-04 三菱電機株式会社 Dispositif de conversion de puissance
JP2021002970A (ja) * 2019-06-24 2021-01-07 ダイキン工業株式会社 空気調和機

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