WO2023032426A1 - Power conversion device - Google Patents

Power conversion device Download PDF

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Publication number
WO2023032426A1
WO2023032426A1 PCT/JP2022/024860 JP2022024860W WO2023032426A1 WO 2023032426 A1 WO2023032426 A1 WO 2023032426A1 JP 2022024860 W JP2022024860 W JP 2022024860W WO 2023032426 A1 WO2023032426 A1 WO 2023032426A1
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Prior art keywords
unit
converter
converters
voltage
multilevel
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PCT/JP2022/024860
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French (fr)
Japanese (ja)
Inventor
卓郎 新井
洋平 久保田
元紀 西尾
正樹 金森
慶一 加藤
健太 山本
Original Assignee
東芝キヤリア株式会社
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Priority to JP2023545108A priority Critical patent/JPWO2023032426A1/ja
Publication of WO2023032426A1 publication Critical patent/WO2023032426A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/49Combination of the output voltage waveforms of a plurality of converters

Definitions

  • An embodiment of the present invention relates to a power converter that is connected in parallel with an air conditioner to a power line of an AC power supply system to which an air conditioner is connected via a breaker.
  • An active filter that is connected to a power line to which an air conditioner equipped with an inverter device that easily generates harmonics is connected and that supplies AC voltage to the power line to suppress harmonics generated by the air conditioner.
  • a power converter such as a two-level converter is used as such an active filter.
  • a breaker for overcurrent cutoff is placed on the power line to which the air conditioner is connected.
  • the breaker operates to cut off the power line when an excessive current flows in the power line. For example, when a system short-circuit current flows from the power supply line to the air conditioner due to an inverter, motor, or the like in the air conditioner, the breaker operates to prevent damage to the power system from spreading.
  • an object of the embodiments of the present invention is to provide a power converter that can suppress harmonics in an air conditioner and avoid unnecessary shutdown of the air conditioner.
  • the power conversion device of the embodiment is connected to a plurality of power lines of an AC power supply system to which an air conditioner is connected via a breaker in parallel with the air conditioner, and a plurality of switch elements and these switch elements are connected to each other.
  • a plurality of unit converters each including a capacitor connected to the output terminal via an on/off switching element for outputting a plurality of levels of DC voltage from the output terminal;
  • a connected multi-level converter was provided downstream of the breaker in each of the power supply lines.
  • FIG. 1 is a block diagram showing the configuration of an embodiment
  • FIG. 5 is a diagram showing the configuration of a voltage command value calculation unit in FIG. 4
  • FIG. 4 is a diagram showing waveforms of voltage and current of each part in one embodiment
  • FIG. 5 is a diagram showing the configuration of a cell failure detection unit in FIG. 4
  • FIG. 4 is a diagram showing changes in load current and cell output voltage before and after a short circuit fault in one embodiment; The figure which shows the change of the load current before and behind the short circuit failure in the modification of one embodiment, and a cell output voltage. The figure which shows the path
  • U-phase, V-phase, and W-phase power lines (first, second, and third power lines) Lu, Lv, and Lw of a three-phase AC system (including an electric power system and a distribution system) 1 have An air conditioner 2 is connected via a breaker B for overcurrent interruption.
  • the air conditioner 2 includes a rectifier circuit 3 that rectifies the system voltages (three-phase AC voltages) Eu, Ev, and Ew of the power lines Lu, Lv, and Lw by bridge-connected diodes 3a to 3f, and the output voltage of the rectifier circuit 3 is A DC capacitor 5 applied through a DC reactor 4, an inverter 6 converting the voltage of the DC capacitor 5 into an AC voltage of a predetermined frequency and outputting it, a compressor motor 7 operated by the output of the inverter 6, and the compressor It includes a current detector 8 that detects a current (motor current) flowing through the motor 7, and a controller 9 that controls the inverter 6 according to the detection result of the current detector 8 and a command from a control section 15, which will be described later.
  • a current detector 8 that detects a current (motor current) flowing through the motor 7, and a controller 9 that controls the inverter 6 according to the detection result of the current detector 8 and a command from a control section 15, which will be described later.
  • a power conversion device 10 of the present embodiment is connected in parallel with the air conditioner 2 between the breaker B and the air conditioner 2 on the power lines Lu, Lv, and Lw.
  • An electric device 30 such as another air conditioner is connected to the power lines Lu, Lv, and Lw between the breaker B and the upstream side of the connecting position of the power converter 10 .
  • the power conversion device 10 includes switch contacts (for example, normally closed relay contacts) Su, Sv, and Sw, buffer reactors 11u, 11v, and 11w, these switch contacts Su, Sv, and Sw, and the buffer reactors 11u, 11v, and 11w.
  • Multilevel converters (first, second and third multilevel converters) 12u having one end connected to the downstream side of the breaker B in the power supply lines Lu, Lv and Lw via and the other end interconnected (star connection) , 12v, 12w, and the power supply lines Lu, Lv, Lw, the system voltages Eu, Ev, Ew and the current flowing through the air conditioner 2 are arranged at positions closer to the air conditioner 2 than the connection positions of the switch contacts Su, Sv, Sw.
  • Detectors 13 for detecting ILu, ILv, and ILw are arranged in current paths between the buffer reactors 11u, 11v, and 11w and the multilevel converters 12u, 12v, and 12w, and the multilevel converters 12u, 12v, and 12w.
  • the operating voltage Vdd is, for example, 5V or 15V, and is also used as an operating voltage for voltage detectors 34, 44, 54 (described later) in the multilevel converters 12u, 12v, 12w.
  • the switch contacts Su, Sv, and Sw are controlled to be opened and closed by the control unit 15, and are normally in a closed state, and are opened in an emergency such as the occurrence of a short circuit.
  • a terminal of the potential G serving as a reference for the output voltage of the control power supply section 16 is connected to, for example, a neutral point K which is an interconnection point of the other ends of the multilevel converters 12u, 12v, and 12w.
  • This potential G terminal may be connected to the negative side terminal of the DC capacitor 5 for fixing the potential.
  • a multi-level converter 12u connected to a power supply line Lu includes a plurality of unit converters 21u, 22u, and 23u, each of which selectively generates and outputs a plurality of levels (multi-levels) of DC voltages by switching, connected in series (cascaded). connected), and the output voltages (cell output voltages) Vcu1, Vcu2, and Vcu3 of the unit converters 21u, 22u, and 23u are added to form a sine wave for reducing harmonics.
  • An AC voltage Vcu0 with a similar waveform is generated and output.
  • the multi-level converter 12v connected to the power supply line Lv is a so-called multi-serial converter formed by connecting in series a plurality of unit converters 21v, 22v, and 23v, each of which selectively generates and outputs a plurality of levels of DC voltage by switching.
  • the output voltages (cell output voltages) Vcv1, Vcv2, and Vcv3 of the unit converters 21v, 22v, and 23v, which are converter clusters, are added to generate an AC voltage Vcv0 with a waveform close to a sine wave for reducing harmonics. output.
  • a multilevel converter 12w connected to a power supply line Lw includes a plurality of unit converters (third unit converters) 21w, 22w, and 23w each selectively generating and outputting a plurality of levels of DC voltages by switching. It is a so-called multi-serial converter cluster formed by connecting, and the output voltages (cell output voltages) Vcw1, Vcw2, and Vcw3 of the unit converters 21w, 22w, and 23w are added to form a near sine wave for reducing harmonics. A waveform AC voltage Vcw0 is generated and output.
  • the number of unit converters 21, 22, and 23 included in each multilevel converter 12 is three here, any number of unit converters 21, 22, and 23 may be used as long as the number is two or more.
  • the control unit 15 controls compensation currents Icu, Icv, Icw to be added to the load currents ILu, ILv, ILw. are calculated respectively. Further, the control unit 15 calculates AC voltages Vcu0, Vcv0, Vcw0 required to supply the calculated compensation currents Icu, Icv, Icw, and unit converters 21u, 22u, 23u for obtaining the AC voltages Vcu0. to determine the output voltages Vcu1, Vcu2 and Vcu3. Then, the control section 15 controls the operation of each unit converter in the multilevel converters 12u, 12v, 12w so as to obtain the determined output voltages Vcu1, Vcu2, Vcu3.
  • AC voltages Vcu0, Vcv0, Vcw0 are supplied from the multilevel converters 12u, 12v, 12w to the power supply lines Lu, Lv, Lw, thereby compensating and suppressing harmonics contained in the load currents ILu, ILv, ILw. be able to. That is, the power converter 10 operates as a so-called active filter.
  • FIG. 2 shows the circuit configuration of the unit converters 21u, 22u, and 23u in the multilevel converter 12u.
  • the unit converter 21u has output terminals P1 and N1, a first switch element leg formed by connecting in series switch elements Q1a and Q1b each having a parasitic diode D, and switch elements Q1c and Q1d each having a parasitic diode D connected in series.
  • a second switch element leg connected in parallel to the first switch element leg, a capacitor C1 connected to the output terminals P1 and N1 through these switch elements Q1a to Q1d, and a switch according to a drive signal from the control unit 15.
  • a bypass switch for example, a bidirectional semiconductor switch
  • the unit converter 22u has output terminals P2 and N2, a first switch element leg formed by connecting in series switch elements Q2a and Q2b each having a parasitic diode D, and switch elements Q2c and Q2d each having a parasitic diode D connected in series.
  • a second switch element leg connected in parallel to the first switch element leg, a capacitor C2 connected to the output terminals P2 and N2 through these switch elements Q2a to Q2d, and a switch according to a drive signal from the control unit 15.
  • a buffer circuit 46 includes a bypass switch (for example, a bidirectional semiconductor switch) 47 connected to the output terminals P2 and N2. It generates and outputs a DC voltage Vcu2 of (positive level/zero level/negative level).
  • the unit converter 23u has output terminals P3 and N3, a first switch element leg formed by connecting in series switch elements Q3a and Q3b each having a parasitic diode D, and switch elements Q3c and Q3d each having a parasitic diode D connected in series.
  • a second switch element leg connected in parallel to the first switch element leg, a capacitor C3 connected to the output terminals P3 and N3 via these switch elements Q3a to Q3d, and a switch according to a drive signal from the control unit 15.
  • a buffer circuit 56 includes a bypass switch (for example, a bidirectional semiconductor switch) 57 connected to the output terminals P3 and N3. It generates and outputs a DC voltage Vcu3 of (positive level/zero level/negative level).
  • the switching elements Q1a to Q3d of the unit converters 21u, 22u, and 23u are semiconductor switching elements such as MOSFETs and IGBTs.
  • the bypass switches 37, 47, and 57 are controlled to be turned on and off by the control unit 15, and are normally in an off (open) state, and are turned on (closed) in an emergency such as when a short circuit occurs.
  • first, a second, a third, and a fourth energization paths as the plurality of energization paths formed by turning on and off the switch elements Q1a to Q1d in the unit converter 21u.
  • first to fourth conducting paths as a plurality of conducting paths formed by turning on and off the switching elements Q2a to Q2d in the unit converter 22u.
  • first to fourth energizing paths as the plurality of energizing paths formed by turning off.
  • the switching elements Q2a and Q2c are turned on and the switching elements Q2b and Q2d are turned off during the positive level period of the system voltage Eu.
  • Vcu2 zero level cell output voltage
  • the switching elements Q3a and Q3d are turned on and the switching elements Q3b and Q3c are turned off.
  • the output terminal P1 of the unit converter 21u is connected to the power supply line Lu via the switch contacts Su, Sv, Sw and the buffer reactor 11u as one end of the multilevel converter 12u, and the output terminal N1 of the unit converter 21u is used for unit conversion.
  • the output terminal P2 of the unit converter 22u is connected, the output terminal P3 of the unit converter 23u is connected to the output terminal N2 of the unit converter 22u, and the output terminal N3 of the unit converter 23u serves as the other end of the multilevel converter 12u. It is interconnected (star connection) with the other ends of the multilevel converters 12v and 12w.
  • FIG. 3 shows the relationship between the ON/OFF pattern of the switch elements Q1a to Q1d for obtaining the cell output voltage Vcu1 of multiple levels (positive level, zero level, negative level) from the unit converter 21u and the cell output voltage Vcu1.
  • PWM control pulse width modulation control
  • FIG. 3 shows the relationship between the ON/OFF pattern of the switch elements Q1a to Q1d for obtaining the cell output voltage Vcu1 of multiple levels (positive level, zero level, negative level) from the unit converter 21u and the cell output voltage Vcu1.
  • PWM control pulse width modulation control
  • a state in which all of the switch elements Q1a to Q1d in the unit converter 21u are turned off is called a gate block (GB) state.
  • GB gate block
  • conduction paths are formed between the output terminals P1, N1 and the capacitor C1 through the parasitic diodes D of the switch elements Q1a to Q1d, respectively.
  • the capacitor C1 is short-circuited through the switch elements Q1a-Q1d.
  • the voltage detection unit 34 of the unit converter 21u has an inverting input terminal (-) connected to one end of the capacitor C1 via the first voltage dividing resistor R1, and the other end of the capacitor C1 to the second voltage dividing resistor R2.
  • a non-inverting input terminal (+) connected to a common potential G through a third voltage dividing resistor R3, and connected to the inverting input terminal (-) through a fourth voltage dividing resistor R4.
  • the voltage detection section 44 of the unit converter 22u and the voltage detection section 54 of the unit converter 23u also detect voltages Vx2 and Vx3 at levels corresponding to the voltages (capacitor voltages) Vc2 and Vc3 across the capacitors C2 and C3, respectively. Output from each operational amplifier A.
  • Each of the operational amplifiers A of the unit converters 21u, 22u, and 23u has a positive power supply terminal to which a positive voltage +Vdd based on the operating voltage Vdd output from the control power supply section 16 shown in FIG. and a negative power supply terminal to which a negative voltage -Vdd is applied. If an offset circuit is provided to remove fluctuations in the potential of the negative power supply terminal, only the positive voltage +Vdd may be applied to the operational amplifier A as the operating voltage.
  • the configuration and operation of the multilevel converter 12u have been described so far, the configuration and operation are the same for the multilevel converters 12v and 12w.
  • control unit 15 includes a voltage command value calculation unit 61 and a PWM control unit 62 as control means for each unit converter of the multilevel converters 12u, 12v, and 12w.
  • a PWM control unit 62 as control means for each unit converter of the multilevel converters 12u, 12v, and 12w.
  • 12v, and 12w includes a cell failure detection section 63 as detection means for detecting a short circuit failure of each switch element.
  • An inverter circuit 64 and an AND circuit 65 are included as control means for turning off all switch elements Q1a to Q3d of each unit converter in the multilevel converters 12u, 12v, 12w.
  • a voltage command value calculator 61 calculates voltage command values Vcu sin ⁇ and Vcv sin( ⁇ 2 ⁇ / 3), Vcw sin ( ⁇ +2 ⁇ /3) is set, and as shown in FIG. 74 included.
  • a compensating current command unit 71 computes the load currents ILu, ILv, and ILw in rotational coordinates and removes low frequency components from the computation results, thereby obtaining a d-axis compensating current command value Id_comp and a q-axis compensating current command value for harmonic suppression.
  • Iq_comp is obtained, and the d-axis compensation current command value Id_comp is added with the current command value Id_avr for controlling the capacitor voltage average value and the d-axis negative-phase current command value Id_inv for suppressing the imbalance of the capacitor voltage average value.
  • the d-axis current command value Id_ref is obtained, and the q-axis negative-phase current command value Iq_inv for suppressing the imbalance between the phases of the capacitor voltage average value is added to the q-axis compensation current command value Iq_comp obtained above.
  • Id_ref Id_comp + Id_avr + Id_inv
  • Iq_ref Iq_comp + Iq_inv
  • the capacitor voltage average value command unit 72 calculates a proportional integral (PI) gain for the deviation between the cell voltage command value for each unit converter and the capacitor voltage average values Vcux, Vcvx, and Vcwx in the multilevel converters 12u, 12v, and 12w. to obtain the current command value Id_avr.
  • PI proportional integral
  • the capacitor voltage average value balance command unit 73 converts the capacitor voltage average values Vcux, Vcvx, and Vcwx in the multilevel converters 12u, 12v, and 12w into three phases and two phases according to the following equations.
  • the interphase deviations of the capacitor voltage average values Vcux, Vcvx, and Vcwx can be converted into the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb.
  • the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb are controlled to be zero, it is possible to suppress interphase imbalance of the capacitor voltage average values Vcux, Vcvx, and Vcwx.
  • the capacitor voltage average value balance command unit 73 multiplies the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb by a proportional integral gain, and converts the multiplication result into a rotating coordinate at a double angular frequency as shown in the following equation. , the d-axis negative-phase current command value Id_inv and the q-axis negative-phase current command value Iq_inv for suppressing the imbalance of the capacitor voltage average values Vcux, Vcvx, and Vcwx are obtained.
  • the compensation current control unit 74 Based on the d-axis current command value Id_ref and the q-axis current command value Id_ref obtained by the compensation current command unit 71, the compensation current control unit 74 converts AC voltages having substantially the same waveforms as the system voltages Eu, Ev, and Ew to the multilevel converter.
  • FIG. 6 shows waveforms of currents including the voltage of each part at this time and the d-axis reversed-phase current command value Id_inv and the q-axis reversed-phase current command value Iq_inv.
  • the PWM control unit 62 controls the voltage level of the triangular carrier signal and the voltage levels of the voltage command values Vcu sin ⁇ , Vcv sin( ⁇ 2 ⁇ /3), and Vcw sin( ⁇ +2 ⁇ /3) from the voltage command value calculation unit 61. is generated by pulse width modulation that compares . The generated gate signal is supplied to each unit converter of the multilevel converters 12u, 12v and 12w via one input terminal of the AND circuit 65.
  • a cell failure detection unit 63 detects a failure of each unit converter based on the voltage of all the capacitors C1 to C3 and the current flowing through all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w. It detects a failure and outputs a logic "1" cell failure signal when there is a failure, and includes comparison/determination units 81, 82, 83 and an OR circuit 84 as shown in FIG. The generated cell failure signal is supplied to the other input terminal of the AND circuit 65 with its logic inverted by the inverting circuit 64 and supplied to the controller 9 of the air conditioner 2 .
  • the comparison determination unit 81 determines that the capacitor with the smaller voltage exists. It is determined that there is a short-circuit fault in the switching element of the unit converter. For example, when the voltage of the capacitor C1 of the unit converter 21u (detected voltage of the voltage detector 34) Vc1 becomes smaller than the first threshold value, the comparison and determination unit 81 selects one of the switch elements Q1a to Q1d of the unit converter 21u. determines that there is a short circuit fault, and issues a logic "1" cell fault signal.
  • the comparison determination unit 82 Determine that there is some fault in the unit converter where the large voltage capacitor resides. For example, when the voltage of the capacitor C2 of the unit converter 21v (detected voltage of the voltage detector 44) Vc2 is greater than the second threshold (>first threshold), the comparison determination unit 82 determines that the unit converter 21v has some kind of failure. and issues a logic "1" cell failure signal.
  • the comparison determination unit 83 determines the unit in which the capacitor through which the current equal to or greater than the threshold exists. It is determined that there is a short-circuit fault in the switch element of the converter. For example, when the current flowing through the capacitor C2 of the unit converter 21v (the current detected via the shunt resistor 45) abnormally rises above the threshold value, the comparison determination unit 83 determines whether the switch elements Q1a to Q1d of the unit converter 21v It determines that there is a short circuit fault in either of them, and issues a logic "1" cell fault signal.
  • the cell failure signals generated from the comparison/determination units 81 , 82 , 83 are supplied to the inverting circuit 64 through an OR circuit 84 and to the controller 9 of the air conditioner 2 . That is, when the cell failure detection unit 63 does not detect a failure, the AND condition of the AND circuit 65 is established, so the gate signals output from the PWM control unit 62 are passed through the AND circuit 65 to the multilevel converters 12u, 12v, and 12w. Supplied to each unit converter. As a result, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w are repeatedly turned on and off.
  • the cell failure detection unit 63 detects a failure, the AND condition of the AND circuit 65 is not established, so the gate signal output from the PWM control unit 62 is interrupted by the AND circuit 65 and the multilevel converters 12u, 12v, Not supplied to each 12w unit converter. As a result, all the switch elements Q1a to Q3d in each unit converter are turned off (opened) and the off state is maintained.
  • the comparison determination section 81 of the cell fault detection section 63 issues a cell fault signal of logic "1". Also, if the cell short-circuit current is equal to or greater than the threshold, the cell failure signal of logic "1" is issued from the comparison/determination unit 83 of the cell failure detection unit 63 .
  • a logic "1" cell failure signal is issued, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w are turned off (opened) and the off state is maintained. In this case, control is performed to turn off all the switch elements Q1a to Q3d, but the switch elements Q1a and Q1b of the unit converter 21u in which the short-circuit failure has occurred remain short-circuited and do not operate.
  • the system short-circuit current based on the line voltage Euv of the power supply lines Lu and Lv flows along the path indicated by the thick arrow in FIG.
  • the system short-circuits through a path that passes through the diode D and the capacitors C2 and C3, through one of the short-circuited switch elements Q1a and Q1b in the unit converter 21u, and through the parasitic diode D of the switch elements Q1c and Q1d in the unit converter 21u. current tries to flow.
  • the path through which the system short-circuit current is to flow includes capacitors C1, C2, and C3 of unit converters 21v, 22v, and 23v, excluding capacitor C1 of unit converter 21u. 23u capacitors C2 and C3 are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc2, and Vc3 of these five intervening capacitors is higher than the line voltage Euv, no short-circuit current will flow. Euv ⁇ (Vc1+Vc2+Vc3+Vc2+Vc3)
  • the multi-level converter 12w with a short-circuit fault and the multi-level converter 12u with no short-circuit fault there is a unit conversion Except for the capacitor C1 of the unit 21u, the capacitors C1, C2 and C3 of the unit converters 21w, 22w and 23w are interposed, and the capacitors C2 and C3 of the unit converters 22u and 23u are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc2 and Vc3 of these intervening five capacitors is higher than the line voltage Ewu, no short-circuit current will flow. Ewu ⁇ (Vc1+Vc2+Vc3+Vc2+Vc3)
  • the path through which the system short-circuit current based on the line voltage Evw of the power supply lines Lv and Lw tries to flow includes the capacitors C1 of the unit converters 21v, 22v and 23v. , C2 and C3 are interposed, and further capacitors C1, C2 and C3 of unit converters 22w, 22w and 23w are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc1, Vc2, Vc3 of these intervening six capacitors is higher than the line voltage Evw, no short-circuit current will flow. Evw ⁇ (Vc1+Vc2+Vc3+Vc1+Vc2+Vc3)
  • the power supply lines Lu, Lv, and Lw are connected to the multilevel converters 12u, 12v, and 12v.
  • No system short-circuit current flows through 12w. Since the system short-circuit current does not flow, the breakers B of the power supply lines Lu, Lv, and Lw do not operate, and the air conditioner 2 can continue to operate. Furthermore, since the breaker B does not operate, the other electrical equipment 30 (see FIG. 1) connected in parallel with the air conditioner 2 can also continue to operate.
  • FIG. 9 shows changes in the load currents ILu, ILv, ILw and the cell output voltages Vcu1, Vcu2, Vcu3 of the unit converters 21u, 22u, 23u before and after the occurrence of the short-circuit fault.
  • the cell output voltage Vcu1 of the unit converter 21u drops due to the short-circuit fault, there is no problem such as a sudden increase in the load currents ILu, ILv, and ILw, and the waveform is simply in a state where harmonics are not suppressed. ing.
  • the comparison determination unit 81 determines whether any of the voltages Vc1 to Vc3 of all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w is The difference between the voltage smaller than the first threshold and the average value of the voltages Vc1, Vc2, and Vc3 of each capacitor in each unit converter of the multilevel converters 12u, 12v, and 12w is the second threshold ( >first threshold), it is determined that there is a short-circuit fault in the switch element of the unit converter having a capacitor with a voltage lower than the first threshold. It is possible to prevent erroneous detection of a short-circuit failure, such as at startup when the voltages Vc1, Vc2, and Vc3 of the capacitors have not sufficiently increased.
  • the control unit 15 When detecting a short-circuit fault, the control unit 15 turns off all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w, and then opens the switch contacts Su, Sv, Sw. By opening the switch contacts Su, Sv, and Sw, the multilevel converters 12u, 12v, and 12w are separated from the power lines Lu, Lv, and Lw.
  • the capacitors C2 and C3 in the unit converters 21v and 21w are turned off as all the switch elements Q1a to Q3d are turned off.
  • the supply voltage will be applied to the two, and overvoltage may be applied to these capacitors C2 and C3. Also, by opening the switch contacts Su, Sv, and Sw, this overvoltage problem can be resolved, and the power converter 10 can be stopped safely.
  • the unit converters 21w, 22w, and 23w of the multilevel converter 12w may be configured to turn off all the switch elements Q1a to Q3d.
  • the controller 15 controls all the unit converters 21u of the multilevel converter 12u. switch elements Q1a to Q3d are turned off.
  • the system short-circuit current based on the line-to-line voltage Euv of the power supply lines Lu and Lv flows along the path indicated by the thick arrow in FIG. try That is, through the unit converters 21v, 22v, 23v, through the parasitic diodes D and capacitors C2, C3 of all the switch elements Q1a to Q3d in the unit converters 22u, 23u, the short-circuited switch element Q1a in the unit converter 21u , Q1b and the parasitic diode D of the switch elements Q1c and Q1d in the unit converter 21u.
  • the unit converter 21u By turning on the bypass switch 37, the unit converter 21u enters the bypass state within the multilevel converter 12u, and only the unit converters 22u and 23u function within the multilevel converter 12u. Although the number of functioning unit transducers is reduced, harmonic suppression can continue with the remaining unit transducers 22u, 23u.
  • SYMBOLS 1 Three-phase AC power supply, Lu, Lv, Lw... Power supply line (1st, 2nd, 3rd power supply line), 3... Air conditioner, 10... Power converter, 12u, 12v, 12w... Multilevel converter , 15... control section, 21u, 22u, 23u... unit converters, 21v, 22v, 23v... unit converters, 21w, 22w, 23w... unit converters, Q1a to Q3d... switch elements, C1, C2, C3... capacitors

Abstract

The present invention provides a power conversion device that is connected in parallel with an air conditioner to a plurality of power supply lines of an AC power system to which the air conditioner is connected with a breaker interposed. The power conversion device has a plurality of unit converters including a plurality of switch elements and a capacitor connected to an output terminal via these switch elements, DC voltage of a plurality of levels is outputted from the output terminal by turning on and off each switch element, and a multilevel converter formed by serially connecting these unit converters is provided at the downstream side from the breaker in each of the power supply lines.

Description

電力変換装置power converter
 本発明の実施形態は、ブレーカを介して空気調和機が接続される交流電源系統の電源ラインにその空気調和機とは並列の関係に接続される電力変換装置に関する。 An embodiment of the present invention relates to a power converter that is connected in parallel with an air conditioner to a power line of an AC power supply system to which an air conditioner is connected via a breaker.
 高調波が発生しやすいインバータ装置を搭載する空気調和機が接続されている電源ラインに接続され、空気調和機で発生する高調波を抑制するための交流電圧をその電源ラインに供給するアクティブフィルタが知られている。このようなアクティブフィルタとしては、2レベル変換器などの電力変換装置が用いられる。 An active filter that is connected to a power line to which an air conditioner equipped with an inverter device that easily generates harmonics is connected and that supplies AC voltage to the power line to suppress harmonics generated by the air conditioner. Are known. A power converter such as a two-level converter is used as such an active filter.
 また、空気調和機が接続される電源ラインには過電流遮断用のブレーカが配置されている。ブレーカは、電源ラインに過大電流が流れた場合に作動し、電源ラインを遮断する。例えば、空気調和機におけるインバータやモータ等に故障が生じて電源ラインから空気調和機に系統短絡電流が流れた場合、このブレーカが作動し、電力系統への被害が拡大するのを防止する。 In addition, a breaker for overcurrent cutoff is placed on the power line to which the air conditioner is connected. The breaker operates to cut off the power line when an excessive current flows in the power line. For example, when a system short-circuit current flows from the power supply line to the air conditioner due to an inverter, motor, or the like in the air conditioner, the breaker operates to prevent damage to the power system from spreading.
特開平1-227630号公報JP-A-1-227630
 電力変換装置である2レベル変換機のスイッチ素子に短絡故障が生じると、電源ラインから電力変換装置に系統短絡電流が流れ、電源ラインのブレーカが作動し、空気調和機の運転が停止してしまう。 When a short-circuit failure occurs in a switch element of a two-level converter, which is a power conversion device, a system short-circuit current flows from the power line to the power conversion device, the breaker of the power line is activated, and the operation of the air conditioner stops. .
 そこで、本発明の実施形態の目的は、空気調和機における高調波を抑制するとともに空気調和機の不要な運転停止を回避することができる電力変換装置を提供することである。 Therefore, an object of the embodiments of the present invention is to provide a power converter that can suppress harmonics in an air conditioner and avoid unnecessary shutdown of the air conditioner.
 実施形態の電力変換装置は、ブレーカを介して空気調和機が接続される交流電源系統の複数の電源ラインにその空気調和機とは並列の関係に接続され、複数のスイッチ素子およびこれらスイッチ素子を介して当該出力端子に接続されたコンデンサを含みその各スイッチ素子のオン,オフによりそれぞれが複数レベルの直流電圧を前記出力端子から出力する複数の単位変換器を有し、これら単位変換器を直列接続してなるマルチレベル変換器を、前記各電源ラインにおける前記ブレーカより下流側に設けた。 The power conversion device of the embodiment is connected to a plurality of power lines of an AC power supply system to which an air conditioner is connected via a breaker in parallel with the air conditioner, and a plurality of switch elements and these switch elements are connected to each other. a plurality of unit converters each including a capacitor connected to the output terminal via an on/off switching element for outputting a plurality of levels of DC voltage from the output terminal; A connected multi-level converter was provided downstream of the breaker in each of the power supply lines.
一実施形態の構成を示すブロック図。1 is a block diagram showing the configuration of an embodiment; FIG. 一実施形態における各単位変換器の構成を示す図。The figure which shows the structure of each unit converter in one Embodiment. 一実施形態における各単位変換器のスイッチングパターンを示す図。The figure which shows the switching pattern of each unit converter in one Embodiment. 一実施形態における制御部の要部の構成を示す図。The figure which shows the structure of the principal part of the control part in one embodiment. 図4における電圧指令値演算部の構成を示す図。FIG. 5 is a diagram showing the configuration of a voltage command value calculation unit in FIG. 4; 一実施形態における各部の電圧および電流の波形を示す図。FIG. 4 is a diagram showing waveforms of voltage and current of each part in one embodiment; 図4におけるセル故障検出部の構成を示す図。FIG. 5 is a diagram showing the configuration of a cell failure detection unit in FIG. 4; 一実施形態におけるスイッチ素子の短絡故障と系統短絡電流の経路を示す図。The figure which shows the path|route of the short circuit fault of a switch element, and a system short circuit current in one Embodiment. 一実施形態における短絡故障の前後の負荷電流とセル出力電圧の変化を示す図。FIG. 4 is a diagram showing changes in load current and cell output voltage before and after a short circuit fault in one embodiment; 一実施形態の変形例における短絡故障の前後の負荷電流とセル出力電圧の変化を示す図。The figure which shows the change of the load current before and behind the short circuit failure in the modification of one embodiment, and a cell output voltage. 一実施形態の変形例におけるスイッチ素子の短絡故障と系統短絡電流の経路を示す図。The figure which shows the path|route of the short-circuit fault of a switch element, and a system|strain short-circuit current in the modification of one Embodiment. 一実施形態の変形例におけるスイッチ素子の短絡故障とバイパススイッチの状態を示す図。The figure which shows the state of the short circuit failure of a switch element, and a bypass switch in the modification of one Embodiment. 一実施形態の変形例の構成を示すブロック図。The block diagram which shows the structure of the modification of one Embodiment.
 本発明の一実施形態について図面を参照しながら説明する。
 図1に示すように、3相交流系統(電力系統や配電系統を含む)1のU相,V相,W相電源ライン(第1,第2,第3電源ライン)Lu,Lv,Lwに過電流遮断用のブレーカBを介して空気調和機2が接続されている。空気調和機2は、ブリッジ接続したダイオード3a~3fにより電源ラインLu,Lv,Lwの系統電圧(3相交流電圧)Eu,Ev,Ewを整流する整流回路3、この整流回路3の出力電圧が直流リアクトル4を介して印加される直流コンデンサ5、この直流コンデンサ5の電圧を所定周波数の交流電圧に変換して出力するインバータ6、このインバータ6の出力により動作する圧縮機モータ7、この圧縮機モータ7に流れる電流(モータ電流)を検知する電流検知器8、この電流検知器8の検知結果および後述する制御部15の指令に応じてインバータ6を制御するコントローラ9を含む。
An embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, U-phase, V-phase, and W-phase power lines (first, second, and third power lines) Lu, Lv, and Lw of a three-phase AC system (including an electric power system and a distribution system) 1 have An air conditioner 2 is connected via a breaker B for overcurrent interruption. The air conditioner 2 includes a rectifier circuit 3 that rectifies the system voltages (three-phase AC voltages) Eu, Ev, and Ew of the power lines Lu, Lv, and Lw by bridge-connected diodes 3a to 3f, and the output voltage of the rectifier circuit 3 is A DC capacitor 5 applied through a DC reactor 4, an inverter 6 converting the voltage of the DC capacitor 5 into an AC voltage of a predetermined frequency and outputting it, a compressor motor 7 operated by the output of the inverter 6, and the compressor It includes a current detector 8 that detects a current (motor current) flowing through the motor 7, and a controller 9 that controls the inverter 6 according to the detection result of the current detector 8 and a command from a control section 15, which will be described later.
 電源ラインLu,Lv,LwにおけるブレーカBと空気調和機2との間に、本実施形態の電力変換装置10が空気調和機2とは並列の関係に接続されている。なお、電力変換装置10の接続位置より上流でブレーカBとの間の電源ラインLu,Lv,Lwには、他の空気調和機などの電気機器30が接続されている。 A power conversion device 10 of the present embodiment is connected in parallel with the air conditioner 2 between the breaker B and the air conditioner 2 on the power lines Lu, Lv, and Lw. An electric device 30 such as another air conditioner is connected to the power lines Lu, Lv, and Lw between the breaker B and the upstream side of the connecting position of the power converter 10 .
 電力変換装置10は、開閉器接点(例えば常閉型のリレー接点)Su,Sv,Sw、バッファリアクトル11u,11v,11w、これら開閉器接点Su,Sv,Swおよびバッファリアクトル11u,11v,11wを介して電源ラインLu,Lv,LwにおけるブレーカBより下流側に一端が接続され他端が相互接続(スター結線)されたマルチレベル変換器(第1,第2,第3マルチレベル変換器)12u,12v,12w、電源ラインLu,Lv,Lwにおける開閉器接点Su,Sv,Swの接続位置より空気調和機2側の位置に配置され系統電圧Eu,Ev,Ewおよび空気調和機2に流れる電流(負荷電流という)ILu,ILv,ILwを検出する検出器13、バッファリアクトル11u,11v,11wとマルチレベル変換器12u,12v,12wとの間の通電路に配置されそのマルチレベル変換器12u,12v,12wから電源ラインLu,Lv,Lwに供給される補償電流(出力電流ともいう)Icu,Icv,Icwを検出する検出器14、これら検出器13,14の検出結果に応じてマルチレベル変換器12u,12v,12wを制御する制御部15、この制御部15の動作に必要な直流電圧(動作用電圧という)Vddを出力する制御用電源部16を含む。動作用電圧Vddは、例えば5Vまたは15Vであり、マルチレベル変換器12u,12v,12w内の後述する電圧検出部34,44,54の動作用電圧としても用いられる。 The power conversion device 10 includes switch contacts (for example, normally closed relay contacts) Su, Sv, and Sw, buffer reactors 11u, 11v, and 11w, these switch contacts Su, Sv, and Sw, and the buffer reactors 11u, 11v, and 11w. Multilevel converters (first, second and third multilevel converters) 12u having one end connected to the downstream side of the breaker B in the power supply lines Lu, Lv and Lw via and the other end interconnected (star connection) , 12v, 12w, and the power supply lines Lu, Lv, Lw, the system voltages Eu, Ev, Ew and the current flowing through the air conditioner 2 are arranged at positions closer to the air conditioner 2 than the connection positions of the switch contacts Su, Sv, Sw. Detectors 13 for detecting ILu, ILv, and ILw (referred to as load currents) are arranged in current paths between the buffer reactors 11u, 11v, and 11w and the multilevel converters 12u, 12v, and 12w, and the multilevel converters 12u, 12v, and 12w. A detector 14 for detecting compensation currents (also referred to as output currents) Icu, Icv and Icw supplied from 12v and 12w to power supply lines Lu, Lv and Lw, multi-level conversion according to the detection results of these detectors 13 and 14 It includes a control section 15 for controlling the devices 12u, 12v, and 12w, and a control power supply section 16 for outputting a DC voltage (referred to as operating voltage) Vdd necessary for the operation of the control section 15. FIG. The operating voltage Vdd is, for example, 5V or 15V, and is also used as an operating voltage for voltage detectors 34, 44, 54 (described later) in the multilevel converters 12u, 12v, 12w.
 開閉器接点Su,Sv,Swは、制御部15によって開閉が制御されるもので、通常は閉成状態にあり、短絡故障の発生など非常時に開放される。
 制御用電源部16の出力電圧の基準となる電位Gの端子は、例えば、マルチレベル変換器12u,12v,12wの他端の相互接続点である中性点Kに接続されている。この電位Gの端子は、電位固定のために、直流コンデンサ5の負側端子に接続される場合もある。
The switch contacts Su, Sv, and Sw are controlled to be opened and closed by the control unit 15, and are normally in a closed state, and are opened in an emergency such as the occurrence of a short circuit.
A terminal of the potential G serving as a reference for the output voltage of the control power supply section 16 is connected to, for example, a neutral point K which is an interconnection point of the other ends of the multilevel converters 12u, 12v, and 12w. This potential G terminal may be connected to the negative side terminal of the DC capacitor 5 for fixing the potential.
 電源ラインLuに接続されたマルチレベル変換器12uは、それぞれが複数レベル(マルチレベル)の直流電圧をスイッチングにより選択的に生成し出力する複数の単位変換器21u,22u,23uを直列接続(カスケード接続)してなるいわゆる多直列変換器クラスタであり、単位変換器21u,22u,23uの出力電圧(セル出力電圧)Vcu1,Vcu2,Vcu3を足し合わせることにより高調波を低減するための正弦波に近い波形の交流電圧Vcu0を生成し出力する。 A multi-level converter 12u connected to a power supply line Lu includes a plurality of unit converters 21u, 22u, and 23u, each of which selectively generates and outputs a plurality of levels (multi-levels) of DC voltages by switching, connected in series (cascaded). connected), and the output voltages (cell output voltages) Vcu1, Vcu2, and Vcu3 of the unit converters 21u, 22u, and 23u are added to form a sine wave for reducing harmonics. An AC voltage Vcu0 with a similar waveform is generated and output.
 電源ラインLvに接続されたマルチレベル変換器12vは、それぞれが複数レベルの直流電圧をスイッチングにより選択的に生成し出力する複数の単位変換器21v,22v,23vを直列接続してなるいわゆる多直列変換器クラスタであり、単位変換器21v,22v,23vの出力電圧(セル出力電圧)Vcv1,Vcv2,Vcv3を足し合わせることにより高調波を低減するための正弦波に近い波形の交流電圧Vcv0を生成し出力する。 The multi-level converter 12v connected to the power supply line Lv is a so-called multi-serial converter formed by connecting in series a plurality of unit converters 21v, 22v, and 23v, each of which selectively generates and outputs a plurality of levels of DC voltage by switching. The output voltages (cell output voltages) Vcv1, Vcv2, and Vcv3 of the unit converters 21v, 22v, and 23v, which are converter clusters, are added to generate an AC voltage Vcv0 with a waveform close to a sine wave for reducing harmonics. output.
 電源ラインLwに接続されたマルチレベル変換器12wは、それぞれが複数レベルの直流電圧をスイッチングにより選択的に生成し出力する複数の単位変換器(第3単位変換器)21w,22w,23wを直列接続してなるいわゆる多直列変換器クラスタであり、単位変換器21w,22w,23wの出力電圧(セル出力電圧)Vcw1,Vcw2,Vcw3を足し合わせることにより高調波を低減するための正弦波に近い波形の交流電圧Vcw0を生成し出力する。なお、ここでは各マルチレベル変換機12に含まれる単位変換器21,22,23の数を3としたが、その数は2以上であればいくつでも良い。 A multilevel converter 12w connected to a power supply line Lw includes a plurality of unit converters (third unit converters) 21w, 22w, and 23w each selectively generating and outputting a plurality of levels of DC voltages by switching. It is a so-called multi-serial converter cluster formed by connecting, and the output voltages (cell output voltages) Vcw1, Vcw2, and Vcw3 of the unit converters 21w, 22w, and 23w are added to form a near sine wave for reducing harmonics. A waveform AC voltage Vcw0 is generated and output. Although the number of unit converters 21, 22, and 23 included in each multilevel converter 12 is three here, any number of unit converters 21, 22, and 23 may be used as long as the number is two or more.
 制御部15は、負荷電流ILu,ILv,ILwをできるだけ系統電圧Eu,Ev,Ewと同期した正弦波に近づけるために、その負荷電流ILu,ILv,ILwに足し合わせるべき補償電流Icu,Icv,Icwをそれぞれ算出する。さらに、制御部15は、算出した補償電流Icu,Icv,Icwを供給するのに必要な交流電圧Vcu0,Vcv0,Vcw0を算出し、その交流電圧Vcu0を得るための単位変換器21u,22u,23uの出力電圧Vcu1,Vcu2,Vcu3を決定する。そして、制御部15は、決定した出力電圧Vcu1,Vcu2,Vcu3が得られるようにマルチレベル変換器12u,12v,12wにおける各単位変換器の動作を制御する。 In order to make the load currents ILu, ILv, ILw as close as possible to sinusoidal waves synchronized with the system voltages Eu, Ev, Ew, the control unit 15 controls compensation currents Icu, Icv, Icw to be added to the load currents ILu, ILv, ILw. are calculated respectively. Further, the control unit 15 calculates AC voltages Vcu0, Vcv0, Vcw0 required to supply the calculated compensation currents Icu, Icv, Icw, and unit converters 21u, 22u, 23u for obtaining the AC voltages Vcu0. to determine the output voltages Vcu1, Vcu2 and Vcu3. Then, the control section 15 controls the operation of each unit converter in the multilevel converters 12u, 12v, 12w so as to obtain the determined output voltages Vcu1, Vcu2, Vcu3.
 マルチレベル変換器12u,12v,12wから電源ラインLu、Lv,Lwに交流電圧Vcu0,Vcv0,Vcw0が供給されることにより、負荷電流ILu,ILv,ILwに含まれる高調波を補償して抑制することができる。すなわち、電力変換装置10はいわゆるアクティブフィルタとして動作する。 AC voltages Vcu0, Vcv0, Vcw0 are supplied from the multilevel converters 12u, 12v, 12w to the power supply lines Lu, Lv, Lw, thereby compensating and suppressing harmonics contained in the load currents ILu, ILv, ILw. be able to. That is, the power converter 10 operates as a so-called active filter.
 マルチレベル変換器12uにおける単位変換器21u,22u,23uの回路構成を図2に示す。
 単位変換器21uは、出力端子P1,N1、それぞれ寄生ダイオードDを有するスイッチ素子Q1a,Q1bを直列接続してなる第1スイッチ素子レグ、それぞれ寄生ダイオードDを有するスイッチ素子Q1c,Q1dを直列接続してなり第1スイッチ素子レグに並列接続された第2スイッチ素子レグ、これらスイッチ素子Q1a~Q1dを介して出力端子P1,N1に接続されたコンデンサC1、制御部15からの駆動信号に応じてスイッチ素子Q1a,Q1bをオン,オフ駆動する駆動部(ゲートアンプ)31、制御部15からの駆動信号に応じてスイッチ素子Q1c,Q1dをオン,オフ駆動する駆動部32、コンデンサC1の電圧(コンデンサ電圧という)Vc1を駆動部31,32の動作に必要な直流電圧(動作用電圧という)に変換する自給電源部33、制御用電源部16から出力される動作用電圧Vddにより動作しコンデンサ電圧Vc1を検出して制御部15に知らせる電圧検出部34、コンデンサC1への通電路に設けられたシャント抵抗35、このシャント抵抗35に生じる電圧を検出しそれをコンデンサ電流の検出結果として制御部15に知らせるバッファ回路36、出力端子P1,N1に接続されたバイパススイッチ(例えば双方向性の半導体スイッチ)37を含み、スイッチ素子Q1a~Q1dのオン,オフ(開閉)による複数の通電路の選択的な形成により複数レベル(正レベル・零レベル・負レベル)の直流電圧Vcu1を生成し出力する。
FIG. 2 shows the circuit configuration of the unit converters 21u, 22u, and 23u in the multilevel converter 12u.
The unit converter 21u has output terminals P1 and N1, a first switch element leg formed by connecting in series switch elements Q1a and Q1b each having a parasitic diode D, and switch elements Q1c and Q1d each having a parasitic diode D connected in series. A second switch element leg connected in parallel to the first switch element leg, a capacitor C1 connected to the output terminals P1 and N1 through these switch elements Q1a to Q1d, and a switch according to a drive signal from the control unit 15. A drive section (gate amplifier) 31 that drives the elements Q1a and Q1b on and off, a drive section 32 that drives the switch elements Q1c and Q1d on and off according to the drive signal from the control section 15, the voltage of the capacitor C1 (capacitor voltage ) is converted into a DC voltage (referred to as an operating voltage) required for the operation of the drive units 31 and 32, and the operation voltage Vdd output from the control power supply unit 16 operates to convert the capacitor voltage Vc1 to A voltage detection unit 34 that detects and notifies the control unit 15, a shunt resistor 35 provided in the current path to the capacitor C1, detects the voltage generated in the shunt resistor 35, and notifies the control unit 15 of the detected result of the capacitor current. Including a buffer circuit 36 and a bypass switch (for example, a bidirectional semiconductor switch) 37 connected to the output terminals P1 and N1, selectively forming a plurality of conducting paths by turning on and off (opening and closing) the switch elements Q1a to Q1d. generates and outputs a DC voltage Vcu1 of multiple levels (positive level, zero level, negative level).
 単位変換器22uは、出力端子P2,N2、それぞれ寄生ダイオードDを有するスイッチ素子Q2a,Q2bを直列接続してなる第1スイッチ素子レグ、それぞれ寄生ダイオードDを有するスイッチ素子Q2c,Q2dを直列接続してなり第1スイッチ素子レグに並列接続された第2スイッチ素子レグ、これらスイッチ素子Q2a~Q2dを介して出力端子P2,N2に接続されたコンデンサC2、制御部15からの駆動信号に応じてスイッチ素子Q2a,Q2bをオン,オフ駆動する駆動部(ゲートアンプ)41、制御部15からの駆動信号に応じてスイッチ素子Q2c,Q2dをオン,オフ駆動する駆動部42、コンデンサC2の電圧(コンデンサ電圧という)Vc2を駆動部41,42の動作に必要な直流電圧(動作用電圧という)に変換する自給電源部43、制御用電源部16から出力される動作用電圧Vddにより動作しコンデンサ電圧Vc2を検出して制御部15に知らせる電圧検出部44、コンデンサC2への通電路に設けられたシャント抵抗45、このシャント抵抗45に生じる電圧を検出しそれをコンデンサ電流の検出結果として制御部15に知らせるバッファ回路46、出力端子P2,N2に接続されたバイパススイッチ(例えば双方向性の半導体スイッチ)47を含み、スイッチ素子Q2a~Q2dのオン,オフによる複数の通電路の選択的な形成により複数レベル(正レベル・零レベル・負レベル)の直流電圧Vcu2を生成し出力する。 The unit converter 22u has output terminals P2 and N2, a first switch element leg formed by connecting in series switch elements Q2a and Q2b each having a parasitic diode D, and switch elements Q2c and Q2d each having a parasitic diode D connected in series. A second switch element leg connected in parallel to the first switch element leg, a capacitor C2 connected to the output terminals P2 and N2 through these switch elements Q2a to Q2d, and a switch according to a drive signal from the control unit 15. A drive section (gate amplifier) 41 that drives the elements Q2a and Q2b on and off, a drive section 42 that drives the switch elements Q2c and Q2d on and off according to the drive signal from the control section 15, the voltage of the capacitor C2 (capacitor voltage ) is converted into a DC voltage (referred to as operating voltage) necessary for the operation of the drive units 41 and 42, and the operating voltage Vdd output from the control power supply unit 16 operates to convert the capacitor voltage Vc2 into A voltage detection unit 44 that detects and notifies the control unit 15, a shunt resistor 45 provided in the current path to the capacitor C2, detects the voltage generated in the shunt resistor 45, and notifies the control unit 15 of the detected result of the capacitor current. A buffer circuit 46 includes a bypass switch (for example, a bidirectional semiconductor switch) 47 connected to the output terminals P2 and N2. It generates and outputs a DC voltage Vcu2 of (positive level/zero level/negative level).
 単位変換器23uは、出力端子P3,N3、それぞれ寄生ダイオードDを有するスイッチ素子Q3a,Q3bを直列接続してなる第1スイッチ素子レグ、それぞれ寄生ダイオードDを有するスイッチ素子Q3c,Q3dを直列接続してなり第1スイッチ素子レグに並列接続された第2スイッチ素子レグ、これらスイッチ素子Q3a~Q3dを介して出力端子P3,N3に接続されたコンデンサC3、制御部15からの駆動信号に応じてスイッチ素子Q3a,Q3bをオン,オフ駆動する駆動部(ゲートアンプ)51、制御部15からの駆動信号に応じてスイッチ素子Q3c,Q3dをオン,オフ駆動する駆動部52、コンデンサC3の電圧(コンデンサ電圧という)Vc3を駆動部51,52の動作に必要な直流電圧(動作用電圧という)に変換する自給電源部53、制御用電源部16から出力される動作用電圧Vddにより動作しコンデンサ電圧Vc3を検出して制御部15に知らせる電圧検出部54、コンデンサC3への通電路に設けられたシャント抵抗55、このシャント抵抗55に生じる電圧を検出しそれをコンデンサ電流の検出結果として制御部15に知らせるバッファ回路56、出力端子P3,N3に接続されたバイパススイッチ(例えば双方向性の半導体スイッチ)57を含み、スイッチ素子Q3a~Q3dのオン,オフによる複数の通電路の選択的な形成により複数レベル(正レベル・零レベル・負レベル)の直流電圧Vcu3を生成し出力する。 The unit converter 23u has output terminals P3 and N3, a first switch element leg formed by connecting in series switch elements Q3a and Q3b each having a parasitic diode D, and switch elements Q3c and Q3d each having a parasitic diode D connected in series. A second switch element leg connected in parallel to the first switch element leg, a capacitor C3 connected to the output terminals P3 and N3 via these switch elements Q3a to Q3d, and a switch according to a drive signal from the control unit 15. A drive section (gate amplifier) 51 that drives the elements Q3a and Q3b on and off, a drive section 52 that drives the switch elements Q3c and Q3d on and off according to the drive signal from the control section 15, the voltage of the capacitor C3 (capacitor voltage ) Vc3 into a DC voltage (referred to as an operating voltage) required for the operation of the drive units 51 and 52, and the operating voltage Vdd output from the control power supply unit 16 operates to convert the capacitor voltage Vc3 into A voltage detection unit 54 that detects and notifies the control unit 15, a shunt resistor 55 provided in the current path to the capacitor C3, detects the voltage generated in the shunt resistor 55, and notifies the control unit 15 of the detected result of the capacitor current. A buffer circuit 56 includes a bypass switch (for example, a bidirectional semiconductor switch) 57 connected to the output terminals P3 and N3. It generates and outputs a DC voltage Vcu3 of (positive level/zero level/negative level).
 単位変換器21u,22u,23uのそれぞれスイッチ素子Q1a~Q3dは、半導体スイッチ素子であり例えばMOSFETやIGBTが用いられる。バイパススイッチ37,47,57は、制御部15によってオンとオフが制御されるもので、通常はオフ(開放)状態にあり、短絡故障の発生など非常時にオン(閉成)される。 The switching elements Q1a to Q3d of the unit converters 21u, 22u, and 23u are semiconductor switching elements such as MOSFETs and IGBTs. The bypass switches 37, 47, and 57 are controlled to be turned on and off by the control unit 15, and are normally in an off (open) state, and are turned on (closed) in an emergency such as when a short circuit occurs.
 単位変換器21uにおけるスイッチ素子Q1a~Q1dのオン,オフにより形成される複数の通電路として第1通電路、第2通電路、第3通電路、第4通電路がある。同様に、単位変換器22uにおけるスイッチ素子Q2a~Q2dのオン,オフにより形成される複数の通電路としても第1~第4通電路があり、単位変換器23uにおけるスイッチ素子Q3a~Q3dのオン,オフにより形成される複数の通電路としても同様に第1~第4通電路がある。 There are a first, a second, a third, and a fourth energization paths as the plurality of energization paths formed by turning on and off the switch elements Q1a to Q1d in the unit converter 21u. Similarly, there are first to fourth conducting paths as a plurality of conducting paths formed by turning on and off the switching elements Q2a to Q2d in the unit converter 22u. Similarly, there are first to fourth energizing paths as the plurality of energizing paths formed by turning off.
 例えば、図2の単位変換器21uにおいて示すように、系統電圧Euの正レベル期間において、スイッチ素子Q1b,Q1dをオンしてスイッチ素子Q1a,Q1cをオフする動作により、出力端子P1,N1の相互間を導通してコンデンサC1をバイパスする第1通電路が実線矢印のように形成され、零レベルのセル出力電圧Vcu1(=0)が出力端子P1,N1間に生じる。 For example, as shown in the unit converter 21u in FIG. 2, during the positive level period of the system voltage Eu, the switching elements Q1b and Q1d are turned on and the switching elements Q1a and Q1c are turned off, so that the output terminals P1 and N1 are mutually connected. A first conduction path is formed as shown by a solid arrow to conduct between and bypass the capacitor C1, and a zero level cell output voltage Vcu1 (=0) is generated between the output terminals P1 and N1.
 図2の単位変換器22uにおいて示すように、系統電圧Euの正レベル期間において、スイッチ素子Q2a,Q2cをオンしてスイッチ素子Q2b,Q2dをオフする動作によっても、同様に出力端子P2,N2の相互間を導通してコンデンサC2をバイパスする第4通電路が実線矢印のように形成され、零レベルのセル出力電圧Vcu2(=0)が出力端子P2,N2間に生じる。零レベルのセル出力電圧については、単位変換器21uにおいて示す動作と単位変換器22uにおいて示す動作のどちらを用いてもよい。 As shown in the unit converter 22u in FIG. 2, the switching elements Q2a and Q2c are turned on and the switching elements Q2b and Q2d are turned off during the positive level period of the system voltage Eu. A fourth conducting path is formed between them to bypass the capacitor C2 as indicated by the solid line arrow, and a zero level cell output voltage Vcu2 (=0) is generated between the output terminals P2 and N2. Either the operation shown in the unit converter 21u or the operation shown in the unit converter 22u may be used for the zero-level cell output voltage.
 図2の単位変換器23uにおいて実線矢印で示すように、系統電圧Euの正レベル期間において、スイッチ素子Q3a,Q3dをオンしてスイッチ素子Q3b,Q3cをオフする動作により、出力端子P3とコンデンサC3の一端とを導通して出力端子N3とコンデンサC3の他端とを導通する第2通電路が形成され、コンデンサ電圧Vc3に基づく正レベルのセル出力電圧Vcu3(=+Vc)が出力端子P3,N3間に生じる。 As indicated by the solid line arrow in the unit converter 23u in FIG. 2, during the positive level period of the system voltage Eu, the switching elements Q3a and Q3d are turned on and the switching elements Q3b and Q3c are turned off. A second conducting path is formed which conducts one end of the output terminal N3 and the other end of the capacitor C3, and a positive level cell output voltage Vcu3 (=+Vc) based on the capacitor voltage Vc3 is applied to the output terminals P3 and N3. occur between
 図2の同じく単位変換器23uにおいて破線矢印で示すように、系統電圧Euの正レベル期間において、スイッチ素子Q3a,Q3dをオンしてスイッチ素子Q3b,Q3cをオフする動作により、出力端子N3とコンデンサC3の一端とを導通して出力端子P3とコンデンサC3の他端とを導通する第3通電路が形成され、コンデンサ電圧Vc3に基づく負レベルのセル出力電圧Vcu3(=-Vc)が出力端子P3,N3間に生じる。 As indicated by the dashed arrow in the unit converter 23u in FIG. 2 as well, during the positive level period of the system voltage Eu, the switching elements Q3a and Q3d are turned on and the switching elements Q3b and Q3c are turned off. A third conducting path is formed which conducts one end of C3 and the output terminal P3 and the other end of the capacitor C3, and a negative level cell output voltage Vcu3 (=-Vc) based on the capacitor voltage Vc3 is applied to the output terminal P3. , N3.
 単位変換器21uの出力端子P1がマルチレベル変換器12uの一端として開閉器接点Su,Sv,Swおよびバッファリアクトル11uを介して電源ラインLuに接続され、単位変換器21uの出力端子N1に単位変換器22uの出力端子P2が接続され、単位変換器22uの出力端子N2に単位変換器23uの出力端子P3が接続され、単位変換器23u出力端子N3がマルチレベル変換器12uの他端として残りのマルチレベル変換器12v,12wの他端と相互接続(スター結線)されている。これら単位変換器21u,22u,23uの直列接続(カスケード接続)により、単位変換器21u,22u,23uのセル出力電圧Vcu1,Vcu2,Vcu3を足し合わせた電圧Vcu0が電源ラインLuに供給される。図2の例ではVcu0=“0”+“0”+“+Vc”=+Vcとなる。 The output terminal P1 of the unit converter 21u is connected to the power supply line Lu via the switch contacts Su, Sv, Sw and the buffer reactor 11u as one end of the multilevel converter 12u, and the output terminal N1 of the unit converter 21u is used for unit conversion. The output terminal P2 of the unit converter 22u is connected, the output terminal P3 of the unit converter 23u is connected to the output terminal N2 of the unit converter 22u, and the output terminal N3 of the unit converter 23u serves as the other end of the multilevel converter 12u. It is interconnected (star connection) with the other ends of the multilevel converters 12v and 12w. By serial connection (cascade connection) of these unit converters 21u, 22u and 23u, a voltage Vcu0 obtained by adding together the cell output voltages Vcu1, Vcu2 and Vcu3 of the unit converters 21u, 22u and 23u is supplied to the power supply line Lu. In the example of FIG. 2, Vcu0=“0”+“0”+“+Vc”=+Vc.
 単位変換器21uから複数レベル(正レベル・零レベル・負レベル)のセル出力電圧Vcu1を得るためのスイッチ素子Q1a~Q1dのオン,オフパターンとセル出力電圧Vcu1との関係を図3に示す。所望のレベルを得るには、三角波変調波と目標とする出力電圧を指示する指令値信号によって、パルス幅変調制御(PWM制御)を行えばよい。 FIG. 3 shows the relationship between the ON/OFF pattern of the switch elements Q1a to Q1d for obtaining the cell output voltage Vcu1 of multiple levels (positive level, zero level, negative level) from the unit converter 21u and the cell output voltage Vcu1. In order to obtain a desired level, pulse width modulation control (PWM control) may be performed using a triangular modulated wave and a command value signal that indicates a target output voltage.
 単位変換器21uにおけるスイッチ素子Q1a~Q1dの全てがオフした状態をゲートブロック(GB)状態という。この場合、スイッチ素子Q1a~Q1dのそれぞれ寄生ダイオードDを通して出力端子P1,N1とコンデンサC1との間の通電路が形成される。スイッチ素子Q1a~Q1dの全てがオンした場合は、スイッチ素子Q1a~Q1dを通してコンデンサC1が短絡状態となる。
 ここまで単位変換器21uの動作について主に説明したが、その動作は単位変換器22u,23uについても同じである。
A state in which all of the switch elements Q1a to Q1d in the unit converter 21u are turned off is called a gate block (GB) state. In this case, conduction paths are formed between the output terminals P1, N1 and the capacitor C1 through the parasitic diodes D of the switch elements Q1a to Q1d, respectively. When all of the switch elements Q1a-Q1d are turned on, the capacitor C1 is short-circuited through the switch elements Q1a-Q1d.
Although the operation of the unit converter 21u has been mainly described so far, the operation is the same for the unit converters 22u and 23u.
 単位変換器21uの電圧検出部34は、コンデンサC1の一端に第1分圧抵抗器R1を介して接続される反転入力端子(-)、コンデンサC1の他端に第2分圧抵抗器R2を介して接続されかつ第3分圧抵抗器R3を介して共通電位Gに接続される非反転入力端子(+)、上記反転入力端子(-)に第4分圧抵抗器R4を介して接続される出力端子を有する演算増幅器(オペアンプという)Aを含み、反転入力端子(-)の電位と非反転入力端子(+)の電位との差、すなわちコンデンサC1の両端間電圧(コンデンサ電圧)Vc1に対応するレベルの電圧Vx1をオペアンプAから出力する差動増幅回路である。 The voltage detection unit 34 of the unit converter 21u has an inverting input terminal (-) connected to one end of the capacitor C1 via the first voltage dividing resistor R1, and the other end of the capacitor C1 to the second voltage dividing resistor R2. A non-inverting input terminal (+) connected to a common potential G through a third voltage dividing resistor R3, and connected to the inverting input terminal (-) through a fourth voltage dividing resistor R4. The difference between the potential of the inverting input terminal (-) and the potential of the non-inverting input terminal (+), that is, the voltage across the capacitor C1 (capacitor voltage) Vc1 It is a differential amplifier circuit that outputs a voltage Vx1 of a corresponding level from an operational amplifier A. FIG.
 単位変換器22uの電圧検出部44および単位変換器23uの電圧検出部54も、同様に、それぞれコンデンサC2,C3の両端間電圧(コンデンサ電圧)Vc2,Vc3に対応するレベルの電圧Vx2,Vx3をそれぞれのオペアンプAから出力する。 Similarly, the voltage detection section 44 of the unit converter 22u and the voltage detection section 54 of the unit converter 23u also detect voltages Vx2 and Vx3 at levels corresponding to the voltages (capacitor voltages) Vc2 and Vc3 across the capacitors C2 and C3, respectively. Output from each operational amplifier A.
 単位変換器21u,22u,23uの各オペアンプAは、図1に示す制御用電源部16から出力される動作用電圧Vddに基づく正電圧+Vddが印加される正側電源端子、および動作用電圧Vddに基づく負電圧-Vddが印加される負側電源端子を備える。負側電源端子の電位の変動を取り除くオフセット回路を設ける構成を採用すれば、正電圧+Vddのみを動作用電圧としてオペアンプAに加えてもよい。
 ここまでマルチレベル変換器12uの構成および動作について説明したが、その構成および動作はマルチレベル変換器12v,12wについても同じである。
Each of the operational amplifiers A of the unit converters 21u, 22u, and 23u has a positive power supply terminal to which a positive voltage +Vdd based on the operating voltage Vdd output from the control power supply section 16 shown in FIG. and a negative power supply terminal to which a negative voltage -Vdd is applied. If an offset circuit is provided to remove fluctuations in the potential of the negative power supply terminal, only the positive voltage +Vdd may be applied to the operational amplifier A as the operating voltage.
Although the configuration and operation of the multilevel converter 12u have been described so far, the configuration and operation are the same for the multilevel converters 12v and 12w.
 [制御部15] 
 制御部15は、図4に示すように、マルチレベル変換器12u,12v,12wの各単位変換器に対する制御手段として電圧指令値演算部61およびPWM制御部62を含むとともに、マルチレベル変換器12u,12v,12wの各単位変換器における各スイッチ素子の短絡故障を検出する検出手段としてセル故障検出部63を含み、このセル故障検出部61が各スイッチ素子のいずれかの故障を検出した場合にマルチレベル変換器12u,12v,12wにおける各単位変換器の全てのスイッチ素子Q1a~Q3dをオフする制御手段として反転回路64およびアンド回路65を含む。
[Control unit 15]
As shown in FIG. 4, the control unit 15 includes a voltage command value calculation unit 61 and a PWM control unit 62 as control means for each unit converter of the multilevel converters 12u, 12v, and 12w. , 12v, and 12w includes a cell failure detection section 63 as detection means for detecting a short circuit failure of each switch element. An inverter circuit 64 and an AND circuit 65 are included as control means for turning off all switch elements Q1a to Q3d of each unit converter in the multilevel converters 12u, 12v, 12w.
 [電圧指令値演算部61] 
 電圧指令値演算部61は、系統電圧Eu,Ev,Ewとほぼ同じ波形の交流電圧をマルチレベル変換器12u,12v,12wで生成させるための電圧指令値Vcu sinθ,Vcv sin(θ-2π/3),Vcw sin(θ+2π/3)を設定するもので、図5に示すように、補償電流指令部71、コンデンサ電圧平均値指令部72、コンデンサ電圧平均値バランス指令部73、補償電流制御部74を含む。
[Voltage command value calculator 61]
A voltage command value calculator 61 calculates voltage command values Vcu sinθ and Vcv sin(θ−2π/ 3), Vcw sin (θ+2π/3) is set, and as shown in FIG. 74 included.
 補償電流指令部71は、負荷電流ILu,ILv,ILwを回転座標演算しその演算結果から低周波成分を除去することで高調波抑制用のd軸補償電流指令値Id_compおよびq軸補償電流指令値Iq_compを求め、そのd軸補償電流指令値Id_compにコンデンサ電圧平均値を制御するための電流指令値Id_avrおよびコンデンサ電圧平均値のアンバランスを抑制するためのd軸逆相電流指令値Id_invを加算することでd軸電流指令値Id_refを得るとともに、上記求めたq軸補償電流指令値Iq_compにコンデンサ電圧平均値の相間のアンバランスを抑制するためのq軸逆相電流指令値Iq_invを加算することでq軸電流指令値Id_refを得る。ここで、d軸逆相電流指令値Id_invとq軸逆相電流指令値Iq_invの算出方法は、後述する。
 Id_ref=Id_comp+Id_avr+Id_inv 
 Iq_ref=Iq_comp+Iq_inv
A compensating current command unit 71 computes the load currents ILu, ILv, and ILw in rotational coordinates and removes low frequency components from the computation results, thereby obtaining a d-axis compensating current command value Id_comp and a q-axis compensating current command value for harmonic suppression. Iq_comp is obtained, and the d-axis compensation current command value Id_comp is added with the current command value Id_avr for controlling the capacitor voltage average value and the d-axis negative-phase current command value Id_inv for suppressing the imbalance of the capacitor voltage average value. Thus, the d-axis current command value Id_ref is obtained, and the q-axis negative-phase current command value Iq_inv for suppressing the imbalance between the phases of the capacitor voltage average value is added to the q-axis compensation current command value Iq_comp obtained above. Obtain the q-axis current command value Id_ref. A method of calculating the d-axis negative-phase current command value Id_inv and the q-axis negative-phase current command value Iq_inv will be described later.
Id_ref = Id_comp + Id_avr + Id_inv
Iq_ref = Iq_comp + Iq_inv
 コンデンサ電圧平均値指令部72は、各単位変換器に対するセル電圧指令値とマルチレベル変換器12u,12v,12wにおけるコンデンサ電圧平均値Vcux,Vcvx,Vcwxとの偏差に対し、比例積分(PI)ゲインを乗算することにより、上記電流指令値Id_avrを得る。 The capacitor voltage average value command unit 72 calculates a proportional integral (PI) gain for the deviation between the cell voltage command value for each unit converter and the capacitor voltage average values Vcux, Vcvx, and Vcwx in the multilevel converters 12u, 12v, and 12w. to obtain the current command value Id_avr.
 コンデンサ電圧平均値バランス指令部73は、マルチレベル変換器12u,12v,12wにおけるコンデンサ電圧平均値Vcux,Vcvx,Vcwxを下式により3相2相変換する。 The capacitor voltage average value balance command unit 73 converts the capacitor voltage average values Vcux, Vcvx, and Vcwx in the multilevel converters 12u, 12v, and 12w into three phases and two phases according to the following equations.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
 この3相2相変換により、コンデンサ電圧平均値Vcux,Vcvx,Vcwxの相間偏差をa軸コンデンサ電圧Vcaとb軸コンデンサ電圧Vcbに変換できる。このa軸コンデンサ電圧Vcaおよびb軸コンデンサ電圧Vcbがゼロになるように制御すれば、コンデンサ電圧平均値Vcux,Vcvx,Vcwxの相間のアンバランスを抑制できる。 By this three-phase to two-phase conversion, the interphase deviations of the capacitor voltage average values Vcux, Vcvx, and Vcwx can be converted into the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb. By controlling the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb to be zero, it is possible to suppress interphase imbalance of the capacitor voltage average values Vcux, Vcvx, and Vcwx.
 コンデンサ電圧平均値バランス指令部73は、a軸コンデンサ電圧Vcaおよびb軸コンデンサ電圧Vcbに比例積分ゲインを乗算し、その乗算結果を下式のように2倍の角周波数で回転座標変換することにより、コンデンサ電圧平均値Vcux,Vcvx,Vcwxのアンバランスを抑制するためのd軸逆相電流指令値Id_invおよびq軸逆相電流指令値Iq_invを得る。 The capacitor voltage average value balance command unit 73 multiplies the a-axis capacitor voltage Vca and the b-axis capacitor voltage Vcb by a proportional integral gain, and converts the multiplication result into a rotating coordinate at a double angular frequency as shown in the following equation. , the d-axis negative-phase current command value Id_inv and the q-axis negative-phase current command value Iq_inv for suppressing the imbalance of the capacitor voltage average values Vcux, Vcvx, and Vcwx are obtained.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 補償電流制御部74は、補償電流指令部71で得られるd軸電流指令値Id_refおよびq軸電流指令値Id_refに基づき、系統電圧Eu,Ev,Ewとほぼ同じ波形の交流電圧をマルチレベル変換器12u,12v,12wで生成させるため且つコンデンサ電圧平均値Vcux,Vcvx,Vcwxのアンバランスが生じた場合にそれを抑制する系統周波数(3相交流系統1の交流電圧の周波数)の逆相電流を電源ライン電源ラインLu,Lv,Lwに流すための電圧指令値Vcu sinθ,Vcv sin(θ-2π/3),Vcw sin(θ+2π/3)を設定し出力する。この際の各部の電圧およびd軸逆相電流指令値Id_invおよびq軸逆相電流指令値Iq_invを含む電流の波形を図6に示している。 Based on the d-axis current command value Id_ref and the q-axis current command value Id_ref obtained by the compensation current command unit 71, the compensation current control unit 74 converts AC voltages having substantially the same waveforms as the system voltages Eu, Ev, and Ew to the multilevel converter. 12u, 12v, 12w and the negative phase current of the system frequency (the frequency of the AC voltage of the three-phase AC system 1) that suppresses the unbalance of the capacitor voltage average values Vcux, Vcvx, Vcwx when it occurs Power supply line Sets and outputs voltage command values Vcu sinθ, Vcv sin(θ−2π/3), and Vcw sin(θ+2π/3) for flowing through power supply lines Lu, Lv, and Lw. FIG. 6 shows waveforms of currents including the voltage of each part at this time and the d-axis reversed-phase current command value Id_inv and the q-axis reversed-phase current command value Iq_inv.
 [PWM制御部62] 
 PWM制御部62は、三角波状のキャリア信号の電圧レベルと電圧指令値演算部61からの電圧指令値Vcu sinθ,Vcv sin(θ-2π/3),Vcw sin(θ+2π/3)の電圧レベルとを比較するパルス幅変調により、マルチレベル変換器12u,12v,12wにおける各単位変換器の全てのスイッチ素子Q1a~Q3dに対するスイッチング用のゲート信号(駆動信号)を生成する。生成されたゲート信号はアンド回路65の一方の入力端を介してマルチレベル変換器12u,12v,12wの各単位変換器に供給される。
[PWM controller 62]
The PWM control unit 62 controls the voltage level of the triangular carrier signal and the voltage levels of the voltage command values Vcu sinθ, Vcv sin(θ−2π/3), and Vcw sin(θ+2π/3) from the voltage command value calculation unit 61. is generated by pulse width modulation that compares . The generated gate signal is supplied to each unit converter of the multilevel converters 12u, 12v and 12w via one input terminal of the AND circuit 65. FIG.
 [セル故障検出部63] 
 セル故障検出部63は、マルチレベル変換器12u,12v,12wの各単位変換器における全てのコンデンサC1~C3の電圧および全てのコンデンサC1~C3に流れる電流に基づいて各単位変換器の故障を検出し、故障があった際に論理“1”のセル故障信号を発するもので、図7に示すように比較判定部81,82,83およびオア回路84を含む。発せられるセル故障信号は、反転回路64で論理が反転された状態でアンド回路65の他方の入力端に供給されるとともに、空気調和機2のコントローラ9に供給される。
[Cell failure detector 63]
A cell failure detection unit 63 detects a failure of each unit converter based on the voltage of all the capacitors C1 to C3 and the current flowing through all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w. It detects a failure and outputs a logic "1" cell failure signal when there is a failure, and includes comparison/ determination units 81, 82, 83 and an OR circuit 84 as shown in FIG. The generated cell failure signal is supplied to the other input terminal of the AND circuit 65 with its logic inverted by the inverting circuit 64 and supplied to the controller 9 of the air conditioner 2 .
 比較判定部81は、マルチレベル変換器12u,12v,12wの各単位変換器における全てのコンデンサC1~C3の電圧Vc1~Vc3のいずれかが第1閾値より小さい場合、その小さい電圧のコンデンサが存する単位変換器のスイッチ素子に短絡故障があると判定する。例えば、単位変換器21uのコンデンサC1の電圧(電圧検出部34の検出電圧)Vc1が第1閾値より小さくなった場合、比較判定部81は、単位変換器21uのスイッチ素子Q1a~Q1dのいずれかに短絡故障があると判定し、論理“1”のセル故障信号を発する。 If any of the voltages Vc1 to Vc3 of all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w is smaller than the first threshold, the comparison determination unit 81 determines that the capacitor with the smaller voltage exists. It is determined that there is a short-circuit fault in the switching element of the unit converter. For example, when the voltage of the capacitor C1 of the unit converter 21u (detected voltage of the voltage detector 34) Vc1 becomes smaller than the first threshold value, the comparison and determination unit 81 selects one of the switch elements Q1a to Q1d of the unit converter 21u. determines that there is a short circuit fault, and issues a logic "1" cell fault signal.
 比較判定部82は、マルチレベル変換器12u,12v,12wの各単位変換器における全てのコンデンサC1~C3の電圧Vc1~Vc3のいずれかが第2閾値(>第1閾値)より大きい場合、その大きい電圧のコンデンサが存する単位変換器に何らかの故障があると判定する。例えば、単位変換器21vのコンデンサC2の電圧(電圧検出部44の検出電圧)Vc2が第2閾値(>第1閾値)より大きい場合、比較判定部82は、単位変換器21vに何らかの故障があると判定し、論理“1”のセル故障信号を発する。 If any of the voltages Vc1 to Vc3 of all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w is greater than the second threshold (>first threshold), the comparison determination unit 82 Determine that there is some fault in the unit converter where the large voltage capacitor resides. For example, when the voltage of the capacitor C2 of the unit converter 21v (detected voltage of the voltage detector 44) Vc2 is greater than the second threshold (>first threshold), the comparison determination unit 82 determines that the unit converter 21v has some kind of failure. and issues a logic "1" cell failure signal.
 比較判定部83は、マルチレベル変換器12u,12v,12wの各単位変換器における全てのコンデンサC1~C3のいずれかに流れる電流が閾値以上の場合、その閾値以上の電流が流れるコンデンサが存する単位変換器のスイッチ素子に短絡故障があると判定する。例えば、単位変換器21vのコンデンサC2に流れる電流(シャント抵抗45を介して検出される電流)が閾値以上に異常上昇した場合、比較判定部83は、単位変換器21vのスイッチ素子Q1a~Q1dのいずれかに短絡故障があると判定し、論理“1”のセル故障信号を発する。 If the current flowing through any one of the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w is equal to or greater than a threshold, the comparison determination unit 83 determines the unit in which the capacitor through which the current equal to or greater than the threshold exists. It is determined that there is a short-circuit fault in the switch element of the converter. For example, when the current flowing through the capacitor C2 of the unit converter 21v (the current detected via the shunt resistor 45) abnormally rises above the threshold value, the comparison determination unit 83 determines whether the switch elements Q1a to Q1d of the unit converter 21v It determines that there is a short circuit fault in either of them, and issues a logic "1" cell fault signal.
 比較判定部81,82,83から発せられるセル故障信号は、オア回路84を介して上記反転回路64に供給されるとともに、空気調和機2のコントローラ9に供給される。
 すなわち、セル故障検出部63が故障を検出しない場合、アンド回路65のアンド条件が成立するので、PWM制御部62から出力されるゲート信号がアンド回路65を通してマルチレベル変換器12u,12v,12wの各単位変換器に供給される。これにより、マルチレベル変換器12u,12v,12wの各単位変換器における全てのスイッチ素子Q1a~Q3dがオン,オフを繰り返す。
The cell failure signals generated from the comparison/ determination units 81 , 82 , 83 are supplied to the inverting circuit 64 through an OR circuit 84 and to the controller 9 of the air conditioner 2 .
That is, when the cell failure detection unit 63 does not detect a failure, the AND condition of the AND circuit 65 is established, so the gate signals output from the PWM control unit 62 are passed through the AND circuit 65 to the multilevel converters 12u, 12v, and 12w. Supplied to each unit converter. As a result, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w are repeatedly turned on and off.
 セル故障検出部63が故障を検出した場合は、アンド回路65のアンド条件が成立しないので、PWM制御部62から出力されるゲート信号がアンド回路65で遮断されてマルチレベル変換器12u,12v,12wの各単位変換器に供給されない。これにより、各単位変換器における全てのスイッチ素子Q1a~Q3dがオフ(開放)し、そのオフ状態が維持される。 When the cell failure detection unit 63 detects a failure, the AND condition of the AND circuit 65 is not established, so the gate signal output from the PWM control unit 62 is interrupted by the AND circuit 65 and the multilevel converters 12u, 12v, Not supplied to each 12w unit converter. As a result, all the switch elements Q1a to Q3d in each unit converter are turned off (opened) and the off state is maintained.
 [短絡故障の例] 
 図8に示すように、マルチレベル変換器12uの単位変換器21uにおいてスイッチ素子Q1a,Q1bの短絡故障(図示×印)が生じた場合、そのスイッチ素子Q1a,Q1bを通してコンデンサC1の両端が短絡された状態となり、コンデンサC1の放電によるセル短絡電流が図示破線のように流れる。
[Example of short circuit failure]
As shown in FIG. 8, when a short-circuit failure (marked with x in the drawing) occurs in the switch elements Q1a and Q1b in the unit converter 21u of the multilevel converter 12u, both ends of the capacitor C1 are short-circuited through the switch elements Q1a and Q1b. A cell short-circuit current due to the discharge of the capacitor C1 flows as indicated by the dashed line in the drawing.
 短絡故障の発生時、コンデンサC1の電圧Vc1が第1閾値未満に瞬時に低下するので、セル故障検出部63の比較判定部81から論理“1”のセル故障信号を発せられる。また、セル短絡電流が閾値以上であれば、セル故障検出部63の比較判定部83から論理“1”のセル故障信号を発せられる。論理“1”のセル故障信号が発せられると、マルチレベル変換器12u,12v,12wの各単位変換器における全てのスイッチ素子Q1a~Q3dがオフ(開放)し、そのオフ状態が維持される。この場合、全てのスイッチ素子Q1a~Q3dをオフする制御を行うが、短絡故障が生じている単位変換器21uのスイッチ素子Q1a,Q1bは短絡したまま作動しない。 When a short-circuit fault occurs, the voltage Vc1 of the capacitor C1 instantly drops below the first threshold value, so that the comparison determination section 81 of the cell fault detection section 63 issues a cell fault signal of logic "1". Also, if the cell short-circuit current is equal to or greater than the threshold, the cell failure signal of logic "1" is issued from the comparison/determination unit 83 of the cell failure detection unit 63 . When a logic "1" cell failure signal is issued, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w are turned off (opened) and the off state is maintained. In this case, control is performed to turn off all the switch elements Q1a to Q3d, but the switch elements Q1a and Q1b of the unit converter 21u in which the short-circuit failure has occurred remain short-circuited and do not operate.
 短絡故障がない単位変換器22uにおいては、全てのスイッチ素子Q1a~Q3dがオフすることで、そのスイッチ素子Q1a~Q3dのそれぞれ寄生ダイオードDを通る経路で出力端子P2,N2とコンデンサC2とをつなぐ通電路が形成される。同様に、短絡故障がない単位変換器23uにおいては、全てのスイッチ素子Q1a~Q3dがオフすることにより、そのスイッチ素子Q1a~Q3dのそれぞれ寄生ダイオードDを通る経路で出力端子P3,N3とコンデンサC3とをつなぐ通電路が形成される。 In the unit converter 22u without a short circuit fault, all the switch elements Q1a to Q3d are turned off, and the output terminals P2 and N2 and the capacitor C2 are connected to the paths passing through the parasitic diodes D of the switch elements Q1a to Q3d, respectively. An electric path is formed. Similarly, in the unit converter 23u without a short circuit fault, all the switch elements Q1a to Q3d are turned off, and the output terminals P3, N3 and the capacitor C3 are connected to the output terminals P3, N3 and the capacitor C3 through the paths passing through the parasitic diodes D of the switch elements Q1a to Q3d, respectively. An electric path is formed to connect the
 短絡故障が生じたマルチレベル変換器12uと短絡故障がないマルチレベル変換器12vについて見ると、電源ラインLu,Lvの線間電圧Euvに基づく系統短絡電流が図8に太線矢印で示す経路で流れようとする。すなわち、単位変換器21v,22v,23vにおける全てのスイッチ素子Q1a~Q3dの寄生ダイオードDおよび全てのコンデンサC1,C2,C3を通り、単位変換器22u,23uにおける全てのスイッチ素子Q1a~Q3dの寄生ダイオードDおよびコンデンサC2,C3を通り、単位変換器21uにおける短絡故障したスイッチ素子Q1a,Q1bの一方を通り、さらに単位変換器21uにおけるスイッチ素子Q1c,Q1dの寄生ダイオードDを通る経路で、系統短絡電流が流れようとする。 Looking at the multi-level converter 12u with a short-circuit fault and the multi-level converter 12v without a short-circuit fault, the system short-circuit current based on the line voltage Euv of the power supply lines Lu and Lv flows along the path indicated by the thick arrow in FIG. try That is, through the parasitic diodes D and all the capacitors C1, C2 and C3 of all the switch elements Q1a to Q3d in the unit converters 21v, 22v and 23v, the parasitic power of all the switch elements Q1a to Q3d in the unit converters 22u and 23u The system short-circuits through a path that passes through the diode D and the capacitors C2 and C3, through one of the short-circuited switch elements Q1a and Q1b in the unit converter 21u, and through the parasitic diode D of the switch elements Q1c and Q1d in the unit converter 21u. current tries to flow.
 しかしながら、その系統短絡電流が流れようとする経路には、単位変換器21uのコンデンサC1を除き、単位変換器21v,22v,23vのコンデンサC1,C2,C3が介在し、さらに単位変換器22u,23uのコンデンサC2,C3が介在する。これら介在する5つのコンデンサの電圧Vc1,Vc2,Vc3,Vc2,Vc3の合計は線間電圧Euvよりも高ければ、短絡電流が流れない。
 Euv<(Vc1+Vc2+Vc3+Vc2+Vc3)
However, the path through which the system short-circuit current is to flow includes capacitors C1, C2, and C3 of unit converters 21v, 22v, and 23v, excluding capacitor C1 of unit converter 21u. 23u capacitors C2 and C3 are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc2, and Vc3 of these five intervening capacitors is higher than the line voltage Euv, no short-circuit current will flow.
Euv<(Vc1+Vc2+Vc3+Vc2+Vc3)
 短絡故障が生じたマルチレベル変換器12wと短絡故障がないマルチレベル変換器12uについて見ると、電源ラインLw,Luの線間電圧Ewuに基づく系統短絡電流が流れようとする経路には、単位変換器21uのコンデンサC1を除き、単位変換器21w,22w,23wのコンデンサC1,C2,C3が介在し、さらに単位変換器22u,23uのコンデンサC2,C3が介在する。これら介在する5つのコンデンサの電圧Vc1,Vc2,Vc3,Vc2,Vc3の合計は線間電圧Ewuよりも高ければ、短絡電流は流れない。
 Ewu<(Vc1+Vc2+Vc3+Vc2+Vc3)
Looking at the multi-level converter 12w with a short-circuit fault and the multi-level converter 12u with no short-circuit fault, there is a unit conversion Except for the capacitor C1 of the unit 21u, the capacitors C1, C2 and C3 of the unit converters 21w, 22w and 23w are interposed, and the capacitors C2 and C3 of the unit converters 22u and 23u are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc2 and Vc3 of these intervening five capacitors is higher than the line voltage Ewu, no short-circuit current will flow.
Ewu<(Vc1+Vc2+Vc3+Vc2+Vc3)
 短絡故障がないマルチレベル変換器12v,12wについて見ると、電源ラインLv,Lwの線間電圧Evwに基づく系統短絡電流が流れようとする経路には、単位変換器21v,22v,23vのコンデンサC1,C2,C3が介在し、さらに単位変換器22w,22w,23wのコンデンサC1,C2,C3が介在する。これら介在する6つのコンデンサの電圧Vc1,Vc2,Vc3,Vc1,Vc2,Vc3の合計は線間電圧Evwよりも高ければ、短絡電流は流れない。
 Evw<(Vc1+Vc2+Vc3+Vc1+Vc2+Vc3)
Looking at the multilevel converters 12v and 12w with no short-circuit failure, the path through which the system short-circuit current based on the line voltage Evw of the power supply lines Lv and Lw tries to flow includes the capacitors C1 of the unit converters 21v, 22v and 23v. , C2 and C3 are interposed, and further capacitors C1, C2 and C3 of unit converters 22w, 22w and 23w are interposed. If the sum of the voltages Vc1, Vc2, Vc3, Vc1, Vc2, Vc3 of these intervening six capacitors is higher than the line voltage Evw, no short-circuit current will flow.
Evw<(Vc1+Vc2+Vc3+Vc1+Vc2+Vc3)
 以上のように、マルチレベル変換器12u,12v,12wの各単位変換器における各スイッチ素子のいずれかに短絡故障が生じても、電源ラインLu,Lv,Lwからマルチレベル変換器12u,12v,12wには系統短絡電流が流れない。系統短絡電流が流れないので、電源ラインLu,Lv,LwのブレーカBが作動することはなく、空気調和機2は運転を継続することができている。さらに、ブレーカBが作動しないため、この空気調和機2と並列に接続されている他の電気機器30(図1参照)もそのまま運転を継続することができる。 As described above, even if a short-circuit fault occurs in any of the switch elements in the unit converters of the multilevel converters 12u, 12v, and 12w, the power supply lines Lu, Lv, and Lw are connected to the multilevel converters 12u, 12v, and 12v. No system short-circuit current flows through 12w. Since the system short-circuit current does not flow, the breakers B of the power supply lines Lu, Lv, and Lw do not operate, and the air conditioner 2 can continue to operate. Furthermore, since the breaker B does not operate, the other electrical equipment 30 (see FIG. 1) connected in parallel with the air conditioner 2 can also continue to operate.
 短絡故障が発生する前後の負荷電流ILu,ILv,ILwおよび単位変換器21u,22u,23uのセル出力電圧Vcu1,Vcu2,Vcu3の変化を図9に示している。短絡故障によって単位変換器21uのセル出力電圧Vcu1が低下するが、負荷電流ILu,ILv,ILwが急激に増加するような不具合は生じず、単に高調波の抑制がなされていない状態の波形となっている。 FIG. 9 shows changes in the load currents ILu, ILv, ILw and the cell output voltages Vcu1, Vcu2, Vcu3 of the unit converters 21u, 22u, 23u before and after the occurrence of the short-circuit fault. Although the cell output voltage Vcu1 of the unit converter 21u drops due to the short-circuit fault, there is no problem such as a sudden increase in the load currents ILu, ILv, and ILw, and the waveform is simply in a state where harmonics are not suppressed. ing.
 [変形例1] 
 短絡故障の発生時、論理“1”のセル故障信号の供給を受けたコントローラ9は、インバータ6の出力周波数を徐々に低減させる。
 インバータ6の出力周波数が徐々に低減させることで、図10に示すように、圧縮機モータ7の回転数が徐々に低下していく。これにより、空気調和機2から電源ラインLu,Lv,Lwに流出する高調波を低減することができる。
[Modification 1]
When a short-circuit fault occurs, the controller 9 supplied with the logic "1" cell fault signal gradually reduces the output frequency of the inverter 6. FIG.
By gradually decreasing the output frequency of the inverter 6, the rotational speed of the compressor motor 7 is gradually decreased as shown in FIG. Thereby, harmonics flowing out from the air conditioner 2 to the power supply lines Lu, Lv, Lw can be reduced.
 [変形例2] 
 制御部15におけるセル故障検出部63の変形例として、比較判定部81は、マルチレベル変換器12u,12v,12wの各単位変換器における全てのコンデンサC1~C3の電圧Vc1~Vc3のいずれかが第1閾値より小さく、かつその第1閾値より小さい電圧とマルチレベル変換器12u,12v,12wの各単位変換器における各コンデンサの電圧Vc1,Vc2,Vc3の平均値との差が第2閾値(>第1閾値)より大きい場合、その第1閾値より小さい電圧のコンデンサを有する単位変換器のスイッチ素子に短絡故障があると判定する。
 各コンデンサの電圧Vc1,Vc2,Vc3の電圧が十分に上昇していない起動時など、短絡故障の誤検出を防ぐことができる。
[Modification 2]
As a modification of the cell failure detection unit 63 in the control unit 15, the comparison determination unit 81 determines whether any of the voltages Vc1 to Vc3 of all the capacitors C1 to C3 in each unit converter of the multilevel converters 12u, 12v, and 12w is The difference between the voltage smaller than the first threshold and the average value of the voltages Vc1, Vc2, and Vc3 of each capacitor in each unit converter of the multilevel converters 12u, 12v, and 12w is the second threshold ( >first threshold), it is determined that there is a short-circuit fault in the switch element of the unit converter having a capacitor with a voltage lower than the first threshold.
It is possible to prevent erroneous detection of a short-circuit failure, such as at startup when the voltages Vc1, Vc2, and Vc3 of the capacitors have not sufficiently increased.
 [変形例3] 
 制御部15は、短絡故障の検出時、マルチレベル変換器12u,12v,12wの各単位変換器における全てのスイッチ素子Q1a~Q3dをオフした後、開閉器接点Su,Sv,Swを開く。開閉器接点Su,Sv,Swが開くことにより、マルチレベル変換器12u,12v,12wが電源ラインLu,Lv,Lwから切り離される。
[Modification 3]
When detecting a short-circuit fault, the control unit 15 turns off all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, 12w, and then opens the switch contacts Su, Sv, Sw. By opening the switch contacts Su, Sv, and Sw, the multilevel converters 12u, 12v, and 12w are separated from the power lines Lu, Lv, and Lw.
 例えば、スイッチ素子Q1a,Q1bの短絡故障が生じた単位変換器21uを有するマルチレベル変換器12uでは、全てのスイッチ素子Q1a~Q3dのオフに伴い、単位変換器21v,21wにおけるコンデンサC2,C3の2つに電源電圧が加わることになり、これらのコンデンサC2,C3に過電圧が加わる可能性がある。これに対しても開閉器接点Su,Sv,Swが開くことで、この過電圧が加わる不具合を解消し、電力変換装置10を安全に停止することができる。 For example, in the multi-level converter 12u having the unit converter 21u in which the switch elements Q1a and Q1b are short-circuited, the capacitors C2 and C3 in the unit converters 21v and 21w are turned off as all the switch elements Q1a to Q3d are turned off. The supply voltage will be applied to the two, and overvoltage may be applied to these capacitors C2 and C3. Also, by opening the switch contacts Su, Sv, and Sw, this overvoltage problem can be resolved, and the power converter 10 can be stopped safely.
 [変形例4] 
 上記実施形態では、短絡故障の検出時、マルチレベル変換器12u,12v,12wの各単位変換器における全てのスイッチ素子Q1a~Q3dをオフする構成としたが、マルチレベル変換器12uの単位変換器21u,22u,23uにおけるスイッチ素子Q1a~Q3dのいずれかの短絡故障を検出した場合にマルチレベル変換器12uの単位変換器21u,22u,23uにおける全てのスイッチ素子Q1a~Q3dをオフし、マルチレベル変換器12vの単位変換器21v,22v,23vにおけるスイッチ素子Q1a~Q3dのいずれかの短絡故障を検出した場合にマルチレベル変換器12vの単位変換器21v,22v,23vにおける全てのスイッチ素子Q1a~Q3dをオフし、マルチレベル変換器12wの単位変換器21w,22w,23wにおけるスイッチ素子Q1a~Q3dのいずれかの短絡故障を検出した場合にマルチレベル変換器12wの単位変換器21w,22w,23wにおける全てのスイッチ素子Q1a~Q3dをオフする構成としてもよい。
[Modification 4]
In the above embodiment, when a short-circuit fault is detected, all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, and 12w are turned off, but the unit converter of the multilevel converter 12u 21u, 22u, and 23u, all the switch elements Q1a to Q3d in the unit converters 21u, 22u, and 23u of the multilevel converter 12u are turned off when a short circuit fault is detected in any one of the switch elements Q1a to Q3d in the multilevel converter 21u, 22u, and 23u. When a short circuit fault of any of the switch elements Q1a to Q3d in the unit converters 21v, 22v, and 23v of the converter 12v is detected, all the switch elements Q1a to in the unit converters 21v, 22v, and 23v of the multilevel converter 12v When Q3d is turned off and a short-circuit failure in any of the switch elements Q1a to Q3d in the unit converters 21w, 22w, and 23w of the multilevel converter 12w is detected, the unit converters 21w, 22w, and 23w of the multilevel converter 12w may be configured to turn off all the switch elements Q1a to Q3d.
 例えば、図11に示すように、マルチレベル変換器12uの単位変換器21uにおけるスイッチ素子Q1a,Q1bに短絡故障が生じた場合、制御部15は、マルチレベル変換器12uの単位変換器21uにおける全てのスイッチ素子Q1a~Q3dをオフする。 For example, as shown in FIG. 11, when a short-circuit fault occurs in the switch elements Q1a and Q1b in the unit converter 21u of the multilevel converter 12u, the controller 15 controls all the unit converters 21u of the multilevel converter 12u. switch elements Q1a to Q3d are turned off.
 短絡故障が生じたマルチレベル変換器12uと短絡故障がないマルチレベル変換器12vについて見ると、電源ラインLu,Lvの線間電圧Euvに基づく系統短絡電流が図11に太線矢印で示す経路で流れようとする。すなわち、単位変換器21v,22v,23vを通り、単位変換器22u,23uにおける全てのスイッチ素子Q1a~Q3dの寄生ダイオードDおよびコンデンサC2,C3を通り、単位変換器21uにおける短絡故障したスイッチ素子Q1a,Q1bの一方を通り、さらに単位変換器21uにおけるスイッチ素子Q1c,Q1dの寄生ダイオードDを通る経路で、系統短絡電流が流れようとする。 Looking at the multi-level converter 12u with a short-circuit fault and the multi-level converter 12v without a short-circuit fault, the system short-circuit current based on the line-to-line voltage Euv of the power supply lines Lu and Lv flows along the path indicated by the thick arrow in FIG. try That is, through the unit converters 21v, 22v, 23v, through the parasitic diodes D and capacitors C2, C3 of all the switch elements Q1a to Q3d in the unit converters 22u, 23u, the short-circuited switch element Q1a in the unit converter 21u , Q1b and the parasitic diode D of the switch elements Q1c and Q1d in the unit converter 21u.
 しかしながら、その系統短絡電流が流れようとする経路には、単位変換器21uのコンデンサC1を除き、少なくとも単位変換器22u,23uのコンデンサC2,C3が介在する。介在する2つのコンデンサの電圧Vc2,Vc3の合計が系統電圧Eu(=Euv-Ev)より高ければ、短絡電流が流れない。
 Eu<(Vc2+Vc3) 
 マルチレベル変換器12u内で機能するのは単位変換器22u,23uのみとなり、機能する単位変換器の数が減少するが、残りのマルチレベル変換器12v,12wが機能するので、高調波抑制を継続することができる。
However, at least the capacitors C2 and C3 of the unit converters 22u and 23u intervene in the path through which the system short-circuit current flows, except for the capacitor C1 of the unit converter 21u. If the sum of the voltages Vc2 and Vc3 of the two intervening capacitors is higher than the system voltage Eu (=Euv-Ev), no short-circuit current will flow.
Eu<(Vc2+Vc3)
Only the unit converters 22u and 23u function in the multilevel converter 12u, and the number of functioning unit converters is reduced. can continue.
 [変形例5] 
 制御部15は、短絡故障の検出時、マルチレベル変換器12u,12v,12wの各単位変換器における全てのスイッチ素子Q1a~Q3dをオフした後、例えば図12に示すように、短絡故障があったスイッチ素子Q1a,Q1bを有する単位変換器21uのバイパススイッチ37をオン(閉成)する。
[Modification 5]
When a short-circuit fault is detected, the control unit 15 turns off all the switch elements Q1a to Q3d in each unit converter of the multilevel converters 12u, 12v, and 12w, and then detects a short-circuit fault as shown in FIG. The bypass switch 37 of the unit converter 21u having the switch elements Q1a and Q1b is turned on (closed).
 バイパススイッチ37がオンすることにより、単位変換器21uがマルチレベル変換器12u内でバイパス状態となり、マルチレベル変換器12u内で機能するのは単位変換器22u,23uのみとなる。機能する単位変換器の数が減少するが、残りの単位変換器22u,23uで高調波抑制を継続することができる。 By turning on the bypass switch 37, the unit converter 21u enters the bypass state within the multilevel converter 12u, and only the unit converters 22u and 23u function within the multilevel converter 12u. Although the number of functioning unit transducers is reduced, harmonic suppression can continue with the remaining unit transducers 22u, 23u.
 [変形例6] 
 上記実施形態では、マルチレベル変換器12u,12v,12wのそれぞれの他端を相互接続(スター結線)する構成の電力変換装置について説明したが、図13に示すように、マルチレベル変換器12u,12v,12wが電源ラインLu,Lv,Lwの相互間に接続されるいわゆるデルタ結線の電力変換装置においても同様に実施できる。
[Modification 6]
In the above-described embodiment, the power conversion apparatus having a configuration in which the other ends of the multilevel converters 12u, 12v, and 12w are interconnected (star connection) has been described. A so-called delta-connected power converter in which 12v and 12w are connected between power supply lines Lu, Lv, and Lw can also be implemented in the same manner.
 その他、上記実施形態および変形例は、例として提示したものであり、発明の範囲を限定することは意図していない。これら実施形態および変形例は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、書き換え、変更を行うことができる。これら実施形態および変形例は、発明の範囲は要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。 In addition, the above embodiments and modifications are presented as examples and are not intended to limit the scope of the invention. These embodiments and modifications can be implemented in various other forms, and various omissions, rewrites, and modifications can be made without departing from the scope of the invention. These embodiments and modifications are included in the scope of the invention, and are included in the scope of the invention described in the claims and their equivalents.
 1…3相交流電源、Lu,Lv,Lw…電源ライン(第1,第2,第3電源ライン)、3…空気調和機、10…電力変換装置、12u,12v,12w…マルチレベル変換器、15…制御部、21u,22u,23u…単位変換器、21v,22v,23v…単位変換器、21w,22w,23w…単位変換器、Q1a~Q3d…スイッチ素子、C1,C2,C3…コンデンサ DESCRIPTION OF SYMBOLS 1... Three-phase AC power supply, Lu, Lv, Lw... Power supply line (1st, 2nd, 3rd power supply line), 3... Air conditioner, 10... Power converter, 12u, 12v, 12w... Multilevel converter , 15... control section, 21u, 22u, 23u... unit converters, 21v, 22v, 23v... unit converters, 21w, 22w, 23w... unit converters, Q1a to Q3d... switch elements, C1, C2, C3... capacitors

Claims (15)

  1.  ブレーカを介して空気調和機が接続される交流電源系統の複数の電源ラインにその空気調和機とは並列の関係に接続される電力変換装置であって、
     複数のスイッチ素子およびこれらスイッチ素子を介して当該出力端子に接続されたコンデンサを含みその各スイッチ素子のオン,オフによりそれぞれが複数レベルの直流電圧を前記出力端子から出力する複数の単位変換器を有し、これら単位変換器を直列接続してなるマルチレベル変換器を、前記各電源ラインにおける前記ブレーカより下流側に設けた電力変換装置。
    A power conversion device connected in parallel with an air conditioner to a plurality of power lines of an AC power supply system to which the air conditioner is connected via a breaker,
    a plurality of unit converters each including a plurality of switch elements and a capacitor connected to the output terminal through these switch elements, each of which outputs a plurality of levels of DC voltage from the output terminal by turning on and off the switch elements; and a multi-level converter formed by connecting these unit converters in series, provided on the downstream side of the breaker in each of the power supply lines.
  2.  前記各マルチレベル変換器の前記各単位変換器における前記各スイッチ素子の短絡故障を検出する検出手段と、
     前記検出手段が前記短絡故障を検出した場合、前記各マルチレベル変換器の前記各単位変換器における全ての前記スイッチ素子をオフする制御手段と、
     を備える請求項1に記載の電力変換装置。
    detection means for detecting a short circuit failure of each of the switch elements in each of the unit converters of each of the multilevel converters;
    control means for turning off all the switch elements in each unit converter of each multilevel converter when the detection means detects the short circuit fault;
    The power converter according to claim 1, comprising:
  3.  前記電源ラインは、3相交流系統の第1,第2,第3電源ラインであり、
     前記各マルチレベル変換器は、前記第1,第2,第3電源ラインに接続された第1,第2,第3マルチレベル変換器であり、
     前記検出手段は、前記第1,第2,第3マルチレベル変換器の各単位変換器における前記各コンデンサの電圧に基づいて、前記第1,第2,第3マルチレベル変換器の前記各単位変換器における前記各スイッチ素子の短絡故障を検出し、
     前記制御手段は、前記検出手段が前記短絡故障を検出した場合に、前記第1,第2,第3マルチレベル変換器の前記各単位変換器における全ての前記スイッチ素子をオフする、
     請求項2に記載の電力変換装置。
    The power lines are first, second, and third power lines of a three-phase AC system,
    the multilevel converters are first, second and third multilevel converters connected to the first, second and third power supply lines;
    The detection means detects each unit of the first, second and third multilevel converters based on the voltage of each capacitor in each unit converter of the first, second and third multilevel converters. detecting a short-circuit failure of each switch element in the converter;
    The control means turns off all the switch elements in the unit converters of the first, second, and third multilevel converters when the detection means detects the short circuit fault.
    The power converter according to claim 2.
  4.  前記電源ラインは、3相交流系統の第1,第2,第3電源ラインであり、
     前記各マルチレベル変換器は、前記第1,第2,第3電源ラインに接続された第1,第2,第3マルチレベル変換器であり、
     前記検出手段は、前記第1,第2,第3マルチレベル変換器の各単位変換器における前記各コンデンサの電圧に基づいて、前記第1,第2,第3マルチレベル変換器の前記各単位変換器における前記各スイッチ素子の短絡故障を検出し、
     前記制御手段は、前記検出手段が前記第1マルチレベル変換器の前記各単位変換器における前記各スイッチ素子のいずれかの短絡故障を検出した場合に前記第1マルチレベル変換器の前記各単位変換器における全ての前記スイッチ素子をオフし、前記検出手段が前記第2マルチレベル変換器の前記各単位変換器における前記各スイッチ素子のいずれかの短絡故障を検出した場合に前記第2マルチレベル変換器の前記各単位変換器における全ての前記スイッチ素子をオフし、前記検出手段が前記第3マルチレベル変換器の前記各単位変換器における前記各スイッチ素子のいずれかの短絡故障を検出した場合に前記第3マルチレベル変換器の前記各単位変換器における全ての前記スイッチ素子をオフする、
     請求項2に記載の電力変換装置。
    The power lines are first, second, and third power lines of a three-phase AC system,
    the multilevel converters are first, second and third multilevel converters connected to the first, second and third power supply lines;
    The detection means detects each unit of the first, second and third multilevel converters based on the voltage of each capacitor in each unit converter of the first, second and third multilevel converters. detecting a short-circuit failure of each switch element in the converter;
    The control means controls the unit conversion of the first multilevel converter when the detection means detects a short-circuit failure of any one of the switch elements in the unit converter of the first multilevel converter. turning off all the switch elements in the unit converter, and when the detection means detects a short circuit fault in any one of the switch elements in the unit converters of the second multilevel converter, the second multilevel converter When all the switch elements in the unit converters of the third multilevel converter are turned off, and the detection means detects a short circuit fault in any one of the switch elements in the unit converters of the third multilevel converter turning off all the switch elements in each of the unit converters of the third multilevel converter;
    The power converter according to claim 2.
  5.  前記検出手段は、前記各マルチレベル変換器の前記各単位変換器における前記各コンデンサの電圧のいずれかが閾値より小さい場合、その閾値より小さい電圧のコンデンサを有する単位変換器の前記スイッチ素子に短絡故障があると判定する、
     請求項3に記載の電力変換装置。
    When any of the voltages of the capacitors in the unit converters of the multi-level converters is smaller than a threshold, the detecting means short-circuits the switch element of the unit converter having a capacitor with a voltage smaller than the threshold. determine that there is a fault,
    The power converter according to claim 3.
  6.  前記検出手段は、前記各マルチレベル変換器の前記各単位変換器における前記各コンデンサの電圧のいずれかが閾値より小さい場合、その閾値より小さい電圧のコンデンサを有する単位変換器の前記スイッチ素子に短絡故障があると判定する、
     請求項4に記載の電力変換装置。
    When any of the voltages of the capacitors in the unit converters of the multi-level converters is smaller than a threshold, the detecting means short-circuits the switch element of the unit converter having a capacitor with a voltage smaller than the threshold. determine that there is a fault,
    The power converter according to claim 4.
  7.  前記検出手段は、前記各マルチレベル変換器の前記各単位変換器における前記各コンデンサの電圧のいずれかが第1閾値より小さく、かつその第1閾値より小さい電圧と前記各マルチレベル変換器の前記各単位変換器における前記各コンデンサの電圧の平均値との差が第2閾値(>第1閾値)より大きい場合、前記第1閾値より小さい電圧のコンデンサを有する単位変換器の前記スイッチ素子に短絡故障があると判定する、
     請求項3に記載の電力変換装置。
    The detection means detects that any of the voltages of the capacitors in the unit converters of the multilevel converters is smaller than a first threshold and the voltage smaller than the first threshold and the voltage of the multilevel converters When the difference from the average value of the voltage of each capacitor in each unit converter is larger than a second threshold (> first threshold), the switch element of the unit converter having a capacitor with a voltage smaller than the first threshold is short-circuited. determine that there is a fault,
    The power converter according to claim 3.
  8.  前記検出手段は、前記各マルチレベル変換器の前記各単位変換器における前記各コンデンサの電圧のいずれかが第1閾値より小さく、かつその第1閾値より小さい電圧と前記各マルチレベル変換器の前記各単位変換器における前記各コンデンサの電圧の平均値との差が第2閾値(>第1閾値)より大きい場合、前記第1閾値より小さい電圧のコンデンサを有する単位変換器の前記スイッチ素子に短絡故障があると判定する、
     請求項4に記載の電力変換装置。
    The detection means detects that any of the voltages of the capacitors in the unit converters of the multilevel converters is smaller than a first threshold and the voltage smaller than the first threshold and the voltage of the multilevel converters When the difference from the average value of the voltage of each capacitor in each unit converter is larger than a second threshold (> first threshold), the switch element of the unit converter having a capacitor with a voltage smaller than the first threshold is short-circuited. determine that there is a fault,
    The power converter according to claim 4.
  9.  前記電源ラインの各ラインと前記各マルチレベル変換器との接続間に設けられた開閉器、
     を備え、
     前記制御手段は、前記スイッチ素子をオフした後に前記開閉器を開く、
     請求項1から請求項8のいずれか一項に記載の電力変換装置。
    A switch provided between each line of the power supply line and each multilevel converter;
    with
    the control means opens the switch after turning off the switch element;
    The power converter according to any one of claims 1 to 8.
  10.  前記各マルチレベル変換器の前記各単位変換器は、それぞれの前記出力端子に接続されたバイパススイッチを含み、
     前記制御手段は、前記スイッチ素子をオフした後、前記短絡故障があった前記スイッチ素子を有する前記単位変換器の前記バイパススイッチをオンする、
     請求項1から請求項8のいずれか一項に記載の電力変換装置。
    each unit converter of each multi-level converter includes a bypass switch connected to each of the output terminals;
    After turning off the switch element, the control means turns on the bypass switch of the unit converter having the switch element with the short circuit failure.
    The power converter according to any one of claims 1 to 8.
  11.  前記空気調和機は、前記電源ラインの電圧を整流する整流回路、この整流回路の出力電圧を所定周波数の交流電圧に変換するインバータ、このインバータの出力により動作する圧縮機モータを備えた、
     請求項1に記載の電力変換装置。
    The air conditioner includes a rectifier circuit that rectifies the voltage of the power supply line, an inverter that converts the output voltage of the rectifier circuit into an AC voltage of a predetermined frequency, and a compressor motor that operates with the output of the inverter.
    The power converter according to claim 1.
  12.  前記各マルチレベル変換器は、それぞれのマルチレベル変換器の前記各単位変換器の出力電圧を足し合わせることにより正弦波に近い波形の交流電圧を生成しそれを前記電源ラインに供給する、
     請求項1に記載の電力変換装置。
    Each multi-level converter generates an AC voltage having a waveform close to a sine wave by adding the output voltages of the unit converters of each multi-level converter and supplies it to the power supply line.
    The power converter according to claim 1.
  13.  前記各マルチレベル変換器は、それぞれのコンデンサ電圧平均値の相間のアンバランスを抑制するための系統周波数の逆相電流を前記電源ラインに流す、
     請求項12に記載の電力変換装置。
    Each of the multi-level converters supplies a negative-phase current of a system frequency to the power supply line for suppressing an imbalance between phases of average capacitor voltage values.
    The power converter according to claim 12.
  14.  前記各マルチレベル変換器は、それぞれの一端がバッファリアクトルを介して前記電源ラインに接続され、それぞれの他端が相互接続されている、
     請求項1に記載の電力変換装置。
    Each of the multi-level converters has one end connected to the power supply line via a buffer reactor, and the other ends interconnected.
    The power converter according to claim 1.
  15.  前記各マルチレベル変換器は、それぞれバッファリアクトルを介して前記電源ラインの相互間に接続されている、
     請求項1に記載の電力変換装置。
    each of the multilevel converters is connected between the power supply lines via a buffer reactor, respectively;
    The power converter according to claim 1.
PCT/JP2022/024860 2021-09-02 2022-06-22 Power conversion device WO2023032426A1 (en)

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1141931A (en) * 1997-07-14 1999-02-12 Toshiba Corp Power converter
US6075350A (en) * 1998-04-24 2000-06-13 Lockheed Martin Energy Research Corporation Power line conditioner using cascade multilevel inverters for voltage regulation, reactive power correction, and harmonic filtering
JP2007181253A (en) * 2005-12-27 2007-07-12 Mitsubishi Electric Corp Power converter
JP2010524425A (en) * 2007-04-16 2010-07-15 シーメンス アクチエンゲゼルシヤフト Active filter with multi-level connection configuration
JP2013223275A (en) * 2012-04-13 2013-10-28 Fuji Electric Co Ltd Power conversion apparatus
WO2019064705A1 (en) * 2017-09-26 2019-04-04 三菱電機株式会社 Power conversion device
JP2021002970A (en) * 2019-06-24 2021-01-07 ダイキン工業株式会社 Air conditioner

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1141931A (en) * 1997-07-14 1999-02-12 Toshiba Corp Power converter
US6075350A (en) * 1998-04-24 2000-06-13 Lockheed Martin Energy Research Corporation Power line conditioner using cascade multilevel inverters for voltage regulation, reactive power correction, and harmonic filtering
JP2007181253A (en) * 2005-12-27 2007-07-12 Mitsubishi Electric Corp Power converter
JP2010524425A (en) * 2007-04-16 2010-07-15 シーメンス アクチエンゲゼルシヤフト Active filter with multi-level connection configuration
JP2013223275A (en) * 2012-04-13 2013-10-28 Fuji Electric Co Ltd Power conversion apparatus
WO2019064705A1 (en) * 2017-09-26 2019-04-04 三菱電機株式会社 Power conversion device
JP2021002970A (en) * 2019-06-24 2021-01-07 ダイキン工業株式会社 Air conditioner

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