WO2023029059A1 - Method for removing polycrystalline silicon plated on backside of n-topcon battery - Google Patents
Method for removing polycrystalline silicon plated on backside of n-topcon battery Download PDFInfo
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- WO2023029059A1 WO2023029059A1 PCT/CN2021/116811 CN2021116811W WO2023029059A1 WO 2023029059 A1 WO2023029059 A1 WO 2023029059A1 CN 2021116811 W CN2021116811 W CN 2021116811W WO 2023029059 A1 WO2023029059 A1 WO 2023029059A1
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 54
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 147
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- 239000010703 silicon Substances 0.000 claims abstract description 147
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 78
- 239000011574 phosphorus Substances 0.000 claims abstract description 78
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 78
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 71
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 70
- 239000005380 borophosphosilicate glass Substances 0.000 claims abstract description 46
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- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 21
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- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 claims description 16
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 15
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- 238000000151 deposition Methods 0.000 abstract description 10
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the invention relates to the technical field of N-TOPCon batteries, in particular to a method for removing polysilicon plating around N-TOPCon batteries.
- N-type tunneling oxide passivation contact (N-TOPCon) battery refers to a type of battery that is passivated by tunneling oxide layer and doped polysilicon.
- the passivation mechanism is: ultra-thin silicon oxide is directly in contact with the silicon substrate , neutralize the dangling bonds on the silicon surface, and perform excellent chemical passivation: due to the difference in the Fermi level between the heavily doped polysilicon layer and the silicon substrate, the energy band bends on the surface of the silicon substrate, which can more effectively block the minority carrier. By doing so, the selective collection of carriers is achieved without affecting the transport of many carriers.
- N-TOPCon batteries Compared with traditional PERC batteries, N-TOPCon batteries have a full-area passivation of the back surface, without direct contact between metal and silicon, which is conducive to improving the short-circuit voltage of the battery, comprehensively collecting carriers, reducing life sensitivity, and benefiting Increasing the fill factor will play a positive role in promoting industrial upgrading.
- N-TOPCon cells In the preparation process of N-TOPCon cells, it is usually used to deposit intrinsic amorphous silicon first, and then perform phosphorus-doped annealing on the amorphous silicon to form doped polysilicon.
- APCVD/ Intrinsic amorphous silicon deposited by LPCVD method often has a certain width of surrounding amorphous silicon on the front side, which is transformed into polysilicon after phosphorus-doped annealing. Since the polysilicon layer has a high light absorption coefficient, once it appears on the front side of the cell, it will be It affects the absorption of sunlight on the front of the battery, and the conductivity of polysilicon will cause serious leakage at the edge of the battery. Therefore, dewinding plating is required during the preparation of N-TOPCon batteries.
- patent CN202010667851.7 discloses a removal method and application of TOPCon battery wrap-around polysilicon, wherein the method of removing wrap-around plating is: after phosphorus diffusion annealing crystallizes the amorphous silicon layer into a phosphorus-doped polysilicon layer, uses hydrofluoric acid The PSG on the surface of the coated polysilicon layer on the front and side of the silicon substrate is removed by floating in water, and then the coated polysilicon layer on the front and side of the silicon substrate is removed by etching with an alkaline solution.
- this method can remove the surrounding polysilicon and prevent it from affecting the performance of the battery, it also has the following problems: in the process of phosphorus deposition after the deposition of amorphous silicon, the width of the surrounding plating of phosphorus diffused on the front side of the silicon wafer is often larger than that of amorphous silicon. Therefore, a P-BSG-rich region with a certain width will be formed in the contact area between amorphous silicon and borosilicate glass (BSG), that is, a borophosphosilicate glass (BPSG) region. It is severely corroded by hydrofluoric acid and lye, affecting the appearance of the battery and adversely affecting battery performance (including short-circuit current, open-circuit voltage, fill factor and battery efficiency).
- BSG borosilicate glass
- the present invention provides a method for removing polysilicon plating around an N-TOPCon battery.
- the method can prevent the BPSG area on the front side of the silicon wafer from being corroded during the dewinding plating by adding the BPSG corrosion-resistant treatment step before the dewinding plating, can obtain a better battery appearance, and can make the battery have better performance .
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- the surrounding amorphous silicon will be formed on the front of the cell.
- the inventors found that during the subsequent phosphorus deposition process, the plating width of phosphorus diffused on the front side of the silicon wafer is often greater than that of amorphous silicon, thus forming a BPSG region with a certain width in the contact area between amorphous silicon and BSG.
- BPSG has poor acid and alkali resistance, so it will be corroded by hydrofluoric acid and alkaline solution in the subsequent dewinding plating process, resulting in poor appearance of the battery.
- the present invention carries out anti-corrosion treatment on BPSG after phosphorus deposition to improve its acid resistance and alkali resistance, and then utilizes hydrofluoric acid to remove PSG on the surface of polysilicon coating around it, and removes polysilicon coating around it with alkali solution. , can prevent the BPSG area on the front side of the silicon wafer from being corroded during the dewinding plating process, improve the appearance of the battery, and make the battery have a higher short-circuit current, open-circuit voltage, fill factor and battery efficiency.
- step (5) the phosphorus doping and corrosion-resistant treatment can be realized through scheme A or scheme B, and the specific process includes the following steps:
- Scheme A Anneal the phosphorus-deposited silicon wafer once to complete phosphorus doping and amorphous silicon crystallization; in a nitrogen atmosphere, perform a second anneal on the silicon wafer after the first anneal to reduce the concentration of phosphorus in the borophosphosilicate glass. At the same time, the concentration makes the network structure of the borophosphosilicate glass region denser;
- Option B Remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, and then perform phosphorus doping and crystallization of amorphous silicon.
- phosphorus doping and amorphous silicon crystallization can be performed, which can reduce the concentration of P on the front of the silicon wafer in the BSG area, and avoid P erosion on the front of the silicon wafer during the subsequent phosphorus doping process.
- BPSG is formed in the BSG area, because after removing the front PSG, the front side remains BSG, and BSG has higher acid and alkali resistance than BPSG, so it can prevent it from being corroded during dewinding plating.
- the temperature of the primary annealing is 800-850°C.
- the temperature of the secondary annealing is 850-1000° C., and the time is 10-50 minutes.
- the secondary annealing temperature is too low or the time is too short, it will be difficult to improve the density of BPSG; if the secondary annealing temperature is too high or the time is too long, it will cause the P on the front side to penetrate the BSG deep into the silicon substrate , affecting the quality of the PN junction.
- a hydrofluoric acid solution with a concentration of 0.5-3 wt% is used to remove the borophosphosilicate glass on the front side of the phosphorus-deposited silicon wafer.
- the temperature for phosphorus doping and amorphous silicon crystallization is 800-1000° C., and the time is 5-60 minutes.
- the phosphorus deposition temperature is 750-850° C.
- the time is 20-50 minutes
- the phosphorus source flow rate is 1000-4000 sccm.
- the concentration of the hydrofluoric acid solution is 3-10 wt%.
- the alkali solution is NaOH solution, KOH solution or tetramethylammonium hydroxide (TMAH) solution, and the concentration is 3-15wt%.
- TMAH tetramethylammonium hydroxide
- step (2) the borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching.
- the present invention improves the BPSG compactness (plan A) or replaces the mode of BPSG (plan B) with BSG by secondary annealing, improves the corrosion resistance of the silicon chip front BPSG, can Prevent it from being corroded by hydrofluoric acid and alkaline solution during the dewinding plating process, improve the appearance of the battery, and make the N-TOPCon battery have higher short-circuit current, open-circuit voltage, fill factor and battery efficiency.
- Fig. 1 is the front photo of the silicon chip obtained in embodiment 1;
- FIG. 2 is a front photo of the silicon wafer obtained in Comparative Example 1 (the framed part in the figure is the corrosion area).
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- Scheme A Anneal the phosphorus-deposited silicon wafer once at 800-850°C to complete phosphorus doping and crystallization of amorphous silicon; in a nitrogen atmosphere, anneal the silicon wafer after the first anneal at 850-1000°C Anneal for 10 to 50 minutes to reduce the concentration of phosphorus in the borophosphosilicate glass and make the network structure of the borophosphosilicate glass more compact;
- Scheme B Use a hydrofluoric acid solution with a concentration of 0.5-3wt% to remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, and then perform phosphorus doping and amorphous silicon crystallization at 800-1000°C for 5-60 minutes;
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- a method for removing polysilicon around a N-TOPCon battery comprising the following steps:
- Comparative example 1 does not adopt the method of the present invention to carry out anti-corrosion treatment to borophosphosilicate glass before going around plating, and in going around plating process, there is corrosion in the BPSG region of silicon chip front; And embodiment 3 and 6 No corrosion occurred on the front side of the obtained silicon wafer. Moreover, it can be seen from Table 1 that the open circuit voltage, short circuit current, fill factor and battery efficiency of the N-TOPCon battery made of the silicon wafer finally obtained in Comparative Example 1 are lower than those of Example 3 and Example 6.
- the present invention can prevent the BPSG region on the front side of the silicon chip from being corroded when going around and plating by increasing the step of BPSG corrosion-resistant treatment before going around and plating, can obtain a better battery appearance, and make the battery have better performance.
- Example 1 and Comparative Example 2 are 850°C and 800°C respectively, and the rest of the process is the same. There is corrosion on the front side of the silicon wafer obtained in Comparative Example 2; and, as can be seen from Table 1, the performance of the N-TOPCon battery prepared by using the silicon wafer of Comparative Example 2 is lower than that of Example 1. This is because when the secondary annealing temperature is too low, it will be difficult to improve the density of BPSG.
- Example 3 and Comparative Example 3 were 1000°C and 1050°C respectively, and the rest of the processes were the same. It can be seen from Table 1 that the performance of the N-TOPCon battery made by using the silicon wafer of Comparative Example 3 is lower than that of Example 3. This is because when the secondary annealing temperature is too high, the P on the front side will penetrate the BSG deep into the silicon substrate, affecting the quality of the PN junction.
- the concentration of the hydrofluoric acid solution adopted in step (5) of embodiment 4 and comparative example 4 is respectively 0.5wt% and 0.1wt%, and all the other processes are the same.
- Raw materials used in the present invention, equipment, if not specified, are commonly used raw materials, equipment in this area; Method used in the present invention, if not specified, are conventional methods in this area.
Abstract
The present invention relates to the technical field of N-TOPCon batteries, and discloses a method for removing polycrystalline silicon plated on the backside of an N-TOPCon battery. The method comprises the following steps: depositing a tunnel oxide layer and intrinsic amorphous silicon on the backside of a silicon wafer; subjecting the intrinsic amorphous silicon to phosphorus doping, and carrying out primary annealing so as to crystallize the intrinsic amorphous silicon into phosphorus-doped polycrystalline silicon; subjecting the silicon wafer resulting from the primary annealing to a BPSG corrosion-resistant treatment; and sequentially cleaning the front side of the silicon wafer subjected to the corrosion-resistant treatment by using a hydrofluoric acid solution and an alkali solution to remove polycrystalline silicon plated on the backside. In the present invention, by means of adding the step of the BPSG corrosion-resistant treatment before the removal of a plating on the backside, a BPSG area on the front side of the silicon wafer can be prevented from corrosion during the removal of the plating on the backside; therefore, a relatively good battery appearance is obtained, and the battery has relatively good performances.
Description
本发明涉及N-TOPCon电池技术领域,尤其涉及一种N-TOPCon电池的绕镀多晶硅去除方法。The invention relates to the technical field of N-TOPCon batteries, in particular to a method for removing polysilicon plating around N-TOPCon batteries.
N型隧穿氧化层钝化接触(N-TOPCon)电池是指由隧穿氧化层与掺杂多晶硅共同形成钝化的一类电池,其钝化机理是:超薄氧化硅直接与硅基体接触,中和硅表面的悬挂键,进行优异的化学钝化:重掺杂的多晶硅层因与硅基体存在费米能级的差异,在硅基体表面造成能带弯曲,可以更加有效的阻挡少子的通过,而不会影响多子的传输,实现载流子的选择性收集。相较于传统PERC电池而言,N-TOPCon电池全面积钝化背表面,没有金属和硅的直接接触,有利于提升电池的短路电压,全面收集载流子,降低了寿命敏感度,有利于提升填充因子,对产业升级具有积极推动作用。N-type tunneling oxide passivation contact (N-TOPCon) battery refers to a type of battery that is passivated by tunneling oxide layer and doped polysilicon. The passivation mechanism is: ultra-thin silicon oxide is directly in contact with the silicon substrate , neutralize the dangling bonds on the silicon surface, and perform excellent chemical passivation: due to the difference in the Fermi level between the heavily doped polysilicon layer and the silicon substrate, the energy band bends on the surface of the silicon substrate, which can more effectively block the minority carrier. By doing so, the selective collection of carriers is achieved without affecting the transport of many carriers. Compared with traditional PERC batteries, N-TOPCon batteries have a full-area passivation of the back surface, without direct contact between metal and silicon, which is conducive to improving the short-circuit voltage of the battery, comprehensively collecting carriers, reducing life sensitivity, and benefiting Increasing the fill factor will play a positive role in promoting industrial upgrading.
在N-TOPCon电池的制备过程中,通常采用先沉积本征非晶硅,而后通过对非晶硅进行磷掺杂退火,形成掺杂多晶硅,在该过程中,由于目前行业内通常采用APCVD/LPCVD方法沉积本征非晶硅,在正面往往会存在一定宽度的绕镀非晶硅,在磷掺杂退火后转变为多晶硅,由于多晶硅层具有较高的吸光系数,一旦出现在电池正面将会影响电池正面太阳光的吸收,同时多晶硅的导电性将会导致电池边沿处严重的漏电,因此在N-TOPCon电池制备过程需要进行去绕镀处理。In the preparation process of N-TOPCon cells, it is usually used to deposit intrinsic amorphous silicon first, and then perform phosphorus-doped annealing on the amorphous silicon to form doped polysilicon. In this process, because APCVD/ Intrinsic amorphous silicon deposited by LPCVD method often has a certain width of surrounding amorphous silicon on the front side, which is transformed into polysilicon after phosphorus-doped annealing. Since the polysilicon layer has a high light absorption coefficient, once it appears on the front side of the cell, it will be It affects the absorption of sunlight on the front of the battery, and the conductivity of polysilicon will cause serious leakage at the edge of the battery. Therefore, dewinding plating is required during the preparation of N-TOPCon batteries.
目前,去除绕镀多晶硅的方式通常为碱液处理。例如,专利CN202010667851.7公开了一种TOPCon电池绕镀多晶硅的去除方法及应用,其中去绕镀的方法是:在磷扩散退火将非晶硅层晶化成掺磷多晶硅层后,采用氢氟酸水上漂的方式去除位于硅衬底正面和侧面的绕镀多晶硅层表面的PSG,再采用碱溶液刻蚀的方式去除位于硅衬底正面和侧面的绕镀多晶硅层。该方法虽然能去除绕镀多晶硅,防止其影响电池性能,但同时也存在以下问题:在非晶硅沉积后的磷沉积过程中,磷扩散在硅片正面的绕镀宽度往往大于非晶硅的绕镀宽度,因而会在非晶硅与硼硅玻璃(BSG)接触区域形成一定宽度的富P-BSG区域,即硼磷硅玻璃(BPSG)区域,该BPSG区域在去绕镀的过程中会被氢氟酸和碱液严重腐蚀,影响电池外观,并会对电池性能(包括短路电流、开路电压、填充因子和电池效率)造成不利影响。At present, the way to remove the polysilicon plating is usually alkaline solution treatment. For example, patent CN202010667851.7 discloses a removal method and application of TOPCon battery wrap-around polysilicon, wherein the method of removing wrap-around plating is: after phosphorus diffusion annealing crystallizes the amorphous silicon layer into a phosphorus-doped polysilicon layer, uses hydrofluoric acid The PSG on the surface of the coated polysilicon layer on the front and side of the silicon substrate is removed by floating in water, and then the coated polysilicon layer on the front and side of the silicon substrate is removed by etching with an alkaline solution. Although this method can remove the surrounding polysilicon and prevent it from affecting the performance of the battery, it also has the following problems: in the process of phosphorus deposition after the deposition of amorphous silicon, the width of the surrounding plating of phosphorus diffused on the front side of the silicon wafer is often larger than that of amorphous silicon. Therefore, a P-BSG-rich region with a certain width will be formed in the contact area between amorphous silicon and borosilicate glass (BSG), that is, a borophosphosilicate glass (BPSG) region. It is severely corroded by hydrofluoric acid and lye, affecting the appearance of the battery and adversely affecting battery performance (including short-circuit current, open-circuit voltage, fill factor and battery efficiency).
发明内容Contents of the invention
为了解决上述技术问题,本发明提供了一种N-TOPCon电池的绕镀多晶硅去除方法。该方法通过在去绕镀前增加BPSG耐腐蚀化处理的步骤,能够防止硅片正面的BPSG区域在 去绕镀时受到腐蚀,可获得较好的电池外观,并能使电池具有较好的性能。In order to solve the above-mentioned technical problems, the present invention provides a method for removing polysilicon plating around an N-TOPCon battery. The method can prevent the BPSG area on the front side of the silicon wafer from being corroded during the dewinding plating by adding the BPSG corrosion-resistant treatment step before the dewinding plating, can obtain a better battery appearance, and can make the battery have better performance .
本发明的具体技术方案为:Concrete technical scheme of the present invention is:
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面进行硼掺杂,形成PN结;(1) Boron doping is carried out on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)去除硼掺杂后的硅片背面的硼硅玻璃(BSG)和扩散结,保留正面的硼硅玻璃;(2) remove the borosilicate glass (BSG) and diffusion junction on the backside of the boron-doped silicon wafer, and keep the borosilicate glass on the front side;
(3)在去除背面的硼硅玻璃和扩散结后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the silicon wafer after removing the borosilicate glass and the diffusion junction on the back;
(4)对本征非晶硅进行磷沉积,获得磷沉积硅片;(4) Phosphorus deposition is performed on intrinsic amorphous silicon to obtain phosphorus deposited silicon wafers;
(5)对磷沉积硅片进行磷掺杂和硼磷硅玻璃(BPSG)耐腐蚀化处理;(5) Perform phosphorus doping and borophosphosilicate glass (BPSG) corrosion-resistant treatment on phosphorus deposited silicon wafers;
(6)对耐腐蚀化处理后的硅片正面依次进行氢氟酸溶液和碱液清洗,即完成绕镀多晶硅的去除。(6) Carry out hydrofluoric acid solution and alkali solution cleaning on the front side of the silicon wafer after the corrosion-resistant treatment in sequence, that is, the removal of the polysilicon around the plating is completed.
在N-TOPCon电池的制备过程中,沉积本征非晶硅时,会在电池正面形成绕镀非晶硅。发明人发现,在后续磷沉积的过程中,磷扩散在硅片正面的绕镀宽度往往大于非晶硅的绕镀宽度,因而会在非晶硅与BSG接触区域形成一定宽度的BPSG区域,由于BPSG的耐酸耐碱性较差,因而会在后续去绕镀过程中被氢氟酸和碱液腐蚀,导致电池外观不佳。During the preparation of N-TOPCon cells, when the intrinsic amorphous silicon is deposited, the surrounding amorphous silicon will be formed on the front of the cell. The inventors found that during the subsequent phosphorus deposition process, the plating width of phosphorus diffused on the front side of the silicon wafer is often greater than that of amorphous silicon, thus forming a BPSG region with a certain width in the contact area between amorphous silicon and BSG. BPSG has poor acid and alkali resistance, so it will be corroded by hydrofluoric acid and alkaline solution in the subsequent dewinding plating process, resulting in poor appearance of the battery.
针对上述技术问题,本发明在磷沉积后,对BPSG进行了耐腐蚀化处理,提高其耐酸耐碱性,而后再利用氢氟酸去除绕镀多晶硅表面的PSG,并利用碱液去除绕镀多晶硅,能够避免硅片正面的BPSG区域在去绕镀过程中受到腐蚀,改善电池外观,并使电池具有较高的短路电流、开路电压、填充因子和电池效率。Aiming at the above-mentioned technical problems, the present invention carries out anti-corrosion treatment on BPSG after phosphorus deposition to improve its acid resistance and alkali resistance, and then utilizes hydrofluoric acid to remove PSG on the surface of polysilicon coating around it, and removes polysilicon coating around it with alkali solution. , can prevent the BPSG area on the front side of the silicon wafer from being corroded during the dewinding plating process, improve the appearance of the battery, and make the battery have a higher short-circuit current, open-circuit voltage, fill factor and battery efficiency.
作为优选,步骤(5)中,所述磷掺杂和耐腐蚀化处理可通过方案A或方案B实现,具体过程包括以下步骤:As a preference, in step (5), the phosphorus doping and corrosion-resistant treatment can be realized through scheme A or scheme B, and the specific process includes the following steps:
方案A:对磷沉积硅片进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,对一次退火后的硅片进行二次退火,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;Scheme A: Anneal the phosphorus-deposited silicon wafer once to complete phosphorus doping and amorphous silicon crystallization; in a nitrogen atmosphere, perform a second anneal on the silicon wafer after the first anneal to reduce the concentration of phosphorus in the borophosphosilicate glass. At the same time, the concentration makes the network structure of the borophosphosilicate glass region denser;
方案B:去除磷沉积硅片正面的磷硅玻璃,再进行磷掺杂及非晶硅晶化。Option B: Remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, and then perform phosphorus doping and crystallization of amorphous silicon.
在方案A中,在进行二次退火处理的过程中,磷在SiO
2中流动性增加而在表面析出,因而能降低磷在BPSG中的浓度,从而提高BPSG的致密性,从而使其更耐酸和碱的腐蚀。二次退火过程在氮气氛围中进行,目的在于:退火氛围会影响硼和磷在二氧化硅中的流动性,在N
2中退火时,B在二氧化硅中流动性差,而P流动性高倾向于在硅表面富集。
In scheme A, during the secondary annealing process, phosphorus increases in mobility in SiO 2 and precipitates on the surface, thus reducing the concentration of phosphorus in BPSG, thereby improving the compactness of BPSG and making it more acid-resistant and alkali corrosion. The secondary annealing process is carried out in a nitrogen atmosphere. The purpose is: the annealing atmosphere will affect the mobility of boron and phosphorus in silicon dioxide. When annealing in N2 , B has poor mobility in silicon dioxide, while P has high mobility. Tends to enrich on silicon surfaces.
在方案B中,在去除正面PSG后,再进行磷掺杂及非晶硅晶化,能够降低硅片正面的P在BSG区域上的浓度,避免后续磷掺杂过程中硅片正面的P侵蚀BSG区域而形成BPSG, 由于去除正面PSG后,正面保留的是BSG,而BSG相较于BPSG而言具有更高的耐酸耐碱性,因而能防止其在去绕镀时受到腐蚀。In scheme B, after removing the front PSG, phosphorus doping and amorphous silicon crystallization can be performed, which can reduce the concentration of P on the front of the silicon wafer in the BSG area, and avoid P erosion on the front of the silicon wafer during the subsequent phosphorus doping process. BPSG is formed in the BSG area, because after removing the front PSG, the front side remains BSG, and BSG has higher acid and alkali resistance than BPSG, so it can prevent it from being corroded during dewinding plating.
作为优选,方案A中,所述一次退火的温度为800~850℃。Preferably, in scheme A, the temperature of the primary annealing is 800-850°C.
作为优选,方案A中,所述二次退火的温度为850~1000℃,时间为10~50min。Preferably, in scheme A, the temperature of the secondary annealing is 850-1000° C., and the time is 10-50 minutes.
若二次退火温度过低或时间过短,则会难以发挥提高BPSG致密性的作用;若二次退火温度过高或时间过长,则会导致正面绕镀的P穿透BSG深入至硅基体,影响PN结质量。If the secondary annealing temperature is too low or the time is too short, it will be difficult to improve the density of BPSG; if the secondary annealing temperature is too high or the time is too long, it will cause the P on the front side to penetrate the BSG deep into the silicon substrate , affecting the quality of the PN junction.
作为优选,方案B中,采用浓度为0.5~3wt%的氢氟酸溶液去除磷沉积硅片正面的硼磷硅玻璃。Preferably, in scheme B, a hydrofluoric acid solution with a concentration of 0.5-3 wt% is used to remove the borophosphosilicate glass on the front side of the phosphorus-deposited silicon wafer.
在去除PSG的过程中,若采用的氢氟酸溶液浓度过低,会导致PSG玻璃无法被去除;而若采用的氢氟酸溶液浓度过高,则会导致BSG被清洗掉,后续去绕镀时易被腐蚀。In the process of removing PSG, if the concentration of the hydrofluoric acid solution used is too low, the PSG glass cannot be removed; and if the concentration of the hydrofluoric acid solution used is too high, the BSG will be washed away, and the subsequent winding plating susceptible to corrosion.
作为优选,方案B中,所述磷掺杂及非晶硅晶化的温度为800~1000℃,时间为5~60min。Preferably, in scheme B, the temperature for phosphorus doping and amorphous silicon crystallization is 800-1000° C., and the time is 5-60 minutes.
作为优选,步骤(4)中,所述磷沉积的温度为750~850℃,时间为20~50min,磷源流量为1000~4000sccm。Preferably, in step (4), the phosphorus deposition temperature is 750-850° C., the time is 20-50 minutes, and the phosphorus source flow rate is 1000-4000 sccm.
作为优选,步骤(6)中,所述氢氟酸溶液的浓度为3~10wt%。Preferably, in step (6), the concentration of the hydrofluoric acid solution is 3-10 wt%.
作为优选,步骤(6)中,所述碱液为NaOH溶液、KOH溶液或四甲基氢氧化铵(TMAH)溶液,浓度为3~15wt%。Preferably, in the step (6), the alkali solution is NaOH solution, KOH solution or tetramethylammonium hydroxide (TMAH) solution, and the concentration is 3-15wt%.
作为优选,步骤(2)中,采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结。Preferably, in step (2), the borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching.
与现有技术相比,本发明具有以下优点:本发明通过二次退火提高BPSG致密性(方案A)或用BSG代替BPSG(方案B)的方式,提高硅片正面BPSG的耐腐蚀性,能够防止其在去绕镀过程中被氢氟酸和碱液腐蚀,改善电池的外观,并使N-TOPCon电池具有较高的短路电流、开路电压、填充因子和电池效率。Compared with the prior art, the present invention has the following advantages: the present invention improves the BPSG compactness (plan A) or replaces the mode of BPSG (plan B) with BSG by secondary annealing, improves the corrosion resistance of the silicon chip front BPSG, can Prevent it from being corroded by hydrofluoric acid and alkaline solution during the dewinding plating process, improve the appearance of the battery, and make the N-TOPCon battery have higher short-circuit current, open-circuit voltage, fill factor and battery efficiency.
图1为实施例1中获得的硅片正面照片;Fig. 1 is the front photo of the silicon chip obtained in embodiment 1;
图2为对比例1中获得的硅片正面照片(图中方框部分为腐蚀区域)。FIG. 2 is a front photo of the silicon wafer obtained in Comparative Example 1 (the framed part in the figure is the corrosion area).
下面结合实施例对本发明作进一步的描述。The present invention will be further described below in conjunction with embodiment.
总实施例General Example
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面进行硼掺杂,形成PN结;(1) Boron doping is carried out on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) remove the borosilicate glass and diffusion junction on the backside of the boron-doped silicon wafer, and keep the borosilicate glass on the front side;
(3)在去除背面的硼硅玻璃和扩散结后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the silicon wafer after removing the borosilicate glass and the diffusion junction on the back;
(4)将本征非晶硅在温度为750~850℃、磷源流量为1000~4000sccm的条件下进行磷沉积20~50min,获得磷沉积硅片;(4) Depositing phosphorus on intrinsic amorphous silicon for 20 to 50 minutes at a temperature of 750-850°C and a phosphorus source flow rate of 1000-4000 sccm to obtain phosphorus-deposited silicon wafers;
(5)磷掺杂和耐腐蚀化处理:(5) Phosphorus doping and corrosion resistance treatment:
方案A:将磷沉积硅片在800~850℃下进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,将一次退火后的硅片在850~1000℃下进行二次退火10~50min,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;Scheme A: Anneal the phosphorus-deposited silicon wafer once at 800-850°C to complete phosphorus doping and crystallization of amorphous silicon; in a nitrogen atmosphere, anneal the silicon wafer after the first anneal at 850-1000°C Anneal for 10 to 50 minutes to reduce the concentration of phosphorus in the borophosphosilicate glass and make the network structure of the borophosphosilicate glass more compact;
方案B:采用浓度为0.5~3wt%的氢氟酸溶液去除磷沉积硅片正面的磷硅玻璃,再在800~1000℃下进行磷掺杂及非晶硅晶化5~60min;Scheme B: Use a hydrofluoric acid solution with a concentration of 0.5-3wt% to remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, and then perform phosphorus doping and amorphous silicon crystallization at 800-1000°C for 5-60 minutes;
(6)对耐腐蚀化处理后的硅片正面依次利用3~10wt%的氢氟酸溶液和3~15wt%的碱液进行清洗,所述碱液为NaOH溶液、KOH溶液或TMAH溶液,即完成绕镀多晶硅的去除。(6) The front of the silicon chip after the corrosion-resistant treatment is cleaned by using 3-10wt% hydrofluoric acid solution and 3-15wt% lye in sequence, and the lye is NaOH solution, KOH solution or TMAH solution, namely Complete the removal of the polysilicon wrap around.
实施例1Example 1
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为750℃、磷源流量为1000sccm的条件下进行磷沉积50min,获得磷沉积硅片;(4) Deposit phosphorus on intrinsic amorphous silicon for 50 minutes at a temperature of 750°C and a phosphorus source flow rate of 1000 sccm to obtain phosphorus-deposited silicon wafers;
(5)将磷沉积硅片在800℃下进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,将一次退火后的硅片在850℃下进行二次退火50min,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;(5) Perform primary annealing on phosphorus-deposited silicon wafers at 800°C to complete phosphorus doping and amorphous silicon crystallization; in a nitrogen atmosphere, perform secondary annealing on silicon wafers after primary annealing at 850°C for 50 min to Reduce the concentration of phosphorus in borophosphosilicate glass while making the regional network structure of borophosphosilicate glass more dense;
(6)对耐腐蚀化处理后的硅片正面依次利用3wt%的氢氟酸溶液和15wt%的TMAH溶液进行清洗,即完成绕镀多晶硅的去除,硅片正面如图1所示。(6) Clean the front side of the silicon wafer after the corrosion-resistant treatment with 3wt% hydrofluoric acid solution and 15wt% TMAH solution to complete the removal of the polysilicon wrapping. The front side of the silicon wafer is shown in FIG. 1 .
实施例2Example 2
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为800℃、磷源流量为2500sccm的条件下进行磷沉积35min,获得磷沉积硅片;(4) Deposit phosphorus on intrinsic amorphous silicon for 35 minutes at a temperature of 800°C and a phosphorus source flow rate of 2500 sccm to obtain phosphorus-deposited silicon wafers;
(5)将磷沉积硅片在800℃下进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,将一次退火后的硅片在930℃下进行二次退火30min,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;(5) Perform primary annealing on phosphorus-deposited silicon wafers at 800°C to complete phosphorus doping and crystallization of amorphous silicon; in a nitrogen atmosphere, perform secondary annealing on silicon wafers after primary annealing at 930°C for 30 min to Reduce the concentration of phosphorus in borophosphosilicate glass while making the regional network structure of borophosphosilicate glass more dense;
(6)对耐腐蚀化处理后的硅片正面依次利用10wt%的氢氟酸溶液和3wt%的NaOH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion resistance treatment with 10wt% hydrofluoric acid solution and 3wt% NaOH solution in sequence, that is to complete the removal of the polysilicon wrapping.
实施例3Example 3
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为850℃、磷源流量为4000sccm的条件下进行磷沉积20min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Deposit phosphorus on the intrinsic amorphous silicon for 20 minutes at a temperature of 850° C. and a phosphorus source flow rate of 4000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain a phosphorus-deposited silicon wafer;
(5)将磷沉积硅片在850℃下进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,将一次退火后的硅片在1000℃下进行二次退火10min,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;(5) Perform primary annealing on phosphorus-deposited silicon wafers at 850°C to complete phosphorus doping and crystallization of amorphous silicon; in a nitrogen atmosphere, perform secondary annealing on silicon wafers after primary annealing at 1000°C for 10 min to Reduce the concentration of phosphorus in borophosphosilicate glass while making the regional network structure of borophosphosilicate glass more dense;
(6)对耐腐蚀化处理后的硅片正面依次利用7wt%的氢氟酸溶液和5wt%的KOH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion resistance treatment with 7wt% hydrofluoric acid solution and 5wt% KOH solution in sequence, that is to complete the removal of the polysilicon wrapping.
实施例4Example 4
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅进在温度为750℃、磷源流量为1000sccm的条件下进行磷沉积50min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Depositing intrinsic amorphous silicon for 50 minutes at a temperature of 750° C. and a phosphorus source flow rate of 1000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain phosphorus-deposited silicon wafers;
(5)采用浓度为0.5wt%的氢氟酸溶液去除磷沉积硅片正面的磷硅玻璃,再将硅片置于高温 炉中,在800℃下进行磷掺杂及非晶硅晶化60min;(5) Use a hydrofluoric acid solution with a concentration of 0.5 wt% to remove the phosphosilicate glass on the front of the phosphorus-deposited silicon wafer, then place the silicon wafer in a high-temperature furnace, and perform phosphorus doping and amorphous silicon crystallization at 800°C for 60 minutes ;
(6)对耐腐蚀化处理后的硅片正面依次利用3wt%的氢氟酸溶液和15wt%的TMAH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion-resistant treatment with 3wt% hydrofluoric acid solution and 15wt% TMAH solution in sequence, that is to complete the removal of the polysilicon wrapping.
实施例5Example 5
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为800℃、磷源流量为2500sccm的条件下进行磷沉积35min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Deposit phosphorus on the intrinsic amorphous silicon for 35 minutes at a temperature of 800° C. and a phosphorus source flow rate of 2500 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain a phosphorus-deposited silicon wafer;
(5)采用浓度为1.5wt%的氢氟酸溶液去除磷沉积硅片正面的磷硅玻璃,再将硅片置于高温炉中,在1000℃下进行磷掺杂及非晶硅晶化5min;(5) Use a hydrofluoric acid solution with a concentration of 1.5 wt% to remove the phosphosilicate glass on the front of the phosphorus-deposited silicon wafer, then place the silicon wafer in a high-temperature furnace, and perform phosphorus doping and amorphous silicon crystallization at 1000°C for 5 minutes ;
(6)对耐腐蚀化处理后的硅片正面依次利用10wt%的氢氟酸溶液和3wt%的NaOH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion resistance treatment with 10wt% hydrofluoric acid solution and 3wt% NaOH solution in sequence, that is to complete the removal of the polysilicon wrapping.
实施例6Example 6
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为850℃、磷源流量为4000sccm的条件下进行磷沉积20min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Deposit phosphorus on the intrinsic amorphous silicon for 20 minutes at a temperature of 850° C. and a phosphorus source flow rate of 4000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain a phosphorus-deposited silicon wafer;
(5)采用浓度为3wt%的氢氟酸溶液去除磷沉积硅片正面的磷硅玻璃,再将硅片置于高温炉中,在850℃下进行磷掺杂及非晶硅晶化30min;(5) Use a hydrofluoric acid solution with a concentration of 3 wt% to remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, then place the silicon wafer in a high-temperature furnace, and perform phosphorus doping and amorphous silicon crystallization at 850° C. for 30 minutes;
(6)对耐腐蚀化处理后的硅片正面依次利用7wt%的氢氟酸溶液和5wt%的KOH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion resistance treatment with 7wt% hydrofluoric acid solution and 5wt% KOH solution in sequence, that is to complete the removal of the polysilicon wrapping.
对比例1Comparative example 1
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为850℃、磷源流量为4000sccm的条件下进行磷沉积20min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Deposit phosphorus on the intrinsic amorphous silicon for 20 minutes at a temperature of 850° C. and a phosphorus source flow rate of 4000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain a phosphorus-deposited silicon wafer;
(5)将磷沉积硅片在850℃下进行一次退火以完成磷掺杂及非晶硅晶化;(5) Annealing the phosphorus-deposited silicon wafer at 850°C once to complete phosphorus doping and crystallization of amorphous silicon;
(6)对耐腐蚀化处理后的硅片正面依次利用7的氢氟酸溶液和5wt%的KOH溶液进行清洗,即完成绕镀多晶硅的去除,硅片正面如图2所示。(6) Clean the front side of the silicon wafer after the corrosion-resistant treatment with 7% hydrofluoric acid solution and 5wt% KOH solution to complete the removal of the polysilicon plating. The front side of the silicon wafer is shown in FIG. 2 .
对比例2Comparative example 2
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为750℃、磷源流量为1000sccm的条件下进行磷沉积50min,获得磷沉积硅片;(4) Deposit phosphorus on intrinsic amorphous silicon for 50 minutes at a temperature of 750°C and a phosphorus source flow rate of 1000 sccm to obtain phosphorus-deposited silicon wafers;
(5)将磷沉积硅片在800℃下进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,将一次退火后的硅片在800℃下进行二次退火50min,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;(5) Perform primary annealing on phosphorus-deposited silicon wafers at 800°C to complete phosphorus doping and crystallization of amorphous silicon; in a nitrogen atmosphere, perform secondary annealing on silicon wafers after primary annealing at 800°C for 50 min to Reduce the concentration of phosphorus in borophosphosilicate glass while making the regional network structure of borophosphosilicate glass more dense;
(6)对耐腐蚀化处理后的硅片正面依次利用3wt%的氢氟酸溶液和15wt%的TMAH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion-resistant treatment with 3wt% hydrofluoric acid solution and 15wt% TMAH solution in sequence, that is to complete the removal of the polysilicon wrapping.
对比例3Comparative example 3
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为850℃、磷源流量为4000sccm的条件下进行磷沉积20min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Deposit phosphorus on the intrinsic amorphous silicon for 20 minutes at a temperature of 850° C. and a phosphorus source flow rate of 4000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain a phosphorus-deposited silicon wafer;
(5)将磷沉积硅片在850℃下进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,将 一次退火后的硅片在1050℃下进行二次退火10min,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;(5) Perform primary annealing on phosphorus-deposited silicon wafers at 850°C to complete phosphorus doping and crystallization of amorphous silicon; in a nitrogen atmosphere, perform secondary annealing on silicon wafers after primary annealing at 1050°C for 10 minutes to Reduce the concentration of phosphorus in borophosphosilicate glass while making the regional network structure of borophosphosilicate glass more dense;
(6)对耐腐蚀化处理后的硅片正面依次利用10wt%的氢氟酸溶液和3wt%的KOH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion resistance treatment with 10wt% hydrofluoric acid solution and 3wt% KOH solution in sequence, that is to complete the removal of the polysilicon wrapping.
对比例4Comparative example 4
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅进在温度为750℃、磷源流量为1000sccm的条件下进行磷沉积50min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Depositing intrinsic amorphous silicon for 50 minutes at a temperature of 750° C. and a phosphorus source flow rate of 1000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain phosphorus-deposited silicon wafers;
(5)采用浓度为0.1wt%的氢氟酸溶液去除磷沉积硅片正面的磷硅玻璃,再将硅片置于高温炉中,在800℃下进行磷掺杂及非晶硅晶化60min;(5) Use a hydrofluoric acid solution with a concentration of 0.1 wt% to remove the phosphosilicate glass on the front of the phosphorus-deposited silicon wafer, then place the silicon wafer in a high-temperature furnace, and perform phosphorus doping and amorphous silicon crystallization at 800°C for 60 minutes ;
(6)对耐腐蚀化处理后的硅片正面依次利用3wt%的氢氟酸溶液和15wt%的TMAH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion-resistant treatment with 3wt% hydrofluoric acid solution and 15wt% TMAH solution in sequence, that is to complete the removal of the polysilicon wrapping.
对比例5Comparative example 5
一种N-TOPCon电池的绕镀多晶硅去除方法,包括以下步骤:A method for removing polysilicon around a N-TOPCon battery, comprising the following steps:
(1)在制绒后的N型硅片表面采用扩散的方式进行硼掺杂,形成PN结;(1) Boron doping is performed on the surface of the N-type silicon wafer after texturing to form a PN junction;
(2)采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) The borosilicate glass and diffusion junction on the back of the boron-doped silicon wafer are removed by chain single-sided etching, and the borosilicate glass on the front is retained;
(3)采用LPCVD设备在刻蚀后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the etched silicon wafer using LPCVD equipment;
(4)将本征非晶硅在温度为850℃、磷源流量为4000sccm的条件下进行磷沉积20min,以使得在非晶硅表面形成一层富P层,获得磷沉积硅片;(4) Deposit phosphorus on the intrinsic amorphous silicon for 20 minutes at a temperature of 850° C. and a phosphorus source flow rate of 4000 sccm, so that a P-rich layer is formed on the surface of the amorphous silicon to obtain a phosphorus-deposited silicon wafer;
(5)采用浓度为4wt%的氢氟酸溶液去除磷沉积硅片正面的磷硅玻璃,再将硅片置于高温炉中,在1000℃下进行磷掺杂及非晶硅晶化5min;(5) Use a hydrofluoric acid solution with a concentration of 4 wt% to remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, then place the silicon wafer in a high-temperature furnace, and perform phosphorus doping and amorphous silicon crystallization at 1000° C. for 5 minutes;
(6)对耐腐蚀化处理后的硅片正面依次利用10wt%的氢氟酸溶液和3wt%的KOH溶液进行清洗,即完成绕镀多晶硅的去除。(6) Clean the front side of the silicon wafer after corrosion resistance treatment with 10wt% hydrofluoric acid solution and 3wt% KOH solution in sequence, that is to complete the removal of the polysilicon wrapping.
测试例test case
对实施例1~6和对比例1~5获得的硅片表面进行观察,发现实施例1~6和对比例3的硅片正 面较光滑,不存在腐蚀现象;而对比例1、2、4和5的硅片正面存在腐蚀现象,外观不佳。以实施例1的硅片为例,如图2所示,硅片上下边缘存在腐蚀现象(图中方框部分所示)。Observing the silicon wafer surfaces obtained in Examples 1 to 6 and Comparative Examples 1 to 5, it was found that the fronts of the silicon wafers in Examples 1 to 6 and Comparative Example 3 were relatively smooth without corrosion; while Comparative Examples 1, 2, and 4 The silicon wafers of He 5 and 5 have corrosion phenomena on the front side, and the appearance is not good. Taking the silicon wafer in Example 1 as an example, as shown in FIG. 2 , there is corrosion phenomenon on the upper and lower edges of the silicon wafer (shown by the box in the figure).
分别采用实施例1~6和对比例1~5的方法完成绕镀多晶硅的去除后,采用常规方法,在硅片正面和背面形成钝化层,并进行丝网印刷和烧结,制成N-TOPCon电池。对N-TOPCon电池进行性能测试,并计算相对值,结果见表1。After the methods of Examples 1-6 and Comparative Examples 1-5 are respectively used to remove the polysilicon wrapping, conventional methods are used to form passivation layers on the front and back sides of silicon wafers, and screen printing and sintering are carried out to form N- TOPCon battery. The performance test of N-TOPCon battery was carried out, and the relative value was calculated. The results are shown in Table 1.
表1Table 1
the | 开路电压VocOpen circuit voltage Voc | 短路电流IscShort circuit current Isc | 填充因子FFFill factor FF | 电池效率EffBattery efficiency Eff |
实施例1Example 1 | 1.00081.0008 | 1.00091.0009 | 1.00731.0073 | 1.00901.0090 |
实施例2Example 2 | 11 | 1.00041.0004 | 1.00481.0048 | 1.00521.0052 |
实施例3Example 3 | 0.99990.9999 | 1.00041.0004 | 1.00011.0001 | 1.00041.0004 |
实施例4Example 4 | 1.00371.0037 | 1.00191.0019 | 1.00981.0098 | 1.01551.0155 |
实施例5Example 5 | 1.00261.0026 | 1.00181.0018 | 1.00071.0007 | 1.00481.0048 |
实施例6Example 6 | 1.00011.0001 | 1.00051.0005 | 1.00011.0001 | 1.00071.0007 |
对比例1Comparative example 1 | 11 | 11 | 11 | 11 |
对比例2Comparative example 2 | 0.99970.9997 | 0.99980.9998 | 0.99950.9995 | 0.99900.9990 |
对比例3Comparative example 3 | 0.99690.9969 | 0.99880.9988 | 0.99950.9995 | 0.99520.9952 |
对比例4Comparative example 4 | 1.00021.0002 | 0.99970.9997 | 0.99980.9998 | 0.99970.9997 |
对比例5Comparative example 5 | 0.99990.9999 | 0.99970.9997 | 0.99980.9998 | 0.99940.9994 |
分析表1中的数据,可以得出以下结论:Analyzing the data in Table 1, the following conclusions can be drawn:
(1)对比例1在去绕镀前未采用本发明的方法对硼磷硅玻璃进行耐腐蚀化处理,在去绕镀过程中,硅片正面的BPSG区域存在腐蚀;而实施例3和6获得的硅片正面未出现腐蚀。并且,从表1可以看出,采用对比例1最终获得的硅片制成的N-TOPCon电池,其开路电压、短路电流、填充因子和电池效率低于实施例3和实施例6。这说明本发明通过在去绕镀前增加BPSG耐腐蚀化处理的步骤,能够防止硅片正面的BPSG区域在去绕镀时受到腐蚀,可获得较好的电池外观,并使电池具有较好的性能。(1) Comparative example 1 does not adopt the method of the present invention to carry out anti-corrosion treatment to borophosphosilicate glass before going around plating, and in going around plating process, there is corrosion in the BPSG region of silicon chip front; And embodiment 3 and 6 No corrosion occurred on the front side of the obtained silicon wafer. Moreover, it can be seen from Table 1 that the open circuit voltage, short circuit current, fill factor and battery efficiency of the N-TOPCon battery made of the silicon wafer finally obtained in Comparative Example 1 are lower than those of Example 3 and Example 6. This shows that the present invention can prevent the BPSG region on the front side of the silicon chip from being corroded when going around and plating by increasing the step of BPSG corrosion-resistant treatment before going around and plating, can obtain a better battery appearance, and make the battery have better performance.
(2)实施例1和对比例2中的二次退火温度分别为850℃和800℃,其余过程均相同。对比例2获得的硅片正面存在腐蚀现象;并且,从表1可以看出,采用对比例2的硅片制得的N-TOPCon电池,其性能低于实施例1。这是由于当二次退火温度过低时,会难以发挥提高BPSG致密性的作用。(2) The secondary annealing temperatures in Example 1 and Comparative Example 2 are 850°C and 800°C respectively, and the rest of the process is the same. There is corrosion on the front side of the silicon wafer obtained in Comparative Example 2; and, as can be seen from Table 1, the performance of the N-TOPCon battery prepared by using the silicon wafer of Comparative Example 2 is lower than that of Example 1. This is because when the secondary annealing temperature is too low, it will be difficult to improve the density of BPSG.
(3)实施例3和对比例3中的退火温度分别为1000℃和1050℃,其余过程均相同。从表1可以看出,采用对比例3的硅片制得的N-TOPCon电池,其性能低于实施例3。这是由于当二次退火温度过高时,会导致正面绕镀的P穿透BSG深入至硅基体,影响PN结质量。(3) The annealing temperatures in Example 3 and Comparative Example 3 were 1000°C and 1050°C respectively, and the rest of the processes were the same. It can be seen from Table 1 that the performance of the N-TOPCon battery made by using the silicon wafer of Comparative Example 3 is lower than that of Example 3. This is because when the secondary annealing temperature is too high, the P on the front side will penetrate the BSG deep into the silicon substrate, affecting the quality of the PN junction.
(4)实施例4与对比例4步骤(5)中所采用的氢氟酸溶液浓度分别为0.5wt%和0.1wt%,其余过程均相同。对比例4获得的硅片正面存在腐蚀现象;并且,从表1可以看出,采用对 比例4的硅片制得的N-TOPCon电池,其性能低于实施例4。这是由于在磷沉积后采用的氢氟酸溶液浓度过低时,会导致正面PSG未完全去除,导致在后续磷掺杂过程中生成BPSG,故在去绕镀时导致被腐蚀。(4) The concentration of the hydrofluoric acid solution adopted in step (5) of embodiment 4 and comparative example 4 is respectively 0.5wt% and 0.1wt%, and all the other processes are the same. There is corrosion phenomenon in the front side of the silicon chip that comparative example 4 obtains; And, as can be seen from table 1, adopt the N-TOPCon battery that the silicon chip of comparative example 4 makes, its performance is lower than embodiment 4. This is because when the concentration of the hydrofluoric acid solution used after phosphorus deposition is too low, the PSG on the front side will not be completely removed, resulting in the formation of BPSG in the subsequent phosphorus doping process, so it will be corroded during dewinding plating.
(5)实施例6与对比例5步骤(5)中所采用的氢氟酸溶液浓度分别为3wt%和4wt%,其余过程均相同。从表1可以看出,采用对比例5的硅片制得的N-TOPCon电池,其性能与实施例6明显降低。这是由于在去除正面PSG时,HF浓度过高,会导致BSG被清洗掉,后续去绕镀时易被腐蚀。(5) The concentrations of the hydrofluoric acid solution adopted in step (5) of embodiment 6 and comparative example 5 were 3wt% and 4wt% respectively, and all the other processes were the same. It can be seen from Table 1 that the performance of the N-TOPCon battery made by using the silicon wafer of Comparative Example 5 is significantly lower than that of Example 6. This is because when the front PSG is removed, the HF concentration is too high, which will cause the BSG to be washed away, and it will be easily corroded during subsequent winding plating.
本发明中所用原料、设备,若无特别说明,均为本领域的常用原料、设备;本发明中所用方法,若无特别说明,均为本领域的常规方法。Raw materials used in the present invention, equipment, if not specified, are commonly used raw materials, equipment in this area; Method used in the present invention, if not specified, are conventional methods in this area.
以上所述,仅是本发明的较佳实施例,并非对本发明作任何限制,凡是根据本发明技术实质对以上实施例所作的任何简单修改、变更以及等效变换,均仍属于本发明技术方案的保护范围。The above are only preferred embodiments of the present invention, and do not limit the present invention in any way. All simple modifications, changes and equivalent transformations made to the above embodiments according to the technical essence of the present invention still belong to the technical solution of the present invention. scope of protection.
Claims (10)
- 一种N-TOPCon电池的绕镀多晶硅去除方法,其特征在于,包括以下步骤:A kind of method for removing polysilicon around plating of N-TOPCon battery, it is characterized in that, comprises the following steps:(1)在制绒后的N型硅片表面进行硼掺杂,形成PN结;(1) Boron doping is carried out on the surface of the N-type silicon wafer after texturing to form a PN junction;(2)去除硼掺杂后的硅片背面的硼硅玻璃和扩散结,保留正面的硼硅玻璃;(2) remove the borosilicate glass and diffusion junction on the backside of the boron-doped silicon wafer, and keep the borosilicate glass on the front side;(3)在去除背面的硼硅玻璃和扩散结后的硅片背面沉积隧穿氧化层和本征非晶硅;(3) Deposit a tunnel oxide layer and intrinsic amorphous silicon on the back of the silicon wafer after removing the borosilicate glass and the diffusion junction on the back;(4)对本征非晶硅进行磷沉积,获得磷沉积硅片;(4) Phosphorus deposition is performed on intrinsic amorphous silicon to obtain phosphorus deposited silicon wafers;(5)对磷沉积硅片进行磷掺杂和硼磷硅玻璃耐腐蚀化处理;(5) Phosphorus doping and borophosphosilicate glass corrosion-resistant treatment are carried out on the phosphorus deposited silicon wafer;(6)对耐腐蚀化处理后的硅片正面依次进行氢氟酸溶液和碱液清洗,即完成绕镀多晶硅的去除。(6) Carry out hydrofluoric acid solution and alkali solution cleaning on the front side of the silicon wafer after the corrosion-resistant treatment in sequence, that is, the removal of the polysilicon around the plating is completed.
- 如权利要求1所述的绕镀多晶硅去除方法,其特征在于,步骤(5)中,所述磷掺杂和耐腐蚀化处理通过方案A或方案B实现,具体过程包括以下步骤:The method for removing polysilicon plating according to claim 1, wherein in step (5), the phosphorus doping and corrosion-resistant treatment is realized through scheme A or scheme B, and the specific process includes the following steps:方案A:对磷沉积硅片进行一次退火以完成磷掺杂及非晶硅晶化;在氮气氛围中,对一次退火后的硅片进行二次退火,以降低磷在硼磷硅玻璃中的浓度同时使得硼磷硅玻璃区域网状结构更加致密;Scheme A: Anneal the phosphorus-deposited silicon wafer once to complete phosphorus doping and amorphous silicon crystallization; in a nitrogen atmosphere, perform a second anneal on the silicon wafer after the first anneal to reduce the concentration of phosphorus in the borophosphosilicate glass. At the same time, the concentration makes the network structure of the borophosphosilicate glass region denser;方案B:去除磷沉积硅片正面的磷硅玻璃,再进行磷掺杂及非晶硅晶化。Option B: Remove the phosphosilicate glass on the front side of the phosphorus-deposited silicon wafer, and then perform phosphorus doping and crystallization of amorphous silicon.
- 如权利要求2所述的绕镀多晶硅去除方法,其特征在于,方案A中,所述一次退火的温度为800~850℃。The method for removing polysilicon by wrapping plating according to claim 2, characterized in that, in scheme A, the temperature of the primary annealing is 800-850°C.
- 如权利要求2所述的绕镀多晶硅去除方法,其特征在于,方案A中,所述二次退火的温度为850~1000℃,时间为10~50min。The method for removing polycrystalline silicon wrapped around plating according to claim 2, characterized in that, in scheme A, the temperature of the secondary annealing is 850-1000° C., and the time is 10-50 minutes.
- 如权利要求2所述的绕镀多晶硅去除方法,其特征在于,方案B中,采用浓度为0.5~3wt%的氢氟酸溶液去除磷沉积硅片正面的硼磷硅玻璃。The method for removing polysilicon wrapped around plating according to claim 2, wherein, in scheme B, a hydrofluoric acid solution with a concentration of 0.5-3wt% is used to remove the borophosphosilicate glass on the front side of the phosphorus-deposited silicon wafer.
- 如权利要求2所述的绕镀多晶硅去除方法,其特征在于,方案B中,所述磷掺杂及非晶硅晶化的温度为800~1000℃,时间为5~60min。The method for removing polysilicon by wrap-around plating according to claim 2, wherein in scheme B, the temperature for phosphorus doping and amorphous silicon crystallization is 800-1000° C., and the time is 5-60 minutes.
- 如权利要求1所述的绕镀多晶硅去除方法,其特征在于,步骤(4)中,所述磷沉积的温度为750~850℃,时间为20~50min,磷源流量为1000~4000sccm。The method for removing polycrystalline silicon by wrap-around plating according to claim 1, wherein in step (4), the temperature of the phosphorus deposition is 750-850° C., the time is 20-50 minutes, and the flow rate of the phosphorus source is 1000-4000 sccm.
- 如权利要求1所述的绕镀多晶硅去除方法,其特征在于,步骤(6)中,所述氢氟酸溶液的浓度为3~10wt%。The method for removing polysilicon plating according to claim 1, characterized in that, in step (6), the concentration of the hydrofluoric acid solution is 3-10 wt%.
- 如权利要求1所述的绕镀多晶硅去除方法,其特征在于,步骤(6)中,所述碱液为NaOH溶液、KOH溶液或四甲基氢氧化铵溶液,浓度为3~15wt%。The method for removing polysilicon around plating according to claim 1, characterized in that, in step (6), the alkaline solution is NaOH solution, KOH solution or tetramethylammonium hydroxide solution, with a concentration of 3-15wt%.
- 如权利要求1所述的绕镀多晶硅去除方法,其特征在于,步骤(2)中,采用链式单面刻蚀的方法去除硼掺杂后的硅片背面的硼硅玻璃和扩散结。The method for removing polycrystalline silicon wrapping according to claim 1, wherein in step (2), the borosilicate glass and the diffusion junction on the back side of the boron-doped silicon wafer are removed by chain single-sided etching.
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