CN111341881B - Method for removing front-side polycrystalline silicon by winding plating - Google Patents
Method for removing front-side polycrystalline silicon by winding plating Download PDFInfo
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- 238000007747 plating Methods 0.000 title claims abstract description 70
- 238000000034 method Methods 0.000 title claims abstract description 59
- 238000004804 winding Methods 0.000 title claims abstract description 30
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- 239000000243 solution Substances 0.000 claims abstract description 38
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 27
- 239000003513 alkali Substances 0.000 claims abstract description 26
- 238000005530 etching Methods 0.000 claims abstract description 26
- 229910052796 boron Inorganic materials 0.000 claims abstract description 23
- 230000005641 tunneling Effects 0.000 claims abstract description 23
- 239000011259 mixed solution Substances 0.000 claims abstract description 20
- 238000002161 passivation Methods 0.000 claims abstract description 20
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 17
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 15
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- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 7
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 6
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 6
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims description 6
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- 239000002131 composite material Substances 0.000 claims description 6
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- 229910052593 corundum Inorganic materials 0.000 claims description 5
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Abstract
The invention relates to a method for removing front-side polycrystalline silicon by winding plating. The method comprises the following steps: (1) carrying out boron diffusion on the front side of the silicon wafer to form a p + emitter and a front borosilicate glass layer; (2) etching the back surface of the silicon wafer, etching the back surface into a plane, removing the boron doped layer and the borosilicate glass layer on the back surface, the periphery and the borosilicate glass layer, and removing the borosilicate glass layer on the front surface; (3) growing a tunneling oxide layer and an intrinsic amorphous silicon layer on the back surface of the silicon wafer, and forming a front-side winding-plating polycrystalline silicon layer on the edge area of the front side of the silicon wafer; (4) implanting ions into the intrinsic amorphous silicon layer to form a phosphosilicate glass layer, and annealing to form a phosphorus-doped polycrystalline silicon layer; (5) plating a silicon nitride layer on the phosphorus-doped polycrystalline silicon layer; (6) placing the silicon wafer in a mixed solution of alkali and a single crystal additive, and removing the front side winding-plated polycrystalline silicon layer; (7) and plating aluminum oxide layers on both sides of the silicon wafer, and plating a passivation anti-reflection film layer on the aluminum oxide layer on the front side. The method can well control the reaction rate of the alkali liquor in the alkali plating solution and the polysilicon plating solution, and increase the reaction window.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a method for removing front-side polycrystalline silicon by winding plating.
Background
In the crystalline silicon solar cell, the metal-semiconductor contact region has serious recombination, and becomes an important factor for restricting the efficiency development of the crystalline silicon solar cell. The tunneling oxide layer passivation metal contact structure is composed of an ultrathin tunneling oxide layer and a doped polycrystalline silicon layer, can remarkably reduce the composition of a metal contact area, has good contact performance, and can greatly improve the efficiency of a solar cell. In order to evaluate the efficiency potential of the current commercial high-efficiency cell, such as PERC, HIT, passivated contact cell, etc., german institute of known solar energy (ISFH) in 2019, Silicon PV reported that the theoretical efficiency limits of solar cells of different structures were carefully analyzed theoretically based on the concept of carrier selectivity, concluding that passivated contact cells (such as TOPCon cells) have a much higher efficiency limit (28.2% to 28.7%), a limit efficiency 27.5% higher than that of HIT cells, a limit efficiency 24.5% higher than that of PERC cells, and a theoretical limit efficiency 29.43% closest to that of crystalline Silicon solar cells.
At present, many manufacturers use LPCVD and PECVD equipment to prepare a tunneling oxide layer and a doped polysilicon layer in the production process of a battery, silane gas is introduced into the equipment, two silicon wafers are inserted into the same metal boat groove in a face-to-face manner, the silane gas is inevitably coated on the front side of the silicon wafers due to inconsistent adhesion tightness of the silicon wafers, and the coating area can bring the following influences on the performance of the battery:
1) the color difference exists between the winding plating area and the non-winding plating area, and the appearance of the battery is poor due to obvious color difference after film plating;
2) the polysilicon in the plating winding area has strong light absorption capacity, which is not beneficial to the absorption of the cell to light and causes the reduction of efficiency;
3) the polysilicon in the plating winding area influences the burning-through effect of the slurry, so that the filling factor of the battery is reduced, and the efficiency is reduced;
4) the passivation effect of the plating area is poor, and the plating area is blackened, so that the yield of the battery piece is influenced.
At present, four methods are mainly used for removing the polysilicon coil plating:
1. with HF and HNO3The mixed acid system is used for removing the polysilicon wound and plated on the front surface of the silicon chip, and the method needs pure HF and HNO3After 8 ten thousand of battery pieces are cleaned, the cleaning effect is poor, the product yield is greatly reduced, and if more battery pieces need to be cleaned, the solution needs to be replaced, so that the cost is high.
2. The inorganic alkali (potassium hydroxide or sodium hydroxide) is used for removing the polysilicon on the front surface of the silicon wafer in the winding plating process, the reaction rate of the solution is too high, the cleaning effect cannot be controlled, the requirement on the incoming material winding plating is high, a p + layer is easily damaged by chemicals, the process window is narrow, and the fluctuation of the yield and the efficiency during mass production is large.
3. By SiO2Or SiNXAs the mask is made, the method needs to add two process steps of mask plating and mask post-cleaning, needs to add machine equipment and improves the process cost.
4. The phosphorosilicate glass layer is used as a mask, high requirements are put forward for an etching process, the phosphorosilicate glass layer on the edge of the front side of the silicon wafer is difficult to completely reserve in the etching process, and if the phosphorosilicate glass layer on the edge of the silicon wafer is not reserved well, the phosphorosilicate glass layer cannot play a role of a barrier layer in the process of removing polycrystalline silicon by subsequent alkali solution in a winding and plating process, so that the problem of electric leakage of a battery piece cannot be controlled.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for removing front-side polycrystalline silicon by winding plating.
The invention relates to a method for removing front-side polycrystalline silicon by winding plating, which adopts the technical scheme that: the method comprises the following steps:
(1) carrying out boron diffusion on the front side of the silicon wafer subjected to alkali texturing to form a p + emitter and a front borosilicate glass layer on the front side of the silicon wafer;
(2) etching the back surface of the silicon wafer treated in the step (1) to etch the texturing surface of the back surface of the silicon wafer into a plane, simultaneously removing the boron doped layer and the borosilicate glass layer on the back surface and the periphery, and removing the borosilicate glass layer on the front surface;
(3) firstly growing a tunneling oxide layer on the back surface of the silicon wafer treated in the step (2), and then growing an intrinsic amorphous silicon layer on the tunneling oxide layer; in the process of growing the intrinsic amorphous silicon layer, partial polycrystalline silicon is coated to the edge area of the front surface of the silicon wafer in a winding way, and a front surface coating polycrystalline silicon layer is formed in the edge area;
(4) firstly, performing ion implantation on the back surface of the silicon wafer treated in the step (3) to form a phosphorosilicate glass layer on the intrinsic amorphous silicon layer;
(5) annealing to activate the doped atoms on the back of the silicon wafer to crystallize the intrinsic amorphous silicon layer and form a phosphorus-doped polysilicon layer;
(6) plating a silicon nitride layer on the phosphorus-doped polycrystalline silicon layer on the back surface of the silicon wafer treated in the step (5);
(7) placing the silicon wafer treated in the step (6) in a mixed solution of alkali and a single crystal additive, and removing the front side winding-plated polycrystalline silicon layer;
(8) and (4) plating aluminum oxide layers on the front side and the back side of the silicon wafer treated in the step (7), and plating a passivation anti-reflection film layer on the aluminum oxide layers on the front side of the silicon wafer to complete passivation.
The method for removing the front-side polycrystalline silicon by the winding plating further comprises the following auxiliary technical scheme:
wherein, in the step (7),
putting the silicon wafer treated in the step (6) into a hydrofluoric acid solution, and removing oxide layers on the front side and the back side of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of alkali and a single crystal additive, and removing the front side winding-plated polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer wound and plated with the polycrystalline silicon layer removed in a mixed solution of hydrofluoric acid solution and hydrochloric acid solution to remove metal ions on the front surface and the back surface of the silicon wafer.
Wherein, in the step (7),
putting the silicon wafer treated in the step (6) into a hydrofluoric acid solution with the volume ratio concentration of 1% -5%, and removing oxide layers on the front surface and the back surface of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of 0.05-1% of alkali and 2-10% of single crystal additive in volume ratio, and removing the front side winding plating polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer coated with the polysilicon layer in a mixed solution of 0.3-1% hydrofluoric acid solution and 1-2% hydrochloric acid solution in volume ratio concentration to remove metal ions on the front surface and the back surface of the silicon wafer.
In the step (2), etching the back surface of the silicon wafer treated in the step (1) by wet etching, wherein the etching solution of the wet etching is a mixed acid system of hydrofluoric acid and nitric acid; in the etching process, the front side of the silicon wafer is placed upwards, a textured surface on the back side of the silicon wafer is etched into a plane by using a chain type etching machine, the boron doped layer and the borosilicate glass layer on the back side and the periphery are removed, and the borosilicate glass layer on the front side is removed.
In the step (1), the silicon wafer has a resistivity of 0.3-10 Ω · cm and a thickness of 90-300 μm.
In the step (3), the thickness of the tunneling oxide layer is 0.5-2 nm; depositing the intrinsic amorphous silicon layer in a low pressure chemical vapor deposition apparatus.
In the step (4), phosphorane or red phosphorus is injected on the intrinsic amorphous silicon layer on the back surface of the silicon wafer by adopting an ion implanter, so that a phosphorosilicate glass layer is formed on the intrinsic amorphous silicon layer.
Wherein, in the step (4), the annealing temperature is 600-950 ℃; the thickness of the phosphorus-doped polycrystalline silicon layer is 60-300nm, and the thickness of the phosphosilicate glass layer is 3-10 nm.
In the step (5), introducing silane and ammonia gas into a plasma enhanced chemical vapor deposition device, and plating a silicon nitride layer on the phosphorus-doped polycrystalline silicon layer on the back surface of the silicon wafer; wherein the thickness of the silicon nitride layer is 60-90 nm.
Wherein the thickness of the passivation anti-reflection film layer is 60-90nm, and the passivation anti-reflection film layer is SiO2、SiNXOr Al2O3One or more of the dielectric films are combined to form the composite dielectric film.
The implementation of the invention comprises the following technical effects:
according to the method for removing the front-side polycrystalline silicon winding plating, provided by the embodiment of the invention, the method for removing the polycrystalline silicon winding plating under the condition of no mask is realized by utilizing the corrosion rate difference of the crystalline silicon and the boron-containing monocrystalline silicon in the alkaline solution, and the monocrystalline texturing additive is added into the alkaline solution, so that the reaction rate of alkali can be well controlled, the reaction window is increased, the requirement of mass production can be met, and the production cost is reduced.
Drawings
Fig. 1 is a schematic cross-sectional view of a cell structure after step (1) of a method for removing front-side polysilicon by spin coating according to an embodiment of the present invention.
Fig. 2 is a schematic cross-sectional view of the cell structure after step (2) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
Fig. 3 is a schematic cross-sectional view of the cell structure after step (3) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
Fig. 4 is a schematic cross-sectional view of the cell structure after step (4) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
Fig. 5 is a schematic cross-sectional view of the cell structure after step (5) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
Fig. 6 is a schematic cross-sectional view of the cell structure after step (6) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
Fig. 7 is a schematic cross-sectional view of the cell structure after step (7) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
Fig. 8 is a schematic cross-sectional view of the cell structure after step (8) of the method for removing front-side polysilicon by spin coating according to the embodiment of the present invention.
In the figure, 1: silicon substrate, 2: p + emitter, 3: borosilicate glass layer, 4: tunneling oxide layer, 5: intrinsic amorphous silicon layer, 5-1: front side winding plating polysilicon layer, 6: phosphosilicate glass layer, 7: phosphorus-doped polysilicon layer, 8: silicon nitride layer, 9: aluminum oxide layer, 10: and passivating the antireflection film layer.
Detailed Description
The present invention will be described in detail with reference to examples.
The present invention is not limited to the above-described embodiments, and those skilled in the art can make modifications to the embodiments without any inventive contribution as required after reading the present specification, but only protected within the scope of the appended claims.
The invention relates to a method for removing front-side polycrystalline silicon by winding plating, which adopts the technical scheme that: the method comprises the following steps:
(1) carrying out boron diffusion on the front side of the silicon wafer subjected to alkali texturing to form a p + emitter and a front borosilicate glass layer on the front side of the silicon wafer; in the boron diffusion process, part of boron atoms are diffused to the edge area of the back side of the silicon wafer, and a back side borosilicate glass layer is formed in the edge area;
(2) etching the back surface of the silicon wafer treated in the step (1) to etch the texturing surface of the back surface of the silicon wafer into a plane, simultaneously removing the boron doped layer and the borosilicate glass layer on the back surface and the periphery, and removing the borosilicate glass layer on the front surface;
(3) firstly growing a tunneling oxide layer on the back surface of the silicon wafer treated in the step (2), and then growing an intrinsic amorphous silicon layer on the tunneling oxide layer; in the process of growing the intrinsic amorphous silicon layer, partial polycrystalline silicon is coated to the edge area of the front surface of the silicon wafer in a winding way, and a front surface coating polycrystalline silicon layer is formed in the edge area;
(4) firstly, performing ion implantation on the back surface of the silicon wafer treated in the step (3) to form a phosphorosilicate glass layer on the intrinsic amorphous silicon layer;
(5) then annealing treatment is carried out to activate the doping atoms on the back of the silicon wafer, so that the intrinsic amorphous silicon layer is crystallized to form a phosphorus-doped polycrystalline silicon layer;
(6) plating a silicon nitride layer on the phosphorus-doped polycrystalline silicon layer on the back surface of the silicon wafer treated in the step (5);
(7) placing the silicon wafer treated in the step (6) in a mixed solution of alkali and a single crystal additive, and removing the front side winding-plated polycrystalline silicon layer;
(8) and (4) plating aluminum oxide layers on the front side and the back side of the silicon wafer treated in the step (7), and plating a passivation anti-reflection film layer on the aluminum oxide layers on the front side of the silicon wafer to complete passivation.
In one embodiment, in the step (1), the silicon wafer has a resistivity of 0.3 to 10 Ω · cm and a thickness of 90 to 300 μm.
In one embodiment, in the step (2), the back surface of the silicon wafer processed in the step (1) is etched by wet etching.
In one embodiment, the etching solution for wet etching is a mixed acid system of hydrofluoric acid and nitric acid; in the etching process, the front side of the silicon wafer is placed upwards, a textured surface on the back side of the silicon wafer is etched into a plane by using a chain type etching machine, the boron doped layer and the borosilicate glass layer on the back side and the periphery are removed, and the borosilicate glass layer on the front side is removed.
In one embodiment, in the step (3), the thickness of the tunneling oxide layer is 0.5-2 nm; depositing the intrinsic amorphous silicon layer in a low pressure chemical vapor deposition apparatus.
In one embodiment, in the step (4), phosphane or red phosphorus is implanted on the intrinsic amorphous silicon layer on the back surface of the silicon wafer using an ion implanter to form a phosphosilicate glass layer on the intrinsic amorphous silicon layer.
In one embodiment, in step (4), the annealing temperature is 600 ℃ to 950 ℃; the thickness of the phosphorus-doped polycrystalline silicon layer is 60-300nm, and the thickness of the phosphosilicate glass layer is 3-10 nm.
In one embodiment, in the step (5), silane and ammonia gas are introduced into the plasma enhanced chemical vapor deposition equipment, and a silicon nitride layer is plated on the phosphorus-doped polycrystalline silicon layer on the back surface of the silicon wafer; wherein the thickness of the silicon nitride layer is 60-90 nm.
In one embodiment, in step (7),
putting the silicon wafer treated in the step (6) into a hydrofluoric acid solution with the volume ratio concentration of 1% -5%, and removing oxide layers on the front surface and the back surface of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of 0.05-1% of alkali and 2-10% of single crystal additive in volume ratio, and removing the front side winding plating polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer coated with the polysilicon layer in a mixed solution of 0.3-1% hydrofluoric acid solution and 1-2% hydrochloric acid solution in volume ratio concentration to remove metal ions on the front surface and the back surface of the silicon wafer.
In one embodiment, the thickness of the passivation anti-reflection film layer is 60-90nm, and the passivation anti-reflection film layer is SiO2、SiNXOr Al2O3One or more of the dielectric films are combined to form the composite dielectric film.
According to the invention, by utilizing the selectivity of silicon and the reaction of silicon oxide and alkali, and utilizing the difference of reaction rates of silicon with different doping concentrations and alkali solution, the winding plating is thoroughly removed by using common reagents in the production process of the solar cell under the condition of not increasing the investment of field equipment, so that the open-circuit voltage and short-circuit current of the photovoltaic cell and the conversion efficiency are improved, the yield of the product is improved, the cost is reduced, and the yield and the competitiveness of the product are greatly improved.
The inventive method for removing front side polysilicon by wire plating will be described in detail with specific embodiments.
Example 1
(1) A silicon substrate 1 having a resistivity of 1. omega. cm and a thickness of 160 μm was taken, and the silicon substrate 1 having a resistivity of 1. omega. cm and a thickness of 160 μm was placed in an alkaline solution to form textured surfaces on both the back surface and the front surface of the silicon substrate 1.
(2) Carrying out boron diffusion on the front side of the silicon wafer subjected to alkali texturing to form a p + emitter 2 and a front borosilicate glass layer 3 on the front side of the silicon wafer; in the boron diffusion process, part of the boron atoms are diffused to the edge region of the back surface of the silicon substrate 1, and a back borosilicate glass layer 3 is formed in the edge region. The cell structure after this step is shown in fig. 1.
(3) And (3) placing the back surface of the silicon wafer treated in the step (2) in a mixed acid system of hydrofluoric acid and nitric acid for wet etching, placing the silicon wafer with the front surface facing upwards in the etching process, etching a suede surface on the back surface of the silicon wafer into a plane by using a chain type etching machine, removing the back surface, the boron doped layers on the periphery and the borosilicate glass layer 3, and removing the borosilicate glass layer 3 on the front surface. The cell structure after this step is shown in fig. 2.
(4) Firstly growing a tunneling oxide layer 4 on the back surface of the silicon wafer treated in the step (3), wherein the thickness of the tunneling oxide layer is 1nm, and then growing an intrinsic amorphous silicon layer 5 on the tunneling oxide layer 4; in the process of growing the intrinsic amorphous silicon layer 5, part of the polysilicon is plated around the edge area of the front surface of the silicon wafer, and a front surface plating polysilicon layer 5-1 is formed in the edge area. The cell structure after this step is shown in fig. 3.
(5) And (3) injecting phosphorane on the intrinsic amorphous silicon layer 5 on the back surface of the silicon wafer processed in the step (4) to form a phosphorosilicate glass layer 6 on the intrinsic amorphous silicon layer 5, wherein the thickness of the phosphorosilicate glass layer 6 is 6 nm. The cell structure after this step is shown in fig. 4.
(6) And (3) annealing the silicon wafer treated in the step (5) to activate the doping atoms on the back of the silicon wafer, so that the intrinsic amorphous silicon layer 5 is crystallized to form a phosphorus-doped polycrystalline silicon layer 7, wherein the thickness of the phosphorus-doped polycrystalline silicon layer 7 is 200nm, and the annealing temperature is 800 ℃. The cell structure after this step is shown in fig. 5.
(7) And (3) putting the silicon wafer treated in the step (6) into plasma enhanced chemical vapor deposition equipment, introducing silane and ammonia gas, and plating a silicon nitride layer 8 with the thickness of 70nm on the phosphorus-doped polycrystalline silicon layer 7 on the back of the silicon wafer, wherein the silicon nitride layer can prevent the damage of acid liquor or alkali liquor to the polycrystalline silicon layer on the back. The cell structure after this step is shown in fig. 6.
(8) Putting the silicon wafer treated in the step (7) into a hydrofluoric acid solution with the volume ratio concentration of 3% to remove oxide layers on the front surface and the back surface of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of 0.5% by mass of sodium hydroxide solution and 5% by volume of single crystal additive, and removing 5-1 of the front surface winding-plated polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer subjected to the winding plating of the polycrystalline silicon layer in a mixed solution of 0.8% hydrofluoric acid solution and 1.5% hydrochloric acid solution in volume ratio concentration to remove metal ions on the front surface and the back surface of the silicon wafer. The cell structure after this step is shown in fig. 7.
(9) Plating aluminum oxide layers 9 on the front surface and the back surface of the silicon wafer treated in the step (8), and plating 70nm SiO on the aluminum oxide layers on the front surface of the silicon wafer2With Al2O3The composite dielectric film is used as a passivation anti-reflection film layer 10 to complete passivation. The cell structure after this step is shown in fig. 8.
Example 2
(1) A silicon substrate 1 having a resistivity of 0.3. omega. cm and a thickness of 90 μm was taken, and the silicon substrate 1 having a resistivity of 0.3. omega. cm and a thickness of 90 μm was placed in an alkaline solution to form textured surfaces on both the back surface and the front surface of the silicon substrate 1.
(2) Carrying out boron diffusion on the front side of the silicon wafer subjected to alkali texturing to form a p + emitter 2 and a front borosilicate glass layer 3 on the front side of the silicon wafer; in the boron diffusion process, part of the boron atoms are diffused to the edge region of the back surface of the silicon substrate 1, and a back borosilicate glass layer 3 is formed in the edge region. The cell structure after this step is shown in fig. 1.
(3) And (3) placing the back surface of the silicon wafer treated in the step (2) in a mixed acid system of hydrofluoric acid and nitric acid for wet etching, placing the silicon wafer with the front surface facing upwards in the etching process, etching a suede surface on the back surface of the silicon wafer into a plane by using a chain type etching machine, removing the back surface, the boron doped layers on the periphery and the borosilicate glass layer 3, and removing the borosilicate glass layer 3 on the front surface. The cell structure after this step is shown in fig. 2.
(4) Firstly growing a tunneling oxide layer 4 on the back surface of the silicon wafer processed in the step (3), wherein the thickness of the tunneling oxide layer is 0.5nm, and then growing an intrinsic amorphous silicon layer 5 on the tunneling oxide layer 4; in the process of growing the intrinsic amorphous silicon layer 5, part of the polysilicon is plated around the edge area of the front surface of the silicon wafer, and a front surface plating polysilicon layer 5-1 is formed in the edge area. The cell structure after this step is shown in fig. 3.
(5) Injecting red phosphorus or phosphorane on the intrinsic amorphous silicon layer 5 on the back surface of the silicon wafer processed in the step (4) to form a phosphosilicate glass layer 6 on the intrinsic amorphous silicon layer 5, wherein the thickness of the phosphosilicate glass layer 6 is 3 nm. The cell structure after this step is shown in fig. 4.
(6) And (3) annealing the silicon wafer treated in the step (6) to activate the doping atoms on the back of the silicon wafer, so that the intrinsic amorphous silicon layer 5 is crystallized to form a phosphorus-doped polycrystalline silicon layer 7, wherein the thickness of the phosphorus-doped polycrystalline silicon layer 7 is 60nm, and the annealing temperature is 600 ℃. The cell structure after this step is shown in fig. 5.
(7) And (3) putting the silicon wafer treated in the step (6) into plasma enhanced chemical vapor deposition equipment, introducing silane and ammonia gas, and plating a silicon nitride layer 8 with the thickness of 60nm on the phosphorus-doped polycrystalline silicon layer 7 on the back of the silicon wafer, wherein the silicon nitride layer can prevent the damage of acid liquor or alkali liquor to the polycrystalline silicon layer on the back. The cell structure after this step is shown in fig. 6.
(8) Putting the silicon wafer treated in the step (7) into a hydrofluoric acid solution with the volume ratio concentration of 1%, and removing oxide layers on the front surface and the back surface of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of 0.05% by mass of potassium hydroxide solution and 2% by volume of single crystal additive, and removing 5-1 of the front side winding-plated polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer subjected to the winding plating of the polycrystalline silicon layer in a mixed solution of 0.3% hydrofluoric acid solution and 1% hydrochloric acid solution in volume ratio concentration to remove metal ions on the front surface and the back surface of the silicon wafer. The cell structure after this step is shown in fig. 7.
(9) Plating aluminum oxide layers 9 on the front and back surfaces of the silicon wafer treated in the step (8), and plating 60nm SiN on the aluminum oxide layers on the front surface of the silicon waferXWith Al2O3The composite dielectric film is used as a passivation anti-reflection film layer 10 to complete passivation. The cell structure after this step is shown in fig. 8.
Example 3
(1) A silicon substrate 1 having a resistivity of 10. omega. cm and a thickness of 300 μm was taken, and the silicon substrate 1 having a resistivity of 10. omega. cm and a thickness of 300 μm was placed in an alkaline solution to form textured surfaces on both the back surface and the front surface of the silicon substrate 1.
(2) Carrying out boron diffusion on the front side of the silicon wafer subjected to alkali texturing to form a p + emitter 2 and a front borosilicate glass layer 3 on the front side of the silicon wafer; in the boron diffusion process, part of the boron atoms are diffused to the edge region of the back surface of the silicon substrate 1, and a back borosilicate glass layer 3 is formed in the edge region. The cell structure after this step is shown in fig. 1.
(3) And (3) placing the back surface of the silicon wafer treated in the step (2) in a mixed acid system of hydrofluoric acid and nitric acid for wet etching, placing the silicon wafer with the front surface facing upwards in the etching process, etching a suede surface on the back surface of the silicon wafer into a plane by using a chain type etching machine, removing the back surface, the boron doped layers on the periphery and the borosilicate glass layer 3, and removing the borosilicate glass layer 3 on the front surface. The cell structure after this step is shown in fig. 2.
(4) Firstly growing a tunneling oxide layer 4 on the back surface of the silicon wafer processed in the step (3), wherein the thickness of the tunneling oxide layer 4 is 2nm, and then growing an intrinsic amorphous silicon layer 5 on the tunneling oxide layer 4; in the process of growing the intrinsic amorphous silicon layer 5, part of the polysilicon is plated around the edge area of the front surface of the silicon wafer, and a front surface plating polysilicon layer 5-1 is formed in the edge area. The cell structure after this step is shown in fig. 3.
(5) Injecting red phosphorus or phosphorane on the intrinsic amorphous silicon layer 5 on the back surface of the silicon wafer processed in the step (4) to form a phosphosilicate glass layer 6 on the intrinsic amorphous silicon layer 5, wherein the thickness of the phosphosilicate glass layer 6 is 10 nm. The cell structure after this step is shown in fig. 4.
(6) And (3) annealing the silicon wafer treated in the step (5) to activate the doping atoms on the back of the silicon wafer, so that the intrinsic amorphous silicon layer 5 is crystallized to form a phosphorus-doped polycrystalline silicon layer 7, wherein the thickness of the phosphorus-doped polycrystalline silicon layer 7 is 300nm, and the annealing temperature is 950 ℃. The cell structure after this step is shown in fig. 5.
(7) And (3) putting the silicon wafer treated in the step (6) into plasma enhanced chemical vapor deposition equipment, introducing silane and ammonia gas, and plating a silicon nitride layer 8 with the thickness of 90nm on the phosphorus-doped polycrystalline silicon layer 7 on the back of the silicon wafer, wherein the silicon nitride layer can prevent the damage of acid liquor or alkali liquor to the polycrystalline silicon layer on the back. The cell structure after this step is shown in fig. 6.
(8) Putting the silicon wafer treated in the step (7) into a hydrofluoric acid solution with the volume ratio concentration of 5%, and removing oxide layers on the front side and the back side of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of 1% by mass of sodium hydroxide solution and 10% by volume of single crystal additive, and removing 5-1 of the front surface winding-plated polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer coated with the polysilicon layer in a mixed solution of 1% hydrofluoric acid solution and 2% hydrochloric acid solution in volume ratio concentration to remove metal ions on the front surface and the back surface of the silicon wafer. The cell structure after this step is shown in fig. 7.
(9) Plating aluminum oxide layers 9 on the front and back surfaces of the silicon wafer treated in the step (8), and plating 90nm SiO on the aluminum oxide layers on the front surface of the silicon wafer2And SiNXThe composite dielectric film is used as a passivation anti-reflection film layer 10 to complete passivation. Go toThe cell structure for the cost step is shown in fig. 8.
According to the method for removing the front-side polycrystalline silicon winding plating, provided by the embodiment of the invention, the method for removing the polycrystalline silicon winding plating under the condition of no mask is realized by utilizing the corrosion rate difference of the crystalline silicon and the boron-containing monocrystalline silicon in the alkaline solution, and the monocrystalline texturing additive is added into the alkaline solution, so that the reaction rate of alkali can be well controlled, the reaction window is increased, the requirement of mass production can be met, and the production cost is reduced.
It should be noted that the silicon wafer in the present invention is mainly directed to an N-type silicon wafer, but is not limited to an N-type silicon wafer; for SiNXThe deposition method of the layer is not particularly limited.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the protection scope of the present invention, although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions can be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims (10)
1. A method for removing front-side polysilicon coil plating is characterized in that: the method comprises the following steps:
(1) carrying out boron diffusion on the front side of the silicon wafer subjected to alkali texturing to form a p + emitter and a front borosilicate glass layer on the front side of the silicon wafer;
(2) etching the back surface of the silicon wafer treated in the step (1) to etch the texturing surface of the back surface of the silicon wafer into a plane, simultaneously removing the boron doping layer and the borosilicate glass layer on the back surface and the periphery, and removing the borosilicate glass layer on the front surface
(3) Firstly growing a tunneling oxide layer on the back surface of the silicon wafer treated in the step (2), and then growing an intrinsic amorphous silicon layer on the tunneling oxide layer; in the process of growing the intrinsic amorphous silicon layer, partial polycrystalline silicon is coated to the edge area of the front surface of the silicon wafer in a winding way, and a front surface coating polycrystalline silicon layer is formed in the edge area;
(4) performing ion implantation on the back surface of the silicon wafer treated in the step (3) to form a phosphorosilicate glass layer on the intrinsic amorphous silicon layer;
(5) annealing to activate the doped atoms on the back of the silicon wafer to crystallize the intrinsic amorphous silicon layer and form a phosphorus-doped polycrystalline silicon layer;
(6) plating a silicon nitride layer on the phosphorus-doped polycrystalline silicon layer on the back surface of the silicon wafer treated in the step (5);
(7) placing the silicon wafer treated in the step (6) in a mixed solution of alkali and a single crystal additive, and removing the front side winding-plated polycrystalline silicon layer;
(8) and (4) plating aluminum oxide layers on the front side and the back side of the silicon wafer treated in the step (7), and plating a passivation anti-reflection film layer on the aluminum oxide layers on the front side of the silicon wafer to complete passivation.
2. The method for removing front side polysilicon wraparound plating according to claim 1, wherein, in the step (7),
putting the silicon wafer treated in the step (6) into a hydrofluoric acid solution, and removing oxide layers on the front side and the back side of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of alkali and a single crystal additive, and removing the front side winding-plated polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer wound and plated with the polycrystalline silicon layer removed in a mixed solution of hydrofluoric acid solution and hydrochloric acid solution to remove metal ions on the front surface and the back surface of the silicon wafer.
3. The method for removing front side polysilicon wraparound plating according to claim 2, wherein, in the step (7),
putting the silicon wafer treated in the step (6) into a hydrofluoric acid solution with the volume ratio concentration of 1% -5%, and removing oxide layers on the front surface and the back surface of the silicon wafer;
then, placing the silicon wafer with the front and back oxide layers removed in a mixed solution of 0.05-1% of alkali and 2-10% of single crystal additive in volume ratio, and removing the front side winding plating polycrystalline silicon layer;
and finally, placing the silicon wafer with the front surface of the silicon wafer coated with the polysilicon layer in a mixed solution of 0.3-1% hydrofluoric acid solution and 1-2% hydrochloric acid solution in volume ratio concentration to remove metal ions on the front surface and the back surface of the silicon wafer.
4. The method for removing front-side polysilicon winding plating according to any one of claims 1 to 3, characterized in that wet etching is adopted to etch the back side of the silicon wafer treated in the step (1), and etching solution of the wet etching is a mixed acid system of hydrofluoric acid and nitric acid; in the etching process, the front side of the silicon wafer is placed upwards, a textured surface on the back side of the silicon wafer is etched into a plane by using a chain type etching machine, the boron doped layer and the borosilicate glass layer on the back side and the periphery are removed, and the borosilicate glass layer on the front side is removed.
5. The method for removing front-side polysilicon wraparound plating according to any one of claims 1 to 3, characterized in that in the step (1), the silicon wafer has a resistivity of 0.3 to 10 Ω -cm and a thickness of 90 to 300 μm.
6. The method for removing front side polysilicon wraparound plating according to any one of the claims 1 to 3, wherein in the step (3), the thickness of the tunneling oxide layer is 0.5 to 2 nm; depositing the intrinsic amorphous silicon layer in a low pressure chemical vapor deposition apparatus.
7. The method for removing front side polysilicon wraparound plating according to any one of claims 1 to 3, characterized in that in the step (4), phosphane or red phosphorus is implanted on the intrinsic amorphous silicon layer on the back side of the silicon wafer by using an ion implanter to form a phosphosilicate glass layer on the intrinsic amorphous silicon layer.
8. The method for removing front side polysilicon coil plating according to any one of claims 1 to 3, wherein in the step (5), the annealing temperature is 600 ℃ to 950 ℃; the thickness of the phosphorus-doped polycrystalline silicon layer is 60-300nm, and the thickness of the phosphosilicate glass layer is 3-10 nm.
9. The method for removing front-side polysilicon wraparound plating according to any one of claims 1 to 3, characterized in that in the step (6), silane and ammonia gas are introduced into a plasma enhanced chemical vapor deposition device, and a silicon nitride layer is plated on the phosphorus-doped polysilicon layer on the back side of the silicon wafer; wherein the thickness of the silicon nitride layer is 60-90 nm.
10. The method for removing front side polysilicon wraparound plating according to any one of claims 1 to 3, wherein the thickness of the passivation anti-reflection film layer is 60 to 90nm, which is SiO2、SiNXOr Al2O3One or more of the dielectric films are combined to form the composite dielectric film.
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| CN114400260A (en) * | 2021-12-23 | 2022-04-26 | 东方日升新能源股份有限公司 | Unwinding plating method and preparation method of tunneling oxide layer passivation contact solar cell |
| CN115036396B (en) * | 2022-07-14 | 2023-06-13 | 泰州中来光电科技有限公司 | Preparation method of boron doped emitter |
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