CN114583013A - BSG removing method - Google Patents

BSG removing method Download PDF

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Publication number
CN114583013A
CN114583013A CN202210232143.XA CN202210232143A CN114583013A CN 114583013 A CN114583013 A CN 114583013A CN 202210232143 A CN202210232143 A CN 202210232143A CN 114583013 A CN114583013 A CN 114583013A
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CN
China
Prior art keywords
bsg
layer
silicon wafer
xbsg
acid
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Application number
CN202210232143.XA
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Chinese (zh)
Inventor
任常瑞
李鑫路
董建文
符黎明
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Changzhou Shichuang Energy Co Ltd
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Changzhou Shichuang Energy Co Ltd
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Priority to CN202210232143.XA priority Critical patent/CN114583013A/en
Publication of CN114583013A publication Critical patent/CN114583013A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864Annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photovoltaic Devices (AREA)
  • Weting (AREA)

Abstract

The invention discloses a BSG removing method, which comprises the steps of firstly changing a BSG layer on the back of a silicon wafer into an XBSG layer, wherein X is a V-group element; then, carrying out back etching to remove the XBSG layer; the concentration of hydrofluoric acid in back etching can be reduced, the time of back etching can be reduced, the acid consumption can be reduced, the capacity can be improved, the process window can be optimized, the safety risk can be avoided, and the process route of the TOPCon battery can be effectively optimized.

Description

BSG removing method
Technical Field
The invention relates to the field of photovoltaics, in particular to a BSG removing method.
Background
In order to improve the proportion of photovoltaic power generation, cost reduction and efficiency improvement are two major lines of photovoltaic manufacturing, the current mainstream photovoltaic cell is a crystalline silicon solar cell, the TOPCon technology becomes one of the most potential novel high-efficiency cell technologies due to the extremely high compatibility of the process route and the traditional PERC cell production line and the obvious efficiency gain, and the related research is increased day by day. At present, the mainstream n-type TOPCon battery is a positive junction battery, the front side needs to adopt boron diffusion for emitter preparation, compared with the phosphorus diffusion process adopted by the traditional PERC battery, the boron diffusion process needs higher temperature for diffusion, the corrosion rate of the formed borosilicate glass (BSG) in hydrofluoric acid is very low, and the removal difficulty is very high, so that the BSG removal process needs longer time and higher-concentration hydrofluoric acid to meet the requirement of batch production, and the corresponding manufacturing cost is increased.
Disclosure of Invention
In order to solve the defects of the prior art, the invention provides a BSG removing method, which comprises the steps of depositing a doping agent containing X on a BSG layer of a silicon wafer, then annealing to change the BSG layer into an XBSG layer, and then removing the XBSG layer through acid cleaning; x is a group V element.
Preferably, the BSG layer is generated by silicon wafer boron diffusion.
Preferably, the BSG layer is a BSG layer on the back side of the silicon wafer.
Preferably, the BSG layer of the silicon wafer is changed into the XBSG layer by adopting an ion implantation mode.
Preferably, the BSG layer of the silicon wafer is changed to an XBSG layer by depositing a dopant containing X on the BSG layer of the silicon wafer and then annealing.
Preferably, the deposition is by vapor deposition, coating, printing or transfer.
Preferably, the dopant containing X is selected from one or more of a compound containing X, a solution containing X and a solid solution containing X.
Preferably, X is selected from one or more of N, P, As, Sb and Bi.
Preferably, the annealing is performed in a tube furnace or a chain furnace.
Preferably, the annealing temperature is 400-800 ℃, and the time is 2-10 min.
Preferably, hydrofluoric acid is used for the acid cleaning.
Preferably, the mass concentration of HF in the hydrofluoric acid is 1-3%.
Preferably, the acid washing is carried out in a chain wet plant.
Preferably, the pickling temperature is 15-35 ℃ and the pickling time is 40-60 s.
The invention has the advantages and beneficial effects that: firstly, changing a BSG layer on the back of a silicon wafer into an XBSG layer, wherein X is a V-group element; then, carrying out back etching to remove the XBSG layer; the concentration of hydrofluoric acid in back etching can be reduced, the time of back etching can be reduced, the acid consumption can be reduced, the capacity can be improved, the process window can be optimized, the safety risk can be avoided, and the process route of the TOPCon battery can be effectively optimized.
The invention also has the following advantages:
1) in the prior art, BSG is directly removed by hydrofluoric acid in back etching, the process difficulty is high, longer process time is required, chain wet process equipment needs to be increased or the productivity needs to be reduced, so that the back etching becomes the bottleneck of TOPCon mass production import, and the problem of residue is caused at a high probability due to insufficient contact between the edge of a silicon wafer and the hydrofluoric acid during the back etching. The method changes the BSG layer on the back of the silicon wafer into the XBSG layer (X is a V-group element, and X can be selected from one or more of N, P, As, Sb and Bi), has higher removal speed than the BSG layer in hydrofluoric acid with the same concentration, can realize the productivity superior to that of a PERC battery, avoids the problem of edge residue, and solves the battery leakage risk caused by back etching.
2) In the prior art, high-concentration hydrofluoric acid (the mass concentration of the hydrofluoric acid is not less than 30%) is required for removing BSG by back etching, which not only causes the increase of the preparation cost of a battery, but also causes the generation of acid mist above a chain type groove body and serious liquid climbing of a water film, thereby causing the problem of over-etching of the front surface of a silicon wafer. The removal of the back XBSG layer does not need high-concentration hydrofluoric acid, and can be performed by adopting low-concentration hydrofluoric acid (the mass concentration of the hydrofluoric acid can be as low as 1 percent), thereby greatly reducing the cost of the liquid medicine, avoiding the risk of over-etching on the front side of the silicon wafer and greatly widening the process window.
Detailed Description
The following further describes embodiments of the present invention with reference to examples. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
The boron diffusion of the silicon wafer can generate a BSG layer, and the BSG layer on the back of the silicon wafer needs to be removed; currently, single-side acid etching (namely back etching) is generally carried out on the back of a silicon wafer in chain wet equipment, and a BSG layer on the back of the silicon wafer is removed; specifically, the method comprises the following steps: hydrofluoric acid with mass concentration not less than 30% is adopted for acid etching, the temperature of the acid etching is 15-35 ℃, and the time is 250-400 s (the belt speed is about 0.7m/min, so as to achieve the contact time). At present, the BSG on the back surface of a silicon wafer is removed by back etching, which has the following problems: the high hydrofluoric acid consumption increases the chemical cost, simultaneously causes higher acid discharge treatment cost, and potential safety hazard brought by high-concentration hydrofluoric acid solution, and the low belt speed leads to capacity loss, so that capacity bottleneck is easily formed, and the market competitiveness of the TOPCon battery is reduced.
The invention provides a BSG removing method for removing a back BSG layer generated by boron diffusion of a silicon wafer, which comprises the following steps: depositing a doping agent containing X on the BSG layer on the back of the silicon wafer in a vapor deposition, coating, printing or transfer printing mode, and then annealing in a tube furnace or a chain furnace to change the BSG layer on the back of the silicon wafer into an XBSG layer; then, performing single-side acid etching (namely back etching) on the back of the silicon wafer in a chain wet method device (such as a chain wet etching device), and removing the XBSG layer on the back of the silicon wafer; x is a group V element; specifically, the method comprises the following steps: the X is selected from one or more of N, P, As, Sb and Bi; the doping agent containing X is selected from one or more of a compound containing X, a solution containing X and a solid solution containing X; the annealing temperature is 400-800 ℃, and the annealing time is 2-10 min; hydrofluoric acid is adopted in the acid etching; the mass concentration of HF in the hydrofluoric acid is 1-3%; the acid etching temperature is 15-35 ℃, and the time is 40-60 s (the belt speed is 2-4 m/min).
The invention also provides another BSG removing method for removing the BSG layer on the back surface generated by the boron diffusion of the silicon wafer, which comprises the following steps: changing the BSG layer on the back of the silicon wafer into an XBSG layer by adopting an ion implantation mode; then, performing single-side acid etching (namely back etching) on the back of the silicon wafer in a chain wet method device (such as a chain wet etching device), and removing the XBSG layer on the back of the silicon wafer; x is a group V element; specifically, the method comprises the following steps: the X is selected from one or more of N, P, As, Sb and Bi; hydrofluoric acid is adopted in the acid etching; the mass concentration of HF in the hydrofluoric acid is 1% -3%; the temperature of the acid etching is 15-35 ℃, and the time is 40-60 s (the belt speed is 2-4 m/min).
The method changes the BSG layer on the back of the silicon wafer into the XBSG layer (X is a V-group element, and X can be selected from one or more of N, P, As, Sb and Bi), and then carries out back etching to remove the XBSG layer, so that the concentration of hydrofluoric acid in the back etching can be reduced, the time of the back etching can be reduced, the acid consumption can be reduced, the capacity can be improved, the process window can be optimized, the safety risk can be avoided, and the process route of the TOPCon battery can be effectively optimized.
The specific implementation case of the invention on the n-type TOPCon battery is as follows:
selecting a resistivity range of 0.8-1.5 ohm.cm and a minority carrier lifetime>The thickness of the n-type monocrystalline silicon wafer is 170 mu m, and the size of the n-type monocrystalline silicon wafer is 166 mm; in KOH and H2O2Removing silicon wafer surface from mixed solutionA damage layer of a face; performing texture making in a KOH solution, forming a pyramid texture on the surface of the silicon wafer, and controlling the size of the pyramid texture to be 1-5 mu m; after texturing is finished, preparing an emitter on the front side of the silicon wafer by adopting B diffusion, wherein the square resistance of the emitter is 110-150 ohm.cm, and a BSG layer is formed on the back and front side of the silicon wafer; after the diffusion of the B is finished, selecting PH3 on the BSG layer on the back of the silicon wafer for ion implantation; then, performing chain annealing at the temperature of about 400 ℃ for about 4 min; the BSG layer on the back of the silicon wafer becomes a PBSG layer; then back etching is carried out in chain wet equipment, hydrofluoric acid with the mass concentration of 1% is adopted for back etching, the temperature of back etching is about 25 ℃, and the time is about 1min (the belt speed is about 2.2 m/min); then, performing alkali polishing on the back surface of the silicon wafer (the alkali polishing and the back etching can be implemented in the same chain wet method equipment), so that the reflectivity of the back surface of the silicon wafer is more than 40%; then preparing a tunneling layer (1-2 nm) + a-S (100-150 nm) on the single surface of the back surface (alkali polished surface) of the silicon wafer in LPCVD (low pressure chemical vapor deposition), and then completing the preparation of the TOPCon battery according to a BSL (barium strontium titanate) process. (wherein, a-S is amorphous silicon)
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the technical principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (14)

1. A BSG removal method is characterized in that a BSG layer of a silicon wafer is changed into an XBSG layer, and then the XBSG layer is removed through acid cleaning; x is a group V element.
2. The method of claim 1, wherein the BSG layer is generated by silicon wafer boron diffusion.
3. The method of claim 2, wherein the BSG layer is a BSG layer on a backside of the silicon wafer.
4. The method of claim 1, wherein the BSG layer of the silicon wafer is changed to an XBSG layer by ion implantation.
5. The method of claim 1, wherein the BSG layer of the silicon wafer is changed to an XBSG layer by depositing a dopant containing X on the BSG layer of the silicon wafer and then annealing.
6. The method of claim 5, wherein the deposition is performed by vapor deposition, coating, printing, or transfer printing.
7. The method for removing BSG of claim 5, wherein the dopant containing X is selected from one or more of a compound containing X, a solution containing X, and a solid solution containing X.
8. The method for removing BSG from a substrate of any one of claims 1 to 7, wherein X is selected from one or more of N, P, As, Sb and Bi.
9. The BSG removal method of claim 5, wherein the annealing is performed in a tube furnace or a chain furnace.
10. The method of claim 5, wherein the annealing temperature is 400-800 ℃ and the annealing time is 2-10 min.
11. The method of claim 1, wherein the acid cleaning uses hydrofluoric acid.
12. The method of claim 11, wherein the HF concentration in the hydrofluoric acid is 1-3% by mass.
13. The BSG removal method of claim 1, wherein the acid washing is performed in a chain wet apparatus.
14. The method of claim 1, wherein the pickling is performed at a temperature of 15 to 35 ℃ for 40 to 60 seconds.
CN202210232143.XA 2022-03-10 2022-03-10 BSG removing method Pending CN114583013A (en)

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CN107482078A (en) * 2016-06-02 2017-12-15 上海神舟新能源发展有限公司 Silica-based solar cell p-type surface tunnel oxide passivation contact for producing method
CN110235229A (en) * 2017-01-17 2019-09-13 株式会社电装 Semiconductor device and its manufacturing method
CN111785810A (en) * 2020-07-15 2020-10-16 常州时创能源股份有限公司 Preparation method of N-PERT battery
CN113948608A (en) * 2021-08-31 2022-01-18 浙江正泰太阳能科技有限公司 Method for removing plating-around polycrystalline silicon of N-TOPCon battery

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