CN116799091B - Laminated p-type passivation contact structure based on Poly finger and preparation method thereof - Google Patents
Laminated p-type passivation contact structure based on Poly finger and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
- H01L31/0687—Multiple junction or tandem solar cells
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
- H01L31/0264—Inorganic materials
- H01L31/028—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic System
- H01L31/0288—Inorganic materials including, apart from doping material or other impurities, only elements of Group IV of the Periodic System characterised by the doping material
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
- H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1868—Passivation
Abstract
The invention belongs to the field of solar crystalline silicon cells, and particularly relates to a laminated p-type passivation contact structure based on a Poly finger and a preparation method thereof. According to the invention, the gallium-doped Poly Si layer and the boron-doped Poly Si layer are respectively adopted on the front surface of the battery to be applied to passivation of the bottom layer and contact with finger metal, so that good metal contact can be realized while the passivation effect of Poly Si on the suede is improved, and meanwhile, the passivation and contact requirements are met. On the basis, by forming a patterned mask on the front surface and carrying out back etching treatment, thick Poly is adopted as a finger in a metal shielding region on the front surface of the battery, and thin Poly is adopted in a non-metal shielding region, so that parasitic absorption of the whole Poly on the front surface in the prior art is obviously reduced, and the battery Jsc is maintained. Compared with the prior art, the high boron doping ensures the electrode contact effect and brings higher FF advantages; the photoelectric energy conversion efficiency of the battery is improved.
Description
Technical Field
The invention belongs to the field of solar crystalline silicon cells, and particularly relates to a laminated p-type passivation contact structure based on Polyfinger and a preparation method thereof.
Background
The pursuit of efficient batteries is a development trend in the photovoltaic industry, and the tunneling oxidation passivation contact (TOPCon) technology is an excellent battery passivation technology in the existing schemes with cost and process. Has become the next generation mainstream product following PERC.
In the n-TOPCON battery, a passivation contact layer consisting of an ultrathin tunneling oxide layer and a polycrystalline silicon layer is deposited on the back of the battery, so that the passivation effect on a metal contact area on the back of the battery can be achieved, the recombination of photo-generated carriers of the solar battery in the metal contact area on the back of the battery is reduced, and the performance of the battery is further improved. However, for the existing n-TOPCon battery mass production technology, on one hand, due to the fact that the refractive index of Poly Si is close to that of a crystalline silicon matrix, the application of the Poly Si to the front side can cause serious parasitic absorption problems, on the other hand, due to the fact that the passivation effect of boron-doped Poly Si which can achieve good contact on the suede is not ideal, the passivation effect of gallium-doped Poly Si and the like is good, but metal contact cannot be met, so that the conventional diffusion junction is adopted on the front side only for superposition of a back POLO structure of the existing battery, and the full potential of the structure is not fully exerted.
The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art that is known to a person skilled in the art.
Disclosure of Invention
The first object of the invention is to provide a preparation method of a laminated p-type passivation contact structure based on Polyfinger, wherein the p-type passivation contact structure is applied to the front surface of an n-TOPCon battery, and the Polyfinger is patterned through superposition of multiple layers of differently doped polySi to meet the requirements of passivation, contact and optics at the same time, so that the dark saturation current density (J0, metal) and specific contact resistivity (ρc) of a finger region are reduced, and the open circuit voltage (Voc) and the Fill Factor (FF) can be effectively improved under the condition of meeting the low loss of the short circuit current density (Jsc).
The technical aim of the invention is realized by the following technical scheme:
the preparation method of the laminated p-type passivation contact structure based on the Polyfinger comprises the following operation steps:
s01: double-sided texturing: an N-type monocrystalline silicon wafer is used as a silicon substrate, pyramid suede is formed on the surface of the silicon wafer after pre-cleaning, and the size of the pyramid suede is 1-5 mu m;
in step S01, KOH H is adopted in the groove type machine table 2 O 2 Washing the mixed solution, KOH and H 2 O 2 The volume ratio of the cleaning agent is 1:5-1:2, the pre-cleaning temperature is 65-85 ℃, and the pre-cleaning time is 1.5-4 min; then double-sided texturing is carried out in alkali texturing solution, the texturing temperature is 70-85 ℃, the texturing time is 4-11 min, and the thinning amount is controlled to be 0.4-0.6g.
The alkali texturing solution is KOH/NaOH solution and polishing additive according to the proportion of 5-9: 1 mass ratio and mixing.
S02: preparing a tunneling oxide layer on the front surface: preparing a tunneling oxide layer with the thickness of 1-5 nm on one side of a monocrystalline silicon wafer under the pure oxygen condition with the temperature of 550-750 ℃ and marking the tunneling oxide layer as the front side;
in step S02, forming tunneling ultrathin silicon oxide by using chain type or tubular type high-temperature equipment; the process temperature is 550-750 ℃ and the time is 5-30 min, and the thickness of the formed tunneling ultrathin silicon oxide is 1-5 nm.
S03: deposition of a gallium doped p+ Poly layer: sputtering deposition is carried out on the front surface by adopting a Si target material doped with Ga, wherein the concentration of Ga element in the target material is 1 multiplied by 10 18 ～1×10 20 atom/cm 3 The deposition time is 10-30 s, the temperature is 200-400 ℃, and the 15-60 nm Ga-doped a-Si is formed;
in the step S03, a radio frequency sputtering mode is adopted for deposition, the frequency of a radio frequency power supply is 2 k-10 MHz, and the power is 1-20 kW.
In the invention, the difficulty of preparing the gallium doped p+ Poly layer and the boron doped p++ Poly layer by lamination is mainly that the gallium doping process is difficult to select the conventional gas phase in-situ deposition or gas phase diffusion for thermally decomposing gallium doped gas; wherein, the Si target material doped with Ga is used, which improves the stability and uniformity of sputtering and solves the problem that the gas phase source containing Ga is difficult to select.
The main advantage of selecting Ga to be incorporated into the underlayer is that B-incorporated Poly is small in the activation process due to the B element size (atomic radius 0.95) and is found in SiO 2 The solid solubility in (a) is higher, so that the internal expansion is more serious, the effect of the additional passivation selective structure of the POLO structure is poor, and the Ga element has larger size (atomic radius 1.4) andthe material is close to the P element (the atomic radius is 1.3), the close inward expansion effect can be realized at the same annealing temperature, and meanwhile, a layer of high-concentration boron-doped p++ Poly layer is overlapped to meet the contact; ensure that the front poly structure is arranged on SiO 2 The solid solubility of the metal contact requirement is ensured. The concentration of Ga element affects the passivation effect, and the boron doped p++ Poly layer is matched to realize the high-low section meeting the multi-sub transmission selectivity, and the concentration of B element is 2-4 times of the concentration of Ga element. And is beneficial to the transmission of carriers.
S04: boron doped p++ Poly layer deposition: preparing a tunneling oxide layer with the thickness of 1-5 nm on the surface of Ga-doped a-Si under the pure oxygen condition with the temperature of 550-750 ℃, and then adopting a gaseous precursor SiH 4 And B 2 H 6 Forming a-Si doped with B at 100-200 nm at 500-700 ℃; wherein the concentration of B element is 1X 10 18 ～1×10 20 atom/cm 3 The method comprises the steps of carrying out a first treatment on the surface of the The effect of metal contact is ensured.
In step S04, the preparation process of the tunneling oxide layer includes: forming tunneling ultrathin silicon oxide by using chain type or tubular type high-temperature equipment; the process temperature is 550-750 ℃ and the time is 5-30 min, and the thickness of the formed tunneling ultrathin silicon oxide is 1-5 nm.
More specifically, in tube LPCVD, the silicon oxide deposition temperature is maintained at 550-650 ℃, O 2 The content is 1-3L, the time is 5-30 min, and a layer of silicon oxide with the thickness of 1-5 nm is formed on the surface of the Ga-doped a-Si; then adopts a gaseous precursor SiH 4 And B 2 H 6 Performing in-situ polysilicon deposition, wherein the deposition temperature is 500-700 ℃, and the thickness of the B-doped a-Si is 100-200 nm;
s05: finger structure preparation: forming a patterned mask on the front surface, then performing back etching treatment in an alkali etching solution to remove the a-Si doped with B in the mask-free region, wherein the mask layer and the tunneling layer under the boron-doped a-Si cannot be removed at the moment, and the mask layer and the tunneling layer are required to be left as the back surface to stop alkali etching during the winding plating;
in step S05, a patterned mask is formed on the front surface by printing, depositing or ink-jet, and the patterned mask is alkali-resistant and acid-resistant, specifically, is of SiOx, siNx or other structures. In the alkali etching process, the temperature is 70-85 ℃ and the time is 4-8 min, the etching is carried out until the junction of the boron doped p++ Poly layer and the gallium doped p+ Poly layer is cut off by the tunneling oxide layer, and the gallium doped p+ Poly layer at the bottom layer is protected.
S06: back surface cleaning: cleaning the back surface, removing polysilicon plated around the back surface, and simultaneously completing etching of the back surface alkali polishing morphology;
in the step S06, chain equipment is adopted, HF solution with the concentration of 2-5% is used for cleaning the back surface, KOH solution with the concentration of 2-5% is used for removing polysilicon on the back surface by single-sided coiling plating, and meanwhile etching of the back surface alkali polishing morphology is completed.
S07: and (3) depositing a phosphorus doped n+ Poly layer: preparing a tunneling oxide layer with the thickness of 1-5 nm on the surface of the back under the pure oxygen condition with the temperature of 550-650 ℃, and then forming a-Si doped with P with the thickness of 100-200 nm at the temperature of 500-700 ℃; wherein the concentration of the P element is 1 multiplied by 10 20 ～1×10 21 atom/cm 3 ；
In step S07, the preparation process of the tunneling oxide layer includes: forming tunneling ultrathin silicon oxide by using chain type or tubular type high-temperature equipment; the process temperature is 550-750 ℃ and the time is 5-30 min, and the thickness of the formed tunneling ultrathin silicon oxide is 1-5 nm.
S08: front cleaning: removing polysilicon which is plated around on the front surface, cleaning, and removing the surface mask layer and the tunneling oxide layer on the surface of the mask-free area in HF solution with the concentration of 2-6%;
in the step S08, chain equipment is adopted, KOH solution with the concentration of 2-5% is adopted to remove polysilicon which is wound and plated on the front surface on one side, and then HF solution with the concentration of 2-5% is adopted to clean the front surface.
S09: crystallization and doping activation of the a-Si layer: at N 2 Annealing at 800-1000 deg.c to convert the front laminated a-Si and the back laminated a-Si into Poly Si with doped element to realize substitution activation and with front sheet resistance controlled at 50-100 ohm/cm 3 The sheet resistance at the back is controlled to be 30-70 ohm/cm 3 . According to the invention, the a-Si is firstly arranged, and then the doping element is activated by one-time annealing treatment, so that an extra high-temperature diffusion process flow is omitted.
S10: and (3) passivation layer generation: passivating alumina on the front surface of the monocrystalline silicon piece, wherein the thickness of the alumina is 2-20 nm; and then plating silicon nitride on the front and back of the monocrystalline silicon wafer, wherein the thickness of the silicon nitride is 70-90 nm, and the refractive index is 1.8-2.1.
S11: and (3) screen printing, namely printing a main grid and a fine grid on the front surface and the back surface simultaneously, adopting non-burnt-through silver paste, and completing the manufacturing of a finished product through sintering process temperature of 700-850 ℃.
A second object of the present invention is to provide a Poly finger-based stacked p-type passivation contact structure with the same technical effect.
The technical aim of the invention is realized by the following technical scheme:
a laminated p-type passivation contact structure based on Poly finger is characterized in that an N-type monocrystalline silicon wafer is used as a substrate, a tunneling layer, a gallium doped p+ Poly layer, a tunneling oxide layer, a boron doped p++ Poly formed finger region and an alumina/silicon nitride passivation layer are sequentially arranged on the front surface of the laminated p-type passivation contact structure; the back is a tunneling silicon oxide layer, a phosphorus doped n+ Poly layer and a silicon nitride passivation layer in sequence.
The beneficial effects of the invention are as follows:
1. the invention adopts the double-layer structure of the gallium-doped Poly Si layer and the boron-doped Poly Si layer to replace the boron-doped expansion junction on the front surface of the TOPCO battery, thereby avoiding the situation that the boron-doped Poly Si has small size and is in SiO during the activation process 2 The problem of internal expansion caused by higher solid solubility in the process can realize the close internal expansion effect at the same annealing temperature by utilizing the size of gallium atoms which are larger and close to phosphorus atoms, and avoid the problem of atomic size compared with a single boron-doped Poly Si layer, J 0 Can be reduced by 10 to 15fA/cm 2 The passivation effect of the POLO structure applied to the suede surface is improved, and the front J is optimized 0 The battery Voc is improved.
2. According to the invention, the gallium-doped Poly Si layer and the boron-doped Poly Si layer are respectively adopted on the front surface of the battery to be applied to passivation of the bottom layer and contact with finger metal, so that good metal contact can be realized while the passivation effect of Poly Si on the suede is improved, and meanwhile, the passivation and contact requirements are met. On the basis, by forming a patterned mask on the front surface and carrying out back etching treatment, thick Poly is adopted as a finger in a metal shielding region on the front surface of the battery, and thin Poly is adopted in a non-metal shielding region, so that parasitic absorption of the whole Poly on the front surface in the prior art is obviously reduced, and the battery Jsc is maintained. Compared with the prior art, the high boron doping ensures the electrode contact effect and brings higher FF advantages; the photoelectric energy conversion efficiency of the battery is improved. The structure can effectively improve the efficiency by more than 0.5 percent, and is suitable for mass production.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present invention, and other drawings may be obtained according to the drawings without inventive effort to those skilled in the art.
Fig. 1 is a schematic structural diagram of a stacked p-type passivation contact structure based on Poly finger in embodiment 1 of the present invention;
the reference numerals in fig. 1 are: 1. a base; 2. a tunneling layer; 3. a gallium doped p+ Poly layer; 4. a tunneling layer; 5. boron doped p++ Poly forms finger regions; 6. an aluminum oxide/silicon nitride passivation layer; 7. a tunneling layer; 8. a phosphorus doped n+ Poly layer; 9. a silicon nitride passivation layer;
FIG. 2 is a graph showing elemental distribution of boron doped regions and gallium doped regions in accordance with an embodiment of the present invention;
FIG. 3 is a flow chart of the fabrication of a Poly finger-based stacked p-type passivation contact structure in an embodiment of the invention;
fig. 4 is a schematic structural diagram of a Poly finger-based stacked p-type passivation contact structure in comparative example 1 of the present invention.
The reference numerals in fig. 4 are: 11. a base; 12. a boron p+ diffusion region; 13. a passivation layer; 14. tunneling the silicon oxide layer; 15. a phosphorus doped n+ Poly layer; 16. and a passivation layer.
Detailed Description
In order to further describe the technical means and effects adopted by the invention to achieve the preset aim, the specific implementation, the characteristics and the effects of the laminated p-type passivation contact structure based on the Poly finger provided by the invention are described in detail below.
In the examples of the present invention, commercially available materials were sourced as follows:
example 1
A laminated p-type passivation contact structure based on Poly finger takes an N-type monocrystalline silicon wafer as a substrate 01, a tunneling layer 02, a gallium doped p+ Poly layer 03, a tunneling oxide layer 04 and boron doped p++ Poly to form finger regions 05 and an alumina/silicon nitride passivation layer 06 are sequentially arranged on the front surface of the laminated p-type passivation contact structure; the back is a tunneling silicon oxide layer 07, a phosphorus doped n+ Poly layer 08 and a silicon nitride passivation layer 09 in sequence.
The preparation method of the laminated p-type passivation contact structure based on the Poly finger comprises the following specific preparation steps:
an N-type silicon wafer with high minority carrier lifetime is adopted, the resistivity is 0.8 omega cm, and the minority carrier lifetime is more than 1ms.
S01: double-sided texturing, pre-cleaning in a groove type machine, and performing KOH: H 2 O 2 =1:3, the temperature was maintained at 75 ℃ and the washing was performed for 2min; then, in an alkali texturing solution, KOH/additive=8:1, the temperature is maintained at 80 ℃, and the time is about 7min, so that rapid texturing is performed. The thinning amount is controlled to be about 0.55 g;
s02: preparing a tunneling oxide layer on the front surface, preparing a 2nm tunneling oxide layer on one side of a monocrystalline silicon wafer in a pure oxygen environment with the temperature of 550-750 ℃ in tubular low-pressure annealing equipment, and marking the tunneling oxide layer as the front surface.
S03: gallium doped p+ Poly layer deposition, preparing Ga doped a-Si by radio frequency sputtering, wherein the process temperature is 300 ℃, the frequency is 10MHz, the power is 20kW, the target is Ga doped Si target, and the Ga element concentration in the target is 1 multiplied by 10 18 atom/cm 3 The deposition time is 560s, and the thickness of the film layer is measured by an ellipsometer to be 30-50 nm.
S04: boron doped p++ Poly layer deposition: to LPCVD inPreparing 2nm tunneling ultrathin silicon oxide on the surface of Ga-doped a-Si under the pure oxygen condition of 550-750 ℃ by in-situ Poly deposition, and then adopting a gaseous precursor SiH 4 And B 2 H 6 Forming 100-200 nm at 500-700 deg.C, the element concentration is 4X 10 19 atom/cm 3 a-Si layer doped with B at high concentration.
S05: finger structure preparation: and (3) forming a patterned mask on the surface by adopting a printing mode, and performing back etching treatment in a KOH solution with the concentration of 3% to remove the B-doped a-Si in the mask-free region.
S06: back surface cleaning, namely back surface cleaning, back surface winding plating polysilicon removal, back surface cleaning by using chain equipment through HF with the concentration of 2%, back surface polysilicon removal through KOH with the concentration of 5% on one side, and back surface alkaline polishing morphology etching simultaneously.
S07: and (3) depositing a phosphorus doped n+ Poly layer: the preparation of the tunneling oxide layer and the in-situ P-doped a-Si layer is completed at 550-650 ℃ in the tubular LPCVD (low pressure vapor chemical deposition) of the back surface. The thickness of the tunneling oxide layer is 3nm, and the thickness of the P-doped a-Si is 200nm.
S08: front cleaning: and removing the polysilicon which is plated around the front surface, removing the polysilicon on the front surface by using a chain type device through a KOH single surface with the concentration of 5%, cleaning the front surface by using HF with the concentration of 2%, and removing the surface mask layer and the tunneling oxide layer on the surface of the mask-free area.
S09: crystallization and doping activation of the a-Si layer: at N 2 Annealing at 800-1000 deg.C to convert the front laminated a-Si layer and back a-Si layer into Poly Si, wherein the doped element realizes the substitution activation, and the front sheet resistance is controlled at 100ohm/cm 3 The back sheet resistance was controlled to be 70ohm/cm 3 。
S10: and (3) passivation layer generation: front passivation of alumina is carried out by utilizing an Atomic Layer Deposition (ALD) technology, and the thickness is controlled to be 5nm; and then plating silicon nitride on the front and back surfaces, wherein the thickness is controlled at 85nm, and the refractive index is 1.9.
S11: and (3) screen printing, namely printing a main grid and a fine grid on the front surface and the back surface simultaneously, adopting non-burnt-through silver paste, and completing the manufacturing of a finished product through 800 ℃ sintering process temperature.
Example 2
The preparation method of the laminated p-type passivation contact structure based on the Poly finger comprises the following specific preparation steps:
the resistivity of the semi-N-type silicon wafer is 0.6 to 1.0 ohm cm.
S01: pre-polishing for 200s in a 1.5% KOH tank in a tank type machine table, maintaining the temperature at 70 ℃, and controlling the weight loss of the two sides to be 0.1-0.15 g; then, in an alkaline texturing solution with KOH/additive=7:1, the temperature is maintained at 85 ℃ for about 5 minutes, and rapid texturing is carried out. The thinning amount is controlled to be about 0.3 g;
s02: preparing a tunneling oxide layer on the front surface, preparing the tunneling oxide layer on one side of a monocrystalline silicon wafer at 600-700 ℃ in a tubular low-pressure annealing device under pure oxygen environment, and marking the tunneling oxide layer as the front surface.
S03: gallium doped p+ Poly layer deposition, preparing gallium doped a-Si by radio frequency sputtering, wherein the process temperature is 400 ℃, the frequency is 10MHz, the power is 20kW, the target material is a Ga doped Si target, and the Ga element concentration in the target material is 1 multiplied by 10 20 atom/cm 3 The deposition time is 60s, and the thickness of the film layer is 30-50 nm measured by SIMI.
S04: boron doped p++ Poly layer deposition: performing in-situ Poly deposition in PECVD, and adopting N on the surface of the gallium-doped p+ Poly layer at 450-550 DEG C 2 O is used as a precursor to prepare 2nm tunneling ultrathin silicon oxide, and then a gaseous precursor SiH is adopted 4 And B 2 H 6 Forming 100-200 nm at 400-600 deg.C, the element concentration is 2X 10 20 atom/cm 3 a-Si layer doped with B at high concentration.
S05: finger structure preparation: and (3) forming a patterned mask on the surface by adopting an ink-jet mode, and performing back etching treatment in a KOH/NaOH solution with the concentration of 1% to remove the B-doped a-Si in the maskless area.
S06: back surface cleaning, namely back surface cleaning, back surface winding plating polysilicon removal, back surface cleaning by using chain equipment through HF with the concentration of 2%, back surface polysilicon removal through KOH with the concentration of 5% on one side, and back surface alkaline polishing morphology etching simultaneously.
S07: and (3) depositing a phosphorus doped n+ Poly layer: the preparation of the tunneling oxide layer and the in-situ P-doped a-Si layer is completed at 550-650 ℃ in the tubular LPCVD (low pressure vapor chemical deposition) of the back surface, the thickness of the tunneling oxide layer is 3nm, and the thickness of the P-doped a-Si layer is 200nm.
S08: front cleaning: and removing the polysilicon which is plated around the front surface, removing the polysilicon on the front surface by using a chain type device through a KOH single surface with the concentration of 5%, cleaning the front surface by using HF with the concentration of 2%, and removing the surface mask layer and the tunneling oxide layer on the surface of the mask-free area.
S09: crystallization and doping activation of the a-Si layer: at N 2 Annealing at 800-1000 deg.C to convert the front laminated a-Si layer and back a-Si layer into Poly Si, wherein the doped element realizes the substitution activation, and the front sheet resistance is controlled at 100ohm/cm 3 The back sheet resistance was controlled to be 70ohm/cm 3 。
S10: and (3) passivation layer generation: front passivation of alumina is carried out by utilizing an Atomic Layer Deposition (ALD) technology, and the thickness is controlled to be 5nm; and then plating silicon nitride on the front and back surfaces, wherein the thickness is controlled at 85nm, and the refractive index is 1.9.
S11: and (3) screen printing, namely printing a main grid and a fine grid on the front surface and the back surface simultaneously, adopting non-burnt-through silver paste, and completing the manufacturing of a finished product through 800 ℃ sintering process temperature.
Example 3
The preparation method of the laminated p-type passivation contact structure based on the Poly finger comprises the following specific preparation steps:
1. the high-resistance N-type silicon wafer is adopted, and the resistivity is 3-5 omega cm.
S01: double-sided texturing, pre-cleaning in a groove type machine, and performing KOH: H 2 O 2 =1:3, the temperature was maintained at 75 ℃ and the washing was performed for 2min; then, in an alkali texturing solution, KOH/additive=8:1, the temperature is maintained at 80 ℃, and the time is about 7min, so that rapid texturing is performed. The thinning amount is controlled to be about 0.55 g;
s02: preparing a tunneling oxide layer on the front surface, preparing a 2nm tunneling oxide layer on one side of a monocrystalline silicon wafer in a pure oxygen environment with the temperature of 550-750 ℃ in tubular low-pressure annealing equipment, and marking the tunneling oxide layer as the front surface.
S03: gallium doped p+ Poly layer deposition, preparing Ga doped a-Si by radio frequency sputtering, the process temperature is 300 ℃, the frequency is 10MHz, and the power is 20kW, the target is Si target doped with Ga, and the concentration of Ga element in the target is 1 multiplied by 10 18 atom/cm 3 The deposition time is 50s, and the thickness of the film layer is measured by an ellipsometer to be 30-50 nm.
S04: boron doped p++ Poly layer deposition: with 65% HNO concentration on the surface of the gallium-doped p+ Poly layer 3 The method comprises the steps of preparing silicon oxide with the wavelength of 1-5 nm from a precursor, performing in-situ Poly deposition in PVD equipment at the temperature of 200-400 ℃, the frequency of 2 k-10 MHz, the power of 1-20 kW, and the target material is a Si target doped with B, wherein the concentration of B element in the target material is 1 multiplied by 10 18 atom/cm 3 The deposition time is 40-80 s, and the thickness of the film layer is 30-50 nm measured by ECV.
S05: finger structure preparation: and (3) forming a patterned mask on the surface by adopting a printing mode, and performing back etching treatment in a KOH solution with the concentration of 3-5% to remove the B-doped a-Si in the maskless area.
S06: back surface cleaning, namely back surface cleaning, back surface winding plating polysilicon removal, back surface cleaning by using chain equipment through HF with the concentration of 2%, back surface polysilicon removal through KOH with the concentration of 5% on one side, and back surface alkaline polishing morphology etching simultaneously.
S07: and (3) depositing a phosphorus doped n+ Poly layer: the preparation of the tunneling oxide layer and the in-situ P-doped a-Si layer is completed at 550-650 ℃ in the tubular LPCVD (low pressure vapor chemical deposition) of the back surface. The thickness of the tunneling oxide layer is 3nm, and the thickness of the P-doped a-Si is 200nm.
S08: front cleaning: and removing the polysilicon which is plated around the front surface, removing the polysilicon on the front surface by using a chain type device through a KOH single surface with the concentration of 5%, cleaning the front surface by using HF with the concentration of 2%, and removing the surface mask layer and the tunneling oxide layer on the surface of the mask-free area.
S09: crystallization and doping activation of the a-Si layer: at N 2 Annealing at 900-1000 deg.C to convert the front laminated a-Si layer and back a-Si layer into Poly Si, wherein the doped elements realize substitution activation, and the front sheet resistance is controlled at 100ohm/cm 3 The back sheet resistance is controlled to be 20-90ohm/cm 3 。
S10: and (3) passivation layer generation: front passivation of alumina is carried out by utilizing an Atomic Layer Deposition (ALD) technology, and the thickness is controlled to be 5nm; and then plating silicon nitride on the front and back surfaces, wherein the thickness is controlled at 85nm, and the refractive index is 1.9.
S11: screen printing: and printing a main grid and a fine grid on the front surface and the back surface simultaneously, adopting non-burnt-through silver paste, and completing the manufacturing of a finished product through 800 ℃ sintering process temperature.
Comparative example 1
A TOPCon structure battery, the structure uses N type monocrystalline silicon slice as the basal body 11, the front boron p+ diffusion area 12, the alumina/silicon nitride passivation layer 13; the back surface is sequentially provided with a tunneling silicon oxide layer 14, a phosphorus doped n+ Poly layer 15 and a silicon nitride passivation layer 16.
The preparation method of the TOPCON structure battery comprises the following specific manufacturing steps:
an N-type silicon wafer with high minority carrier lifetime is adopted, the resistivity is 0.8 omega cm, and the minority carrier lifetime is more than 1ms.
S01: double-sided texturing, pre-cleaning in a groove type machine, and performing KOH: H 2 O 2 =1:3, the temperature was maintained at 75 ℃ and the washing was performed for 2min; then, in an alkali texturing solution, KOH/additive=8:1, the temperature is maintained at 80 ℃, and the time is about 7min, so that rapid texturing is performed. The thinning amount is controlled to be about 0.55 g;
s02: front boron p+ diffusion region: in the use of BCl 3 As a precursor, the high-temperature boron expansion preparation is completed under the condition of the temperature of 800-1050 ℃ and the pressure of 90-150 mbar, and the element concentration is formed to be 1 multiplied by 10 19 atom/cm 3 High concentration B-doped a-Si layer with front side sheet resistance controlled at 140ohm/cm 3 。
S03: back surface cleaning, namely, back surface cleaning is carried out, back surface winding borosilicate glass (generated in the step S02) and a back surface winding p+ diffusion region are removed, chain equipment is adopted to carry out back surface cleaning by using HF with the concentration of 2%, KOH with the concentration of 5% is adopted to remove back surface polysilicon on one side, and meanwhile, back surface alkali polishing morphology etching is completed.
S04: and (3) depositing a phosphorus doped n+ Poly layer: the preparation of the tunneling oxide layer and the in-situ P-doped a-Si layer is completed at 550-650 ℃ in the tubular LPCVD (low pressure vapor chemical deposition) of the back surface. The thickness of the tunneling oxide layer is 3nm, and the thickness of the P-doped a-Si is 200nm.
S05: front cleaning: and removing the polysilicon which is plated around the front surface, removing the polysilicon on the front surface by using a chain type device through a KOH single surface with the concentration of 5%, cleaning the front surface by using HF with the concentration of 2%, and removing the surface mask layer and the tunneling oxide layer on the surface of the mask-free area.
S06: crystallization and doping activation of the a-Si layer: at N 2 Annealing at 800-1000 deg.C to convert the back a-Si layer into Poly Si, wherein the doped element realizes the substitution activation, and the back sheet resistance is controlled to 70ohm/cm 3 。
S07: and (3) passivation layer generation: front passivation of alumina is carried out by utilizing an Atomic Layer Deposition (ALD) technology, and the thickness is controlled to be 5nm; and then plating silicon nitride on the front and back surfaces, wherein the thickness is controlled at 85nm, and the refractive index is 1.9.
S08: and (3) screen printing, namely printing a main grid and a fine grid on the front surface and the back surface simultaneously, adopting non-burnt-through silver paste, and completing the manufacturing of a finished product through 800 ℃ sintering process temperature.
Battery performance test results
The blue membrane structural characterization, i.e. the test before electrode preparation, was performed for the examples and comparative examples, and the performance test results are shown in table 1: the data is cell structure blue patch data, which may reflect that the scheme is practicable.
TABLE 1
The battery plate structure of the example is characterized, namely, the test is carried out after the electrode is prepared, and the performance test results are shown in table 2: the data is battery configuration data, which may reflect that the scheme is implementable.
TABLE 2
From the above data, it can be seen that the Poly finger-based stacked p-type passivation contact structure provided by the invention can simultaneously meet the requirements of passivation, contact and optics by stacking and patterning Poly finger through different doped multi-layer Poly Si, and realize dark saturation current density (J) 0e And J 0metal ) And specific contact resistivity (. Rho.) c ) Can be reduced when the short-circuit current density (J) sc ) Effectively improves open circuit voltage (V) under low loss condition oc ) And the Filling Factor (FF) improves the photoelectric energy conversion efficiency of the TOPCON battery, and is beneficial to industrialized popularization.
It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that the above embodiments and descriptions are merely illustrative of the principles of the present invention, and various changes and modifications may be made without departing from the spirit and scope of the invention, which is defined in the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (10)
1. The preparation method of the laminated p-type passivation contact structure based on the Poly finger is characterized by comprising the following operation steps:
s01: double-sided texturing: taking an N-type monocrystalline silicon wafer as a silicon substrate, and forming pyramid texture on the surface of the silicon wafer after pre-cleaning, wherein the size of the pyramid texture is 1-5 mu m;
s02: preparing a tunneling oxide layer on the front surface: preparing a tunneling oxide layer with the thickness of 1-5 nm on one side of the monocrystalline silicon piece under the pure oxygen condition with the temperature of 550-750 ℃ and marking the tunneling oxide layer as the front side;
s03: deposition of a gallium doped p+ Poly layer: sputtering deposition is carried out on the front surface by adopting a Si target material doped with Ga, wherein the concentration of Ga element in the target material is 1 multiplied by 10 18 ~1×10 20 atom/cm 3 The deposition time is 10-30 s, the temperature is 200-400 ℃, and the 15-60 nm Ga-doped a-Si is formed;
s04: boron doped p++ Poly layer deposition: preparing a tunneling oxide layer with the thickness of 1-5 nm on the surface of the Ga-doped a-Si under the pure oxygen condition with the temperature of 550-750 ℃, and then forming a B-doped a-Si with the thickness of 100-200 nm at the temperature of 500-700 ℃; wherein the concentration of B element is 1X 10 18 ~1×10 20 atom/cm 3 ；
S05: finger structure preparation: forming a patterned mask on the front surface, and then performing back etching treatment in an alkali etching solution to remove the B-doped a-Si in the mask-free region;
s06: back surface cleaning: cleaning the back surface, removing polysilicon plated around the back surface, and simultaneously completing etching of the back surface alkali polishing morphology;
s07: and (3) depositing a phosphorus doped n+ Poly layer: preparing a tunneling oxide layer with the thickness of 1-5 nm on the surface of the back under the pure oxygen condition with the temperature of 550-650 ℃, and then forming a-Si doped with P with the thickness of 100-200 nm at the temperature of 500-700 ℃; the concentration of P element is 1X 10 20 ~1×10 21 atom/cm 3 ；
S08: front cleaning: removing polysilicon which is plated around on the front surface, cleaning, and removing the surface mask layer and the tunneling oxide layer on the surface of the mask-free area in an HF solution with the concentration of 2-6%;
s09: crystallization and doping activation of the a-Si layer: at N 2 Annealing at 800-1000 ℃ to convert the front lamination a-Si and the back a-Si into Poly Si, wherein the doping element realizes the substitution activation, and the front sheet resistance is controlled at 50-100 ohm/cm 3 The sheet resistance of the back surface is controlled to be 30-70 ohm/cm 3 ；
S10: and (3) passivation layer generation: passivating aluminum oxide on the front surface of the monocrystalline silicon piece, wherein the thickness of the aluminum oxide is 2-20 nm; plating silicon nitride on the front and back of the monocrystalline silicon piece, wherein the thickness of the silicon nitride is 70-90 nm, and the refractive index is 1.8-2.1;
s11: and (3) screen printing, namely printing a main grid and a fine grid on the front surface and the back surface simultaneously, adopting non-burnt-through silver paste, and completing the manufacturing of a finished product through sintering process temperature of 700-850 ℃.
2. The method of manufacturing a Poly finger-based stacked p-type passivation contact structure according to claim 1, wherein in step S01, KOH/H is used in a slot machine 2 O 2 Washing the mixed solution, wherein the KOH and the H are mixed with the mixed solution 2 O 2 The volume ratio of the cleaning agent is 1:5-1:2, the pre-cleaning temperature is 65-85 ℃, and the pre-cleaning time is 1.5-4 min; and then double-sided texturing is carried out in an alkali texturing solution, the texturing temperature is 70-85 ℃, and the texturing time is 4-11 min.
3. The method for fabricating a Poly finger-based stacked p-type passivation contact structure of claim 1, wherein in step S02, a tunneling ultra-thin silicon oxide is formed using a chained or tubular high temperature device; the process temperature is 550-750 ℃ and the time is 5-30 min, and the thickness of the formed tunneling ultrathin silicon oxide is 1-5 nm.
4. The method for manufacturing the laminated p-type passivation contact structure based on the Poly finger according to claim 1, wherein in the step S03, a radio frequency sputtering mode is adopted for deposition, the radio frequency power supply frequency is 2 k-10 MHz, and the power is 1-20 kW.
5. The method for preparing a Poly finger-based stacked p-type passivation contact structure according to claim 1, wherein in step S04, the preparation process of the tunnel oxide layer is as follows: forming tunneling ultrathin silicon oxide by using chain type or tubular type high-temperature equipment; the process temperature is 550-750 ℃ and the time is 5-30 min, and the thickness of the formed tunneling ultrathin silicon oxide is 1-5 nm.
6. The method for preparing the laminated p-type passivation contact structure based on the Poly finger according to claim 1, wherein in the step S05, a patterned mask is formed on the front surface by adopting a printing, deposition or ink-jet mode, the temperature is 70-85 ℃ and the time is 4-8 min in the alkaline etching process, and the etching is performed until the junction of the boron doped p++ Poly layer and the gallium doped p+ Poly layer is cut off by a tunneling oxide layer.
7. The method for preparing the laminated p-type passivation contact structure based on the Poly finger according to claim 1, wherein in the step S06, chain equipment is adopted, a HF solution with the concentration of 2-5% is used for cleaning the back surface, a KOH solution with the concentration of 2-5% is used for removing polysilicon on the back surface by single-sided plating, and etching of the back surface alkali polishing morphology is completed.
8. The method for preparing a Poly finger-based stacked p-type passivation contact structure according to claim 1, wherein in step S07, the preparation process of the tunnel oxide layer is as follows: forming tunneling ultrathin silicon oxide by using chain type or tubular type high-temperature equipment; the process temperature is 550-750 ℃ and the time is 5-30 min, and the thickness of the formed tunneling ultrathin silicon oxide is 1-5 nm.
9. The method for preparing the Poly finger-based stacked p-type passivation contact structure according to claim 1, wherein in step S08, chain equipment is adopted, 2-5% KOH solution is adopted to remove polysilicon on one side of the front side by wrapping plating, and then 2-5% HF solution is adopted to clean the front side.
10. The laminated p-type passivation contact structure based on the Poly finger is characterized in that the structure takes an N-type monocrystalline silicon wafer as a substrate, a tunneling layer, a gallium doped p+ Poly layer, a tunneling oxide layer and a boron doped p++ Poly are sequentially arranged on the front surface of the structure, so that a finger region and an aluminum oxide/silicon nitride passivation layer are formed; the back is a tunneling silicon oxide layer, a phosphorus doped n+ Poly layer and a silicon nitride passivation layer in sequence.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111509082A (en) * | 2020-03-20 | 2020-08-07 | 中国科学院宁波材料技术与工程研究所 | Preparation method of gallium-doped polycrystalline silicon film and application of gallium-doped polycrystalline silicon film in solar cell |
| CN114628538A (en) * | 2020-11-27 | 2022-06-14 | 福建新峰二维材料科技有限公司 | Preparation method of heterojunction photovoltaic cell with N-type oxygen-doped microcrystalline as window layer |
| WO2022142343A1 (en) * | 2020-12-28 | 2022-07-07 | 东方日升新能源股份有限公司 | Solar cell and preparation method therefor |
| CN115101621A (en) * | 2022-05-24 | 2022-09-23 | 中南大学 | P-topcon battery and preparation method thereof |
| WO2023029059A1 (en) * | 2021-08-31 | 2023-03-09 | 正泰新能科技有限公司 | Method for removing polycrystalline silicon plated on backside of n-topcon battery |
| WO2023077772A1 (en) * | 2021-11-08 | 2023-05-11 | 西安隆基乐叶光伏科技有限公司 | Solar cell and preparation method therefor |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20150114792A (en) * | 2014-04-02 | 2015-10-13 | 한국에너지기술연구원 | Ultra thin hit solar cell and fabricating method for the same |
-
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- 2023-06-16 CN CN202310723906.5A patent/CN116799091B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111509082A (en) * | 2020-03-20 | 2020-08-07 | 中国科学院宁波材料技术与工程研究所 | Preparation method of gallium-doped polycrystalline silicon film and application of gallium-doped polycrystalline silicon film in solar cell |
| CN114628538A (en) * | 2020-11-27 | 2022-06-14 | 福建新峰二维材料科技有限公司 | Preparation method of heterojunction photovoltaic cell with N-type oxygen-doped microcrystalline as window layer |
| WO2022142343A1 (en) * | 2020-12-28 | 2022-07-07 | 东方日升新能源股份有限公司 | Solar cell and preparation method therefor |
| WO2023029059A1 (en) * | 2021-08-31 | 2023-03-09 | 正泰新能科技有限公司 | Method for removing polycrystalline silicon plated on backside of n-topcon battery |
| WO2023077772A1 (en) * | 2021-11-08 | 2023-05-11 | 西安隆基乐叶光伏科技有限公司 | Solar cell and preparation method therefor |
| CN115101621A (en) * | 2022-05-24 | 2022-09-23 | 中南大学 | P-topcon battery and preparation method thereof |
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