CN114583016A - TOPCon battery and preparation method thereof - Google Patents

TOPCon battery and preparation method thereof Download PDF

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CN114583016A
CN114583016A CN202210496541.2A CN202210496541A CN114583016A CN 114583016 A CN114583016 A CN 114583016A CN 202210496541 A CN202210496541 A CN 202210496541A CN 114583016 A CN114583016 A CN 114583016A
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layer
sionx
phosphorus
silicon
temperature
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李红博
余浩
何胜
蔡永梅
单伟
徐伟智
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Chint New Energy Technology Co Ltd
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Abstract

The invention provides a TOPCon battery and a preparation method thereof; the preparation method comprises the following steps: and (3) sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer, and sequentially growing an SiONx tunneling layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer to obtain the TOPCon cell. Compared with the prior art, the preparation method provided by the invention adopts a specific method to grow the SiONx tunneling layer to replace the SiO grown by the traditional thermal oxidation2The tunneling layer is matched with other specific steps to realize better overall interaction, so that the problem of reduction of passivation effect of the TOPCon battery after sintering can be effectively solved, H passivation is improved, battery efficiency is improved, and electricity consumption cost is reduced; meanwhile, the preparation method provided by the invention has the advantages of simple process, low cost, easy realization of operation and high production yield of products.

Description

TOPCon battery and preparation method thereof
Technical Field
The invention relates to the technical field of TOPCon batteries, in particular to a TOPCon battery and a preparation method thereof.
Background
The TOPCon battery is characterized in that an ultrathin tunneling oxide layer (SiOx) with the thickness of 1-2nm is prepared on the back surface of a silicon wafer, then a doped polycrystalline silicon layer with the thickness of 60-160nm is deposited on the SiOx surface, and finally silicon nitride is deposited on the doped polycrystalline silicon layer. The structure provides good surface passivation and field passivation for the back of the silicon chip, and the ultrathin oxide layer can enable electrons to tunnel into the polysilicon layer and simultaneously block the transport of holes, so that the recombination current is reduced. The doped polysilicon layer lateral transfer characteristics reduce the series resistance. The two characteristics improve the open-circuit voltage, the fill factor and the conversion efficiency of the battery together, and the method is a next-generation high-efficiency battery technology which is most likely to realize large-scale mass production.
However, the prior art has the following defects and shortcomings: the passivation effect of the SiOx and doped polysilicon laminated passivation structure grown by the thermal oxidation method is reduced in the sintering process, so that the efficiency is not improved as expected.
Disclosure of Invention
In view of the above, the present invention provides a TOPCon battery and a method for manufacturing the same, which can effectively improve the problem of the reduction of passivation effect of the TOPCon battery after sintering, improve H passivation, improve battery efficiency, and reduce electricity consumption cost.
The invention provides a preparation method of a TOPCon battery, which comprises the following steps:
and (3) sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer, and sequentially growing an SiONx tunneling layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer to obtain the TOPCon cell.
Preferably, the process of growing the sion tunneling layer specifically comprises:
using oxidant and SiH4、NH3Growing a SiONx layer by adopting a PECVD mode at the temperature of 450-650 ℃; the oxidant is N2O; the PECVD is tubular PECVD or plate PECVD.
Preferably, the thickness of the SiONx layer is 1nm to 20 nm.
Preferably, the growth process of the phosphorus-doped polysilicon layer specifically comprises:
a1) depositing an in-situ doped polysilicon layer on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (pulse-deposition layer) mode, and then annealing to obtain a phosphorus-doped polysilicon layer;
or the like, or, alternatively,
a2) firstly, depositing an intrinsic polycrystalline silicon layer on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (plasma enhanced chemical vapor deposition) mode, and then performing high-temperature phosphorus diffusion and annealing to obtain a phosphorus-doped polycrystalline silicon layer.
Preferably, the annealing in the step a 1) adopts a tubular annealing furnace, and the temperature is maintained at 850-950 ℃ for 1000-3000 s for phosphorus activation and crystallization of amorphous silicon.
Preferably, the high-temperature phosphorus diffusion and annealing process in step a 2) specifically comprises the following steps:
introducing POCl at 800-900 ℃ by adopting a tubular diffusion annealing furnace3Flow rate of 500-1500 sccm, O2Carrying out phosphorus source deposition at a flow rate of 500-1000 sccm, a pressure of 100-200 mbar and a time of 800-1200 s; then, the temperature is increased to 830-910 ℃, and when the temperature reaches 890-920 ℃, POCl is introduced for 500-700 s3Flow rate of 500-1500 sccm, O2Carrying out high-temperature deposition and propulsion at the flow rate of 500-1000 sccm and the pressure of 100-2000 mbar; finally, performing cooling oxidation for 1000-1400 s, and performing O2The flow is 1500-2500 sccm, the temperature is reduced from 900 ℃ to 700 ℃, phosphorus diffusion and crystallization of amorphous silicon are completed, and the square resistance of the back is controlled to be 30-45 omega.
Preferably, the thickness of the phosphorus-doped polycrystalline silicon layer is 60 nm-140 nm.
Preferably, the nitrogen silicon layer is a SiNx layer, a SiONx layer or a SiNx-SiONx laminated layer, and the thickness of the nitrogen silicon layer is 60 nm-90 nm.
Preferably, the nitrogen silicon layer is a SiNx-sion x laminated layer, and the growth process of the SiNx-sion x laminated layer specifically comprises the following steps:
depositing a SiNx layer and a SiONx layer by PECVD to form a SiNx-SiONx laminated layer, wherein the SiNx layer or the SiONx layer is based on SiH4、NH3、N2The flow rate ratio of O is made into a gradual change film or a multilayer film, and the refractive index of each layer is gradually reduced from inside to outside.
Preferably, before the growth of the silicon nitride layer, the method further comprises:
after growing the phosphorus-doped polysilicon layer, performing front and edge detour plating and cleaning.
The invention also provides a TOPCon battery which is prepared by the preparation method of the technical scheme.
The invention provides a TOPCon battery and a preparation method thereof; the preparation method comprises the following steps: and (3) sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer, and sequentially growing an SiONx tunneling layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer to obtain the TOPCon cell. Compared with the prior art, the preparation method provided by the invention adopts a specific method to grow the SiONx tunneling layer to replace the SiO grown by the traditional thermal oxidation2The tunneling layer is matched with other specific steps to realize better overall interaction, so that the problem of reduction of passivation effect of the TOPCon battery after sintering can be effectively solved, H passivation is improved, battery efficiency is improved, and electricity consumption cost is reduced; meanwhile, the preparation method provided by the invention has the advantages of simple process, low cost, easy realization of operation and high production yield of products.
Drawings
Fig. 1 is a schematic structural diagram of a TOPCon battery obtained by the preparation method provided by the invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the following embodiments of the present invention, and it should be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a preparation method of a TOPCon battery, which comprises the following steps:
and (3) sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer, and sequentially growing an SiONx tunneling layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer to obtain the TOPCon cell.
The source of the N-type single crystal silicon wafer is not particularly limited in the present invention, and commercially available products known to those skilled in the art may be used.
In the invention, the preferable processes of sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer are as follows:
a) firstly, the N-type monocrystalline silicon piece is firstly processed in a groove body by sequentially adopting NaOH + H2O2+ additive + H2O is used for cleaning silicon wafers, and then NaOH + additive + H is adopted2Performing alkali texturing in an O liquid medicine tank, and adopting O3+HCl+H2Cleaning the O liquid medicine tank, and finally adopting HCl + HF + H2Removing residual metal ions by using O liquid medicine tank bodies, wherein a water tank is arranged in the middle of each tank body, cleaning the liquid medicine left by the silicon wafer passing through the last tank body, and finally drying;
b) b diffusing the front surface of the N-type monocrystalline silicon wafer treated in the step a), and adopting BCl3And N2Heating and depositing at a constant temperature of 810-890 deg.C (initial temperature of 810 deg.C, deposition and heating, and final constant temperature of 890 deg.C), and BCl3The flow is controlled to be 200-400 sccm, and the pressure is controlled to be 100-300 mbar; after deposition, high-temperature propulsion and oxidation are carried out at 1000-1100 ℃, and finally the PN junction depth is controlled to be 0.5-1.5 mu m, and the surface concentration is controlled to be 1.1E +19/cm3~1.3E+19/cm3；
c) Removing BSG on the back surface by adopting a chain mode, adopting a laid water film for protection on the BSG on the front surface, and contacting HF + H on the back surface2Removing BSG on the back surface by O, and controlling the volume concentration of HF acid to be 20-30%;
d) performing back alkali polishing by chain method with KOH + H2The volume ratio of the O + additive is 1: (15-25): (0.1-0.5), carrying out back alkali polishing, wherein the back weight is reduced to 0.1-1 g, and the reflectivity of the back polished is more than 30%.
In the present invention, the process of growing the sion tunneling layer is preferably as follows:
using oxidant and SiH4、NH3Growing a SiONx layer by adopting a PECVD mode at the temperature of 450-650 ℃.
In the present invention, the oxidizing agent is preferably N2O; the PECVD is preferably tubular PECVD or plate PECVD.
The key points of the invention are as follows: the SiONx tunneling layer is grown by adopting a plasma method to replace the SiO grown by the traditional thermal oxidation2A tunneling layer; the structure of the TOPCon battery is already shaped at present, the invention improves from a tunneling material and a growth method, adopts a plasma mode to dope N at a tunneling layer and an interface under the condition that N ions participate, changes the composition of the material, and changes the H component and the content at the tunneling layer and the interface, so that enough H redistribution is carried out to remove the passivation defect in the sintering process, thereby ensuring that the stability of the performance can be kept after sintering, namely improving the sintering stability, simultaneously reducing the preparation temperature of the tunneling layer, being close to the process temperature of the subsequent amorphous silicon deposition, further reducing the process temperature rise and the constant temperature time, and ensuring that the large-scale mass production of the tunneling layer and the amorphous silicon by adopting plasma deposition becomes possible in one process.
In the invention, the thickness of the SiONx layer is preferably 1nm to 20nm, and more preferably 1nm to 2 nm.
In the present invention, the growth process of the phosphorus-doped polysilicon layer is preferably as follows:
a1) depositing an in-situ doped polysilicon layer on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (pulse-deposition layer) mode, and then annealing to obtain a phosphorus-doped polysilicon layer;
or the like, or, alternatively,
a2) firstly, depositing an intrinsic polycrystalline silicon layer on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (plasma enhanced chemical vapor deposition) mode, and then performing high-temperature phosphorus diffusion and annealing to obtain a phosphorus-doped polycrystalline silicon layer.
In a preferred embodiment of the present invention, an in-situ doped polysilicon layer is deposited on the SiONx tunneling layer by LPCVD, PECVD, PVD or PEALD, and then annealed to obtain a phosphorus-doped polysilicon layer; the deposition temperature is preferably 450-650 ℃, and more preferably 500 ℃; the annealing is preferably performed by adopting a tubular annealing furnace, and the temperature is kept at 850-950 ℃ for 1000-3000 s for phosphorus activation and crystallization of amorphous silicon.
In another preferred embodiment of the invention, firstly, an intrinsic polysilicon layer is deposited on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (plasma enhanced chemical vapor deposition) mode, and then a phosphorus-doped polysilicon layer is obtained through high-temperature phosphorus diffusion and annealing; the deposition temperature is preferably 450-650 ℃, and more preferably 600 ℃; the preferable process of the high-temperature phosphorus diffusion and annealing is as follows:
introducing POCl at 800-900 ℃ by adopting a tubular diffusion annealing furnace3Flow rate of 500-1500 sccm, O2Carrying out phosphorus source deposition at a flow rate of 500-1000 sccm, a pressure of 100-200 mbar and a time of 800-1200 s; then, the temperature is increased to 830-910 ℃, and when the temperature reaches 890-920 ℃, POCl is introduced for 500-700 s3Flow rate of 500-1500 sccm, O2Carrying out high-temperature deposition and propulsion at the flow rate of 500-1000 sccm and the pressure of 100-2000 mbar; finally, performing cooling oxidation for 1000-1400 s, and performing O2The flow is 1500-2500 sccm, the temperature is reduced from 900 ℃ to 700 ℃, phosphorus diffusion and crystallization of amorphous silicon are completed, and the back side sheet resistance is controlled to be 30-45 omega.
In the invention, the thickness of the phosphorus-doped polycrystalline silicon layer is preferably 60 nm-140 nm, and more preferably 100 nm-130 nm.
After the growing of the phosphorus-doped polycrystalline silicon layer is completed, before the growing of the nitrogen-silicon layer, the method preferably further comprises:
after growing the phosphorus-doped polycrystalline silicon layer, performing front surface and edge despun and cleaning.
In the invention, the nitrogen silicon layer is preferably a SiNx layer, a SiONx layer or a SiNx-SiONx laminated layer, and the thickness is preferably 60 nm-90 nm.
In a preferred embodiment of the present invention, the silicon nitride layer is a SiNx-SiONx stack; the preferable growth process of the SiNx-SiONx laminated layer is as follows:
depositing a SiNx layer and a SiONx layer by PECVD to form a SiNx-SiONx laminated layer, wherein the SiNx layer or the SiONx layer is based on SiH4、NH3、N2The flow rate proportion of O is made into a gradual change film or a multilayer film, and the refractive index of each layer is gradually reduced from inside to outside; after the final formation of the silicon nitride layer, a TOPCon cell was obtained.
The preparation method provided by the invention adopts a specific method to grow the SiONx tunneling layer to replace the SiO grown by the traditional thermal oxidation2The tunneling layer is matched with other specific stepsThe whole good interaction is realized, the problem that the passivation effect of the TOPCon battery is reduced after sintering can be effectively solved, H passivation is improved, battery efficiency is improved, and electricity consumption cost is reduced; meanwhile, the preparation method provided by the invention has the advantages of simple process, low cost, easy realization of operation and high production yield of products.
The invention also provides a TOPCon battery which is prepared by the preparation method of the technical scheme. The TOPCon battery obtained by adopting the preparation method has the structural schematic diagram shown in figure 1; wherein 1 represents a Si substrate, 2 represents a tunneling SiONx layer (1 to 20 nm), 3 represents Poly-Si (60 to 140 nm), and 4 represents a SiNx/SiONx layer (60 to 90 nm). In the invention, the TOPCon battery comprises a Si substrate, a tunneling SiONx layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer which are compounded in sequence, and preferably consists of the Si substrate, the tunneling SiONx layer, the phosphorus-doped polycrystalline silicon layer and the nitrogen silicon layer which are compounded in sequence to form an integral structure.
The invention provides a TOPCon battery and a preparation method thereof; the preparation method comprises the following steps: and (3) sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer, and sequentially growing an SiONx tunneling layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer to obtain the TOPCon cell. Compared with the prior art, the preparation method provided by the invention adopts a specific method to grow the SiONx tunneling layer to replace the SiO grown by the traditional thermal oxidation2The tunneling layer is matched with other specific steps to realize better overall interaction, so that the problem of reduction of passivation effect of the TOPCon battery after sintering can be effectively solved, H passivation is improved, battery efficiency is improved, and electricity consumption cost is reduced; meanwhile, the preparation method provided by the invention has the advantages of simple process, low cost, easiness in realization of operation and high production yield of products.
To further illustrate the present invention, the following examples are provided for illustration. The additives 1-3 used in the following examples of the present invention are commercially available sources, and mainly include alcohol and surfactants, such as isopropyl alcohol + surfactant + sodium silicate.
Example 1
A. Adopting N-type monocrystalline silicon piece, sequentially adopting NaOH + H in a groove body2O2+H2O is used for cleaning silicon wafers, and then NaOH + additive 1+ H is adopted2Performing alkali texturing in an O liquid medicine tank, and adopting O3+HCl+H2Cleaning the O liquid medicine tank, and finally adopting HCl + HF + H2Removing residual metal ions by using O liquid medicine tank bodies, wherein a water tank is arranged in the middle of each tank body, cleaning the liquid medicine remained by the silicon wafer passing through the last tank body, and finally drying, wherein when the 182-size silicon wafer is adopted, the weight reduction is controlled to be about 0.3 g;
B. performing boron diffusion on the front surface of the N-type monocrystalline silicon wafer by adopting BCl3And N2Heating and depositing at a constant temperature of 810-890 deg.C (initial temperature of 810 deg.C, deposition and heating, and final constant temperature of 890 deg.C), and BCl3The flow is controlled at 300sccm, and the pressure is controlled at 200 mbar; after deposition, high-temperature propulsion and oxidation are carried out at 1050 ℃, the PN junction depth is finally controlled to be 0.8-1.2 mu m, and the surface concentration is controlled to be 1.1E +19/cm3~1.3E+19/cm3；
C. Removing BSG on the back surface by adopting a chain mode, adopting a laid water film for protection on the BSG on the front surface, and contacting HF + H on the back surface2Removing BSG on the back surface by O, and controlling the volume concentration of HF acid to be about 25%;
D. performing back alkali polishing by using chain, and performing KOH + H2The volume ratio of the O + additive 2 is 1: 20: carrying out back alkali polishing according to the proportion of 0.3, wherein the back weight is reduced to about 0.3g, and the reflectivity of the back polished is more than 40%;
E. growing SiONx tunneling layer on the back side by first using N2O and NH3The flow rates of the two gases are respectively 3000sccm and 1000sccm, the power is set to 12000W at 450 ℃ for discharging, and the back surface of the silicon wafer is pretreated, so that part of N atoms are doped on the back surface of the silicon wafer; followed by the use of N2O and SiH4Setting the flow rate to be 4000sccm and 200sccn respectively, setting the power to be 10000w, setting the pressure to be 150mtor, and growing a SiONx tunneling layer with the thickness of 1.5nm on the back surface;
after the deposition of the tunneling layer is finished, depositing a layer of lightly doped amorphous silicon in a natural thermal decomposition mode, controlling the temperature at 500 ℃ and the pressure at 200mtor without switching on a radio frequency power supply, and adopting SiH4And pH3The flow rate ratio is set as8: 1, performing natural thermal decomposition for 200s to grow lightly doped amorphous silicon, wherein the thickness of the film is controlled to be about 15nm, and the film is mainly used for realizing light expansion of lightly doped P atoms on the SiONx tunneling layer during subsequent high-temperature thermal annealing and preventing the damage to the SiONx tunneling layer when a radio frequency power supply is subsequently switched on to deposit subsequent heavily doped amorphous silicon; after the steps are finished, the temperature is controlled to be 500 ℃, the radio frequency power supply is 12000w, the pressure is 200mtor, and SiH is adopted4And pH3The flow ratio is set to 5: 1, performing plasma growth for 800s on heavily doped amorphous silicon, wherein the film thickness is controlled to be about 105nm, and the total thickness of the lightly doped amorphous silicon grown by thermal decomposition and the heavily doped amorphous silicon grown by plasma is controlled to be about 120 nm;
the pretreatment of the back surface, the SiONx tunneling layer with the thickness of 1.5nm, the lightly doped amorphous silicon grown by thermal decomposition with the thickness of 15nm and the heavily doped amorphous silicon layer grown by plasma with the thickness of 105nm are matched with each other, so that the back surface of the battery not only realizes the passivation effect of an energy band bending field under heavy doping, but also realizes the design of rich H, and the battery is prominent in the final sintering process;
F. adopting a tubular annealing furnace, maintaining 1800s at 910 ℃ for phosphorus activation and crystallization of amorphous silicon;
G. removing PSG on the front surface of the battery in a winding manner by adopting a chain manner, wherein the concentration of HF acid contacted with the front surface is about 10%, and the PSG on the back surface adopts H2Protecting an O film;
H. removing the wound-plated polysilicon on the front surface of the battery by using a groove type machine and using KOH + H2The volume ratio of the O + additive 3 is 1: 18: performing front-side polycrystalline silicon unwinding and plating cleaning at the proportion of 0.25; finally, cleaning BPSG/BSG on the front surface of the battery and PSG on the back surface of the battery in a groove body with the HF volume concentration of 13%;
I. TMA and H introduction by ALD2Growing a layer of 3-5nm aluminum oxide on the front surface of the battery when the temperature of O is about 250 ℃;
J. annealing aluminum oxide by adopting a PECVD machine, passivating front silicon nitride and preparing an antireflection layer, annealing the aluminum oxide at 480 ℃ at a constant temperature of 900s before depositing the front silicon nitride in a quartz tube, and utilizing SiH4And NH3Making the first layer of nitriding by two special gasesThe refractive index of silicon is about 2.35, and the thickness of the first layer of silicon nitride film is controlled to be about 10 nm; using SiH on top of the first layer of silicon nitride4And NH3Preparing a second layer of silicon nitride by using the two special gases, wherein the refractive index is about 2.15, and the thickness of the second layer of silicon nitride is controlled to be about 20 nm; using SiH on top of the second layer of silicon nitride4And NH3Preparing a third layer of silicon nitride by using the two special gases, wherein the refractive index is about 2.0, and the thickness of the third layer of silicon nitride is controlled to be about 30 nm; on top of the third layer of silicon nitride, SiH is used4、NH3And N2Depositing a first layer of silicon oxynitride layer by using O three special gases, wherein the refractive index of the silicon oxynitride layer is about 1.8, and the thickness of the silicon oxynitride layer is controlled to be about 10 nm; using SiH on the first silicon oxynitride layer4、NH3And N2Depositing a second layer of silicon oxynitride by using three special gases O, wherein the refractive index of the second layer of silicon oxynitride layer is about 1.6, and the thickness of the silicon oxynitride layer is controlled to be 5 nm;
K. preparing a back silicon nitride layer by using a PECVD machine and using SiH4And NH3Preparing three layers of silicon nitride from the two special gases, wherein the total thickness of the back silicon nitride film is about 80nm, and the refractive index is about 2.1;
l, performing a front-back metallization procedure, printing silver-aluminum paste on the front side of the battery and printing silver paste on the back side of the battery, and sintering;
m, performing light annealing, and performing light injection treatment under the condition of 20 sunlight intensities;
and N, completing the preparation of the cell and testing the electrical property.
Example 2
A. Adopting N-type monocrystalline silicon piece, sequentially adopting NaOH + H in a groove body2O2+H2Cleaning O before feeding into a silicon wafer, and then adopting NaOH + additive 1+ H2Performing alkali texturing in an O liquid medicine tank, and adopting O3+HCl+H2Cleaning the O liquid medicine tank, and finally adopting HCl + HF + H2Removing residual metal ions by using O liquid medicine tank bodies, wherein a water tank is arranged in the middle of each tank body, cleaning the liquid medicine remained by the silicon wafer passing through the last tank body, and finally drying, wherein when the 182-size silicon wafer is adopted, the weight reduction is controlled to be about 0.3 g;
B. to NPerforming boron diffusion on the front surface of the type monocrystalline silicon wafer by adopting BCl3And N2Heating and depositing at a constant temperature of 810-890 deg.C (initial temperature of 810 deg.C, deposition and heating, and final constant temperature of 890 deg.C), and BCl3The flow is controlled at 300sccm, and the pressure is controlled at 200 mbar; after deposition, high-temperature propulsion and oxidation are carried out at 1050 ℃, the PN junction depth is finally controlled to be 0.8-1.2 mu m, and the surface concentration is controlled to be 1.1E +19/cm3~1.3E+19/cm3；
C. Removing BSG on the back surface by adopting a chain mode, adopting a laid water film for protection on the BSG on the front surface, and contacting HF + H on the back surface2Removing BSG on the back surface by O, and controlling the volume concentration of HF acid to be about 25%;
D. performing back alkali polishing by chain method with KOH + H2The volume ratio of the O + additive 2 is 1: 20: carrying out back alkali polishing according to the proportion of 0.3, wherein the back weight is reduced to about 0.3g, and the reflectivity of the back polished is more than 40%;
E. growing SiONx tunneling layer on the back side by first using N2O and NH3The flow rates of the two gases are 3000sccm and 1000sccm respectively, the power is set to 12000W at 450 ℃ for discharging, and the back surface of the silicon wafer is pretreated, so that part of N atoms are doped on the back surface of the silicon wafer; followed by the use of N2O and SiH4Setting the flow rate to be 4000sccm and 200sccn respectively, setting the power to be 10000w, setting the pressure to be 150mtor, and growing a SiONx tunneling layer with the thickness of 1.5nm on the back surface;
after the tunneling layer deposition is finished, depositing a layer of undoped amorphous silicon by adopting an LPCVD (low pressure chemical vapor deposition) mode, controlling the temperature at 600 ℃, controlling the pressure at 300mtor and adopting SiH (SiH)4Growing the amorphous silicon with the flow rate of 1500sccm for 1200s, and controlling the thickness of the undoped amorphous silicon film to be about 120 nm;
F. introducing POCl at 860 deg.C by using tubular diffusion annealing furnace3Flow rate 1350sccm, O2Depositing a phosphorus source at the flow rate of 600sccm, the pressure of 150mbar and the time of 1000 s; subsequently, the temperature is increased by 830-910 ℃ and then 600s of POCl is introduced when the temperature reaches 910 DEG C3Flow rate 1000sccm, O2Carrying out high-temperature deposition and propulsion at the flow rate of 500sccm and the pressure of 150 mbar; finally, the temperature reduction and oxidation are carried out for 1200s, O2Flow 2500sccm, temperature decrease from 900 deg.C toCompleting phosphorus diffusion and crystallization of amorphous silicon at about 700 ℃, and controlling the back side sheet resistance to be about 40 omega;
G. removing PSG on the front surface of the battery in a winding manner by adopting a chain manner, wherein the concentration of HF acid contacting the front surface is about 10%, and the PSG on the back surface adopts H2Protecting an O film;
H. removing the wound-plated polysilicon on the front surface of the battery by using a groove type machine and using KOH + H2The volume ratio of the O + additive 3 is 1: 18: performing front-side polycrystalline silicon unwinding and plating cleaning at the proportion of 0.25; finally, cleaning BPSG/BSG on the front surface of the battery and PSG on the back surface of the battery in a groove body with the HF volume concentration of 13%;
I. introduction of TMA and H by ALD2Growing a layer of 3-5nm aluminum oxide on the front surface of the battery when the temperature of O is about 250 ℃;
J. annealing aluminum oxide by adopting a PECVD machine, passivating front silicon nitride and preparing an antireflection layer, annealing the aluminum oxide at 480 ℃ at a constant temperature of 900s before depositing the front silicon nitride in a quartz tube, and utilizing SiH4And NH3Preparing a first layer of silicon nitride by using two special gases, wherein the refractive index is about 2.35, and the thickness of the first layer of silicon nitride is controlled to be about 10 nm; using SiH on top of the first layer of silicon nitride4And NH3Preparing a second layer of silicon nitride from the two special gases, wherein the refractive index is about 2.15, and the thickness of the second layer of silicon nitride is controlled to be about 20 nm; using SiH on top of the second layer of silicon nitride4And NH3Preparing a third layer of silicon nitride by using the two special gases, wherein the refractive index is about 2.0, and the thickness of the third layer of silicon nitride is controlled to be about 30 nm; on top of the third layer of silicon nitride, SiH is used4、NH3And N2Depositing a first layer of silicon oxynitride layer by using O three special gases, wherein the refractive index of the silicon oxynitride layer is about 1.8, and the thickness of the silicon oxynitride layer is controlled to be about 10 nm; using SiH on the first silicon oxynitride layer4、NH3And N2Depositing a second layer of silicon oxynitride by using three special gases O, wherein the refractive index of the second layer of silicon oxynitride layer is about 1.6, and the thickness of the silicon oxynitride layer is controlled to be 5 nm;
K. preparing a back silicon nitride layer by using a PECVD machine and using SiH4And NH3Preparation of three-layer silicon nitride from two special gasesThe total film thickness of the back silicon nitride is about 80nm, and the refractive index is about 2.1;
l, performing a front-back metallization procedure, printing silver-aluminum paste on the front side of the battery and printing silver paste on the back side of the battery, and sintering;
m, performing light annealing, and performing light injection treatment under the condition of 20 sunlight intensities;
and N, completing the preparation of the cell and testing the electrical property.
Comparative example
A. Adopting N-type monocrystalline silicon piece, sequentially adopting NaOH + H in a groove body2O2+H2Cleaning O before entering a silicon wafer, and then adopting NaOH + additive 1+ H2Performing alkali texturing in an O liquid medicine tank, and adopting O3+HCl+H2Cleaning the O liquid medicine tank, and finally adopting HCl + HF + H2Removing residual metal ions by using O liquid medicine tank bodies, wherein a water tank is arranged in the middle of each tank body, cleaning the liquid medicine remained by the silicon wafer passing through the last tank body, and finally drying, wherein when the 182-size silicon wafer is adopted, the weight reduction is controlled to be about 0.3 g;
B. performing boron diffusion on the front surface of the N-type monocrystalline silicon wafer by adopting BCl3And N2Heating and depositing at a constant temperature of 810-890 deg.C (initial temperature of 810 deg.C, deposition and heating, and final constant temperature of 890 deg.C), and BCl3The flow is controlled at 300sccm, and the pressure is controlled at 200 mbar; after deposition, high-temperature propulsion and oxidation are carried out at 1050 ℃, the PN junction depth is finally controlled to be 0.8-1.2 mu m, and the surface concentration is controlled to be 1.1E +19/cm3~1.3E+19/cm3；
C. Removing BSG on the back surface by adopting a chain mode, adopting a laid water film for protection on the BSG on the front surface, and contacting HF + H on the back surface2Removing BSG on the back surface by O, and controlling the volume concentration of HF acid to be about 25%;
D. performing back alkali polishing by chain method with KOH + H2The volume ratio of the O + additive 2 is 1: 20: carrying out back alkali polishing according to the proportion of 0.3, wherein the back weight is reduced to about 0.3g, and the reflectivity of the back polished is more than 40%;
E. (1) growing SiOx tunneling layer on the back surface, oxidizing at 600 deg.C for 800s with oxygen flow of 30slm under 101kpa by LPCVD, and growing 1.3n on the back surfacem tunneling silicon oxide layer; (2) after the tunneling layer deposition is finished, depositing a layer of undoped amorphous silicon by adopting an LPCVD (low pressure chemical vapor deposition) mode, controlling the temperature at 600 ℃, controlling the pressure at 400mtor and adopting SiH (SiH)4Growing the amorphous silicon with the flow of 2000sccm for 800s, and controlling the thickness of the undoped amorphous silicon film to be about 115 nm;
F. introducing POCl at 860 deg.C by using tubular diffusion annealing furnace3Flow rate 1200sccm, O2Depositing a phosphorus source at the flow rate of 600sccm, the pressure of 150mbar and the time of 1000 s; subsequently, the temperature is increased by 830-890 ℃ and pushed, and 500s of POCl is introduced when the temperature reaches 890 DEG C3Flow rate of 800sccm, O2Carrying out high-temperature deposition and propulsion at the flow rate of 500sccm and the pressure of 150 mbar; finally, the temperature reduction and oxidation are carried out for 1200s, O2The flow is 2500sccm, the temperature is reduced from 890 ℃ to about 700 ℃, the phosphorus diffusion and the crystallization of amorphous silicon are completed, and the back side sheet resistance is controlled to about 46 omega;
G. removing PSG on the front surface of the battery in a winding manner by adopting a chain manner, wherein the concentration of HF acid contacting the front surface is about 10%, and the PSG on the back surface adopts H2Protecting an O film;
H. removing the wound-plated polysilicon on the front surface of the battery by using a groove type machine and using KOH + H2The volume ratio of the O + additive 3 is 1: 18: performing front-side polycrystalline silicon unwinding and plating cleaning at the proportion of 0.25; finally, cleaning BPSG/BSG on the front surface of the battery and PSG on the back surface of the battery in a groove body with the volume concentration of HF of 13%;
J. TMA and H introduction by ALD2Growing a layer of 3-5nm aluminum oxide on the front surface of the battery when the temperature of O is about 250 ℃;
K. annealing aluminum oxide by adopting a PECVD machine, passivating front silicon nitride and preparing an antireflection layer, annealing the aluminum oxide at 480 ℃ at a constant temperature of 900s before depositing the front silicon nitride in a quartz tube, and utilizing SiH4And NH3Preparing a first layer of silicon nitride by using two special gases, wherein the refractive index is about 2.35, and the thickness of the first layer of silicon nitride is controlled to be about 10 nm; using SiH on top of the first layer of silicon nitride4And NH3Preparing a second layer of silicon nitride by using the two special gases, wherein the refractive index is about 2.15, and the thickness of the second layer of silicon nitride is controlled to be about 20 nm; on the second layer of silicon nitrideSurface, using SiH4And NH3Preparing a third layer of silicon nitride by using the two special gases, wherein the refractive index is about 2.0, and the thickness of the third layer of silicon nitride is controlled to be about 30 nm; on top of the third layer of silicon nitride, SiH is used4、NH3And N2Depositing a first layer of silicon oxynitride layer by using O three special gases, wherein the refractive index of the silicon oxynitride layer is about 1.8, and the thickness of the silicon oxynitride layer is controlled to be about 10 nm; using SiH on the first silicon oxynitride layer4、NH3And N2Depositing a second layer of silicon oxynitride by using three special gases O, wherein the refractive index of the second layer of silicon oxynitride layer is about 1.6, and the thickness of the silicon oxynitride layer is controlled to be 5 nm;
l, preparing a back silicon nitride layer by using a PECVD machine and utilizing SiH4And NH3Preparing three layers of silicon nitride from the two special gases, wherein the total thickness of the back silicon nitride film is about 80nm, and the refractive index is about 2.1;
m, performing a front-back metallization procedure, printing silver-aluminum paste on the front side of the battery and printing silver paste on the back side of the battery, and sintering;
n, performing photo-annealing, and performing light injection treatment under the condition of 20 sunlight intensities;
and O, finishing the preparation of the cell and testing the electrical property.
And (3) performance testing: the semi-finished products with the same symmetrical structure on the front surface and the back surface are subjected to minority carrier lifetime verification before and after sintering, and the TOPCon battery is tested for various performances, and the results are shown in the following table:
Figure 898449DEST_PATH_IMAGE001
as can be seen from the data in the table, the preparation methods provided in embodiments 1 to 2 of the present invention show excellent levels in minority carrier lifetime before and after sintering, can solve the problem that the passivation effect of the existing TOPCon back passivation structure is reduced after sintering, and simultaneously reduces the manufacturing difficulty and cost caused by the high temperature of the tunnel oxide layer grown by the thermal oxidation method, and the prepared TOPCon cell FF, open-circuit voltage and short-circuit current all reach good levels, and are suitable for application to Top cells, POLO-IBC cells and composite cell structures including the TOPCon back cell structure.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (11)

1. A preparation method of a TOPCon battery comprises the following steps:
and (3) sequentially performing texturing, boron diffusion, back surface removing and winding plating and back surface polishing on the N-type monocrystalline silicon wafer, and sequentially growing an SiONx tunneling layer, a phosphorus-doped polycrystalline silicon layer and a nitrogen silicon layer to obtain the TOPCon cell.
2. The method according to claim 1, wherein the growing of the SiONx tunneling layer comprises:
using oxidant and SiH4、NH3Growing a SiONx layer by adopting a PECVD mode at the temperature of 450-650 ℃; the oxidant is N2O; the PECVD is tubular PECVD or plate PECVD.
3. The method according to claim 2, wherein the SiONx layer has a thickness of 1nm to 20 nm.
4. The method according to claim 1, wherein the growth process of the phosphorus-doped polysilicon layer is specifically as follows:
a1) depositing an in-situ doped polysilicon layer on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (pulse-deposition layer) mode, and then annealing to obtain a phosphorus-doped polysilicon layer;
or the like, or, alternatively,
a2) firstly, depositing an intrinsic polycrystalline silicon layer on the SiONx tunneling layer by adopting an LPCVD (low pressure chemical vapor deposition), PECVD (plasma enhanced chemical vapor deposition), PVD (physical vapor deposition) or PEALD (plasma enhanced chemical vapor deposition) mode, and then performing high-temperature phosphorus diffusion and annealing to obtain a phosphorus-doped polycrystalline silicon layer.
5. The preparation method of claim 4, wherein the annealing in the step a 1) is performed by using a tubular annealing furnace, and the temperature is maintained at 850-950 ℃ for 1000-3000 s for phosphorus activation and crystallization of amorphous silicon.
6. The preparation method according to claim 4, characterized in that the high-temperature phosphorus diffusion and annealing process in step a 2) is specifically as follows:
introducing POCl at 800-900 ℃ by adopting a tubular diffusion annealing furnace3Flow rate of 500-1500 sccm, O2Carrying out phosphorus source deposition at a flow rate of 500-1000 sccm, a pressure of 100-200 mbar and a time of 800-1200 s; then, the temperature is increased to 830-910 ℃, and when the temperature reaches 890-920 ℃, POCl is introduced for 500-700 s3Flow rate of 500-1500 sccm, O2Carrying out high-temperature deposition and propulsion at the flow rate of 500-1000 sccm and the pressure of 100-2000 mbar; finally, performing cooling oxidation for 1000-1400 s, and performing O2The flow is 1500-2500 sccm, the temperature is reduced from 900 ℃ to 700 ℃, phosphorus diffusion and crystallization of amorphous silicon are completed, and the back side sheet resistance is controlled to be 30-45 omega.
7. The method according to claim 1, wherein the phosphorus-doped polysilicon layer has a thickness of 60nm to 140 nm.
8. The method according to claim 1, wherein the nitrogen-silicon layer is a SiNx layer, a SiONx layer, or a SiNx-SiONx stack layer, and has a thickness of 60nm to 90 nm.
9. The method according to claim 8, wherein the silicon nitride layer is a SiNx-sion x stack, and the SiNx-sion x stack is grown by a process specifically including:
depositing a SiNx layer and a SiONx layer by PECVD to form a SiNx-SiONx laminated layer, wherein the SiNx layer or the SiONx layer is based on SiH4、NH3、N2Preparing a graded film or a multilayer film with a flow rate ratio of O, each layer having a refractive indexDecreasing from inside to outside.
10. The method according to any one of claims 1 to 9, wherein before the growth of the silicon nitride layer, the method further comprises:
after growing the phosphorus-doped polysilicon layer, performing front and edge detour plating and cleaning.
11. A TOPCon battery produced by the production method according to any one of claims 1 to 9.
CN202210496541.2A 2022-05-09 2022-05-09 TOPCon battery and preparation method thereof Pending CN114583016A (en)

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