WO2023016061A1 - 金属箔、线路板及线路板的制备方法 - Google Patents

金属箔、线路板及线路板的制备方法 Download PDF

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Publication number
WO2023016061A1
WO2023016061A1 PCT/CN2022/095914 CN2022095914W WO2023016061A1 WO 2023016061 A1 WO2023016061 A1 WO 2023016061A1 CN 2022095914 W CN2022095914 W CN 2022095914W WO 2023016061 A1 WO2023016061 A1 WO 2023016061A1
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Prior art keywords
layer
conductive
circuit board
metal foil
conductive layer
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PCT/CN2022/095914
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English (en)
French (fr)
Inventor
张美娟
朱宇华
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广州方邦电子股份有限公司
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Publication of WO2023016061A1 publication Critical patent/WO2023016061A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process

Definitions

  • the invention relates to the technical field of metal foil, in particular to a metal foil, a circuit board and a method for preparing the circuit board.
  • Embedded circuit board refers to a circuit board in which conductive circuits are embedded in the circuit board substrate.
  • the surface of the conductive line is flat and the conductive line is basically flush with the surface of the substrate or slightly protrudes from the surface of the substrate, so as to ensure that the conductive line can be reliably connected with other components.
  • Contact so that the signal can be stably transmitted.
  • the height difference between the surface of the conductive circuit and the surface of the substrate needs to be controlled within a certain range.
  • the main process flow of the existing circuit board preparation is as follows:
  • the metal foil includes a carrier layer and a conductive layer that are laminated.
  • the conductive circuit is recessed in the substrate by more than 0.5 micron in the height direction. This makes it difficult to realize the process of step (6), such as making the conductive circuit flush with the substrate or protruding from the substrate by gold plating or nickel plating. At least the current technology is difficult to do surface treatment based on such a high height difference so that the conductive lines after surface treatment are flush with the substrate or protrude from the substrate. At the same time, the conductive lines recessed in the substrate will also significantly increase the cost of raw materials and processing for surface treatment.
  • the degree of overetching of the conductive lines and the substrate will be inconsistent, and the roughness of the conductive lines and the substrate will be relatively large. gap. This makes the resulting circuit board unable to meet the requirements of products with high dimensional accuracy requirements.
  • the purpose of the embodiments of the present invention is to provide a metal foil, a circuit board and a method for preparing a circuit board.
  • the surface of the conductive circuit is basically flush with the surface of the substrate after the carrier layer is removed, and the surface of the conductive circuit is rough. The degree is small, which can meet the demand of products with high dimensional accuracy requirements.
  • an embodiment of the present invention provides a metal foil, which includes a conductive layer and a carrying layer, and the conductive layer is stacked with the carrying layer; wherein, the conductive layer is used to make a conductive circuit, and in the When the metal foil is used to prepare a circuit board, the carrying layer is separated from the conductive layer by the first etching solution, the conductive layer has corrosion resistance to the first etching solution, and the carrying layer is close to the conductive layer
  • the roughness Rz of one side is less than or equal to 2 micrometers.
  • the roughness Rz of the side of the carrying layer close to the conductive layer is less than or equal to 1 micron.
  • the bearing layer includes a transition layer, and the transition layer is stacked with the conductive layer.
  • the transition layer is etched by the first etching solution, so that The bearing layer is separated from the conductive layer.
  • the transition layer has corrosion resistance to the second etching solution, wherein the second etching solution is an etching solution capable of etching the conductive layer.
  • the conductive layer is a copper layer
  • the transition layer contains at least one of nickel, chromium, manganese, iron, and cobalt.
  • the thickness of the bearing layer is 8-105 microns.
  • the bearing layer further includes a carrier layer, and the transition layer is arranged between the carrier layer and the conductive layer.
  • the material of the carrier layer is selected from at least one of metal and non-metal.
  • the carrier layer is removed in a non-peeling manner.
  • the carrier layer is removed by peeling off.
  • the material of the transition layer is corrosion-resistant to a third etching solution, wherein when the metal foil is used to prepare a circuit board, the carrier layer is etched by the third etching solution.
  • the bearing layer further includes a peeling layer, and the peeling layer is arranged between the carrier layer and the transition layer.
  • the sum of the thicknesses of the conductive layer and the transition layer is greater than or equal to 0.2 microns.
  • an embodiment of the present invention also provides a circuit board, which is made of a substrate and the metal foil.
  • an embodiment of the present invention also provides a method for preparing a circuit board, using the metal foil to prepare a circuit board, and the method for preparing a circuit board includes:
  • the carrier layer is removed.
  • the conducting circuit fabrication of the conductive layer to obtain a conductive circuit specifically includes:
  • the masking pattern is removed to obtain conductive lines.
  • the conducting circuit fabrication of the conductive layer to obtain a conductive circuit specifically includes:
  • Rapid etching is performed using the second etchant to remove the unthickened area of the conductive layer to obtain a conductive line.
  • the conductive layer before performing the film sticking, exposure and development operations on the conductive layer to obtain the masking pattern, it also includes:
  • the conductive layer is thinned.
  • the circuit board is used to prepare a multilayer circuit board.
  • an embodiment of the present invention provides a multilayer circuit board, the multilayer circuit board comprising the circuit board and/or the circuit board prepared by using the method for preparing the circuit board.
  • an embodiment of the present invention provides a method for preparing a multilayer circuit board, including the method for preparing the circuit board.
  • the beneficial effect of the embodiment of the present invention is that: the embodiment of the present invention provides a metal foil, which includes a conductive layer and a carrying layer, and the conductive layer and the carrying layer are stacked; wherein, the The conductive layer is used to make a conductive circuit.
  • the metal foil is used to prepare a circuit board, the carrying layer is separated from the conductive layer by a first etching solution, and the conductive layer has corrosion resistance to the first etching solution.
  • the roughness Rz of the side of the carrying layer close to the conductive layer is less than or equal to 2 microns.
  • the roughness of the side of the carrying layer close to the conductive layer is less than or equal to 2 microns, which makes the side of the conductive layer close to the carrying layer also have a smaller roughness.
  • the first etching solution separates the carrying layer from the conductive layer, because the conductive layer has corrosion resistance to the first etching solution, which makes it difficult to use the first etching solution.
  • the surface of the final conductive circuit can basically maintain the small surface roughness of the original conductive layer, and obtain a conductive circuit with a flat surface.
  • the surface is basically flush with the surface of the substrate, so that it is convenient to control the height difference between the surface of the conductive circuit and the surface of the substrate, thereby meeting the demand for products with high dimensional accuracy requirements.
  • the embodiments of the present invention also correspondingly provide a circuit board and a method for preparing the circuit board.
  • Fig. 1 is a structural schematic diagram of the surface of the conductive circuit being sunken on the surface of the substrate when the circuit board is prepared by using the existing peelable metal foil;
  • Fig. 2 is a structural schematic diagram of a circuit board prepared by using an existing peelable metal foil
  • Fig. 3 is a schematic structural view of a metal foil according to Embodiment 1 of the present invention.
  • FIG. 4 is a schematic structural view of a circuit board according to Embodiment 1 of the present invention.
  • FIG. 5 is a schematic structural view of a circuit board with a surface-treated conductive circuit according to Embodiment 1 of the present invention.
  • FIG. 6 is a schematic structural view of a metal foil comprising a carrier layer, a transition layer and a conductive layer according to Embodiment 2 of the present invention
  • FIG. 7 is a schematic structural view of a metal foil comprising a carrier layer, a peeling layer, a transition layer and a conductive layer according to Embodiment 2 of the present invention
  • FIG. 8 is a flowchart of a method for preparing a circuit board provided in Embodiment 1 of the present invention.
  • FIG. 9 is a flow chart of the first implementation of step S101 of the method for preparing a circuit board provided in Example 1 of the present invention.
  • FIG. 10 is a flow chart of a second implementation of step S101 of the method for preparing a circuit board provided in Example 1 of the present invention.
  • Conductive circuit 20. Substrate; 1. Conductive layer; 2. Transition layer; 3. Carrier layer; 4. Peeling layer; 11. Conductive circuit; 5. Substrate.
  • the metal foil according to the embodiment of the present invention includes a conductive layer 1 and a carrying layer, and the conductive layer 1 is stacked with the carrying layer; wherein, the conductive layer 1 is used to make a conductive circuit, and the
  • the carrying layer is separated from the conductive layer 1 by the first etching solution, the conductive layer 1 has corrosion resistance to the first etching solution, and the carrying layer is close to the The roughness Rz of one side of the conductive layer is less than or equal to 2 micrometers.
  • the metal foil includes a conductive layer 1 and a carrying layer, and the conductive layer 1 is stacked with the carrying layer; wherein, the conductive layer 1 is used to make a conductive circuit, and the circuit is prepared on the metal foil plate, the carrier layer is separated from the conductive layer 1 by the first etchant, the conductive layer 1 has corrosion resistance to the first etchant, and the roughness of the carrier layer near the conductive layer is Degree Rz is less than or equal to 2 microns.
  • the roughness of the side of the carrying layer close to the conductive layer is less than or equal to 2 microns, which makes the side of the conductive layer close to the carrying layer also have a smaller roughness.
  • the first etching solution separates the carrying layer from the conductive layer 1, because the conductive layer has corrosion resistance to the first etching solution, which makes it possible to use the first etching solution.
  • the surface of the final conductive circuit can basically maintain the small surface roughness of the original conductive layer, and a conductive circuit with a flat surface can be obtained.
  • the surface of the circuit is substantially flush with the surface of the substrate, so that it is convenient to control the height difference between the surface of the conductive circuit and the surface of the substrate, thereby meeting the demand for products with high dimensional accuracy requirements.
  • the corrosion resistance of the conductive layer 1 to the first etching solution means that the conductive layer 1 will not be or is difficult to be corroded by the first etching solution, or the etching speed is relatively slow. Since the conductive layer 1 has corrosion resistance to the first etchant, when the metal foil is used to prepare a circuit board, if the carrier layer is separated from the conductive layer 1 by the first etchant, the The conductive layer 1 will not be corroded or difficult to be corroded by the first etching solution, or the etching speed is relatively slow. In the embodiment of the present invention, an appropriate etching solution can be selected to ensure that the carrying layer is completely etched by the first etching solution.
  • the first etchant When separated from the conductive layer 1 , the first etchant causes the surface of the conductive circuit to be recessed from the substrate to a depth less than or equal to 0.5 microns. It should be noted that, the specific type of the first etching solution is not particularly limited, and those skilled in the art can select according to actual needs, as long as the above functions can be realized.
  • the roughness Rz of the side of the carrying layer close to the conductive layer is less than or equal to 2 microns, such as less than or equal to 2 microns, 1.5 microns, 1 micron, 0.5 microns, 0.2 microns, 0.1 microns, etc. , preferably less than or equal to 1 micron.
  • the roughness of the side of the carrying layer close to the conductive layer is also basically within the above range, that is, the side of the conductive layer close to the carrying layer is relatively flat, while the conductive layer in the embodiment of the present invention
  • the first etchant for etching and separating the carrying layer and the conductive layer has corrosion resistance, so that after the carrying layer is separated, the side of the conductive layer close to the carrying layer is less affected by the first etching solution, so that the surface of the finally formed conductive circuit remains basically the same.
  • the surface roughness of the side of the conductive layer close to the bearing layer, that is, the surface of the conductive circuit is relatively flat.
  • the carrying layer includes a transition layer 2, the transition layer 2 is stacked with the conductive layer 1, and when the metal foil is used to prepare a circuit board, the first etching solution is used to etch the The transition layer 2 is used to separate the bearing layer from the conductive layer 1 .
  • the transition layer 2 is etched by the first etchant to remove the transition layer 2, thereby separating the bearing layer from the conductive layer 1, and the conductive layer 1 is opposite to the
  • the first etchant has corrosion resistance, that is, the first etchant will not or it is difficult to etch the conductive layer 1 , or the etching speed is relatively slow.
  • the thickness of the transition layer 2 can be set relatively small, for example, if the carrier layer 3 is set on the side of the transition layer 2 away from the conductive layer 1, the carrier layer can 3 provides support for the conductive layer 1, so the thickness of the transition layer 2 can be set relatively small, of course, at this time, the thickness of the transition layer 2 can also be set relatively large to further provide support for the conductive layer 1. Therefore, the specific thickness of the transition layer 2 can be set according to actual use requirements, and no more details are given here.
  • the transition layer 2 has corrosion resistance to a second etching solution, wherein the second etching solution is an etching solution capable of etching the conductive layer 1 .
  • the corrosion resistance of the transition layer 2 to the second etching solution means that the transition layer 2 will not or is difficult to be corroded by the second etching solution, or the etching speed is relatively slow. Since the transition layer 2 has corrosion resistance to the second etching solution, when the metal foil is used to prepare a wiring board, the transition layer 2 will not or is difficult to etch the conductive layer 1 during the process of etching the conductive layer 1. Corroded by the second etching solution, or the etching speed is relatively slow. It should be noted that the specific type of the second etching solution is not particularly limited, and those skilled in the art can select according to actual needs, as long as the above functions can be realized.
  • the conductive layer 1 is a copper layer
  • the transition layer 2 contains at least one of nickel, chromium, manganese, iron, and cobalt, such as nickel-chromium alloy, nickel-phosphorus alloy and at least one of nickel metal.
  • the conductive layer 1 is a copper layer, which is mainly composed of copper
  • the transition layer 2 contains at least one of nickel, chromium, manganese, iron, and cobalt elements, and nickel-chromium alloy, nickel Phosphorus alloy and nickel metal are examples, for example, it is mainly composed of nickel-chromium alloy, nickel-phosphorus alloy or nickel metal, or it can be mainly composed of any two or more materials in nickel-chromium alloy, nickel-phosphorus alloy and nickel metal , can also be mainly composed of at least one material among nickel-chromium alloy, nickel-phosphorus alloy and nickel metal mixed with other materials.
  • the transition layer 2 is a single-layer or multi-layer structure.
  • the transition layer 2 is a multi-layer structure, for example, it can be composed of a layer of nickel metal and a layer of nickel-chromium alloy laminated, or a layer of nickel metal and a layer of nickel-chromium alloy. A layer of nickel-phosphorus alloy is stacked, or a layer of nickel-phosphorus alloy and a layer of nickel-chromium alloy are stacked. It should be noted that, in actual production, the conductive layer 1 and the transition layer 2 may be accidentally mixed with other impurities. When the conductive layer 1 and the transition layer 2 are accidentally mixed with impurities, the within the protection scope of the present invention.
  • the conductive layer 1 in the present invention is not limited to a copper layer
  • the material of the transition layer 2 is not limited to nickel-chromium alloy, nickel-phosphorus alloy, and nickel metal, and other elements containing nickel, chromium, manganese, iron, and cobalt are used.
  • the conductive layer 1 and the transition layer 2 of at least one of the materials are also within the protection scope of the present invention, and the specific materials and layer structures of the conductive layer 1 and the transition layer 2 can be set according to actual use requirements, as long as the conductivity is guaranteed It is enough that the layer 1 has corrosion resistance to the first etching solution, and the transition layer 2 has corrosion resistance to the second etching solution, and no more details are given here.
  • the first etching solution may include sulfuric acid, hydrogen peroxide, and thiourea, or nitric acid, nickel chloride and imidazole (or nitrogen azoles), or contain cyanide
  • the second etching solution may contain ammonium chloride, copper sulfate pentahydrate and ammonia water.
  • the thickness of the bearing layer in this embodiment is 8-105 microns, for example, it can be 8 microns, 10 microns, 15 microns, 20 microns, 25 microns, 30 microns, 35 microns, 40 microns, 45 microns, 50 microns, 55 microns, 60 microns, 65 microns, 70 microns, 75 microns, 80 microns, 85 microns, 90 microns, 95 microns, 100 microns , 105 microns, etc.
  • the specific thickness of the bearing layer can be set according to actual usage requirements, and no more details are given here.
  • an embodiment of the present invention also provides a circuit board, and the circuit board is made of a substrate and the metal foil in any one of the above-mentioned implementation manners.
  • the embodiment of the present invention also provides a method for preparing a circuit board, using the metal foil to prepare a circuit board.
  • the method for preparing a circuit board includes:
  • Step S101 making a circuit on the conductive layer to obtain a conductive circuit
  • Step S102 combining the conductive circuit with the substrate
  • Step S103 removing the carrying layer.
  • step S103 further comprising:
  • Step S104 performing surface treatment on the conductive circuit so that the height difference between the surface of the conductive circuit and the surface of the substrate is within a preset height difference range.
  • the surface treatment of the conductive lines is used to prevent oxidation, and at the same time, the height difference between the surface of the conductive lines and the surface of the substrate is within the preset height difference range to further ensure that the conductive lines It can make reliable contact with other components, so that it can conduct signals stably.
  • the step S104 of "conducting surface treatment on the conductive circuit so that the height difference between the surface of the conductive circuit and the surface of the substrate is within a preset height difference range” specifically includes :
  • the height difference between the surface of the conductive circuit and the surface of the substrate is made within a preset height difference range by electroplating.
  • a layer of gold is electroplated on the surface of the conductive circuit 11, so that the surface of the conductive circuit 11 protrudes from the surface of the substrate 5 and the height between the surface of the substrate 5
  • the difference h is within the range of the preset height difference.
  • other conductive materials can also be plated on the conductive circuit according to actual use requirements, and no more details are given here.
  • the specific form of surface treatment is not particularly limited, and those skilled in the art can choose according to actual needs, such as any one of electroplating, electroless plating, evaporation plating, sputtering, or a composite process between them .
  • the conductive circuit in order to prevent the conductive circuit from being oxidized, expensive materials such as electroplating gold are usually selected for the surface treatment of the conductive circuit.
  • expensive materials such as electroplating gold are usually selected for the surface treatment of the conductive circuit.
  • thicker metals need to be electroplated during the surface treatment, so it will significantly increase Cost of production.
  • the present application does not need to electroplate thicker metals, thus greatly reducing the production cost.
  • the surface of the conductive circuit is flat after the carrier layer is removed, the conductive circuit also has a flat surface after surface treatment, which makes the formed circuit board meet the requirements of products with high dimensional accuracy.
  • the step S101 "make a circuit on the conductive layer to obtain a conductive circuit"
  • the step S101 specifically includes:
  • Step S111 performing film-sticking, exposure, and development operations on the conductive layer to obtain a masking pattern; wherein, the area of the conductive layer that is not masked by the masking pattern is a non-conductive line area;
  • Step S112 using a second etchant to etch the non-conductive circuit region
  • Step S113 removing the masking pattern to obtain a conductive circuit.
  • the step S101 "make a circuit on the conductive layer to obtain a conductive circuit"
  • the step S101 specifically includes:
  • Step S121 performing film-sticking, exposure, and development operations on the conductive layer to obtain a masking pattern; wherein, the area of the conductive layer that is not masked by the masking pattern is a conductive circuit area;
  • Step S122 thickening the conductive line area; for example, thickening the conductive line area by electroplating;
  • Step S123 removing the mask pattern
  • Step S124 using the second etchant to perform rapid etching to remove the unthickened area of the conductive layer to obtain a conductive circuit.
  • the conductive layer can be thinned before the step S121 of "attaching a film, exposing and developing the conductive layer to obtain a masking pattern".
  • circuit board to prepare a multilayer circuit board according to actual needs.
  • this application does not make too many limitations, and those skilled in the art can carry out according to actual needs. choose.
  • the difference between the metal foil of this embodiment and the first embodiment is that the carrying layer in this embodiment also includes a carrier layer 3, and the transition layer 2 is provided between the carrier layer 3 and the carrier layer. Between the conductive layer 1.
  • the transition layer 2 by setting the carrier layer 3, a greater supporting force can be provided, so that the transition layer 2 can be set very thin.
  • electroplating process, sputtering process The transition layer 2 is formed on the carrier layer 3 by means of evaporation plating, electroless plating or a composite process between them.
  • the material of the carrier layer 3 is selected from at least one of metals and non-metals, such as at least one of metals, alloys, organic substances, and inorganic substances, and can also be the above-mentioned substances containing dopants.
  • all The thickness and material of the above-mentioned carrier layer 3 can be set according to actual use requirements, and no more details are given here.
  • the carrier layer 3 is removed by peeling off.
  • the transition layer 2 can be removed by a first etchant. It should be noted that the removal of the carrier layer 3 by peeling means that the carrier layer 3 is torn off by external force (for example, by manual tearing or tool tearing).
  • the carrier layer 3 when the metal foil is used to prepare a circuit board, the carrier layer 3 is removed in a non-peeling manner.
  • the removal of the carrier layer 3 in a non-stripping manner refers to the removal of the carrier layer 3 by means other than tearing off by external force, such as at least one of physical grinding, etchant etching, plasma etching, and laser etching.
  • the carrier layer 3 is removed in a first-class manner.
  • the carrier layer 3 is removed by etching with an etching solution, specifically, the material of the transition layer 2 has corrosion resistance to the third etching solution, wherein, when the metal foil is used to prepare a circuit board, the The third etchant etches the carrier layer 3 .
  • the transition layer 2 has corrosion resistance to the third etchant means that the transition layer 2 will not or is difficult to be corroded by the third etchant, or the etching speed is relatively slow. Since the transition layer 2 has corrosion resistance to the third etchant, when the metal foil is used to prepare a circuit board, the transition layer 2 will not or is difficult to etch the carrier layer 3 during the process of etching the carrier layer 3. Corroded by the third etchant, or the etching speed is relatively slow. Further, the third etchant may be an etchant that can etch the conductive layer, or an etchant that cannot etch the conductive layer, and those skilled in the art can select according to actual needs.
  • the third etchant may be the same as or different from the second etchant. It should be noted that the specific type of the third etching solution is not particularly limited, and those skilled in the art can select according to actual needs.
  • the conductive layer is a copper layer
  • the transition layer is a nickel-chromium alloy or a nickel-phosphorus alloy.
  • the first etching solution can contain sulfuric acid, hydrogen peroxide and thiourea, or contain nitric acid, nickel chloride and imidazole (or nitrogen azoles), or contain cyanide
  • the second etchant and the third etchant may independently contain ammonium chloride, copper sulfate pentahydrate, and ammonia water.
  • the carrier layer further includes a peeling layer 4 , and the peeling layer 4 is arranged between the carrier layer 3 and the transition layer 2 .
  • the peeling layer 4 can be easily removed by peeling. It should be noted that when the carrier layer 3 is peeled off, the peeling layer 4 may be peeled off together with the carrier layer 3, or a part may remain on the transition layer 2 and need to be peeled off separately, and a part may be peeled off with the carrier layer 3.
  • the carrier layer 3 is peeled off together. In actual implementation, in the process of preparing the circuit board, the layers will not fall off accidentally.
  • the The sum of the thicknesses of the conductive layer 1 and the transition layer 2 may be greater than or equal to 0.2 microns.
  • the conductive layer 1 is a copper layer
  • the transition layer 2 contains at least one of nickel, chromium, manganese, iron, and cobalt.
  • the conductive layer 1 is a copper layer, which is mainly composed of copper
  • the transition layer 2 contains at least one of nickel, chromium, manganese, iron, and cobalt elements
  • nickel-chromium alloy, nickel Phosphorus alloy or nickel metal is an example, for example, it is mainly composed of nickel-chromium alloy, nickel-phosphorus alloy or nickel metal, or it can be mainly composed of any two or more materials of nickel-chromium alloy, nickel-phosphorus alloy and nickel metal It can also be mainly composed of at least one material among nickel-chromium alloy, nickel-phosphorus alloy and nickel metal mixed with other materials.
  • the transition layer 2 is a single-layer or multi-layer structure.
  • the transition layer 2 can be composed of a layer of nickel metal and a layer of nickel-chromium alloy laminated, or a layer of nickel metal and a layer of nickel-chromium alloy.
  • a layer of nickel-phosphorus alloy is stacked, or a layer of nickel-phosphorus alloy and a layer of nickel-chromium alloy are stacked.
  • transition layer 2 can also be doped in the transition layer 2 according to actual needs, for example, silicon can be doped in the transition layer 2, and by doping silicon in the transition layer 2, when the carrier is etched with an etching solution layer 3, the barrier effect of the transition layer 2 can be increased to further prevent the etchant from penetrating from the transition layer 2 to the conductive layer 1. It should be noted that, in actual production, the conductive layer 1 and the transition layer 2 may be accidentally mixed with other impurities. When the conductive layer 1 and the transition layer 2 are accidentally mixed with impurities, the within the protection scope of the present invention.
  • the conductive layer 1 in the present invention is not limited to a copper layer
  • the material of the transition layer 2 is not limited to nickel-chromium alloy, nickel-phosphorus alloy, and nickel metal, and other elements containing nickel, chromium, manganese, iron, and cobalt are used.
  • the conductive layer 1 and the transition layer 2 of at least one of the materials are also within the protection scope of the present invention, and the specific materials and layer structures of the conductive layer 1 and the transition layer 2 can be set according to actual use requirements, as long as the conductivity is guaranteed It is only necessary that the layer 1 has corrosion resistance to the first etching solution, and the transition layer 2 only needs to have corrosion resistance to the second etching solution, and no more details are given here.
  • an embodiment of the present invention also provides a circuit board, and the circuit board is made of a substrate and the metal foil in any one of the above-mentioned implementation manners.
  • the metal foil in Example 2 can be used to prepare a circuit board by any method for preparing a circuit board provided in Example 1.
  • circuit board to prepare a multilayer circuit board according to actual needs.
  • this application does not make too many limitations, and those skilled in the art can carry out according to actual needs. choose.
  • the beneficial effect of the embodiment of the present invention is that: the embodiment of the present invention provides a metal foil, which includes a conductive layer 1 and a carrying layer, and the conductive layer 1 and the carrying layer are stacked; wherein , the conductive layer 1 is used to make a conductive circuit.
  • the metal foil is used to prepare a circuit board, the carrier layer is separated from the conductive layer 1 by a first etching solution, and the conductive layer 1 is used for the first
  • the etchant has corrosion resistance, and the roughness Rz of the side of the carrying layer close to the conductive layer is less than or equal to 2 microns.
  • the roughness of the side of the carrying layer close to the conductive layer is less than or equal to 2 microns, which makes the side of the conductive layer close to the carrying layer also have a smaller roughness.
  • the first etching solution separates the carrying layer from the conductive layer 1, because the conductive layer has corrosion resistance to the first etching solution, which makes it possible to use the first etching solution.
  • the surface of the final conductive circuit can basically maintain the small surface roughness of the original conductive layer, and a conductive circuit with a flat surface can be obtained.
  • the surface of the circuit is substantially flush with the surface of the substrate, so that it is convenient to control the height difference between the surface of the conductive circuit and the surface of the substrate, thereby meeting the demand for products with high dimensional accuracy requirements.
  • the embodiments of the present invention also correspondingly provide a circuit board and a method for preparing the circuit board.

Abstract

本发明涉及金属箔技术领域，公开了一种金属箔，其包括导电层和承载层，导电层与承载层层叠设置；其中，导电层用于制作导电线路，在金属箔制备线路板时，通过第一蚀刻液将承载层与导电层分离，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。该金属箔在制备线路板时，去掉承载层后导电线路表面与基板表面基本齐平，且导电线路表面粗糙度小，可满足尺寸精度要求高的产品需求。同时，本发明实施例还相应地提供了一种线路板及线路板的制备方法。

Description

金属箔、线路板及线路板的制备方法 技术领域
本发明涉及金属箔技术领域，特别是涉及一种金属箔、线路板及线路板的制备方法。
背景技术
嵌入式线路板是指导电线路镶嵌在线路板基板内的线路板。如图1所示，在对线路灵敏度有要求的应用场合中，需要保证导电线路表面平整且导电线路与基板表面基本齐平或稍凸出于基板表面，才能确保导电线路能够与其他元器件可靠接触，从而能够稳定地传导信号。此外，对于尺寸精度要求高的产品，导电线路表面与基板表面之间的高度差需要控制在一定的范围。
目前，为了保证导电线路表面与基板表面的高度差控制在一定的范围，现有的制备线路板的主要工艺流程如下：
(1)先配备可剥离金属箔。其中，该金属箔包括层叠设置的载体层和导电层。
(2)对导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，导电层的被掩蔽图案掩蔽的区域为非导电线路区域，导电层的未被掩蔽图案掩蔽的区域为导电线路区域。
(3)通过电镀对所述导电线路区域进行加厚。
(4)将金属箔的形成导电线路的一面与基板压合，并通过剥离的方式去除载体层(即使用外力撕除载体层)。
(5)采用蚀刻液对导电层进行蚀刻，去除所述可剥离金属箔中的导电层，形成导电线路。
(6)对上述导电线路进行表面处理使得导电线路的表面与基板表面基本齐平或高于基板的表面一定的高度。
在实际应用中，步骤(5)中采用蚀刻液对导电层进行蚀刻去除所述可剥离 金属箔中的导电层时，由于加厚形成导电线路的材质和可剥离金属箔中的导电层的材质一样，这使得蚀刻液既可蚀刻导电层，也能蚀刻加厚形成的导电线路，且为了满足基板下部的导电层蚀刻干净，避免因基板下部的导电层蚀刻不净出现微短路的现象，在蚀刻导电层的过程中常采用过蚀刻，如图1和图2所示，这就会使得蚀刻结束后，导电线路凹陷于基板内。在实际生产过程中，导电线路在高度方向上凹陷于基板内大于0.5微米。这使得步骤(6)的工艺难以实现，如通过镀金或镀镍等使得导电线路与基板齐平，或凸出于基板。至少目前的工艺很难基于那么高的高度差去做表面处理以使得表面处理后的导电线路与基板齐平或凸出于基板的。同时，凹陷于基板内的导电线路也会显著增加表面处理的原材料以及加工成本。进一步的，因蚀刻过程中无法实现对蚀刻部位的精准控制，这会使得导电线路各处以及基板各处被过蚀刻的程度不一致，进而使得导电线路各处以及基板各处的粗糙度具有较大差距。这使得所得的线路板已无法满足尺寸精度要求高的产品需求。
发明内容
本发明实施例的目的是提供一种金属箔、线路板及线路板的制备方法，该金属箔在制备线路板时，去掉承载层后导电线路表面与基板表面基本齐平，且导电线路表面粗糙度小，可满足尺寸精度要求高的产品需求。
为了解决上述问题，本发明实施例提供了一种金属箔，其包括导电层和承载层，所述导电层与所述承载层层叠设置；其中，所述导电层用于制作导电线路，在所述金属箔制备线路板时，通过第一蚀刻液将所述承载层与所述导电层分离，所述导电层对所述第一蚀刻液具有耐蚀性，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。
作为优选方案，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于1微米。
作为优选方案，所述承载层包括过渡层，所述过渡层与所述导电层层叠设置，在使用所述金属箔制备线路板时，通过所述第一蚀刻液蚀刻所述过渡层，以使所 述承载层与所述导电层分离。
作为优选方案，所述过渡层对第二蚀刻液具有耐蚀性，其中，所述第二蚀刻液为能蚀刻所述导电层的蚀刻液。
作为优选方案，所述导电层为铜层，所述过渡层含有镍、铬、锰、铁、钴元素中的至少之一。
作为优选方案，所述承载层的厚度为8-105微米。
作为优选方案，所述承载层还包括载体层，所述过渡层设于所述载体层和所述导电层之间。
作为优选方案，所述载体层的材质选自金属、非金属中的至少之一。
作为优选方案，在使用所述金属箔制备线路板时，所述载体层以非剥离的方式被去除。
作为优选方案，在使用所述金属箔制备线路板时，所述载体层以剥离的方式被去除。
作为优选方案，所述过渡层的材质对第三蚀刻液具有耐蚀性，其中，在使用所述金属箔制备线路板时，通过所述第三蚀刻液蚀刻所述载体层。
作为优选方案，所述承载层还包括剥离层，所述剥离层设于所述载体层和所述过渡层之间。
作为优选方案，所述导电层与所述过渡层的厚度之和大于或等于0.2微米。
相应地，本发明实施例还提供一种线路板，所述线路板采用基板以及所述的金属箔制成。
相应地，本发明实施例还提供一种线路板的制备方法，使用所述的金属箔制备线路板，所述线路板的制备方法包括：
对所述导电层进行线路制作，得到导电线路；
使所述导电线路与基板相结合；
去除所述承载层。
作为优选方案，在所述去除所述承载层之后，还包括：
对所述导电线路进行表面处理，使所述导电线路表面与所述基板表面之间的 高度差在预设高度差范围。
作为优选方案，所述对所述导电层进行线路制作，得到导电线路，具体包括：
对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，所述导电层的未被所述掩蔽图形掩蔽的区域为非导电线路区域；
使用第二蚀刻液对所述非导电线路区域进行蚀刻；
去除所述掩蔽图案，得到导电线路。
作为优选方案，所述对所述导电层进行线路制作，得到导电线路，具体包括：
对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，所述导电层的未被所述掩蔽图形掩蔽的区域为导电线路区域；
对所述导电线路区域进行加厚；
去除所述掩蔽图案；
使用第二蚀刻液进行快速蚀刻，以去除所述导电层未被加厚的区域，得到导电线路。
作为优选方案，在所述对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案之前，还包括：
对所述导电层进行减薄。
作为优选方案，采用所述线路板制备多层线路板。
相应地，本发明实施例提供了一种多层线路板，所述多层线路板包括所述线路板和/或采用所述线路板的制备方法制备所得的所述线路板。
相应地，本发明实施例提供了一种多层线路板的制备方法，包括所述线路板的制备方法。
相比于现有技术，本发明实施例的有益效果在于：本发明实施例提供了一种金属箔，其包括导电层和承载层，所述导电层与所述承载层层叠设置；其中，所述导电层用于制作导电线路，在所述金属箔制备线路板时，通过第一蚀刻液将所述承载层与所述导电层分离，所述导电层对所述第一蚀刻液具有耐蚀性，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。本发明实施例提供的金属箔中承载层靠近导电层一面的粗糙度小于或等于2微米，这使得导电层靠近承 载层的一面的也具有较小的粗糙度，在使用本发明实施例提供的金属箔形成导电线路，并将金属箔制备线路板时，第一蚀刻液将所述承载层与所述导电层分离，因导电层对第一蚀刻液具有耐蚀性，这使得在使用第一蚀刻液将承载层与导电层分离后，最终形成的导电线路的表面可基本保持原导电层的较小的面粗糙度，得到表面平整的导电线路，同时确保了在去除承载层后，导电线路表面与基板表面基本齐平，从而便于控制导电线路表面与基板表面的高度差，进而满足对尺寸精度要求高的产品需求。同时，本发明实施例还相应地提供了一种线路板及线路板的制备方法。
附图说明
图1是采用现有的可剥离金属箔制备线路板时导致导电线路表面凹陷于基板表面的结构示意图；
图2是采用现有的可剥离金属箔制备的线路板的结构示意图；
图3是本发明实施例一的金属箔的结构示意图；
图4是本发明实施例一的线路板的结构示意图；
图5是本发明实施例一的导电线路经过表面处理的线路板的结构示意图；
图6是本发明实施例二的包含载体层、过渡层和导电层的金属箔的结构示意图；
图7是本发明实施例二的包含载体层、剥离层、过渡层和导电层的金属箔的结构示意图；
图8是本发明实施例一提供的线路板的制备方法的流程图；
图9是本发明实施例一提供的线路板的制备方法的步骤S101的第一个实施方式的流程图；
图10是本发明实施例一提供的线路板的制备方法的步骤S101的第二个实施方式的流程图；
其中，10、导电线路；20、基板；1、导电层；2、过渡层；3、载体层；4、剥离层；11、导电线路；5、基板。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
实施例一
请参阅图3，本发明实施例的金属箔，其包括导电层1和承载层，所述导电层1与所述承载层层叠设置；其中，所述导电层1用于制作导电线路，在所述金属箔制备线路板时，通过第一蚀刻液将所述承载层与所述导电层1分离，所述导电层1对所述第一蚀刻液具有耐蚀性，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。
在本发明实施例中，金属箔包括导电层1和承载层，所述导电层1与所述承载层层叠设置；其中，所述导电层1用于制作导电线路，在所述金属箔制备线路板时，通过第一蚀刻液将所述承载层与所述导电层1分离，所述导电层1对所述第一蚀刻液具有耐蚀性，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。本发明实施例提供的金属箔中承载层靠近导电层一面的粗糙度小于或等于2微米，这使得导电层靠近承载层的一面的也具有较小的粗糙度，在使用本发明实施例提供的金属箔形成导电线路，并将金属箔制备线路板时，第一蚀刻液将所述承载层与所述导电层1分离，因导电层对第一蚀刻液具有耐蚀性，这使得在使用第一蚀刻液将承载层与导电层分离后，最终形成的导电线路的表面可基本保持原导电层的较小的面粗糙度，得到表面平整的导电线路，同时确保了在去除承载层后，导电线路表面与基板表面基本齐平，从而便于控制导电线路表面与基板表面的高度差，进而满足对尺寸精度要求高的产品需求。
需要说明的是，所述导电层1对第一蚀刻液具有耐蚀性是指所述导电层1不会或较难被所述第一蚀刻液腐蚀，或蚀刻速度较慢。由于所述导电层1对第一蚀刻液具有耐蚀性，因此，在所述金属箔制备线路板时，若通过第一蚀刻液将所述承载层与所述导电层1分离时，所述导电层1不会或较难被所述第一蚀刻液腐蚀，或蚀刻速度较慢，在本发明实施例中，可通过选用合适的蚀刻液，以保证通过第 一蚀刻液将所述承载层与所述导电层1分离时，所述第一蚀刻液导致所述导电线路表面凹陷于基板的深度小于或等于0.5微米。需要说明的是，第一蚀刻液的具体类型并不受特别限制，本领域技术人员可以根据实际需要进行选择，只要能实现上述功能即可。
在具体实施当中，为了实现其他功能，还可以在所述承载层和所述导电层1之间设置其他结构，例如在所述承载层和所述导电层1之间设置所述防氧化层等结构，需要说明的是，所述承载层与所述导电层1之间设置其他结构的方案也在本发明的保护范围之内。
在本发明实施例中，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米，如可以小于或等于2微米、1.5微米、1微米、0.5微米、0.2微米、0.1微米等，优选小于或等于1微米。当承载层靠近导电层一面的粗糙度在上述范围内时，导电层靠近承载层一面的粗糙度也基本在上述范围内，即导电层靠近承载层一面较平整，同时本发明实施例中导电层对蚀刻分离承载层和导电层的第一蚀刻液具有耐蚀性，使得分离承载层后导电层靠近承载层的一面受第一蚀刻液的影响小，进而使得最终形成的导电线路表面基本保持原导电层靠近承载层一面的面粗糙度，即导电线路表面较平整。
请参阅图3所示，所述承载层包括过渡层2，所述过渡层2与所述导电层1层叠设置，在使用所述金属箔制备线路板时，通过所述第一蚀刻液蚀刻所述过渡层2，以使所述承载层与所述导电层1分离。在本发明实施例中，通过第一蚀刻液蚀刻所述过渡层2，以去除所述过渡层2，从而将所述承载层与所述导电层1分离，并且所述导电层1对所述第一蚀刻液具有耐蚀性，即第一蚀刻液不会或较难蚀刻所述导电层1，或蚀刻速度较慢。
需要说明的是，当所述承载层只包括过渡层2时，所述过渡层2需要为所述导电层1提供一定的支撑力，所以所述过渡层2的厚度需要设置得比较大。若承载层还包括其他能起承载作用的结构时，所述过渡层2的厚度可以设置得比较小，例如，若在过渡层2远离导电层1的一面设置载体层3时，可以通过载体层3为导电层1提供支撑力，因此可以将过渡层2的厚度设置得比较小，当然，此时也 可以将过渡层2的厚度设置比较大，以进一步为导电层1提供支撑力。所以，过渡层2的具体厚度可以根据实际使用要求进行设置，在此不做更多的赘述。
在一种可选的实施方式中，所述过渡层2对第二蚀刻液具有耐蚀性，其中，所述第二蚀刻液为能蚀刻所述导电层1的蚀刻液。需要说明的是，所述过渡层2对第二蚀刻液具有耐蚀性是指所述过渡层2不会或较难被所述第二蚀刻液腐蚀，或蚀刻速度较慢。由于所述过渡层2对第二蚀刻液具有耐蚀性，因此，当使用所述金属箔制备线路板时，在蚀刻所述导电层1的过程中，所述过渡层2不会或较难被所述第二蚀刻液腐蚀，或蚀刻速度较慢。需要说明的是，第二蚀刻液的具体类型并不受特别限制，本领域技术人员可以根据实际需要进行选择，只要能实现上述功能即可。
在一种可选的实施方式中，所述导电层1为铜层，所述过渡层2含有镍、铬、锰、铁、钴元素中的至少之一，例如包括镍铬合金、镍磷合金和镍金属中的至少一种。在本发明实施例中，所述导电层1为铜层，其主要由铜构成，所述过渡层2含有镍、铬、锰、铁、钴元素中的至少之一，以镍铬合金、镍磷合金和镍金属举例，例如是主要由镍铬合金、镍磷合金或镍金属构成，也可以是主要由镍铬合金、镍磷合金和镍金属中的任意两种或两种以上的材料组成，也可以是主要由镍铬合金、镍磷合金和镍金属中的至少一种材料与其他材料混合而成。所述过渡层2为单层或多层结构，当所述过渡层2为多层结构时，例如可以是由一层镍金属和一层镍铬合金层叠设置构成，或由一层镍金属和一层镍磷合金层叠设置构成，或由一层镍磷合金和一层镍铬合金层叠设置构成等。需要说明的是，在实际生产中，所述导电层1和所述过渡层2有可能会意外地混入其他杂质，当所述导电层1和所述过渡层2意外地混入杂质时，也在本发明的保护范围之内。此外，本发明中的所述导电层1不限于铜层，所述过渡层2的材料也不限于镍铬合金、镍磷合金、镍金属，采用其他含有镍、铬、锰、铁、钴元素中的至少之一的材料的导电层1和过渡层2也在本发明的保护范围之内，导电层1和过渡层2的具体材料和层结构可以根据实际使用要求进行设置，只需保证导电层1对第一蚀刻液具有耐蚀性，且过渡层2对第二蚀刻液具有耐蚀性即可，在此不做更多的赘述。示例 性的，当导电层为铜层，过渡层为镍铬合金、镍磷合金、镍金属中的至少之一时，第一蚀刻液可以包含硫酸、双氧水和硫脲，或者包含硝酸、氯化镍和咪唑(或氮唑类)，或者包含氰化物，第二蚀刻液可以包含氯化铵、五水硫酸铜和氨水。
在一种可选的实施方式中，为了给导电层1提供足够的支撑力，本实施例中的所述承载层的厚度为8-105微米，例如可以是8微米、10微米、15微米、20微米、25微米、30微米、35微米、40微米、45微米、50微米、55微米、60微米、65微米、70微米、75微米、80微米、85微米、90微米、95微米、100微米、105微米等。当然，所述承载层的具体厚度可以根据实际使用要求进行设置，在此不做更多的赘述。
相应地，本发明实施例还提供一种线路板，所述线路板采用基板以及上述任一实施方式的金属箔制成。
请参阅图8，本发明实施例还提供一种线路板的制备方法，使用所述的金属箔制备线路板，所述线路板的制备方法包括：
步骤S101，对所述导电层进行线路制作，得到导电线路；
步骤S102，使所述导电线路与基板相结合；
步骤S103，去除所述承载层。
在一种可选的实施方式中，在所述步骤S103之后，还包括：
步骤S104，对所述导电线路进行表面处理，使所述导电线路表面与所述基板表面之间的高度差在预设高度差范围。
在具体实施当中，通过对导电线路进行表面处理，从而起到防氧化的作用，同时使所述导电线路表面与所述基板表面之间的高度差在预设高度差范围，以进一步确保导电线路能够与其他元器件可靠接触，从而能够稳定地传导信号。
在一种可选的实施方式中，所述步骤S104“对所述导电线路进行表面处理，使所述导电线路表面与所述基板表面之间的高度差在预设高度差范围”，具体包括：
通过电镀使所述导电线路表面与所述基板表面之间的高度差在预设高度差范围。例如，请参阅图5所示，在所述导电线路11的表面电镀一层金，从而使 得导电线路11的表面凸出于所述基板5的表面且与所述基板5的表面之间的高度差h在预设高度差范围，当然，也可以根据实际使用要求在导电线路电镀其他导电性材料，在此不做更多的赘述。进一步的，表面处理的具体形式不受特别限制，本领域技术人员可以根据实际需要进行选择，如可以选择电镀、化学镀、蒸发镀、溅射中的任一种，或它们之间的复合工艺。
在具体实施当中，为了防止导电线路氧化，在对导电线路进行表面处理时，通常会选择电镀金等价格昂贵的材料，而现有技术在表面处理时需要电镀较厚的金属，因此会显著增加生产成本。而本申请相比于现有技术，无需电镀较厚的金属，因此大大降低了生产成本。同时，因去除承载层后导电线路表面平整，表面处理后导电线路也具有平整表面，这使得形成的线路板可满足尺寸精度高的产品。
请参阅图9所示，在一种可选的实施方式中，所述步骤S101“对所述导电层进行线路制作，得到导电线路”，具体包括：
步骤S111，对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，所述导电层的未被所述掩蔽图形掩蔽的区域为非导电线路区域；
步骤S112，使用第二蚀刻液对所述非导电线路区域进行蚀刻；
步骤S113，去除所述掩蔽图案，得到导电线路。
请参阅图10所示，在另一种可选的实施方式中，所述步骤S101“对所述导电层进行线路制作，得到导电线路”，具体包括：
步骤S121，对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，所述导电层的未被所述掩蔽图形掩蔽的区域为导电线路区域；
步骤S122，对所述导电线路区域进行加厚；例如通过电镀对所述导电线路区域进行加厚；
步骤S123，去除所述掩蔽图案；
步骤S124，使用第二蚀刻液进行快速蚀刻，以去除所述导电层未被加厚的区域，得到导电线路。
此外，还可以根据实际需要，在所述步骤S121“对所述导电层进行贴膜、曝 光和显影操作，得到掩蔽图案”之前，对所述导电层进行减薄。
进一步的，本领域技术人员可以根据实际需要采用所述线路板制备多层线路板。至于多层线路板的层数以及采用嵌入式线路板和/或导电线路凸起于基板表面的线路板制备多层线路板，本申请不做过多限定，本领域技术人员可以根据实际需要进行选择。
实施例二
请参阅图6所示，本实施例的金属箔与实施例一的区别在于，本实施例中的所述承载层还包括载体层3，所述过渡层2设于所述载体层3和所述导电层1之间。
在本发明实施例中，通过设置所述载体层3，可以提供更大的支撑力，以便于所述过渡层2可以设置得很薄，在具体实施当中，可以通过电镀工艺、溅射工艺、蒸发镀、化学镀或它们之间的复合工艺等方式在所述载体层3上形成过渡层2。此外，需要说明的是，当所述过渡层2具有较大的厚度，从而能提供足够的支撑力时，可以根据需要选择是否设置载体层3。所述载体层3的材质选自金属、非金属中的至少之一，如选自金属、合金、有机物、无机物中的至少之一，也可以是含有掺杂物的上述物质，当然，所述载体层3的厚度和材料可以根据实际使用要求进行设置，在此不做更多的赘述。
在一种可选的实施方式中，在使用所述金属箔制备线路板时，所述载体层3以剥离的方式被去除。示例性地，在剥离所述载体层3后，可以通过第一蚀刻液去除所述过渡层2。需要说明的是，所述载体层3以剥离的方式被去除，是指通过外力撕除载体层3(例如采用人工手撕或工具撕除等方式)。
在另一种可选的实施方式中，在使用所述金属箔制备线路板时，所述载体层3以非剥离的方式被去除。需要说明的是，所述载体层3以非剥离的方式被去除，是指通过外力撕除以外的方式去除载体层3，例如通过物理研磨、蚀刻液蚀刻、等离子蚀刻、激光蚀刻中的至少之一等方式去除载体层3。示例性地，通过蚀刻液蚀刻的方式去除载体层3，具体地，所述过渡层2的材质对第三蚀刻液具有耐 蚀性，其中，在使用所述金属箔制备线路板时，通过所述第三蚀刻液蚀刻所述载体层3。需要说明的是，所述过渡层2对第三蚀刻液具有耐蚀性是指所述过渡层2不会或较难被所述第三蚀刻液腐蚀，或蚀刻速度较慢。由于所述过渡层2对第三蚀刻液具有耐蚀性，因此，当使用所述金属箔制备线路板时，在蚀刻所述载体层3的过程中，所述过渡层2不会或较难被所述第三蚀刻液腐蚀，或蚀刻速度较慢。进一步的，所述第三蚀刻液可以是能蚀刻所述导电层的蚀刻液，也可以是不能蚀刻所述导电层的蚀刻液，本领域技术人员可以根据实际需要进行选择，同样的，所述第三蚀刻液与所述第二蚀刻液可以相同或不同。需要说明的是，第三蚀刻液的具体类型并不受特别限制，本领域技术人员可以根据实际需要进行选择，示例性的，当导电层为铜层，过渡层为镍铬合金、镍磷合金、镍金属中的至少之一，载体层为铜时，第一蚀刻液可以包含硫酸、双氧水和硫脲，或者包含硝酸、氯化镍和咪唑(或氮唑类)，或者包含氰化物，第二蚀刻液和第三蚀刻液可以分别独立地包含氯化铵、五水硫酸铜和氨水。
进一步地，请参阅图7所示，为了便于所述载体层3剥离，所述承载层还包括剥离层4，所述剥离层4设于所述载体层3和所述过渡层2之间。通过设置所述剥离层4，可以便于通过剥离的方式轻松地去除所述载体层3。需要说明的是，在剥离所述载体层3时，所述剥离层4有可能随着所述载体层3一起被剥离，也有可能一部分残留在所述过渡层2上需单独剥离，一部分随着载体层3一起被剥离。在具体实施当中，在制备线路板过程中，各层之间不会意外脱落。
进一步地，对于载体层可剥离和/或含有剥离层的金属箔，为了便于其在制备线路板的过程中实现载体层和/或剥离层的剥离，且不影响后续线路板的制备，所述导电层1与所述过渡层2的厚度之和可以大于或等于0.2微米。
在具体实施当中，所述导电层1为铜层，所述过渡层2含有镍、铬、锰、铁、钴元素中的至少之一。在本发明实施例中，所述导电层1为铜层，其主要由铜构成，所述过渡层2含有镍、铬、锰、铁、钴元素中的至少之一，以镍铬合金、镍磷合金或镍金属举例说明，例如是主要由镍铬合金、镍磷合金或镍金属构成，也 可以是主要由镍铬合金、镍磷合金和镍金属中的任意两种或两种以上的材料组成，也可以是主要由镍铬合金、镍磷合金和镍金属中的至少一种材料与其他材料混合而成。所述过渡层2为单层或多层结构，当所述过渡层2为多层结构时，例如可以是由一层镍金属和一层镍铬合金层叠设置构成，或由一层镍金属和一层镍磷合金层叠设置构成，或由一层镍磷合金和一层镍铬合金层叠设置构成等。此外，还可以根据实际需要在过渡层2中掺杂其他材料，例如可以在所述过渡层2中掺杂硅，通过在所述过渡层2中掺杂硅，当采用蚀刻液蚀刻所述载体层3时，可以增加所述过渡层2的阻挡作用，以进一步避免蚀刻液从过渡层2渗透至导电层1。需要说明的是，在实际生产中，所述导电层1和所述过渡层2有可能会意外地混入其他杂质，当所述导电层1和所述过渡层2意外地混入杂质时，也在本发明的保护范围之内。此外，本发明中的所述导电层1不限于铜层，所述过渡层2的材料也不限于镍铬合金、镍磷合金、镍金属，采用其他含有镍、铬、锰、铁、钴元素中的至少之一的材料的导电层1和过渡层2也在本发明的保护范围之内，导电层1和过渡层2的具体材料和层结构可以根据实际使用要求进行设置，只需保证导电层1对第一蚀刻液具有耐蚀性，过渡层2对第二蚀刻液具有耐蚀性即可，在此不做更多的赘述。
相应地，本发明实施例还提供一种线路板，所述线路板采用基板以及上述任一实施方式的金属箔制成。需要说明的是，实施例二的金属箔可以采用实施例一提供的任意一种制备线路板的方法制备线路板。
进一步的，本领域技术人员可以根据实际需要采用所述线路板制备多层线路板。至于多层线路板的层数以及采用嵌入式线路板和/或导电线路凸起于基板表面的线路板制备多层线路板，本申请不做过多限定，本领域技术人员可以根据实际需要进行选择。
相比于现有技术，本发明实施例的有益效果在于：本发明实施例提供了一种金属箔，其包括导电层1和承载层，所述导电层1与所述承载层层叠设置；其中，所述导电层1用于制作导电线路，在所述金属箔制备线路板时，通过第一蚀刻液将所述承载层与所述导电层1分离，所述导电层1对所述第一蚀刻液具有耐蚀性， 所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。本发明实施例提供的金属箔中承载层靠近导电层一面的粗糙度小于或等于2微米，这使得导电层靠近承载层的一面的也具有较小的粗糙度，在使用本发明实施例提供的金属箔形成导电线路，并将金属箔制备线路板时，第一蚀刻液将所述承载层与所述导电层1分离，因导电层对第一蚀刻液具有耐蚀性，这使得在使用第一蚀刻液将承载层与导电层分离后，最终形成的导电线路的表面可基本保持原导电层的较小的面粗糙度，得到表面平整的导电线路，同时确保了在去除承载层后，导电线路表面与基板表面基本齐平，从而便于控制导电线路表面与基板表面的高度差，进而满足对尺寸精度要求高的产品需求。同时，本发明实施例还相应地提供了一种线路板及线路板的制备方法。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明技术原理的前提下，还可以作出若干改进和替换，这些改进和替换也应视为本发明的保护范围。

Claims (21)

  1. 一种金属箔，其特征在于，包括导电层和承载层，所述导电层与所述承载层层叠设置；其中，所述导电层用于制作导电线路，在所述金属箔制备线路板时，通过第一蚀刻液将所述承载层与所述导电层分离，所述导电层对所述第一蚀刻液具有耐蚀性，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于2微米。
  2. 如权利要求1所述的金属箔，其特征在于，所述承载层靠近所述导电层一面的粗糙度Rz小于或等于1微米。
  3. 如权利要求1所述的金属箔，其特征在于，所述承载层包括过渡层，所述过渡层与所述导电层层叠设置，在使用所述金属箔制备线路板时，通过所述第一蚀刻液蚀刻所述过渡层，以使所述承载层与所述导电层分离。
  4. 如权利要求3所述的金属箔，其特征在于，所述过渡层对第二蚀刻液具有耐蚀性，其中，所述第二蚀刻液为能蚀刻所述导电层的蚀刻液。
  5. 如权利要求4所述的金属箔，其特征在于，所述导电层为铜层，所述过渡层含有镍、铬、锰、铁、钴元素中的至少之一。
  6. 如权利要求1所述的金属箔，其特征在于，所述承载层的厚度为8-105微米。
  7. 如权利要求3所述的金属箔，其特征在于，所述承载层还包括载体层，所述过渡层设于所述载体层和所述导电层之间。
  8. 如权利要求7所述的金属箔，其特征在于，所述载体层的材质选自金属、非金属中的至少之一。
  9. 如权利要求7所述的金属箔，其特征在于，在使用所述金属箔制备线路板时，所述载体层以非剥离的方式被去除。
  10. 如权利要求7所述的金属箔，其特征在于，在使用所述金属箔制备线路板时，所述载体层以剥离的方式被去除。
  11. 如权利要求7所述的金属箔，其特征在于，所述过渡层的材质对第三蚀刻液具有耐蚀性，其中，在使用所述金属箔制备线路板时，通过所述第三蚀刻液 蚀刻所述载体层。
  12. 如权利要求7所述的金属箔，其特征在于，所述承载层还包括剥离层，所述剥离层设于所述载体层和所述过渡层之间。
  13. 如权利要求10或12所述的金属箔，其特征在于，所述导电层与所述过渡层的厚度之和大于或等于0.2微米。
  14. 一种线路板，其特征在于，所述线路板采用基板以及如权利要求1-13任一项所述的金属箔制成。
  15. 一种线路板的制备方法，其特征在于，使用如权利要求1-13任一项所述的金属箔制备线路板，所述线路板的制备方法包括：
    对所述导电层进行线路制作，得到导电线路；
    使所述导电线路与基板相结合；
    去除所述承载层。
  16. 如权利要求15所述的线路板的制备方法，其特征在于，在所述去除所述承载层之后，还包括：
    对所述导电线路进行表面处理，使所述导电线路表面与所述基板表面之间的高度差在预设高度差范围。
  17. 如权利要求15所述的线路板的制备方法，其特征在于，所述对所述导电层进行线路制作，得到导电线路，具体包括：
    对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，所述导电层的未被所述掩蔽图形掩蔽的区域为非导电线路区域；
    使用第二蚀刻液对所述非导电线路区域进行蚀刻；
    去除所述掩蔽图案，得到导电线路。
  18. 如权利要求15所述的线路板的制备方法，其特征在于，所述对所述导电层进行线路制作，得到导电线路，具体包括：
    对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案；其中，所述导电层的未被所述掩蔽图形掩蔽的区域为导电线路区域；
    对所述导电线路区域进行加厚；
    去除所述掩蔽图案；
    使用第二蚀刻液进行快速蚀刻，以去除所述导电层未被加厚的区域，得到导电线路。
  19. 如权利要求18所述的线路板的制备方法，其特征在于，在所述对所述导电层进行贴膜、曝光和显影操作，得到掩蔽图案之前，还包括：
    对所述导电层进行减薄。
  20. 一种多层线路板，其特征在于，所述多层线路板包括权利要求14所述的线路板和/或采用权利要求15-19中任一项所述的线路板的制备方法制备所得的所述线路板。
  21. 一种多层线路板的制备方法，其特征在于，包括权利要求15-19中任一项所述的线路板的制备方法。
PCT/CN2022/095914 2021-08-09 2022-05-30 金属箔、线路板及线路板的制备方法 WO2023016061A1 (zh)

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