WO2022266930A1 - 显示基板及显示装置 - Google Patents

显示基板及显示装置 Download PDF

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Publication number
WO2022266930A1
WO2022266930A1 PCT/CN2021/102064 CN2021102064W WO2022266930A1 WO 2022266930 A1 WO2022266930 A1 WO 2022266930A1 CN 2021102064 W CN2021102064 W CN 2021102064W WO 2022266930 A1 WO2022266930 A1 WO 2022266930A1
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WO
WIPO (PCT)
Prior art keywords
conductive
sub
area
common electrode
line
Prior art date
Application number
PCT/CN2021/102064
Other languages
English (en)
French (fr)
Inventor
王先
赵宇
武晓娟
冯春楠
王建
张勇
冯大伟
王海龙
岳怀瑞
葛杨
马建威
石磊
曲峰
李必奇
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to CN202180001607.XA priority Critical patent/CN115735431A/zh
Priority to EP21946426.0A priority patent/EP4203056A4/en
Priority to PCT/CN2021/102064 priority patent/WO2022266930A1/zh
Priority to KR1020237013343A priority patent/KR20240024036A/ko
Priority to CN202111228525.7A priority patent/CN113917744B/zh
Publication of WO2022266930A1 publication Critical patent/WO2022266930A1/zh

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/24Supports; Mounting means by structural association with other equipment or articles with receiving set
    • H01Q1/241Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM
    • H01Q1/242Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use
    • H01Q1/243Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use with built-in antennas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/44Details of, or arrangements associated with, antennas using equipment having another main function to serve additionally as an antenna, e.g. means for giving an antenna an aesthetic aspect
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/805Electrodes
    • H10K59/8051Anodes
    • H10K59/80515Anodes characterised by their shape
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1343Electrodes
    • G02F1/134309Electrodes characterised by their geometrical arrangement
    • G02F1/134363Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]

Definitions

  • the present disclosure belongs to the field of display technology, and in particular relates to a display substrate and a display device.
  • Near Field Communication technology is a non-contact identification and interconnection technology, which uses a near-field magnetic field communication method, which has the characteristics of short transmission distance, low energy consumption, and the signal is not easily interfered. It can be used in mobile devices , Short-range wireless communication between consumer electronics products.
  • NFC communication technology has been widely used in electronic devices for data exchange. To use NFC communication technology, it is necessary to install a communication antenna on the device to send and receive electromagnetic wave signals, and the communication antenna needs to occupy a large space. Most of the existing electronic equipment using NFC communication technology externally installs an independent NFC communication module on the main board of the electronic equipment. Therefore, it needs to occupy a large space, which is not conducive to the thin and light design of the equipment.
  • the present invention aims to solve at least one of the technical problems in the prior art, and provides a display substrate and a display device.
  • an embodiment of the present disclosure provides a display substrate, which has a display area and a peripheral area surrounding the display area; the display substrate includes:
  • a plurality of first conductive structures disposed on the base substrate and located in the display area and the peripheral area; the plurality of first conductive structures extend along a first direction and are arranged side by side along a second direction;
  • a plurality of second conductive structures are arranged on a side of the interlayer insulating layer away from the base substrate, and are located in the display area and the peripheral area; the plurality of second conductive structures are arranged along the second extending in the first direction, and arranged side by side along the first direction; the second conductive structure intersects with the first conductive structure, and is electrically connected through a via hole penetrating through the interlayer insulating layer;
  • At least one third conductive structure is arranged on the base substrate and is at least located in the display area;
  • the third conductive structure includes a plurality of first conductive lines and a plurality of second conductive lines; the first conductive lines are at least part of the structure of the first conductive structure, and part of the first conductive structure includes two The first conductive wire; the second conductive wire is at least a part of the second conductive structure.
  • the display substrate also includes:
  • a plurality of gate lines arranged on the base substrate and located in the display area and the peripheral area; the plurality of gate lines extend along the first direction and are arranged side by side along the second direction;
  • a plurality of sub-pixels are arranged on the base substrate and are located in the display area; the sub-pixels are arranged in the area defined by the crossing arrangement of the gate lines and the data lines; the said sub-pixels arranged side by side along the first direction
  • the sub-pixels form a first pixel group; the sub-pixels arranged side by side along the second direction form a second pixel group; one first conductive structure is arranged between any adjacent first pixel groups.
  • one second conductive structure is arranged between at least part of the second pixel groups arranged adjacently.
  • each of the sub-pixels located in the same second pixel group has the same color, and every N sub-pixels arranged side by side along the first direction form a pixel unit, N ⁇ 2; the N is an integer;
  • the pixel units arranged side by side along the second direction form a pixel unit group; each of the pixel unit groups is provided with at least one second conductive structure.
  • the N sub-pixels in the pixel unit include red sub-pixels, green sub-pixels and blue sub-pixels; the second conductive structure is located between the red sub-pixels and the green sub-pixels.
  • the display substrate includes at least one first region and at least one second region; one third conductive structure is located in one of the first regions;
  • the display substrate also includes:
  • a plurality of third conductive lines and a plurality of fourth conductive lines are arranged on the base substrate and located in the second area and the peripheral area; the plurality of third conductive lines and the plurality of fourth conductive lines The lines are intersected, and a third conductive line is at least a partial structure of the first conductive structure; a fourth conductive line is located in a partial structure of the second conductive structure; all the conductive lines in the second conductive structure The distance between the fourth wire and the second conductive wire is 2 ⁇ m-6 ⁇ m.
  • the display substrate also includes:
  • the common electrode line is arranged on the base substrate and is located in the peripheral area; the common electrode line includes a first sub-common electrode line extending along the first direction and a second sub-common electrode line extending along the second direction.
  • the common electrode line; the first sub-common electrode line is set on the same layer as the first wire structure, and the material is the same; the second sub-common electrode line is set on the same layer as the second conductive structure, and the material is the same; the The first sub-common electrode line is electrically connected to the second sub-common electrode line through a via hole penetrating the interlayer insulating layer;
  • the third conductive line is electrically connected to the second sub-common electrode line through a via hole penetrating the interlayer insulating layer; and/or,
  • the fourth conductive line is electrically connected to the first sub-common electrode line through the via hole penetrating the interlayer insulating layer.
  • the third conductive structure includes at least one coil part; the coil part includes at least two substructures extending in different directions; each of the substructures includes the first conductive wire and the second conductive wire.
  • the coil part includes three substructures, which are two first substructures and one second substructure respectively; the two first substructures both extend along the second direction, and in the first direction Arranged side by side, the second substructures are connected between two of the first substructures.
  • the display area includes at least one first area and at least one second area; the third conductive structure is located in the first area; the first area includes a non-functional area and a functional area surrounding the non-functional area. area; the coil part is set in the functional area;
  • the display substrate further includes: a plurality of fifth conductive lines and a plurality of sixth conductive lines arranged crosswise, located in the non-functional area; the first conductive structure includes the fifth conductive lines; the second conductive The structure includes the sixth conductive line; the distance between the fifth conductive line and the first conductive line in the same first conductive structure is 2 ⁇ m-6 ⁇ m; and/or,
  • the distance between the sixth conductive line and the second conductive line in the same second conductive structure is 2 ⁇ m-6 ⁇ m.
  • the fifth conductive line includes a plurality of first sub-conductors arranged side by side and at intervals along the first direction; the gap between the adjacently arranged first sub-conductors is located between the adjacently arranged sub-pixels .
  • the width of the gap between adjacently arranged first sub-wires is 2 ⁇ m-6 ⁇ m.
  • the display substrate also includes:
  • the common electrode line is arranged on the base substrate and is located in the peripheral area; the common electrode line includes a first sub-common electrode line extending along the first direction and a second sub-common electrode line extending along the second direction.
  • the common electrode line; the first sub-common electrode line is set on the same layer as the first wire structure, and the material is the same; the second sub-common electrode line is set on the same layer as the second conductive structure, and the material is the same; the The first sub-common electrode line is electrically connected to the second sub-common electrode line through a via hole penetrating the interlayer insulating layer;
  • the sixth conductive line is electrically connected to the first sub-common electrode line through a via hole penetrating through the interlayer insulating layer.
  • the display area includes at least one first area and at least one second area; the third conductive structure is located in the first area; the first area includes a non-functional area and a functional area surrounding the non-functional area. area; the functional area includes nested sub-functional areas and redundant functional areas located between adjacent sub-functional areas; one coil part is set in one sub-functional area;
  • the display substrate further includes a redundant coil part disposed on the base substrate; and one redundant coil part is provided in one redundant functional area;
  • the redundant coil part includes a plurality of seventh conductive wires and a plurality of eighth conductive wires arranged crosswise, located in the redundant functional area; one seventh conductive wire is a partial structure of a first conductive structure , one of the eighth conductive lines is a partial structure of one of the second conductive structures.
  • the distance between the first conductive line and the nearest seventh conductive line in the same first conductive structure is 2 ⁇ m-6 ⁇ m; and/or,
  • the distance between the eighth conductive line and the nearest second conductive line in the same second conductive structure is 2 ⁇ m-6 ⁇ m.
  • the redundant coil part includes two first sub-redundant structures arranged side by side along the first direction and extending in the second direction, and extending along the first direction and connected between the two first sub-redundant structures.
  • the seventh conductive wire in the first sub-redundant structure includes a plurality of second sub-wires arranged side by side along the first direction; the gaps between the adjacently arranged second sub-wires are located between said sub-pixels; and/or,
  • the eighth conductive wire in the second sub-redundant structure includes a plurality of third sub-wires arranged side by side along the second direction; the gaps between the adjacently arranged third sub-wires are located between the sub-pixels.
  • the width of the gap between the adjacent second sub-conductors is 2 ⁇ m-6 ⁇ m; and/or, the width of the gap between the adjacent third sub-conductors is 2 ⁇ m-6 ⁇ m.
  • the display substrate also includes:
  • the common electrode line includes a first sub-common electrode line extending along the first direction and a second sub-common electrode line extending along the second direction; the first sub-common electrode line has the same structure as the first wire
  • the second sub-common electrode line is provided in the same layer as the second conductive structure, and the material is the same; the first sub-common electrode line and the second sub-common electrode line pass through the The via hole electrical connection of the interlayer insulating layer;
  • the eighth conductive line of the first sub-redundant structure is electrically connected to the first sub-common electrode line through a via hole penetrating the interlayer insulating layer; and/or,
  • the seventh conductive line in the second sub-redundant structure is electrically connected to the second sub-common electrode line through a via hole penetrating through the interlayer insulating layer.
  • the display substrate further includes a connection jumper disposed on the base substrate, and the connection jumper is connected to the coil part to form a spiral coil.
  • the display substrate further includes a flexible circuit, and a connection jumper is arranged on the flexible circuit board, and the connection jumper is connected to the coil part to form a spiral coil.
  • the number of the coil parts is two, and the two coil parts are respectively the first coil part and the second coil part, and the first coil part surrounds the second coil part; the first coil part and the second coil part
  • Each of the second coil parts includes a first end and a second end, and the two ends of the connection jumper are respectively connected to the first end of the first coil part and the second end of the second coil part.
  • the second end of the first coil part is connected to the first lead-out electrode; the first end of the second coil part is connected to the second lead-out electrode; the first lead-out electrode and/or the second lead-out electrode includes It is arranged on the base substrate and is electrically connected to the first sub-extraction part and the second sub-extraction part through the via hole penetrating the interlayer insulating layer; the first sub-extraction part and the first substructure are in the same layer provided and made of the same material, the second sub-extraction part and the second sub-structure are arranged in the same layer and made of the same material.
  • the display substrate further includes: a first conductive layer disposed on the base substrate; the first conductive layer includes the first conductive structure and the gate line;
  • the second conductive layer is disposed on a side of the interlayer insulating layer away from the base substrate; the second conductive layer includes the second conductive structure and the data line.
  • the first conductive structure includes a first body part and a first connection part; the first body part extends along the first direction, and the first connection part is connected to the first body part;
  • the second conductive structure includes a second main body and a second connecting part; the second main body extends along the second direction, and the second connecting part is connected to the second main body; the first The first connecting portion of a conductive structure is connected to the second connecting portion of the second conductive structure intersecting with the via hole penetrating through the interlayer insulating layer.
  • the first connecting portion is located between the first main body to which it is connected and the grid line closest to the first main body; the second connecting portion is located between the second connecting portion to which it is connected.
  • the main body part is away from the side of the data line closest to the second main part;
  • Each of the first connection portion and the second connection portion includes a first side and a second side opposite in the first direction, and a third side and a fourth side opposite in the second direction. side; of which,
  • the third side of the first connecting portion is connected to the first main body; the second side of the second connecting portion is connected to the second main body;
  • the distance from the orthographic projection of the first side and the third side of the first connecting portion on the base substrate to the orthographic projection of the via hole on the base substrate is no less than 2.0 ⁇ ; and /or,
  • the distance between the orthographic projection of the first side, the third side and the fourth side of the second connecting portion on the base substrate to the orthographic projection of the via hole on the base substrate is not equal to Less than 2.0 ⁇ m.
  • the distance between the first connecting portion and the closest gate line is not less than 4 ⁇ m.
  • the distance between the second body part and the data line closest to it is not less than 3.5 ⁇ m.
  • the sub-pixel includes at least a thin film transistor, a pixel electrode, and a common electrode; the gate of the thin film transistor is set on the same layer as the gate line, and the material is the same, and the source and drain of the thin film transistor are the same as the
  • the data lines are arranged on the same layer and made of the same material; the pixel electrode is connected to the drain of the thin film transistor, the common electrode is located on the side of the pixel electrode away from the base substrate, and is located on the side where the common electrode is located.
  • a passivation layer is provided between the layer and the layer where the pixel electrode is located;
  • the distance between the second connecting portion and the pair of adjacent pixel electrodes is not less than 2.0 ⁇ m.
  • the sub-pixel includes at least a thin film transistor, a pixel electrode, and a common electrode; the gate of the thin film transistor is set on the same layer as the gate line, and the material is the same, and the source and drain of the thin film transistor are the same as the
  • the data lines are arranged on the same layer and made of the same material; the pixel electrode is connected to the drain of the thin film transistor, the common electrode is located on the side of the pixel electrode away from the base substrate, and is located on the side where the common electrode is located.
  • a passivation layer is provided between the layer and the layer where the pixel electrode is located;
  • the common electrodes in each of the sub-pixels are connected in one structure to form a common electrode layer;
  • the common electrode layer includes a plurality of first openings extending along the second direction and arranged side by side along the first direction; an orthographic projection of one of the first openings on the base substrate and one of the first openings Orthographic projections of the two conductive structures on the substrate are partially overlapped.
  • the common electrode is a slit electrode; the first conductive structure at least partially overlaps with the orthographic projection of the common electrode on the base substrate.
  • the common electrode layer further includes a plurality of second openings extending along the first direction and arranged side by side along the second direction, the orthographic projection of one second opening on the base substrate and the Orthographic projections of the plurality of thin film transistors arranged side by side in the first direction on the base substrate at least partially overlap.
  • the peripheral area includes a first pad area and a second pad area located on two opposite sides of the display area in the second direction;
  • the third conductive structure is provided on one side and/or one side of the second pad region.
  • the third conductive structure includes a near field communication antenna.
  • an embodiment of the present disclosure provides a display device, which includes the above-mentioned display substrate.
  • the display device further includes a box-matching substrate, a black matrix is arranged on the box-matching substrate, and the orthographic projection of the third conductive structure on the base substrate is located on the base substrate of the black matrix. within the range of the orthographic projection above.
  • FIG. 1 is a schematic diagram of an exemplary display substrate.
  • FIG. 2 is a cross-sectional view of A-A' of the display substrate shown in FIG. 1 .
  • FIG. 3 is a schematic diagram of a display substrate according to an embodiment of the disclosure.
  • FIG. 4 is a partial structural schematic diagram of a display substrate according to an embodiment of the disclosure.
  • FIG. 5 is a layout diagram of a display substrate according to an embodiment of the disclosure.
  • FIG. 6 is a cross-sectional view of B-B' of the display substrate shown in FIG. 5 .
  • FIG. 7 is a schematic diagram of an electrical connection between a first conductive structure and a second conductive structure in a display substrate according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of partial positions of layouts in a display substrate according to an embodiment of the disclosure.
  • FIG. 9 is a layout of a common electrode layer in a display substrate according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic diagram of a partial position of a layout of a display substrate according to an embodiment of the disclosure.
  • FIG. 11 is an enlarged schematic view of position A in FIG. 10 .
  • FIG. 12 is a schematic diagram of a near field communication antenna in a display substrate according to an embodiment of the present disclosure.
  • FIG. 13 is a schematic diagram of partial positions of a layout of a display substrate according to an embodiment of the disclosure.
  • FIG. 14 is an enlarged schematic view of position B in FIG. 13 .
  • FIG. 15 is a schematic diagram of wiring of a non-functional area in a display substrate according to an embodiment of the present disclosure.
  • FIG. 16 is a schematic diagram of a first lead-out electrode (a second lead-out electrode) in a display substrate according to an embodiment of the present disclosure.
  • FIG. 17 is a schematic diagram of connection between the field communication antenna shown in FIG. 12 and the connection pad.
  • FIG. 18 is a schematic diagram of another display substrate according to an embodiment of the present disclosure.
  • FIG. 19 is a schematic diagram of the NFC antenna in the display substrate shown in FIG. 18 .
  • FIG. 20 is a schematic diagram of wiring in the redundant functional area in the display substrate shown in FIG. 18 .
  • FIG. 21 is a schematic diagram of connection between the field communication antenna shown in FIG. 19 and the connection pad.
  • FIG. 22 is a schematic diagram of another display substrate according to an embodiment of the present disclosure.
  • the embodiments of the present disclosure provide a display substrate and a display device.
  • the display device may be a Liquid Crystal Display (Liquid Crystal Display) or an Organic Light-Emitting Diode OLED (Organic Light-Emitting Diode) display device.
  • the display device is a liquid crystal display device as an example for description.
  • the liquid crystal display device includes a display substrate and a cell-matching substrate oppositely arranged, and a liquid crystal layer arranged between the display substrate and the cell-matching substrate.
  • the display substrate used may be an array substrate or a COA substrate (Color On Array).
  • the matching substrate includes a color filter layer; when the display substrate is a COA substrate, there is no need to provide a color filter layer on the matching substrate.
  • the display substrate is taken as an array substrate as an example for illustration.
  • FIG. 1 is a schematic diagram of an exemplary display substrate; as shown in FIG. 1, the display substrate has a display area Q1 and a peripheral area Q2 surrounding the display area Q1; the peripheral area Q2 includes a first solder joint located on one side of the display area Q1. Panel Q21.
  • the display substrate includes a base substrate 10 , a plurality of gate lines GL and a plurality of data lines DL arranged on the base substrate 10 , and a plurality of sub-pixels defined by crossing of the gate lines GL and data lines DL.
  • a plurality of gate lines GL extend along the first direction X, and are arranged side by side along the second direction Y; a plurality of data lines DL extend along the second direction Y, and are arranged side by side along the first direction X;
  • the multiple sub-pixels 01 arranged form a first pixel group; the multiple sub-pixels 01 arranged side by side along the second direction Y form a second pixel group.
  • Each sub-pixel includes at least a thin film transistor 20 , a pixel electrode 30 and a common electrode 40 .
  • the gates of the thin-film transistors 20 in each sub-pixel 01 in the same first pixel group are connected to the same gate line GL; the sources of the thin-film transistors 20 in each sub-pixel in the same second pixel group are connected to the same data Line DL.
  • 2 is a cross-sectional view of A-A' of the display substrate shown in FIG. 1.
  • the thin film transistor 20 in the sub-pixel 01 includes a gate, an active layer, a source pole and drain.
  • the drain of the thin film transistor 20 is connected to the pixel electrode 30 .
  • An interlayer insulating layer 50 (used as a gate insulating layer) is arranged between the gate electrode and the layer where the active layer is located, and the pixel electrode 30 is located on the side of the interlayer insulating layer 50 away from the base substrate 10; at the source of the thin film transistor 20
  • the side of the electrode, the drain, and the pixel electrode 30 away from the base substrate 10 are covered with a passivation layer 60 , and the common electrode 40 is formed on the side of the passivation layer 60 away from the base substrate 10 .
  • the pixel electrode 30 is a plate electrode
  • the common electrode 40 is a slit electrode.
  • first direction X and second direction Y in the embodiments of the present disclosure do not refer to the direction of a straight line, but refer to the direction of a certain structure or the length direction of a certain structure.
  • the TFT 20 is only taken as an example of a bottom-gate TFT 20 , which does not limit the protection scope of the embodiments of the present disclosure.
  • the thin film transistor 20 may also be a top-gate thin film transistor 20 .
  • each sub-pixel includes a pixel electrode 30 and a common electrode 40.
  • the common electrode 40 can also be arranged on a color filter substrate, such as a TN mode display device, so the common electrode
  • a color filter substrate such as a TN mode display device
  • the arrangement of 40 on the display substrate does not limit the protection scope of the embodiments of the present disclosure.
  • only the pixel electrode 30 and the common electrode 40 are disposed on the display substrate as an example for illustration.
  • each pixel unit includes red sub-pixels, green sub-pixels and blue sub-pixels. In this case, sub-pixels located in the same column may emit the same light emission color.
  • the third conductive structure is integrated therein to realize additional functions other than display, such as the function of transmitting and receiving signals.
  • the third conductive structure is the coil portion 70 in the near field communication antenna, but it should be understood that this does not constitute a limitation to the protection scope of the embodiments of the present disclosure.
  • FIG. 3 is a schematic diagram of a display substrate according to an embodiment of the disclosure
  • FIG. 4 is a schematic diagram of a partial structure of a display substrate according to an embodiment of the disclosure
  • an embodiment of the disclosure provides a
  • a display substrate has a display area Q1 and a peripheral area Q2 surrounding the display area Q1.
  • the display substrate includes: a base substrate 10 , a plurality of first conductive structures 700 , a plurality of second conductive structures 800 , an interlayer insulating layer 50 and at least one near field communication antenna.
  • each first conductive structure 700 is arranged on the base substrate 10, and is located in the display area Q1 and the peripheral area Q2; each first conductive structure 700 extends along the first direction X, and is arranged side by side along the second direction Y .
  • the interlayer insulating layer 50 is disposed on a side of the first conductive structure 700 away from the base substrate 10 .
  • Each second conductive structure 800 is disposed on the side of the interlayer insulating layer 50 away from the base substrate 10, and is located in the display area Q1 and the peripheral area Q2; the plurality of second conductive structures 800 extend along the second direction Y, and along the first The direction X is arranged side by side; the second conductive structure 800 is arranged to cross the first conductive structure 700 , and is electrically connected through a via hole penetrating the interlayer insulating layer 50 .
  • Each near-field communication antenna is arranged on the base substrate 10 and is located in the display area Q1; wherein, each near-field communication antenna includes at least one coil part 70, and the coil part 70 includes a plurality of cross-arranged first Conductive wire 701 and multiple second conductive wires 702; the first conductive wire 701 is at least part of the structure of the first conductive structure 700, and part of the first conductive structure includes two first conductive wires 701; the second conductive wire 702 is the first At least a partial structure of the second conductive structure 800 .
  • part of the first conductive structure 700 includes two first conductive lines 701 in the embodiment of the present disclosure is to form a bending pattern to form the coil portion 70 .
  • the near field communication antenna only includes one coil part 70
  • both ends of the coil part 70 are connected to the control circuit to form a closed loop.
  • the external magnetic induction coil can form an induction current loop with the near-field communication antenna and the control circuit, so as to complete the near-field communication.
  • multiple coil parts 70 can be connected by connecting jumpers 130 to form an antenna coil. At this time, the two ends of the antenna are connected to the control circuit to form a closed loop.
  • the coil can form an induced current loop in the near-field communication antenna and the control circuit to complete the near-field communication.
  • the coil part 70 of the near field communication antenna is integrated in the display area Q1 , it is beneficial to save space and realize thinner display substrate.
  • the coil part 70 is composed of the first conductive wires 701 and the second conductive wires 702 intersecting, that is, the coil part 70 has a grid structure, so it does not affect the display effect of the display device using the display substrate.
  • a first conductive wire 701 in the coil part 70 is at least a partial structure of a first conductive structure 700
  • a second conductive wire 702 is at least a partial structure of a second conductive structure 800
  • the first conductive structure 700 and the second conductive structure 800 are located in the display area Q1 and the peripheral area Q2, so the display uniformity of the display device using the display substrate can be guaranteed.
  • FIG. 5 is a layout of a display substrate according to an embodiment of the present disclosure; as shown in FIG. 5 , the display substrate not only includes the above structure, but also includes multiple gate lines GL, multiple data lines DL and a plurality of sub-pixels.
  • the gate lines GL are located in the display area Q1 and the peripheral area Q2, and each gate line GL extends along the first direction X and is arranged side by side along the second direction Y.
  • the data lines DL are located in the display area Q1 and the peripheral area Q2, and each data line DL extends along the second direction Y and is arranged side by side along the first direction X.
  • the sub-pixels are defined by intersections of gate lines GL and data lines DL.
  • the sub-pixels arranged side by side in the first direction X form a first pixel group; the sub-pixels arranged side by side in the second direction Y form a second pixel group.
  • a first conductive structure 700 is disposed between adjacent first pixel groups; at least part of the second conductive structure 800 is disposed between adjacent second pixel groups.
  • first conductive structure 700 between adjacent first pixel groups does not mean that all projections of the first conductive structure 700 on the base substrate 10 are located between adjacent first pixel groups. between the orthographic projections on the base substrate 10 .
  • the first conductive structure 700 is located between two adjacent first pixel groups.
  • the orthographic projection of the part of the first conductive structure 700 extending along the first direction X (that is, the first body part 710 described below) on the substrate 10 is the same as that of the sub-pixel on the substrate.
  • the orthographic projections on the substrate 10 overlap, but the orthographic projection of the part of the first conductive structure 700 extending along the second direction Y (that is, the first connecting portion 720 described below) on the base substrate 10 is identical to that of the subpixel on the substrate.
  • the orthographic projections on the base substrate 10 have no overlap and are located between the two first pixel groups. Since the positions between the first pixel groups and the positions between the second pixel groups are all non-light-transmitting regions, the first conductive structure 700 is arranged between adjacent first pixel groups, and the second conductive structure The arrangement of 800 between adjacent second pixel groups will not affect the pixel aperture ratio.
  • the colors of the respective sub-pixels in the same second pixel group are the same, and the colors of the sub-pixels in adjacent second pixel groups are different.
  • the sub-pixels of three colors may be red sub-pixel R, green sub-pixel G, and blue sub-pixel B respectively.
  • Every three sub-pixels arranged side by side along the first direction X constitute a pixel unit, that is, each pixel unit includes a red sub-pixel, a green sub-pixel and a green sub-pixel.
  • Pixel units arranged side by side along the second direction Y form a pixel unit group; at least one second conductive structure 800 is disposed in each pixel unit group.
  • a second conductive structure 800 is provided between adjacent second pixel groups in each pixel unit group. That is to say, two second conductive structures 800 are arranged in each pixel unit group, and one of the second conductive structures 800 is located between the second pixel group formed by the red sub-pixel R and the second pixel group formed by the green sub-pixel G. In between, another second conductive structure 800 is located between the second pixel group formed by the green sub-pixel R and the second pixel group formed by the blue sub-pixel B. In another example, a second conductive structure 800 is provided in each pixel unit group, and the second conductive structure 800 is located between the second pixel group formed by the red sub-pixel R and the second pixel group formed by the green sub-pixel G .
  • the reason for this setting is that the red sub-pixel R has a greater risk of color crossover, so the width of the black matrix formed at the position between the corresponding red sub-pixel R and the green sub-pixel G in the color filter substrate will be wider than other positions. Therefore, disposing the second conductive structure 800 at this position will not affect the pixel aperture ratio.
  • FIG. 6 is a cross-sectional view of B-B' of the display substrate shown in FIG. 5; as shown in FIG. 6, each sub-pixel includes a thin film transistor 20, a pixel electrode 30 and a common electrode 40; wherein, the display
  • the substrate includes a first conductive layer, an interlayer insulating layer 50 (used as a gate insulating layer), a pixel electrode 30 , a second conductive layer, a passivation layer 60 and a common electrode 40 sequentially disposed on the base substrate 10 .
  • the first conductive layer includes the gate of the thin film transistor 20, the gate line GL and the first conductive structure 700; wherein, the gate of the thin film transistor 20 is electrically connected to the gate line GL, and the two can be integrally formed.
  • the second conductive layer includes a source and a drain of the thin film transistor 20 , a data line DL, and a second conductive structure 800 .
  • the drain of the thin film transistor 20 is electrically connected to the pixel electrode 30;
  • the source of the thin film transistor 20 is electrically connected to the data line DL, and the two may have an integrated structure;
  • the second conductive structure 800 is electrically connected to the first A conductive structure 700 .
  • the pixel electrode 30 is a plate electrode
  • the common electrode 40 is a slit electrode.
  • the first conductive layer includes the gate of the thin film transistor 20, the gate line GL and the first conductive structure 700
  • the second conductive layer includes the source and drain of the thin film transistor 20, the data line DL and the second conductive structure 700.
  • Structure 800 the gate of the thin film transistor 20, the gate line GL and the first conductive structure 700 can be formed by one patterning process; the source and drain of the thin film transistor 20, the data line DL and the second conductive structure 800 can be It is formed by one patterning process.
  • the first conductive wire 701 of the near field communication antenna is at least a partial structure of the first conductive structure 700
  • the second conductive wire 702 is at least a partial structure of the second conductive structure 800. Therefore, although the display substrate Integrate the near-field communication antenna in the middle, but do not increase the process steps.
  • the first conductive wire 701 of the near-field communication antenna is at least a part of the structure on the first conductive structure 700
  • the second conductive wire 702 is at least a part of the second conductive structure
  • the first conductive structure 700 includes a first main body portion 710 and a first connection portion 720
  • the first body part 710 extends along the first direction X, and the first connection part 720 is connected to the first body part 710
  • the second conductive structure 800 includes a second body part 810 and a second connection part 820
  • the two main body parts 810 extend along the second direction Y, and the second connecting part 820 is connected to the second main body part 810; for the first conductive structure 700 and the second conductive structure 800 arranged across, the first conductive structure
  • the first connecting portion 720 of 700 is electrically connected to the second connecting portion 820 of the second conductive structure 800 through a via hole penetrating through the interlayer insulating layer 50 .
  • FIG. 8 is a schematic diagram of a partial position of a layout in a display substrate according to an embodiment of the present disclosure; between the gate lines GL; the second connection portion 820 is located on the side of the second body portion 810 to which it is connected away from the data line DL closest to the second body portion 810 .
  • Both the first connecting portion 720 and the second connecting portion 820 include a first side (left side) and a second side (right side) opposite in the first direction X, and opposite along the second direction Y.
  • the second body part 810 is connected.
  • the orthographic projections of the first connecting portion 720 and the second electrical connecting portion on the base substrate 10 at least partially overlap, and both of the orthographic projections on the base substrate 10 at least cover the via hole on the base substrate 10 At least a partial area of the orthographic projection on .
  • the distance L11 between the orthographic projection of the first side of the first connecting portion 720 on the base substrate 10 and the orthographic projection of the via hole on the base substrate 10 , and the third side The distance L13 between the orthographic projection of the base substrate 10 and the orthographic projection of the via hole on the base substrate 10 is not less than 2.0 ⁇ m.
  • the distance L11 from the first side of the first connecting portion 720 to the orthographic projection of the via hole on the base substrate 10 is 2.4 ⁇ m
  • the distance L11 from the third side of the first connecting portion 720 to the via hole on the base substrate 10 is 2.0 ⁇ m
  • the distance L14 between the orthographic projection of the first side, the third side and the fourth side of the second connecting portion 820 on the base substrate 10 to the orthographic projection of the via hole on the base substrate 10 is not less than 2.0 ⁇ m; for example: the distance L14 from the orthographic projection of the first side, the third side and the fourth side of the second connecting portion 820 on the base substrate 10 to the orthographic projection of the via hole on the base substrate 10 Both are 2.4 ⁇ m.
  • the farthest distance L12 from the orthographic projection of the via hole on the base substrate 10 to the orthographic projection of the first main body portion 710 of the first conductive structure 700 on the base substrate 10 is not less than 4 ⁇ m.
  • the farthest distance L12 of the orthographic projection on 10 to the orthographic projection of the first main body portion 710 of the first conductive structure 700 on the base substrate 10 is about 5 ⁇ m.
  • the first conductive structure 700 is used as at least a part of the structure of the first conductive wire 701 of the near field communication antenna, and the first conductive structure 700 is arranged on the same layer as the grid line GL, it should be ensured that the first conductive structure 700 The distance from the grid line GL should be set to prevent the NFC antenna from affecting the signal of the grid line GL.
  • the embodiment of the present disclosure as shown in FIG.
  • the distance L16 between the first connecting portion 720 of the first conductive structure 700 and the closest gate line GL is not less than 4 ⁇ m, for example: the distance between the two L16 is about 5.2 ⁇ m, which can effectively avoid signal interference, and at the same time, since the first conductive structure 700 and the gate line are in the same layer, a reasonable distance between the two can ensure the exposure distance when the two are patterned.
  • the second conductive structure 800 is used as at least a partial structure of the same layer as the second conductive wire 702 of the near-field communication antenna, and the second conductive structure 800 is arranged on the same layer as the data line DL, it should be ensured that the second conductive structure and The distance setting between the data lines DL should prevent the NFC antenna from affecting the signal on the data lines DL.
  • the distance L17 between the second main body portion 810 and the closest data line DL is not less than 3.5 ⁇ m; for example, the distance L17 between the two is 4.5 ⁇ m about.
  • the drain of the thin film transistor 20 is directly electrically connected to the pixel electrode 30.
  • the distance L18 between the second connecting portion 820 and the adjacent pixel electrode 30 is not less than 2.0 ⁇ m; for example: the second The distance L18 between the connection portion 820 and the adjacent pixel electrode 30 is about 2.5 ⁇ m or 2.99 ⁇ m.
  • FIG. 9 is a layout of a common electrode layer in a display substrate according to an embodiment of the present disclosure; as shown in FIG. , the second conductive line 702 is arranged on the second conductive layer, and usually the common electrodes 40 in each sub-pixel are connected together, that is, the common electrodes 40 in each sub-pixel form a common electrode layer, and the common common electrode layer is located at On the side of the second conductive layer away from the substrate, in order to prevent the common electrode layer from affecting the signal transmission of the near-field communication antenna, a plurality of first openings 401 are arranged on the common electrode layer, and the first openings 401 extend along the second direction Y And side by side along the first direction X, the orthographic projection of a first opening 401 on the base substrate 10 partially overlaps the orthographic projection of a second conductive structure 800 on the base substrate 10 .
  • the first opening 401 is provided in one-to-one correspondence with the second conductive structure 800 .
  • the common electrode 40 is a slit electrode in the embodiment of the present disclosure, the orthographic projection of the first conductive structure 700 and the common electrode 40 on the base substrate 10 at least partially overlaps, so that the slit on the common electrode 40 can Auxiliary near field communication antenna signal transmission.
  • the common electrode layer further includes a plurality of second openings 402 extending along the first direction X and arranged side by side along the second direction Y. The projection at least partially overlaps with the orthographic projection of the plurality of thin film transistors 20 arranged side by side along the first direction X on the base substrate 10 . At this time, although there is a certain distance between the second opening 402 and the second conductive wire 702 of the NFC antenna, the second opening 402 can also assist the signal transmission of the NFC antenna.
  • the display area Q1 includes at least a first area Q11 and a second area Q12, wherein the first area Q11 is configured to set a near field communication antenna, and a near field communication antenna is set in a first area Q11 The coil part 70.
  • Other areas of the display area Q1 except the first area Q11 are called the second area Q12.
  • the peripheral area Q2 includes a first pad area Q21 and a second pad area Q22 located on opposite sides of the display area Q1 along the second direction Y.
  • the first area Q11 can be set on the side of the second area Q12 close to the first pad area Q21, or on the side of the second area Q12 close to the second pad area Q22. side.
  • the near field communication antenna in the first area Q11 it is helpful for the near field communication antenna in the first area Q11 to be bonded and connected to the flexible circuit board.
  • the display area Q1 includes two first areas Q11, at this time, one of the first areas Q11 is located on the side of the second area Q12 close to the first pad area Q21, and the other first area Q11 It is located on a side of the second region Q12 close to the second pad region Q22.
  • more first areas Q11 may be provided in the display area Q1 of the display substrate in the embodiment of the present disclosure, that is, more coil parts 70 of near field communication antennas may be integrated in the display substrate.
  • the signal lines on the display substrate are bonded and connected to the flexible circuit board through the first pad area Q21 .
  • the near-field communication antenna is located on the side of the display area close to the second pad area Q22, at this time, the flexible circuit board that is bound and connected to the near-field communication antenna, and the flexible circuit that is bound and connected to the first pad area Q21
  • the board is not the same flexible circuit board, so as to avoid interference between the signal line on the display substrate and the coil part 70 of the near field communication antenna, and to reserve sufficient space for the binding of the coil part 70 of the near field communication antenna .
  • only one or two first areas Q11 are included in the display area Q1 of the display substrate as an example, that is, the coil part 70 of one or two near field communication antennas is integrated in the display substrate.
  • FIG. 10 is a schematic diagram of a part of the layout of the display substrate according to an embodiment of the present disclosure
  • FIG. 11 is an enlarged schematic diagram of the position A in FIG. 10; as shown in FIGS. 4 and 10-11, the display substrate not only includes
  • the coil part 70 in the first area Q11 also includes a plurality of third conductive lines 110 and a plurality of fourth conductive lines 120 arranged in the second area Q12 and the peripheral area Q2; a plurality of third conductive lines 110 and a plurality of The fourth conductive lines 120 are arranged across, and a third conductive line 110 is at least a partial structure of a first conductive structure 700 ; a fourth conductive line 120 is located in a partial structure of a second conductive structure 800 .
  • the first conductive structure 700 and the second conductive structure 800 are uniformly distributed in the display area Q1, which helps to provide uniformity of the aperture ratio of the display substrate.
  • the second conductive line 702 and the fourth conductive line 120 belonging to the same second conductive structure 800 are disconnected, and the distance L21 between them is 2 ⁇ m- 6 ⁇ m, for example, the distance L21 between the two is 4 ⁇ m.
  • the display substrate not only includes the above structure but also includes a common electrode line 400 located in the peripheral area Q2 and disposed on the base substrate 10 .
  • the third conductive line 110 may be electrically connected to the common electrode line 400 .
  • the common electrode line 400 includes a first sub-common electrode line extending along a first direction and a second sub-common electrode line extending along a second direction.
  • the first sub-common electrode lines may be provided on the same layer as the first conductive structure 700 and made of the same material; the second sub-common electrode lines may be provided on the same layer as the second conductive structure 800 and made of the same material.
  • the first sub-common electrode line is electrically connected to the second sub-common electrode line through the via hole penetrating the interlayer insulating layer 50 .
  • the third conductive line 110 is electrically connected to the second sub-common electrode line through the via hole penetrating the interlayer insulating layer 50, so that the voltage on the third conductive line 110 and the fourth conductive line 120 is a common voltage, thereby avoiding the third conductive line.
  • the wire 110 and the fourth conductive wire 120 are in a floating state.
  • the fourth conductive line 120 is electrically connected to the first sub-common electrode line through a via hole penetrating the interlayer insulating layer 50 , so that the voltage on the third conductive line 110 and the fourth conductive line 120 is a common voltage.
  • the third conductive line 110 is electrically connected to the second sub-common electrode line through the via hole penetrating the interlayer insulating layer 50, and at the same time, the fourth conductive line 120 is connected to the first sub-common electrode line through the via hole penetrating the interlayer insulating layer 50.
  • the common electrode lines are electrically connected, so that the voltage on the third conductive line 110 and the fourth conductive line 120 can also be a common voltage.
  • the common electrode lines 400 may include two first sub-common electrode lines and two second sub-common electrode lines.
  • the two first sub-common electrode lines are arranged side by side in the second direction, and the two second sub-common electrode lines are arranged side by side in the first direction.
  • the two ends of the third conductive line 110 can be respectively connected to the two second sub-common electrode lines (the two ends of the third conductive line 110 are respectively connected to the closest first sub-common electrode line); when the fourth conductive line 120 is connected to the first sub-common electrode line, the end of the fourth conductive line 120 away from the first region Q11 is connected to the end closest to it The second sub-common electrode line.
  • FIG. 12 is a schematic diagram of a near-field communication antenna in a display substrate according to an embodiment of the present disclosure; as shown in FIG. 12 , the near-field communication antenna may only include one coil part 70, and the coil part 70 may include At least two substructures extending in different directions, each of which includes the first conductive wire 701 and the second conductive wire 702 .
  • the coil portion 70 includes a V-shape, a U-shape, or the like.
  • the coil portion 70 is U-shaped as an example for description. As shown in FIG.
  • the coil part 70 includes two first substructures 71 arranged side by side along the first direction X and extending along the second direction Y, and one extending along the first direction X and connected to the two second substructures 71.
  • the first area Q11 in the display area Q1 includes a non-functional area Q112 and a functional area Q111 surrounding the non-functional area Q112.
  • the coil part 70 is provided in the functional area Q111.
  • the shape of the functional area Q111 matches the shape of the coil portion 70 , that is, the coil portion 70 is U-shaped, and the functional area Q111 is also U-shaped.
  • the non-functional area Q112 has a rectangular shape.
  • the display substrate not only includes the above structure, but also includes a plurality of fifth conductive lines 80 and sixth conductive lines 90 arranged crosswise on the base substrate 10 in the non-functional area Q112 .
  • the fifth conductive line 80 is a partial structure on the first conductive structure 700
  • the sixth conductive line 90 is a partial structure on the second conductive structure 800 .
  • FIG. 13 is a schematic diagram showing a partial position of the layout of the substrate according to an embodiment of the present disclosure
  • FIG. 14 is an enlarged schematic diagram at position B in FIG. 13; as shown in FIGS.
  • the first conductive structures 700 passing through the functional area Q111 and the non-functional area Q112 all include a first conductive line 701 and a fifth conductive line 80, and the fifth conductive line 80 and the first conductive line
  • the distance L22 between 701 is not less than 2 ⁇ m-6 ⁇ m; for example, the distance L22 between the two is 4 ⁇ m.
  • the first conductive line 701 and the fifth conductive line 80 on a first conductive structure 700 are disconnected, and there is a certain distance between them. By setting a certain distance, the near field can be effectively avoided.
  • the upper signal of the communication antenna is coupled to the fifth conductive line 80 to affect the performance of the display substrate.
  • the second conductive structure 800 penetrating both the functional area Q111 and the non-functional area Q112 includes the second conductive line 702 and the sixth conductive line 90, and the second conductive line 702
  • the distance between the six conductive lines 90 and the second conductive line 702 is not less than 2 ⁇ m-6 ⁇ m; for example, the distance between the two is 4 ⁇ m. That is to say, the second conductive line 702 and the sixth conductive line 90 on a second conductive structure 800 are disconnected, and there is a certain distance between them. By setting a certain distance, the near field can be effectively avoided.
  • the upper signal of the communication antenna is coupled to the sixth conductive wire 90 to affect the performance of the display substrate.
  • FIG. 15 is a schematic diagram of the wiring of the non-functional area Q112 in the display substrate of the embodiment of the present disclosure; as shown in FIG.
  • the fifth conductive wire 80 adopts a broken wire design.
  • the fifth conductive wire 80 includes a plurality of first sub-conductors 801 arranged side by side along the first direction X at intervals; the gaps between the adjacently arranged first sub-conductors 801 are located set between subpixels.
  • the width L23 of the gap between the adjacent first sub-wires 801 is 2 ⁇ m-6 ⁇ m; for example, the width L23 is 4 ⁇ m.
  • the sixth conductive line 90 can be electrically connected to the common electrode line 400 .
  • the common electrode line 400 includes the above-mentioned first sub-common electrode line and the second sub-common electrode line
  • the sixth conductive line 90 is electrically connected to the first sub-common line through a via hole penetrating the interlayer insulating layer 50, so that the second The voltage on the fifth conductive line 80 and the sixth conductive line 90 is a common voltage, so as to prevent the fifth conductive line 80 and the sixth conductive line 90 from being in a floating state.
  • an end of the sixth conductive wire 90 away from the second region Q12 is connected to the first sub-common wire closest to the end.
  • the near field communication antenna only includes the above-mentioned one coil part 70
  • the first end and the second end of the coil part 70 need to be electrically connected to the control circuit on the flexible circuit board to realize the near field communication antenna.
  • Magnetic induction function Also taking the U-shaped coil part 70 as an example, the ends of the two first substructures 71 of the coil part 70 serve as the first end and the second end of the coil part 70 respectively.
  • FIG. 16 is a schematic diagram of the first lead-out electrode 703 (second lead-out electrode 704) in the display substrate of the embodiment of the present disclosure; as shown in FIG.
  • both the first lead-out electrode 703 and the second lead-out electrode 704 may include The first sub-extraction part 7031 and the second sub-extraction part 7032 are arranged in sequence away from the substrate and electrically connected.
  • the first sub-extraction portion 7031 is provided on the same layer as the first conductive structure 700
  • the second sub-extraction portion 7032 is provided on the same layer as the second conductive structure.
  • the first extraction electrode 703 (the second extraction electrode 704 ) of the first sub-leading portion 7031 and the second sub-leading portion 7032 are electrically connected through a via hole penetrating the interlayer insulating layer 50 .
  • the second lead-out portion of the first lead-out electrode 703 is electrically connected to the second conductive line 702 of one first substructure 71; the second lead-out portion of the second lead-out electrode 704 is connected to another first substructure
  • the second conductive lines 702 of the structures 71 are electrically connected.
  • the electrical connection of the first sub-extraction part 7031 and the second sub-extraction part 7032 as the first extraction electrode 703 (second extraction electrode 704 ) can reduce the resistance.
  • the widths of the first extraction electrode 703 and the second extraction electrode 704 formed in the embodiment of the present disclosure are both larger than the width of the first sub-structure 71 , and the reason why such arrangement can effectively reduce resistance.
  • the first area Q11 is located on the side of the second area Q12 close to the second pad area Q22, and the second pad area Q22 is provided with a first connection pad A and a second connection pad B,
  • the second sub-lead portion 7032 of the first lead-out electrode 703 can be electrically connected to the first connection pad A through the first lead-out line;
  • the second connection pad B is electrically connected; next, the first connection pad A and the second connection pad B can be bonded and connected through the flexible circuit board to realize the connection between the coil part 70 of the near field communication antenna and the control circuit , as shown in Figure 17.
  • first lead-out line and the second lead-out line can be arranged on the same layer as the second conductive structure 800 and use the same material, so that the first lead-out line and the second sub-lead-out part 7032 of the first lead-out electrode 703 electrical connection, and the electrical connection between the second lead wire and the second sub-lead portion 7032 of the second lead electrode 704 .
  • first area Q11 can also be located on the side of the second area Q12 close to the first pad area Q21 , that is, the NFC antenna is disposed on the side of the display area Q1 close to the first pad area Q21 .
  • the first area Q11 on both sides of the second area Q12 close to the first pad area Q21 and the second pad area Q22, and at this time, two NFC antennas are set in the display area Q1.
  • two, or even more, the first end and the second end of the coil part 70 of the near field communication antenna can adopt the above structure.
  • the near field communication antenna may only include one coil part 70 .
  • 18 is a schematic diagram of another display substrate according to an embodiment of the present disclosure
  • FIG. 19 is a schematic diagram of a near-field communication antenna in the display substrate shown in FIG. 18
  • FIG. 20 is a redundant function in the display substrate shown in FIG.
  • FIG. 18 Schematic diagram of the wiring in area Q111b; as shown in Figure 18-20, for the convenience of description, the functional area Q111 in the first area Q11 is divided into the first sub-functional area Q111a and the redundant functional area Q111b, one of the first sub-functional area A coil part 70 of the near field communication antenna is disposed in Q111a, and the area between two adjacent first sub-functional areas Q111a is a redundant functional area Q111b.
  • the structure of the coil part 70 in the first sub-functional area Q111a is the same as the above-mentioned structure, that is, it includes first conductive wires 701 and second conductive wires 702 arranged crosswise.
  • first conductive line 701 and the seventh conductive line 150 on the same first conductive structure 700 should be disconnected, and the first conductive line 701 on the same first conductive structure 700 and the nearest seventh conductive line
  • the minimum distance between the conductive lines 150 should meet the requirement that no coupling occurs between the signal on the first conductive line 701 and the seventh conductive line 150 .
  • the second conductive wire 702 and the eighth conductive wire 160 on the same second conductive structure 800 should be disconnected, and the second conductive wire 702 on the same second conductive structure 800 and the nearest eighth conductive wire
  • the minimum distance between the conductive lines 160 should meet the requirement that no coupling occurs between the signal on the second conductive line 702 and the eighth conductive line 160 .
  • the distance between the first conductive line 701 and the nearest seventh conductive line 150 in the same first conductive structure 700 is 2 ⁇ m-6 ⁇ m, for example, the distance between the two is about 4 ⁇ m.
  • the distance between the eighth conductive line 160 in the same second conductive structure 800 and the nearest second conductive line 702 is 2 ⁇ m-6 ⁇ m, for example, the distance between the two is about 4 ⁇ m.
  • the shape of the first sub-functional area Q111a is adapted to the shape of the coil part 70, so the shape of the first sub-functional area Q111a is also U-shaped.
  • the redundant functional area Q111b is located between two adjacent first sub-functional areas Q111a, that is, the redundant functional area Q111b is defined by the adjacent first sub-functional area Q111a, so the redundant function
  • the shape of the region Q111b is also U-shaped.
  • the redundant coil adopts a U-shaped structure.
  • the redundant coil part includes two first sub-redundant structures 1401 arranged side by side along the first direction X and extending in the second direction Y, and extending along the first direction X and connected between the two first sub-redundant structures 1401.
  • the second sub-redundant structure 1402 between the redundant structures 1401; the first sub-redundant structure 1401 and the second sub-redundant structure 1402 both include the seventh conductive wire 150 and the eighth conductive wire 160, and the first sub-redundant structure
  • the eighth conductive line 160 of the structure 1401 extends to the area where the second sub-redundant structure 1402 is located, and the seventh conductive line 150 of the second sub-redundant structure 1402 extends to the area where the first sub-redundant structure 1401 is located, so as to realize two second redundant structures.
  • the eighth conductive wire 160 in a sub-redundant structure 1401 is electrically connected to the seventh conductive wire 150 in the second sub-redundant structure 1402, thereby realizing two first sub-redundant structures 1401 and the second sub-redundant structure 1402 electrical connection.
  • the seventh conductive wire 150 in the first sub-redundant structure 1401 is designed to be disconnected, and the second sub-redundant
  • the eighth conductive wire 160 in the redundant structure 1402 is designed to be disconnected to avoid coupling between the first conductive wire 701 and the seventh conductive wire 150 on the same first conductive structure 700 and affect the normal operation of the display substrate.
  • the coupling between the second conductive line 702 and the eighth conductive line 160 on the conductive structure 800 affects the normal operation of the display substrate.
  • the seventh conductive wire 150 in the first sub-redundant structure 1401 includes a plurality of second sub-wires 1501 arranged side by side along the first direction X; The gap between the wires 1501 is located between adjacently arranged sub-pixels; similarly, the eighth conductive wire 160 in the second sub-redundant structure 1402 includes a plurality of third sub-wires 1601 arranged side by side along the second direction Y; The gap between the third sub-wires 1601 arranged adjacently is located between the sub-pixels arranged adjacently.
  • the width L24 of the gap between adjacent second sub-wires 1501 is 2 ⁇ m-6 ⁇ m,
  • the gap width L24 between the two is about 4 ⁇ m.
  • the width L25 of the gap between the adjacent third sub-wires 1601 is 2 ⁇ m-6 ⁇ m, for example, the gap width L25 between the two Around 4 ⁇ m.
  • the gap between the second sub-wire 1501 on the seventh conductive wire 150 in the first sub-redundant structure 1401 and the third sub-wire on the eighth conductive wire 160 in the second sub-redundant structure 1402 can effectively avoid coupling between adjacent coil parts 70 in the NFC antenna.
  • the eighth conductive line 160 in the first sub-redundant structure 1401 and the seventh conductive line 150 in the second sub-redundant structure 1402 are both It is electrically connected with the common electrode line 400 .
  • the common electrode line 400 includes the first sub-common electrode line and the second sub-common electrode line.
  • the eighth conductive line 160 of the first sub-redundant structure 1401 and the first sub-common electrode line pass through the interlayer
  • the via hole of the insulating layer 50 is electrically connected, and the seventh conductive line 150 in the second sub-redundant structure 1402 is electrically connected with the second sub-common electrode line through the via hole of the interlayer insulating layer 50, so that the redundant coil part
  • the voltage on the seventh conductive line 150 and the eighth conductive line 160 in the circuit is a common voltage, so as to prevent the seventh conductive line 150 and the eighth conductive line 160 from being in a floating state.
  • the eighth conductive line 160 of the first sub-redundant structure 1401 is arranged to intersect with the seventh conductive line 150 of the second sub-redundant structure 1402, and are electrically connected through a via hole penetrating the interlayer insulating layer 50, it is also possible Only the eighth conductive line 160 in the two first sub-redundant structures 1401 is electrically connected to the first sub-common electrode line through the via hole penetrating the interlayer insulating layer 50; or, only the second sub-redundant structure 1402
  • the seventh conductive line 150 is electrically connected to the second sub-common electrode line through the via hole of the interlayer insulating layer 50, both of which can also realize the seventh conductive line 150 and the eighth conductive line 160 in the redundant coil part
  • the voltage on is the common voltage.
  • the near field communication antenna when there are multiple coil parts 70 in the near field communication antenna, the near field communication antenna further includes a connection jumper 130 arranged on the base substrate 10, and the connection jumper 130 is connected to the coil part 70 connected to form a helical coil.
  • the near field communication antenna includes two coil parts 70 as an example for illustration.
  • the two coil parts 70 are respectively referred to as the first coil part 70a and the second coil part 70b.
  • the second coil part 70b is embedded in the first coil part 70a, the first coil part 70a and the second coil part 70b both include a first end and a second end, and the two ends of the connecting jumper 130 are respectively The first end of the first coil part 70a and the second end of the second coil part 70b are connected.
  • the second end of the first coil part 70a is used as the first end of the near field communication antenna
  • the first end of the second coil part 70b is used as the second end of the near field communication antenna.
  • the near-field communication antenna also includes a second end connected to the first coil part 70a and a second coil respectively.
  • the first end of the portion 70b is electrically connected to the first lead-out electrode 703 and the second lead-out electrode 704 .
  • both the first lead-out electrode 703 and the second lead-out electrode 704 may include a first sub-lead-out portion 7031 and a second sub-lead-out portion 7032 arranged in sequence along a direction away from the substrate and electrically connected.
  • the first sub-extraction portion 7031 is provided on the same layer as the first conductive structure 700
  • the second sub-extraction portion 7032 is provided on the same layer as the second conductive structure.
  • the first extraction electrode 703 (the second extraction electrode 704 ) of the first sub-leading portion 7031 and the second sub-leading portion 7032 are electrically connected through a via hole penetrating the interlayer insulating layer.
  • the second lead-out portion of the first lead-out electrode 703 is electrically connected to the second conductive line 702 of one first substructure 71; the second lead-out portion of the second lead-out electrode 704 is connected to another first substructure
  • the second conductive lines 702 of the structures 71 are electrically connected.
  • the electrical connection of the first sub-extraction portion 7031 and the second sub-extraction portion 7032 as the first extraction electrode 703 (second extraction electrode 704 ) can reduce resistance.
  • the first area Q11 is located on the side of the second area Q12 close to the second pad area Q22, and the first connection pad A and the second pad area Q22 are provided in the second pad area Q22.
  • Connect pad B at this time, the second sub-extraction portion 7032 of the first extraction electrode 703 can be electrically connected to the first connection pad A through the first extraction line; the second sub-extraction portion 7032 of the second extraction electrode 704 can be connected through The second lead-out wire is electrically connected to the second connection pad B; next, it can be bound and connected to the first connection pad A and the second connection pad B through the flexible circuit board to realize the coil part 70 of the near-field communication antenna connection to the control circuit.
  • first lead-out line and the second lead-out line can be arranged on the same layer as the second conductive structure 800 and use the same material, so that the first lead-out line and the second sub-lead-out part 7032 of the first lead-out electrode 703 electrical connection, and the electrical connection between the second lead wire and the second sub-lead portion 7032 of the second lead electrode 704 .
  • first area Q11 can also be located on the side of the second area Q12 close to the first pad area Q21 , that is, the NFC antenna is disposed on the side of the display area Q1 close to the first pad area Q21 .
  • the first area Q11 on both sides of the second area Q12 close to the first pad area Q21 and the second pad area Q22, and at this time, two NFC antennas are set in the display area Q1.
  • two, or even more, the first end and the second end of the coil part 70 of the near field communication antenna can adopt the above structure.
  • connection jumper 130 in the near field communication antenna can be provided with a peripheral area Q2, which can be provided on the same layer as the first conductive structure 700 and adopt the same material.
  • the first coil part 70a of the first coil part 70a The second conductive wire 702 at one end position can be electrically connected to the connection jumper 130 through the via hole penetrating the interlayer insulating layer 50; the second conductive wire 702 at the second end position of the second coil part 70b can pass through the layer The vias of the inter-insulation layer 50 are electrically connected to the connection jumpers 130 .
  • the connection jumper 130 may be a partial structure on the first conductive structure 700 . At this time, the connection jumper 130 extends along the first direction X.
  • the connection jumper 130 may also be disposed in the peripheral area Q2.
  • the display substrate may further include a flexible circuit board, and when there are multiple coil parts 70 in the near field communication antenna, the connection jumpers 130 of the near field communication antenna may also be formed on the flexible circuit board.
  • the coil part 70 in the near-field communication antenna can adopt the same structure as above. At this time, as shown in FIG.
  • the second sub-leading part 7032 can be electrically connected to the first connection pad A through the first lead-out line; the first end of the second coil part 70b is connected to the second lead-out electrode 704, and the second sub-leading part 7032 of the second lead-out electrode 704 can be
  • the second lead-out line is electrically connected to the second connection pad B; the connection jumper 130 is bound and connected to the first connection pad A and the second connection pad B on the display substrate through the connection pad on the flexible circuit board, In this way the helical coil of the near field communication antenna is formed.
  • the display area Q1 in the display substrate includes a first area Q11 and a first second area Q12, and the first area Q11 is located in the second area Q12 close to the second pad area Q22 side.
  • a near field communication antenna having a coil portion 70 is disposed in the first area Q11.
  • the first area Q11 includes a non-functional area Q112 and a functional area Q111 surrounding the non-functional area Q112, and the coil part 70 is provided in the functional area Q111.
  • the specific structure of the coil part 70 is as described above, so it will not be repeated here.
  • the fifth conductive line 80 and the sixth conductive line 90 intersecting are arranged in the non-functional area Q112; the third conductive line 110 and the fourth conductive line 120 intersecting are arranged in the second area Q12.
  • the third conductive wire 110 , the fourth conductive wire 120 , the fifth conductive wire 80 and the sixth conductive wire 90 have been described in detail above, so the description will not be repeated here.
  • the display area Q1 in the display substrate includes a first area Q11 and a first second area Q12, and the first area Q11 is located in the second area Q12 close to the second pad area Q22 side.
  • a near field communication antenna having two coil parts 70 is disposed in the first area Q11.
  • the two coil parts 70 are referred to as a first coil part 70a and a second coil part 70b, respectively.
  • the first area Q11 includes a non-functional area Q112 and a functional area Q111 surrounding the non-functional area Q112; the functional area Q111 includes two first sub-functional areas Q111a and a redundant functional area Q111b between the two first sub-functional areas Q111a;
  • the first coil part 70a and the second coil part 70b are respectively arranged in two first sub-functional areas Q111a.
  • the specific structures of the first coil part 70a and the second coil part 70b are as described above, so the description will not be repeated here.
  • the above-mentioned seventh conductive line 150 and eighth conductive line 160 are arranged in the redundant functional area Q111b; the above-mentioned fifth conductive line 80 and sixth conductive line 90 arranged crosswise are arranged in the non-functional area Q112; the second area Q12
  • the above-mentioned third conductive wires 110 and fourth conductive wires 120 intersect.
  • the third conductive wire 110, the fourth conductive wire 120, the fifth conductive wire 80, the sixth conductive wire 90, the seventh conductive wire 150 and the eighth conductive wire 160 have been described in detail in the above content, so they will not be discussed here. Repeat the description again.
  • FIG. 22 is a schematic diagram of another display substrate according to an embodiment of the present disclosure; as shown in FIG. 22 , the display area Q1 in the display substrate includes two first regions Q11 and a first second region Q12, And one of the two first areas Q11 is located at a side of the second area Q12 close to the first pad area Q21 , and the other is located at a side of the second area Q12 close to the second pad area Q22 .
  • the structure arranged in a first area Q11 is the same as that in FIG.
  • the structure is the same as that in FIG. 18 , that is, a near-field communication antenna with one coil portion 70 is provided, so details are not repeated here.
  • an embodiment of the present disclosure further provides a display device, which includes the above-mentioned display substrate and a cell-matching substrate.
  • a black matrix is arranged on the box substrate, and the orthographic projections of the gate line GL, the data line DL, the first conductive structure 700 and the second conductive structure 800 on the base substrate 10 are all located within the range of the orthographic projection of the black matrix on the substrate.
  • the display device also has a control circuit connected to the near field communication antenna.
  • the display device can be a liquid crystal display panel, an OLED panel, a mobile phone, a tablet computer, a digital photo frame, a navigator, and other products or devices with display and communication functions.

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Abstract

本公开提供一种显示基板及显示装置,属于显示技术领域。本公开的显示基板,其具有显示区和环绕所述显示区的外围区;该显示基板包括:衬底基板;多个第一导电结构,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多个第一导电结构沿第一方向延伸,沿第二方向并排设置;层间绝缘层,设置在所述第一导电结构背离所述衬底基板的一侧;多个第二导电结构,设置在层间绝缘层背离所述衬底基板的一侧,且位于显示区和所述外围区;所述多个第二导电结构沿所述第二方向延伸,且沿第一方向并排设置;所述第二导电结构与所述第一导电结构交叉设置,并通过贯穿所述层间绝缘层的过孔电连接;至少一个第三导电结构,设置在衬底基板上,且位于显示区。

Description

显示基板及显示装置 技术领域
本公开属于显示技术领域,具体涉及一种显示基板及显示装置。
背景技术
近场通讯技术(Near Field Communication,NFC)是一种非接触式识别和互联技术,其采用近场磁场通信方式,具有传输距离近,能耗低,信号不易被干扰等特点,可在移动设备、消费类电子产品间进行近距离无线通信。
近场通讯技术已普遍应用于电子设备上进行数据交换,要利用NFC通讯技术,需要在设备上安装通讯天线用于收发电磁波信号,而通讯天线需要占据较大的空间。现有的运用NFC通讯技术的电子设备,大多是通过将独立的NFC通讯模块,外置于电子设备的主板上,因此,需要占据较大的空间,不利于设备的轻薄化设计。
发明内容
本发明旨在至少解决现有技术中存在的技术问题之一,提供一种显示基板及显示装置。
第一方面,本公开实施例提供一种显示基板,其具有显示区和环绕所述显示区的外围区;所述显示基板包括:
衬底基板;
多个第一导电结构,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多个第一导电结构沿第一方向延伸,且沿第二方向并排设置;
层间绝缘层,设置在所述第一导电结构背离所述衬底基板的一侧;
多个第二导电结构,设置在所述层间绝缘层背离所述衬底基板的一侧,且位于所述显示区和所述外围区;所述多个第二导电结构沿所述第二方向延伸,且沿所述第一方向并排设置;所述第二导电结构与所述第一导电结构交叉设置,并通过贯穿所述层间绝缘层的过孔电连接;
至少一个第三导电结构,设置在所述衬底基板上,且至少位于所述显示 区;其中,
所述第三导电结构包括多条第一导电线和多条第二导电线;所述第一导电线为所述第一导电结构的至少部分结构,且部分所述第一导结构包括两条所述第一导电线;所述第二导电线为所述第二导电结构的至少部分结构。
其中,所述显示基板还包括:
多条栅线,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多条栅线沿所述第一方向延伸,且沿所述第二方向并排设置;
多条数据线,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多条栅线沿所述第二方向延伸,且沿所述第一方向并排设置;
多个子像素,设置在衬底基板上,且位于所述显示区;所述栅线和所述数据线交叉设置限定的区域内设置所述子像素;沿所述第一方向并排设置的所述子像素形成第一像素组;沿第二方向并排设置的所述子像素形成第二像素组;在任意相邻设置的所述第一像素组之间设置有一个所述第一导电结构。
其中,至少部分两相邻设置的所述第二像素组之间设置有一个所述第二导电结构。
其中,位于同一所述第二像素组中的各个所述子像素的颜色相同,且沿所述第一方向并排设置的每N个子像素构成一像素单元,N≥2;所述N为整数;沿所述第二方向并排设置的所述像素单元形成一像素单元组;每个所述像素单元组内均设置有至少一个所述第二导电结构。
其中,所述像素单元中的所述N个子像素包括红色子像素、绿色子像素和蓝色子像素;所述第二导电结构位于所述红色子像素和所述绿色子像素之间。
其中,所述显示基板包括至少一个第一区域和至少一个第二区域;一个所述第三导电结构位于一个所述第一区域内;
所述显示基板还包括:
多条第三导电线和多条第四导电线,设置在所述衬底基板上,且位于所述第二区域和所述外围区;所述多条第三导电线和多条第四导电线交叉设置,且一条第三导电线为一个所述第一导电结构的至少部分结构;一条第四导电线位于一个所述第二导电结构的部分结构;一个所述第二导电结构中的所述第四导线与所述第二导电线之间的距离为2μm-6μm。
其中,所述显示基板还包括:
公共电极线,设置在所述衬底基板上,且位于外围区;所述公共电极线包括沿所述第一方向延伸的第一子公共电极线和沿所述第二方向延伸的第二子公共电极线;所述第一子公共电极线与第一导线结构同层设置,且材料相同;所述第二子公共电极线与所述第二导电结构同层设置,且材料相同;所述第一子公共电极线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;
所述第三导电线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;和/或,
所述第四导电线与所述第一子公共电极线通过所述贯穿层间绝缘层的过孔电连接。其中,所述第三导电结构包括至少一个线圈部;所述线圈部至少包括两个延伸方向不同的子结构;每个所述子结构均包括所述第一导电线和第二导电线。
其中,所述线圈部包括三个子结构,分别为两个第一子结构和一个第二子结构;两个所述第一子结构均沿第二方向沿延伸,且在所述第一方向上并排设置,所述第二子结构连接在两个所述第一子结构之间。
其中,所述显示区包括至少一个第一区域和至少一个第二区域;所述第三导电结构位于所述第一区域;所述第一区域包括非功能区和环绕所述非功能区的功能区;所述线圈部设置在所述功能区;
所述显示基板还包括:交叉设置的多条第五导电线和多条第六导电线、位于所述非功能区;所述第一导电结构包括所述第五导电线;所述第二导电结构包括所述第六导电线;同一所述第一导电结构中的所述第五导电线与所 述第一导电线之间的距离为2μm-6μm;和/或,
同一所述第二导电结构中的所述第六导电线与所述第二导电线之间的距离2μm-6μm。
其中,所述第五导电线包括沿第一方向并排且间隔设置的多个第一子导线;相邻设置的所述第一子导线之间的间隙位于相邻设置的所述子像素之间。
其中,相邻设置的所述第一子导线之间的间隙的宽度为2μm-6μm。
其中,所述显示基板还包括:
公共电极线,设置在所述衬底基板上,且位于外围区;所述公共电极线包括沿所述第一方向延伸的第一子公共电极线和沿所述第二方向延伸的第二子公共电极线;所述第一子公共电极线与第一导线结构同层设置,且材料相同;所述第二子公共电极线与所述第二导电结构同层设置,且材料相同;所述第一子公共电极线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;
所述第六导电线与所述第一子公共电极线通过贯穿所述层间绝缘层的过孔电连接。
其中,所述显示区包括至少一个第一区域和至少一个第二区域;所述第三导电结构位于所述第一区域;所述第一区域包括非功能区和环绕所述非功能区的功能区;所述功能区包括嵌套设置的子功能区和位于相邻设置的所述子功能区之间的冗余功能区;一个所述子功能区中设置一个所述线圈部;
所述显示基板还包括设置在所述衬底基板上的冗余线圈部;且在一个所述冗余功能区中设置一个所述冗余线圈部;
所述冗余线圈部包括交叉设置的多条第七导电线和多条第八导电线,位于所述冗余功能区;一条所述第七导电线为一个所述第一导电结构的部分结构,一条所述第八导电线为一个所述第二导电结构的部分结构。
其中,同一所述第一导电结构中的第一导电线和与之最近的所述第七导电线之间的距离为2μm-6μm;和/或,
同一所述第二导电结构中的所述第八导电线和与之最近的所述第二导电线之间的距离2μm-6μm。
其中,所述冗余线圈部包括沿第一方向并排设置且第二方向延伸的两个第一子冗余结构,以及沿所述第一方向延伸,且连接在两个所述第一子冗余结构之间的第二子冗余结构;所述第一子冗余结构和所述第二子冗余结构均包括所述第七导电线和所述第八导电线;所述第一冗余结构中的所述第八导电线延伸至所述第二冗余结构所在区域,所述第二冗余结构中的所述第七导电线延伸至所述第一冗余结构所在区域;
所述第一子冗余结构中的第七导电线包括沿所述第一方向并排设置的多条第二子导线;相邻设置的所述第二子导线之间的间隙位于相邻设置的所述子像素之间;和/或,
所述第二子冗余结构中的第八导电线包括沿所述第二方向并排设置的多条第三子导线;相邻设置的所述第三子导线之间的间隙位于相邻设置的所述子像素之间。
其中,相邻设置的所述第二子导线之间的间隙的宽度为2μm-6μm;和/或,相邻设置的所述第三子导线之间的间隙的宽度为2μm-6μm。
其中,所述显示基板还包括:
所述公共电极线包括沿所述第一方向延伸的第一子公共电极线和沿所述第二方向延伸的第二子公共电极线;所述第一子公共电极线与第一导线结构同层设置,且材料相同;所述第二子公共电极线与所述第二导电结构同层设置,且材料相同;所述第一子公共电极线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;
所述第一子冗余结构的所述第八导电线与所述第一子公共电极线通过贯穿所述层间绝缘层的过孔电连接;和/或,
所述第二子冗余结构中的第七导电线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接。
其中,所述显示基板还包括设置在所述衬底基板上的连接跳线,所述连 接跳线与所述线圈部连接,构成螺旋线圈。
其中,所述显示基板还包括柔性线路,在所述柔性线路板上设置有连接跳线,所述连接跳线与所述线圈部连接,构成螺旋线圈。
其中,所述线圈部的数量为两个,两个所述线圈部分别为第一线圈部和第二线圈部,且所述第一线圈部环绕第二线圈部;所述第一线圈部和所述第二线圈部均包括第一端和第二端,所述连接跳线的两端分别连接所述第一线圈部的第一端和第二线圈部的第二端。
其中,所述第一线圈部的第二端连接第一引出电极;所述第二线圈部的第一端连接第二引出电极;所述第一引出电极和/或所述第二引出电极包括在设置在所述衬底基板上,且通过贯穿层间绝缘层的过孔电连接第一子引出部和第二子引出部;所述第一子引出部和所述第一子结构同层设置且材料相同,所述第二子引出部与所述第二子结构同层设置且材料相同。
其中,所述显示基板还包括:第一导电层,设置在衬底基板上;所述第一导电层包括所述第一导电结构和所述栅线;
第二导电层,设置在层间绝缘层背离所述衬底基板的一侧;所述第二导电层包括所述第二导电结构和所述数据线。
其中,所述第一导电结构包括第一主体部和第一连接部;所述第一主体部沿所述第一方向延伸,所述第一连接部连接在所述第一主体部上;所述第二导电结构包括第二主体部和第二连接部;所述第二主体部沿所述第二方向延伸,且所述第二连接部连接在所述第二主体部上;所述第一导电结构的第一连接部通过贯穿所述层间绝缘层的过孔,和与之交叉设置的所述第二导电结构的第二连接部连接。
其中,所述第一连接部位于其所连接的所述第一主体部和距离该第一主体部最近的所述栅线之间;所述第二连接部位于其所连接的所述第二主体部背离该第二主体部最靠近的所述数据线的一侧;
所述第一连接部和所述第二连接部均包括在所述第一方向上相对的第一侧边和第二侧边,以及沿所述第二方向相对的第三侧边和第四侧边;其中,
所述第一连接部的第三侧边连接所述第一主体部;所述第二连接部的第二侧边连接所述第二主体部;
所述第一连接部的第一侧边和第三侧边在所述衬底基板上的正投影到所述过孔在所述衬底基板上的正投影的距离均不小于2.0μ;和/或,
所述第二连接部的第一侧边、第三侧边和第四侧边在所述衬底基板上的正投影到所述过孔在所述衬底基板上的正投影的距离均不小于2.0μm。
其中,所述第一连接部和与之最靠近的所述栅线之间的距离不小于4μm。
其中,所述第二主体部和与之最靠近的所述数据线之间的距离不小于3.5μm。
其中,所述子像素至少包括薄膜晶体管、像素电极、公共电极;所述薄膜晶体管的栅极与所述栅线同层设置,且材料相同,所述薄膜晶体管的源极和漏极与所述数据线同层设置,且材料相同;所述像素电极与所述薄膜晶体管的漏极连接,所述公共电极位于所述像素电极背离所述衬底基板的一侧,且在所述公共电极所在层和所述像素电极所在层之间设置有钝化层;
所述第二连接部和与之对靠近的所述像素电极之间的距离不小于2.0μm。
其中,所述子像素至少包括薄膜晶体管、像素电极、公共电极;所述薄膜晶体管的栅极与所述栅线同层设置,且材料相同,所述薄膜晶体管的源极和漏极与所述数据线同层设置,且材料相同;所述像素电极与所述薄膜晶体管的漏极连接,所述公共电极位于所述像素电极背离所述衬底基板的一侧,且在所述公共电极所在层和所述像素电极所在层之间设置有钝化层;
各个所述子像素中的所述公共电极连接为一体结构形成公共电极层;
所述公共电极层包括沿所述第二方向延伸且沿所述第一方向并排设置的多个第一开口;一个所述第一开口在所述衬底基板上的正投影与一个所述第二导电结构在所述衬底基板上的正投影部分重叠。
其中,所述公共电极为狭缝电极;所述第一导电结构与所述公共电极在 所述衬底基板上的正投影至少部分重叠。
其中,所述公共电极层还包括多个沿第一方向延伸且沿所述第二方向并排设置的多个第二开口,一个所述第二开口在所述衬底基板上的正投影与沿所述第一方向并排设置的多个所述薄膜晶体管在所述衬底基板上的正投影至少部分重叠。
其中,所述外围区包括位于所述显示区在所述第二方向上的两相对侧的第一焊盘区和第二焊盘区;在所述显示区靠近所述第一焊盘区的一侧和/或所述第二焊盘区的一侧均设置有所述第三导电结构。
其中,所述第三导电结构包括近场通信天线。
第二方面,本公开实施例提供一种显示装置,其包括上述的显示基板。
其中,所述显示装置还包括对盒基板,所述对盒基板上设置有黑矩阵,所述第三导电结构在所述衬底基板上的正投影位于所述黑矩阵在所述衬底基板上的正投影范围之内。
附图说明
图1为一种示例性的显示基板的示意图。
图2为图1所示的显示基板的A-A'的截面图。
图3为本公开实施例的一种显示基板的示意图。
图4为本公开实施例的一种显示基板的部分结构示意图。
图5为本公开实施例的显示基板的版图。
图6为图5所示的显示基板的B-B'的截面图。
图7为本公开实施例的显示基板中的第一导电结构和第二导电结构电连接的示意图。
图8为本公开实施例的显示基板中的版图的部分位置示意图。
图9为本公开实施例的显示基板中的公共电极层的版图。
图10为本公开实施例的显示基板的版图的部分位置示意图。
图11为图10中A位置的放大示意图。
图12为本公开实施例的显示基板中的一种近场通信天线的示意图。
图13为本公开实施例的显示基板的版图的部分位置的示意图。
图14为图13的B位置的放大示意图。
图15为本公开实施例的显示基板中的非功能区的布线示意图。
图16为本公开实施例的显示基板中的第一引出电极(第二引出电极)的示意图。
图17为图12所示的场通信天线与连接焊盘连接的示意图。
图18为本公开实施例的另一种显示基板的示意图。
图19为图18所示的显示基板中的近场通信天线的示意图。
图20为图18所示的显示基板中的冗余功能区中的布线示意图。
图21为图19所示的场通信天线与连接焊盘连接的示意图。
图22为本公开实施例的另一种显示基板的示意图。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明作进一步详细描述。
除非另外定义,本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性,而只是用来区分不同的组成部分。同样,“一个”、“一”或者“该”等类似词语也不表示数量限制,而是表示存在至少一个。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同,而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接,而是可以包括电性的连接,不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系,当被描述对象的绝对位置改变后,则该相对位置关系也可能相应地改变。
需要说明的是,本公开实施例提供一种显示基板及显示装置。该显示装置可以为液晶显示装置(Liquid Crystal Display)也可以为有机电致发光二极管OLED(Organic Light-Emitting Diode)显示装置。当然,还可以是其他类型的显示装置,在此不一一列举。在本公开实施例中以显示装置为液晶显示装置为例进行描述。其中,液晶显示装置包括相对设置的显示基板和对盒基板,以及设置在显示基板和对盒基板之间的液晶层。其中所采用的显示基板可以为阵列基板,也可以是COA基板(Color On Array)。当显示基板为阵列基板时,对盒基板则包括彩膜层;当显示基板为COA基板时,则无需在对盒基板上设置彩膜层。在本公开实施例中,以显示基板为阵列基板为例进行说明。
图1为一种示例性的显示基板的示意图;如图1所示,该显示基板具有显示区Q1和环绕显示区Q1的外围区Q2;外围区Q2包括位于显示区Q1一侧的第一焊盘区Q21。该显示基板包括衬底基板10,设置在该衬底基板10上的多条栅线GL和多条数据线DL,以及由栅线GL和数据线DL交叉设置所限定出的多个子像素。其中,多条栅线GL沿第一方向X延伸,且沿第二方向Y并排设置;多条数据线DL沿第二方向Y延伸,且沿第一方向X并排设置;沿第一方向X并排设置的多个子像素01形成一第一像素组;沿第二方向Y并排设置的多个子像素01形成一第二像素组。每个子像素至少包括薄膜晶体管20、像素电极30和公共电极40。位于同一第一像素组中的各子像素01中的薄膜晶体管20的栅极连接同一条栅线GL;位于同一第二像素组中的各子像素中的薄膜晶体管20的源极连接同一条数据线DL。图2为图1所示的显示基板的A-A'的截面图,如图2所示,子像素01中的薄膜晶体管20包括沿背离衬底基板10方向依次设置的栅极、有源层、源极和漏极。薄膜晶体管20的漏极与像素电极30连接。在栅极和有源层所在层之间设置层间绝缘层50(用作栅极绝缘层),像素电极30位于层间绝缘层50背离衬底基板10的一侧;在薄膜晶体管20的源极和漏极、像素电极30背离衬底基板10的一侧覆盖有钝化层60,公共电极40形成在钝化层60背离衬底基板10的一侧。其中,像素电极30采用板状电极,公共电极40采用 狭缝电极。
需要说明的是,本公开实施例中所谓第一方向X和第二方向Y并非是指直线延伸的方向,而是指某一结构的走向或者某一结构的长度方向。图2中仅以薄膜晶体管20为底栅型薄膜晶体管20为例,这并不构成对本公开实施例保护范围的限制。薄膜晶体管20也可以采用顶栅型薄膜晶体管20。另外,在本公开实施例中,各子像素中的均包括像素电极30和公共电极40,在一些示例中,公共电极40也可以设置在彩膜基板,例如TN模式的显示装置,因此公共电极40设置在显示基板上也并不构成对本公开实施例保护范围的限制。在本公开实施例中仅以像素电极30和公共电极40均设置在显示基板为例进行说明。
另外,显示基板包括呈阵列排布的多个像素单元100,每个像素单元100包括N个子像素,N≥2,且N为整数。在本公开实施例中以一个像素单元中包括三个子像素,也即N=3为例。例如每个像素单元包括红色子像素、绿色子像素和蓝色子像素。在该种情况下,可以是位于同一列的子像素的发光颜色相同。
针对上述显示基板,在本公开实施例中通过在其中集成第三导电结构,以实现显示以外的附加功能,例如信号的收发功能等。在下述描述中以第三导电结构为近场通信天线中的线圈部70为例,但应当理解的是,这并不构成对本公开实施例保护范围的限制。
第一方面,图3为本公开实施例的一种显示基板的示意图;图4为本公开实施例的一种显示基板的部分结构示意图;如图3和4所示,本公开实施例提供一种显示基板,该显示基板具有显示区Q1和环绕显示区Q1的外围区Q2。该显示基板包括:衬底基板10、多个第一导电结构700、多个第二导电结构800、层间绝缘层50和至少一个近场通信天线。其中,各个第一导电结构700均设置在衬底基板10上,且位于显示区Q1和所述外围区Q2;各个第一导电结构700沿第一方向X延伸,且沿第二方向Y并排设置。层间绝缘层50设置在第一导电结构700背离衬底基板10的一侧。各个第二导电结构800设置在层间绝缘层50背离衬底基板10的一侧,且位于显示区 Q1和外围区Q2;多个第二导电结构800沿第二方向Y延伸,且沿第一方向X并排设置;第二导电结构800与第一导电结构700交叉设置,并通过贯穿层间绝缘层50的过孔电连接。各个近场通信天线设置在所述衬底基板10上,且位于所述显示区Q1;其中,每个近场通信天线包括至少一个线圈部70,该线圈部70包括交叉设置的多条第一导电线701和多条第二导电线702;第一导电线701为第一导电结构700的至少部分结构,且部分第一导结构包括两条第一导电线701;第二导电线702为第二导电结构800的至少部分结构。
需要说明的是,之所以在本公开实施例中部分第一导电结构700包括两条第一导电线701,是为了能够形成弯折图形,以形成线圈部70。当近场通信天线仅包括一个线圈部70时,该线圈部70的两端与控制电路连接,以形成闭合回路。在该种情况下,外设的磁感应线圈可以与近场通信天线和控制电路内形成感应电流回路,以此完成近场通信。当线圈部70构为多个时,则可以通过连接跳线130将多个线圈部70连接,以形成天线线圈,此时天线的两端连接控制电路,以形成闭合回路,通过外设的磁感应线圈,可在近场通信天线和控制电路内形成感应电流回路,完成近场通信。具体结构将在下述具体示例中描述。
在本公开实施例中,由于将近场通信天线的线圈部70集成在显示区Q1,有利于节约空间,实现显示基板的轻薄化。同时,由于线圈部70由交叉设置的第一导电线701和第二导电线702构成,也即线圈部70为网格结构,因此并不对应用该显示基板的显示装置的显示效果造成影响。另外,由于线圈部70的中的一条第一导电线701为一个第一导电结构700的至少部分结构,一条第二导电线702为一个第二导电结构800的至少部分结构,而第一导电结构700和第二导电结构800是位于显示区Q1和外围区Q2的,因此应用该显示基板的显示装置的显示均一性可以得到保证。
在一些示例中,图5为本公开实施例的显示基板的版图;如图5所示,该显示基板不仅包括上述结构,而且还包括设置在衬底基板10上的多条栅线GL、多条数据线DL和多个子像素。其中,栅线GL位于显示区Q1和外 围区Q2,且各栅线GL沿第一方向X延伸,并沿第二方向Y并排设置。数据线DL位于显示区Q1和外围区Q2,且各数据线DL沿第二方向Y延伸,并沿第一方向X并排设置。子像素是由栅线GL和数据线DL交叉设置限定出来的。在第一方向X上并排设置的子像素形成一第一像素组;在第二方向Y上并排设置的子像素形成一第二像素组。在本公开实施例中,相邻设置的第一像素组之间设置一个第一导电结构700;至少部分相邻第二像素组之间设置第二导电结构800。
需要说明的是,相邻设置的第一像素组之间设置一个第一导电结构700并非指,第一导电结构700整体在衬底基板10上的投影全部位于相邻设置的第一像素组在衬底基板10上的正投影之间。在本公开实施例中,只要第一导电结构700的部分结构位于两相邻的第一像素组之间,则认为第一导电结构700位于两相邻的第一像素组之间。例如:如图5所示,第一导电结构700沿第一方向X延伸的部分(也即下述所描述的第一主体部710)在衬底基板10上的正投影与子像素在衬底基板10上的正投影重叠,但第一导电结构700沿第二方向Y延伸的部分(也即下述所描述的第一连接部720)在衬底基板10上的正投影与子像素在衬底基板10上的正投影无重叠,且位于两个第一像素组之间。由于在第一像素组之间的位置和第二像素组之间的位置均为非透光区,因此,将第一导电结构700设置在相邻的第一像素组之间,第二导电结构800设置在相邻的第二像素组之间并不会影响像素开口率。
在一些示例中,在本公开实施例中,位于同一第二像素组中的各个子像素的颜色相同,相邻设置的第二像素组中的子像素的颜色不同。其中,以显示基板中包括三种颜色的子像素为例,例如:三种颜色的子像素可以分别为红色子像素R、绿色子像素G、蓝色子像素B。沿第一方向X并排设置的每3个子像素构成一个像素单元,也即每个像素单元中包括红色子像素、绿色子像素和绿色子像素。沿第二方向Y并排设置的像素单元形成一像素单元组;每个像素单元组内均设置有至少一个第二导电结构800。
进一步的,在一个示例中,在每个像素单元组内的相邻设置的第二像素组之间均设置有第二导电结构800。也就是说,每个像素单元组内设置有两 个第二导电结构800,其中的一个第二导电结构800位于红色子像素R构成第二像素组与绿色子像素G构成的第二像素组之间,另一个第二导电结构800位于绿色子像素R构成第二像素组与蓝色子像素B构成的第二像素组之间。在另一个示例中,在每个像素单元组内设置一个第二导电结构800,该第二导电结构800位于红色子像素R构成第二像素组与绿色子像素G构成的第二像素组之间。之所以如此设置,是因为红色子像素R的串色风险较大,因此彩膜基板中在对应红色子像素R与绿色子像素G之间位置所形成的黑矩阵的宽度相较其他位置会更宽一些,因此将第二导电结构800设置在该位置不会影响像素开口率。
需要说明的是,在本公开实施例的附图以及下述描述中均以每个像素单元组内仅设置一个第二导电结构800,且该第二导电结构800位于红色子像素与绿色子像素之间为例。但应当理解的是,这并不构成对本公开实施例保护范围的限制。
在一些示例中,图6为图5所所示的显示基板的B-B'的截面图;如图6所示,每个子像素中包括包括薄膜晶体管20、像素电极30和公共电极40;其中,显示基板包括依次设置在衬底基板10上的第一导电层、层间绝缘层50(用作栅极绝绝缘层)、像素电极30、第二导电层、钝化层60和公共电极40。第一导电层包括薄膜晶体管20的栅极、栅线GL和第一导电结构700;其中,薄膜晶体管20的栅极和栅线GL电连接,二者可以为一体成型结构。第二导电层包括薄膜晶体管20的源极和漏极、数据线DL、第二导电结构800。其中,薄膜晶体管20的漏极和像素电极30电连接;薄膜晶体管20的源极和数据线DL电连接,二者可以为一体结构;第二导电结构800通过贯穿绝缘层的过孔电连接第一导电结构700。其中,像素电极30为板状电极,公共电极40则为狭缝电极。
在该种情况下,第一导电层包括薄膜晶体管20的栅极、栅线GL和第一导电结构700,第二导电层包括薄膜晶体管20的源极和漏极、数据线DL和第二导电结构800。在该种情况下,薄膜晶体管20的栅极、栅线GL和第一导电结构700可以采用一次构图工艺制备形成;薄膜晶体管20的源极和 漏极、数据线DL和第二导电结构800可以采用一次构图工艺制备形成。而在本公开实施例中近场通信天线的第一导电线701为第一导电结构700的至少部分结构,第二导电线702为第二导电结构800的至少部分结构,因此,虽然在显示基板中集成近场通信天线,但并不增加工艺步骤。
由于在本公开实施例中,近场通信天线的第一导电线701为第一导电结构700上的至少部分结构,第二导电线702为第二导体结构的至少部分结构,因此保证合理的设置第一导电结构700和第二导电结构800的位置,以及二者连接过位置与过孔的配合关系,才能够保证近场通信天线的性能。在一些示例中,图7为本公开实施例的显示基板中的第一导电结构700和第二导电结构800电连接的示意图;第一导电结构700包括第一主体部710和第一连接部720;第一主体部710沿所述第一方向X延伸,第一连接部720连接在所述第一主体部710上;第二导电结构800包括第二主体部810和第二连接部820;第二主体部810沿所述第二方向Y延伸,且第二连接部820连接在第二主体部810上;对于交叉设置的第一导电结构700和第二导电结构800,其中的第一导电结构700的第一连接部720通过贯穿所述层间绝缘层50的过孔与第二导电结构800的第二连接部820电连接。
例如:图8为本公开实施例的显示基板中的版图的部分位置示意图;如图8所示,第一连接部720位于其所连接的第一主体部710和距离该第一主体部710最近的栅线GL之间;第二连接部820位于其所连接的第二主体部810背离该第二主体部810最靠近的数据线DL的一侧。第一连接部720和第二连接部820均包括在所述第一方向X上相对的第一侧边(左侧边)和第二侧边(右侧边),以及沿第二方向Y相对的第三侧边(下侧边)和第四侧边(上侧边);其中,第一连接部720的第三侧边连接第一主体部710;第二连接部820的第二侧边连接第二主体部810。其中,第一连接部720和第二电连接部二者在衬底基板10上的正投影至少部分重叠,且二者在衬底基板10上的正投影均至少覆盖过孔在衬底基板10上的正投影的至少部分区域。如图7所示,第一连接部720的第一侧边在衬底基板10上的正投影到过孔在所述衬底基板10上的正投影的距离L11,以及第三侧边在衬底基板 10上的正投影到过孔在所述衬底基板10上的正投影的距离L13均不小于2.0μm。例如,第一连接部720的第一侧边到过孔在衬底基板10上的正投影的距离L11为2.4μm,第一连接部720的第三侧边到过孔在衬底基板10上的正投影的距离L13为2.0μm。第二连接部820的第一侧边、第三侧边和第四侧边在衬底基板10上的正投影到过孔在所述衬底基板10上的正投影的距离L14均不小于2.0μm;例如:第二连接部820的第一侧边、第三侧边和第四侧边在衬底基板10上的正投影到过孔在所述衬底基板10上的正投影的距离L14均为2.4μm。另外,过孔在衬底基板10上的正投影到第一导电结构700的第一主体部710在衬底基板10上的正投影的最远距离L12不小于4μm,例如过孔在衬底基板10上的正投影到第一导电结构700的第一主体部710在衬底基板10上的正投影的最远距离L12在5μm左右。
在一些示例中,由于第一导电结构700用作近场通信天线的第一导电线701的至少部分结构,而第一导电结构700与栅线GL同层设置,因此应当保证第一导电结构700与栅线GL之间的距离设定应当避免近场通信天线影响栅线GL的信号。在本公开实施例中,如图8所示,第一导电结构700的第一连接部720和与之最靠近的栅线GL之间的距离L16不小于4μm,例如:二者之间的距离L16在5.2μm左右,以此可以有效的避免信号干扰,同时由于第一导电结构700和栅线同层,故合理的设置二者之间的间距可以保证在二者构图时的曝光间距。
同理,由于第二导电结构800用作近场通信天线的第二导电线702同层的至少部分结构,而第二导电结构800与数据线DL同层设置,因此应当保证第而导电结构与数据线DL之间的距离设定应当避免近场通信天线影响数据线DL上的信号。如图8所示,在本公开实施例中,第二主体部810和与之最靠近的所述数据线DL之间的距离L17不小于3.5μm;例如二者之间的距离L17在4.5μm左右。另外,薄膜晶体管20的漏极和像素电极30直接电连接,因此,像素电极30除与薄膜晶体管20的漏极电连接的位置外,其余位置均与第二导电结构800同层设置,因此为避免第二导电结构800影响像素电极30上的电压信号,在本公开实施例中,第二连接部820和与之对靠 近的像素电极30之间的距离L18不小于2.0μm;例如:第二连接部820和与之对靠近的像素电极30之间的距离L18在2.5μm或者2.99μm左右。
在一些示例中,图9为本公开实施例的显示基板中的公共电极层的版图;如图9所示,由于近场通信天线的线圈部70的第一导电线701设置在第一导电层,第二导电线702设置在第二导电层,而通常各个子像素中的公共电极40是连接在一起的,也即各个子像素中的公共电极40形成公共电极层,该公共公共电极层位于第二导电层背离基底的一侧,为避免公共电极层影响近场通信天线的信号传输,在公共电极层上设置有多个第一开口401,第一开口401沿所述第二方向Y延伸且沿所述第一方向X并排,一个第一开口401在衬底基板10上的正投影与一个第二导电结构800在衬底基板10上的正投影部分重叠。例如:第一开口401与第二导电结构800一一对应设置。进一步的,由于本公开实施例中,公共电极40为狭缝电极,第一导电结构700与公共电极40在衬底基板10上的正投影至少部分重叠,以此可以通过公共电极40上狭缝辅助近场通信天线的信号传输。在一些示例中,公共电极层上还包括多个沿第一方向X延伸且沿所述第二方向Y并排设置的多个第二开口402,一个第二开口402在衬底基板10上的正投影与沿第一方向X并排设置的多个薄膜晶体管20在衬底基板10上的正投影至少部分重叠。此时,虽然第二开口402与近场通信天线的第二导电线702存在一定的间距,但第二开口402也可以辅助近场通信天线的信号传输。
在本公开实施例中,显示区Q1包括至少一个第一区域Q11和第二区域Q12,其中,第一区域Q11被配置设置近场通信天线,且一个第一区域Q11内设置一个近场通信天线的线圈部70。显示区Q1除第一区域Q11外的其他区域则称之为第二区域Q12。外围区Q2包括位于显示区Q1沿第二方向Y两相对侧的第一焊盘区Q21和第二焊盘区Q22。当显示区Q1仅包括一个第一区域Q11时,该第一区域Q11可以设置在第二区域Q12靠近第一焊盘区Q21的一侧,或者位于第二区域Q12靠近第二焊盘区Q22的一侧。这样一来,有助于第一区域Q11内的近场通信天线可以与柔性线路板绑定连接。同理,若显示区Q1包括两个第一区域Q11时,此时,其中的一个第一区域 Q11位于第二区域Q12靠近第一焊盘区Q21的一侧,其中的另一个第一区域Q11位于第二区域Q12靠近第二焊盘区Q22的一侧。当然,本公开实施例中的显示基板的显示区Q1中也可以设置更多个第一区域Q11,也即该显示基板中可以集成更多个近场通信天线的线圈部70。需要说明的是,通常显示基板上的信号线通过第一焊盘区Q21与柔性线路板绑定连接。优选的,近场通信天线位于显示区靠近第二焊盘区Q22的一侧,此时与近场通信天线绑定连接的柔性线路板,和与第一焊盘区Q21绑定连接的柔性线路板并非同一柔性线路板,以此可以避免显示基板上的信号线与近场通信天线的线圈部70之间产生干扰,且可以为近场通信天线的线圈部70的绑定预留充足的空间。
在以下描述中仅以,显示基板的显示区Q1中具有一个或者两个第一区域Q11为例进行描述,也即显示基板中集成一个或者两个近场通信天线的线圈部70。
在一些示例中,图10为本公开实施例的显示基板的版图的部分位置示意图;图11为图10中A位置的放大示意图;如图4、10-11所示,显示基板不仅包括包括设置在第一区域Q11的线圈部70,而且还包括设置在第二区域Q12和外围区Q2的多条第三导电线110和多条第四导电线120;多条第三导电线110和多条第四导电线120交叉设置,且一条第三导电线110为一个第一导电结构700的至少部分结构;一条第四导电线120位于一个第二导电结构800的部分结构。在该种情况下,显示区Q1内均匀分布有第一导电结构700和第二导电结构800,有助于提供显示基板的开口率的均匀性。其中,为避免线圈部70的信号耦合至第二区域Q12,属于同一个第二导电结构800的第二导电线702和第四导电线120断开设置,二者之间的距离L21在2μm-6μm左右,例如二者之间的距离L21为4μm。
进一步的,显示基板不仅包括上述结构还包括位于外围区Q2、设置在衬底基板10上的公共电极线400。当在第二区域Q12设置上述的第三导电线110和第四导电线120时,第三导电线110可以与公共电极线400电连接。例如:公共电极线400包括沿第一方向延伸的第一子公共电极线和沿第二方 向延伸的第二子公共电极线。第一子公共电极线可以与第一导电结构700同层设置,且材料相同;第二子公共电极线可以与第二导电结构800同层设置,且材料相同。此时,第一子公共电极线与第二子公共电极线通过贯穿层间绝缘层50的过孔电连接。第三导电线110通过贯穿层间绝缘层50的过孔与第二子公共电极线电连接,以使第三导电线110和第四导电线120上的电压为公共电压,从而避免第三导电线110和第四导电线120处于悬置(floting)状态。或者,第四导电线120通过贯穿层间绝缘层50的过孔与第一子公共电极线电连接,以使第三导电线110和第四导电线120上的电压为公共电压。当然,也可以是第三导电线110通过贯穿层间绝缘层50的过孔与第二子公共电极线电连接,同时第四导电线120通过贯穿层间绝缘层50的过孔与第一子公共电极线电连接,以此也可以使得第三导电线110和第四导电线120上的电压为公共电压。
需要说明的是,当外围区的轮廓为矩形时,公共电极线400可以包括两条第一子公共电极和两条第二子公共电极线。两条第一子公共电极线在第二方向上并排设置,两条第二子公共电极线在第一方向上并排设置。当第三导电线110与第二子公共电极线连接时,该第三导电线110的两端可以分别连接这两条的第二子公共电极线(第三导电线110的两端分别连接与之最靠近的第一子公共电极线);当第四导电线120与第一子公共电极线连接时,则通过该第四导电线120背离第一区域Q11的一端连接与之该端最靠近的第二子公共电极线。
在一些示例中,图12为本公开实施例的显示基板中的一种近场通信天线的示意图;如图12所示,近场通信天线可以仅包括一个线圈部70,该线圈部70可以包括至少两个延伸方向不同的子结构,每个所述子结构均包括所述第一导电线701和第二导电线702。例如,线圈部70包括V字型、U字型等等。在本公开实施例中,以线圈部70为U字型为例进行描述。如图12所示,该线圈部70包括两个沿第一方向X并排设置、且沿第二方向Y延伸的第一子结构71,以及一个沿第一方向X延伸,且连接在两个第一子结构71之间的第二子结构72。其中,如图4所示,显示区Q1中的第一区域 Q11包括非功能区Q112和环绕非功能区Q112的功能区Q111。线圈部70设置在功能区Q111内。例如:功能区Q111的形状与线圈部70的形状相适配,也即线圈部70为U字型,功能区Q111也呈U字型。在该种情况下,非功能区Q112呈矩形。进一步的,显示基板不仅包括上述结构,还包括位于非功能区Q112、设置在衬底基板10上的交叉设置的多条第五导电线80和第六导电线90。其中,第五导电线80为第一导电结构700上的部分结构,第六导电线90为第二导电结构800上的部分结构。
在一个示例中,图13为本公开实施例的显示基板的版图的部分位置的示意图;图14为图13的B位置处的放大示意图;如图13和14所示,贯穿第一区域Q11的多条第一导电结构700中,同时贯穿功能区Q111和非功能区Q112的第一导电结构700均包括第一导电线701和第五导电线80,且第五导电线80和第一导电线701之间的距离L22不小于2μm-6μm;例如,二者之间的距离L22为4μm。也就是说,一条第一导电结构700上的第一导电线701和第五导电线80是断开设置的,且二者之间存在一定间距,通过设置一定的间距,可以有效的避免近场通信天线的上信号耦合至第五导电线80上而影响显示基板的性能。同理,贯穿第一区域Q11的多条第二导电线702中,同时贯穿功能区Q111和非功能区Q112的第二导电结构800均包括第二导电线702和第六导电线90,且第六导电线90和第二导电线702之间的距离不小于2μm-6μm;例如,二者之间的距离为4μm。也就是说,一条第二导电结构800上的第二导电线702和第六导电线90是断开设置的,且二者之间存在一定间距,通过设置一定的间距,可以有效的避免近场通信天线的上信号耦合至第六导电线90上而影响显示基板的性能。
进一步的,图15为本公开实施例的显示基板中的非功能区Q112的布线示意图;如图15所示,为尽可能避免近场通信天线上的信号耦合至非功能区Q112中,在本公开实施例中,第五导电线80采用断线设计。例如:如图15所示,第五导电线80包括沿第一方向X并排且间隔设置的多个第一子导线801;相邻设置的所述第一子导线801之间的间隙位于相邻设置的子像素之间。其中,相邻设置的所述第一子导线801之间的间隙的宽度L23为2μ m-6μm;例如该宽度L23为4μm。
当显示基板的外围区Q2设置上述的公共电极线400,非功能区Q112设置第五导电线80和第六导电线90时,第六导电线90可以与公共电极线400电连接。例如:公共电极线400包括上述的第一子公共电极线和第二子公共电极线,第六导电线90与第一子公共电线通过贯穿层间绝缘层50的过孔电连接,以使第五导电线80和第六导电线90上的电压为公共电压,从而避免第五导电线80和第六导电线90处于悬置(floting)状态。优选的,第六导电线90远离第二区域Q12的一端连接与该端距离最近的第一子公共电线。
在一些示例中,若近场通信天线仅包括上述的一个线圈部70时,线圈部70的第一端和第二端则需要柔性线路板上的控制电路电连接,以实现近场通信天线的磁感应功能。同样以U字型的线圈部70为例,该线圈部70的两个第一子结构71的端部分别作为线圈部70的第一端和第二端。其中,两个第一子结构71的端部是由显示区Q1延伸至外围区Q2的,同时由于两个第一子结构71的端部位置处的第二导电线702是间隔设置的,为了便于线圈部70与柔性线路板绑定连接以实现与控制电路的电连接,如图12所示,该近场通信天线还包括分别与线圈部70的第一端和第二端电连接的第一引出电极703和第二引出电极704;第一引出电极703和第二引出电极704均位于外围区Q2。其中,图16为本公开实施例的显示基板中的第一引出电极703(第二引出电极704)的示意图;如图16所示,第一引出电极703和第二引出电极704均可以包括沿背离基板方向依次设置且电连接的第一子引出部7031和第二子引出部7032。在一些示例中,第一子引出部7031与第一导电结构700同层设置,第二子引出部7032与第二导结构同层设置,此时,第一引出电极703(第二引出电极704)的第一子引出部7031和第二子引出部7032是通过贯穿层间绝缘层50的过孔电连接的。在该种情况下,第一引出电极703的第二引出部与一个第一子结构71的第二导电线702之间电连接;第二引出电极704的第二引出部与另一个第一子结构71的第二导电线702之间电连接。在本公开实施例中,通过电连接的第一子引出部7031 和第二子引出部7032作为第一引出电极703(第二引出电极704)可以降低电阻。
需要说明的是,在本公开实施例中所形成的第一引出电极703和第二引出电极704的宽度均大于第一子结构71宽度,之所以如此设置可以有效地降低电阻。以图3为例,第一区域Q11位于第二区域Q12靠近第二焊盘区Q22的一侧,在第二焊盘区Q22中设置有第一连接焊盘A和第二连接焊盘B,此时,第一引出电极703的第二子引出部7032可以通过第一引出线与第一连接焊盘A电连接;第二引出电极704的第二子引出部7032可以通过第二引出线与第二连接焊盘B电连接;接下来,可以通过柔性线路板与第一连接焊盘A和第二连接焊盘B绑定连接,以实现近场通信天线的线圈部70与控制电路的连接,如图17所示。其中,第一引出线和第二引出线可以与第二导电结构800同层设置,且采用相同的材料,这样一来,便于第一引出线和第一引出电极703的第二子引出部7032的电连接,以及第二引出线和第二引出电极704的第二子引出部7032的电连接。同理,第一区域Q11也可位于第二区域Q12靠近第一焊盘区Q21的一侧,也即近场通信天线则设置在显示区Q1的靠近第一焊盘区Q21的一侧。当然还可以是,在第二区域Q12靠近第一焊盘区Q21和第二焊盘区Q22的两侧均设置第一区域Q11,此时,在显示区Q1则设置两个近场通信天线。无论是近场通信天线为一个还是两个,甚至更多个,近场通信天线的线圈部70的第一端和第二端均可以采用上述结构。
以上介绍可近场通信天线仅包括一个线圈部70的情况,在一些示例中,近场通信天线中的线圈部70也可为多个,多个线圈部70嵌套设置。图18为本公开实施例的另一种显示基板的示意图;图19为图18所示的显示基板中的近场通信天线的示意图;图20为图18所示的显示基板中的冗余功能区Q111b中的布线示意图;如图18-20所示,为便于描述将第一区域Q11内的功能区Q111划分为第一子功能区Q111a和冗余功能区Q111b,其中一个第一子功能区Q111a内设置近场通信天线的一个线圈部70,而两个相邻设置的第一子功能区Q111a之间的区域则为冗余功能区Q111b。第一子功能区 Q111a中的线圈部70的结构与上述结构相同,也即包括交叉设置的第一导电线701和第二导电线702。在本公开实施例中,在冗余功能区Q111b中设置有交叉设置的多条第七导电线150和多条第八导电线160;一条第七导电线150为一个第一导电结构700的部分结构,一条第八导电线160为一个第二导电结构800的部分结构。通过该种设置方式,可以保证显示基板上的布线均匀性,以使显示基板上像素开口率均匀。
进一步的,对于同一第一导电结构700上的第一导电线701和第七导电线150应当是断开设置,而且同一第一导电结构700上的第一导电线701和与之最近的第七导电线150之间的最小距离应当满足第一导电线701上的信号与第七导电线150之间不产生耦合。同理,对于同一第二导电结构800上的第二导电线702和第八导电线160应当是断开设置,而且同一第二导电结构800上的第二导电线702和与之最近的第八导电线160之间的最小距离应当满足第二导电线702上的信号与第八导电线160之间不产生耦合。在一些示例中,同一所述第一导电结构700中的第一导电线701和与之最近的第七导电线150之间的距离为2μm-6μm,例如二者之间距在4μm左右。同一第二导电结构800中的第八导电线160和与之最近的第二导电线702之间的距离2μm-6μm,例如二者之间距在4μm左右。
在一些示例中,当线圈部70采用U字型结构时,第一子功能区Q111a的形状与线圈部70的形状是相适配的,故第一子功能区Q111a的形状同样为U字型,而冗余功能区Q111b位于两个相邻设置的第一子功能区Q111a之间,也即冗余功能区Q111b是由相邻设置的第一子功能区Q111a限定出来的,因此冗余功能区Q111b的形状同样为U字型。与此同时,冗余线圈采用U字型结构。具体的,冗余线圈部包括沿第一方向X并排设置且第二方向Y延伸的两个第一子冗余结构1401,以及沿所述第一方向X延伸,且连接在两个第一子冗余结构1401之间的第二子冗余结构1402;第一子冗余结构1401和第二子冗余结构1402均包括第七导电线150和第八导电线160,且第一子冗余结构1401的第八导电线160延伸至第二子冗余结构1402所在区域,第二子冗余结构1402的第七导电线150延伸至第一子冗余结构1401 所在区域,以实现两个第一子冗余结构1401中的第八导电线160与第二子冗余结构1402的第七导电线150的电连接,进而实现两个第一子冗余结构1401与第二子冗余结构1402的电连接。进一步的,为尽可能避免线圈部70和冗余线圈部之间的信号产生耦合,优选的,对第一子冗余结构1401中的第七导电线150进行断线设计,以及对第二子冗余结构1402中的第八导电线160进行断线设计,避免同一第一导电结构700上的第一导电线701和第七导电线150产生耦合而影响显示基板的正常工作,以及同一第二导电结构800上的第二导电线702和第八导电线160产生耦合而影响显示基板的正常工作。
具体的,在本公开实施例中,第一子冗余结构1401中的第七导电线150包括沿第一方向X并排设置的多条第二子导线1501;相邻设置的所述第二子导线1501之间的间隙位于相邻设置的子像素之间;同理,第二子冗余结构1402中的第八导电线160包括沿第二方向Y并排设置的多条第三子导线1601;相邻设置的所述第三子导线1601之间的间隙位于相邻设置的子像素之间。
在一些示例中,在上述情况下,对于第一子冗余结构1401中的任一第七导电线150中,相邻设置的第二子导线1501之间的间隙的宽度L24为2μm-6μm,例如二者之间的间隙宽度L24在4μm左右。对于第二子冗余结构1402中的任一第八导电线160,相邻设置的所述第三子导线1601之间的间隙的宽度L25为2μm-6μm,例如二者之间的间隙宽度L25在4μm左右。通过合理的设置第一子冗余结构1401中的第七导电线150上的第二子导线1501之间的间隙,以及第二子冗余结构1402中的第八导电线160上的第三子导线1601之间的间隙可以有效的避免近场通信天线中的相邻线圈部70之间产生耦合。
在一些示例中,当显示基板的外围区Q2设置上述的公共电极线400时,第一子冗余结构1401的第八导电线160和第二子冗余结构1402中的第七导电线150均与公共电极线400电连接。例如:公共电极线400包括上述的第一子公共电极线和第二子公共电极线,此时,第一子冗余结构1401的第八 导电线160与第一子公共电极线通过贯穿层间绝缘层50的过孔电连接,第二子冗余结构1402中的第七导电线150与第二子公共电极线通过和层间绝缘层50的过孔电连接,以此使得冗余线圈部中的第七导电线150和第八导电线160上的电压为公共电压,从而避免第七导电线150和第八导电线160处于悬置(floting)状态。当然,由于第一子冗余结构1401的第八导电线160与第二子冗余结构1402的第七导电线150交叉设置,且通过贯穿层间绝缘层50的过孔电连接,因此也可以是仅两个第一子冗余结构1401中的第八导电线160与第一子公共电极线通过贯穿层间绝缘层50的过孔电连接;或者,仅第二子冗余结构1402中的第七导电线150与第二子公共电极线通过和层间绝缘层50的过孔电连接,这两种方式也均可以实现冗余线圈部中的第七导电线150和第八导电线160上的电压为公共电压。
在一些示例中,当近场通信天线中的线圈部70为多个时,此时近场通信天线还包括设置在衬底基板10上的连接跳线130,该连接跳线130与线圈部70连接,构成螺旋线圈。
为了更清楚的理解近场通信天线中的线圈部70和连接跳线130的连接关系,在本公开实施例中以近场天通信天线包括两个线圈部70为例进行说明,近场通信天线中的两个线圈部70中分别称之为第一线圈部70a和第二线圈部70b。如图19所示,第二线圈部70b嵌设在第一线圈部70a内,第一线圈部70a和第二线圈部70b均包括第一端和第二端,连接跳线130的两端分别连接第一线圈部70a的第一端和第二线圈部70b的第二端。其中,第一线圈部70a的第二端作为近场通信天线的第一端,第二线圈部70b的第一端作为近场通信天线的第二端。在该种情况下,为了便于近场通信天线与柔性线路板绑定连接以实现与控制电路的电连接,该近场通信天线还包括分别与第一线圈部70a的第二端和第二线圈部70b的第一端电连接的第一引出电极703和第二引出电极704。其中,第一引出电极703和第二引出电极704均可以包括沿背离基板方向依次设置且电连接的第一子引出部7031和第二子引出部7032。在一些示例中,第一子引出部7031与第一导电结构700同层设置,第二子引出部7032与第二导结构同层设置,此时,第一引出电极703 (第二引出电极704)的第一子引出部7031和第二子引出部7032是通过贯穿层间绝缘层的过孔电连接的。在该种情况下,第一引出电极703的第二引出部与一个第一子结构71的第二导电线702之间电连接;第二引出电极704的第二引出部与另一个第一子结构71的第二导电线702之间电连接。在本公开实施例中,通过电连接的第一子引出部7031和第二子引出部7032作为第一引出电极703(第二引出电极704)可以降低电阻。
需要说明的是,以图18为例,第一区域Q11位于第二区域Q12靠近第二焊盘区Q22的一侧,在第二焊盘区Q22中设置有第一连接焊盘A和第二连接焊盘B,此时,第一引出电极703的第二子引出部7032可以通过第一引出线与第一连接焊盘A电连接;第二引出电极704的第二子引出部7032可以通过第二引出线与第二连接焊盘B电连接;接下来,可以通过柔性线路板与第一连接焊盘A和第二连接焊盘B绑定连接,以实现近场通信天线的线圈部70与控制电路的连接。其中,第一引出线和第二引出线可以与第二导电结构800同层设置,且采用相同的材料,这样一来,便于第一引出线和第一引出电极703的第二子引出部7032的电连接,以及第二引出线和第二引出电极704的第二子引出部7032的电连接。同理,第一区域Q11也可位于第二区域Q12靠近第一焊盘区Q21的一侧,也即近场通信天线则设置在显示区Q1的靠近第一焊盘区Q21的一侧。当然还可以是,在第二区域Q12靠近第一焊盘区Q21和第二焊盘区Q22的两侧均设置第一区域Q11,此时,在显示区Q1则设置两个近场通信天线。无论是近场通信天线为一个还是两个,甚至更多个,近场通信天线的线圈部70的第一端和第二端均可以采用上述结构。
进一步的,近场通信天线中的连接跳线130可以设置外围区Q2,其可以与第一导电结构700同层设置、且采用相同的材料,在该种情况下,第一线圈部70a的第一端位置处的第二导电线702可以通过贯穿层间绝缘层50的过孔与连接跳线130电连接;第二线圈部70b的第二端位置处的第二导电线702可以通过贯穿层间绝缘层50的过孔与连接跳线130电连接。在一些示例中,连接跳线130可以是第一导电结构700上的部分结构。此时,连接 跳线130沿第一方向X延伸。当然,在本公开实施例中,连接跳线130也可以设置在外围区Q2域。
在一些示例中,显示基板还可以包括柔性线路板,当近场通信天线中的线圈部70为多个时,近场通信天线的连接跳线130也可以形成在柔性线路板上。其中,近场通信天线中的线圈部70可以采用上述相同的结构,此时,如图21所示,第一线圈部70a的第二端连接第一引出电极703,第一引出电极703的第二子引出部7032可以通过第一引出线与第一连接焊盘A电连接;第二线圈部70b的第一端连接第二引出电极704,第二引出电极704的第二子引出部7032可以通过第二引出线与第二连接焊盘B电连接;连接跳线130通过柔性线路板上的连接焊盘与显示基板上的第一连接焊盘A和第二连接焊盘B绑定连接,通过该种方式形成近场通信天线的螺旋线圈。
为了更清楚本公开实施例的显示基板结构,给出三种显示基板的结构示例,具体如下,需要说明的是,下述的三个示例并不构成对本公开实施例保护范围的限制。
第一个示例,如图3所示,显示基板中的显示区Q1包括一个第一区域Q11和第一个第二区域Q12,且第一区域Q11位于第二区域Q12靠近第二焊盘区Q22的一侧。第一区域Q11内设置一个具有一个线圈部70的近场通信天线。第一区域Q11包括非功能区Q112和环绕非功能区Q112的功能区Q111,线圈部70设置在功能区Q111内。线圈部70的具体结构如前所述,故在此不再重复描述。其中,非功能区Q112内设置上述的交叉设置的第五导电线80和第六导电线90;第二区域Q12内上述的交叉设置的第三导电线110和第四导电线120。对于第三导电线110、第四导电线120、第五导电线80和第六导电线90均在上述内容中已进行详细介绍,故在此不再重复描述。
第二个示例,如图18所示,显示基板中的显示区Q1包括一个第一区域Q11和第一个第二区域Q12,且第一区域Q11位于第二区域Q12靠近第二焊盘区Q22的一侧。第一区域Q11内设置一个具有两个线圈部70的近场通信天线。两个线圈部70分别称之为第一线圈部70a和第二线圈部70b。第一区域Q11包括非功能区Q112和环绕非功能区Q112的功能区Q111;功能区 Q111包括两个第一子功能区Q111a和位于两个第一子功能区Q111a之间冗余功能区Q111b;第一线圈部70a和第二线圈部70b分设在两个第一子功能区Q111a内。第一线圈部70a和第二线圈部70b的具体结构如前所述,故在此不再重复描述。其中,冗余功能区Q111b内设置上述的第七导电线150和第八导电线160;非功能区Q112内设置上述的交叉设置的第五导电线80和第六导电线90;第二区域Q12内上述的交叉设置的第三导电线110和第四导电线120。对于第三导电线110、第四导电线120、第五导电线80、第六导电线90、第七导电线150和第八导电线160均在上述内容中已进行详细介绍,故在此不再重复描述。
第三个示例,图22为本公开实施例的另一种显示基板的示意图;如图22所示,显示基板中的显示区Q1包括两个第一区域Q11和第一个第二区域Q12,且两个第一区域Q11中的一者位于第二区域Q12靠近第一焊盘区Q21的一侧,另一者位于第二区域Q12靠近第二焊盘区Q22的一侧。其中,一个第一区域Q11内设置的结构与图3中的结构相同,也即设置具有两个线圈部70的近场通信天线,故在此不再赘述;另一个第一区域Q11内设置结构与图18中的结构相同,也即设置具有一个线圈部70的近场通信天线,故在此不再赘述。第二区域Q12内第二区域Q12内上述的交叉设置的第三导电线110和第四导电线120。对于第三导电线110和第四导电线120均在上述内容中已进行详细介绍,故在此不再重复描述。
第二方面,本公开实施例还提供一种显示装置,其包括上述显示基板、对盒基板。对盒基板上设置有黑矩阵,栅线GL、数据线DL、第一导电结构700和第二导电结构800在衬底基板10上的正投影均位于黑矩阵在衬底上的正投影范围之内。当然,该显示装置还控制电路,控制电路与近场通信天线连接。
该显示装置可以为液晶显示面板、OLED面板、手机、平板电脑、数码相框、导航仪等具有显示功能和通信功能的产品或器件。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而 言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。

Claims (35)

  1. 一种显示基板,其具有显示区和环绕所述显示区的外围区;所述显示基板包括:
    衬底基板;
    多个第一导电结构,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多个第一导电结构沿第一方向延伸,且沿第二方向并排设置;
    层间绝缘层,设置在所述第一导电结构背离所述衬底基板的一侧;
    多个第二导电结构,设置在所述层间绝缘层背离所述衬底基板的一侧,且位于所述显示区和所述外围区;所述多个第二导电结构沿所述第二方向延伸,且沿所述第一方向并排设置;所述第二导电结构与所述第一导电结构交叉设置,并通过贯穿所述层间绝缘层的过孔电连接;
    至少一个第三导电结构,设置在所述衬底基板上,且至少位于所述显示区;其中,
    所述第三导电结构包括多条第一导电线和多条第二导电线;所述第一导电线为所述第一导电结构的至少部分结构,且部分所述第一导结构包括两条所述第一导电线;所述第二导电线为所述第二导电结构的至少部分结构。
  2. 根据权利要求1所述的显示基板,其中,还包括:
    多条栅线,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多条栅线沿所述第一方向延伸,且沿所述第二方向并排设置;
    多条数据线,设置在所述衬底基板上,且位于所述显示区和所述外围区;所述多条栅线沿所述第二方向延伸,且沿所述第一方向并排设置;
    多个子像素,设置在衬底基板上,且位于所述显示区;所述栅线和所述数据线交叉设置限定的区域内设置所述子像素;沿所述第一方向并排设置的所述子像素形成第一像素组;沿第二方向并排设置的所述子像素形成第二像素组;在任意相邻设置的所述第一像素组之间设置有一个所述第一导电结构。
  3. 根据权利要求2所述的显示基板,其中,至少部分两相邻设置的所述第二像素组之间设置有一个所述第二导电结构。
  4. 根据权利要求3所述的显示基板,其中,位于同一所述第二像素组中的各个所述子像素的颜色相同,且沿所述第一方向并排设置的每N个子像素构成一像素单元,N≥2;所述N为整数;沿所述第二方向并排设置的所述像素单元形成一像素单元组;每个所述像素单元组内均设置有至少一个所述第二导电结构。
  5. 根据权利要求4所述的显示基板,其中,所述像素单元中的所述N个子像素包括红色子像素、绿色子像素和蓝色子像素;所述第二导电结构位于所述红色子像素和所述绿色子像素之间。
  6. 根据权利要求2-5中任一项所述的显示基板,其中,所述显示区包括至少一个第一区域和至少一个第二区域;一个所述第三导电结构位于一个所述第一区域内;
    所述显示基板还包括:
    多条第三导电线和多条第四导电线,设置在所述衬底基板上,且位于所述第二区域和所述外围区;所述多条第三导电线和多条第四导电线交叉设置,且一条第三导电线为一个所述第一导电结构的至少部分结构;一条第四导电线位于一个所述第二导电结构的部分结构;一个所述第二导电结构中的所述第四导线与所述第二导电线之间的距离为2μm-6μm。
  7. 根据权利要求6所述的显示基板,其中,所述显示基板还包括:
    公共电极线,设置在所述衬底基板上,且位于外围区;所述公共电极线包括沿所述第一方向延伸的第一子公共电极线和沿所述第二方向延伸的第二子公共电极线;所述第一子公共电极线与第一导线结构同层设置,且材料相同;所述第二子公共电极线与所述第二导电结构同层设置,且材料相同;所述第一子公共电极线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;
    所述第三导电线与所述第二子公共电极线通过贯穿所述层间绝缘层的 过孔电连接;和/或,
    所述第四导电线与所述第一子公共电极线通过所述贯穿层间绝缘层的过孔电连接。
  8. 根据权利要求2-5中任一项所述的显示基板,其中,所述第三导电结构包括至少一个线圈部;所述线圈部至少包括两个延伸方向不同的子结构;每个所述子结构均包括所述第一导电线和第二导电线。
  9. 根据权利要求8所述的显示基板,其中,所述线圈部包括三个子结构,分别为两个第一子结构和一个第二子结构;两个所述第一子结构均沿第二方向沿延伸,且在所述第一方向上并排设置,所述第二子结构连接在两个所述第一子结构之间。
  10. 根据权利要求9所述的显示基板,其中,所述显示区包括至少一个第一区域和至少一个第二区域;所述第三导电结构位于所述第一区域;所述第一区域包括非功能区和环绕所述非功能区的功能区;所述线圈部设置在所述功能区;
    所述显示基板还包括:交叉设置的多条第五导电线和多条第六导电线,且位于所述非功能区;所述第一导电结构包括所述第五导电线;所述第二导电结构包括所述第六导电线;同一所述第一导电结构中的所述第五导电线与所述第一导电线之间的距离为2μm-6μm;和/或,
    同一所述第二导电结构中的所述第六导电线与所述第二导电线之间的距离2μm-6μm。
  11. 根据权利要求10所述显示基板,其中,所述第五导电线包括沿第一方向并排且间隔设置的多个第一子导线;相邻设置的所述第一子导线之间的间隙位于相邻设置的所述子像素之间。
  12. 根据权利要求11所述的显示基板,其中,相邻设置的所述第一子导线之间的间隙的宽度为2μm-6μm。
  13. 根据权利要求11所述的显示基板,其中,所述显示基板还包括:
    公共电极线,设置在所述衬底基板上,且位于外围区;所述公共电极线 包括沿所述第一方向延伸的第一子公共电极线和沿所述第二方向延伸的第二子公共电极线;所述第一子公共电极线与第一导线结构同层设置,且材料相同;所述第二子公共电极线与所述第二导电结构同层设置,且材料相同;所述第一子公共电极线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;
    所述第六导电线与所述第一子公共电极线通过贯穿所述层间绝缘层的过孔电连接。
  14. 根据权利要求9所述的显示基板,其中,所述显示区包括至少一个第一区域和至少一个第二区域;所述第三导电结构位于所述第一区域;所述第一区域包括非功能区和环绕所述非功能区的功能区;所述功能区包括嵌套设置的子功能区和位于相邻设置的所述子功能区之间的冗余功能区;一个所述子功能区中设置一个所述线圈部;
    所述显示基板还包括设置在所述衬底基板上的冗余线圈部;且在一个所述冗余功能区中设置一个所述冗余线圈部;
    所述冗余线圈部包括交叉设置的多条第七导电线和多条第八导电线,位于所述冗余功能区;一条所述第七导电线为一个所述第一导电结构的部分结构,一条所述第八导电线为一个所述第二导电结构的部分结构。
  15. 根据权利要求14所述的显示基板,其中,同一所述第一导电结构中的第一导电线和与之最近的所述第七导电线之间的距离为2μm-6μm;和/或,
    同一所述第二导电结构中的所述第八导电线和与之最近的所述第二导电线之间的距离2μm-6μm。
  16. 根据权利要求14所述的显示基板,其中,所述冗余线圈部包括沿第一方向并排设置且第二方向延伸的两个第一子冗余结构,以及沿所述第一方向延伸,且连接在两个所述第一子冗余结构之间的第二子冗余结构;所述第一子冗余结构和所述第二子冗余结构均包括所述第七导电线和所述第八导电线;所述第一冗余结构中的所述第八导电线延伸至所述第二冗余结构所 在区域,所述第二冗余结构中的所述第七导电线延伸至所述第一冗余结构所在区域;
    所述第一子冗余结构中的第七导电线包括沿所述第一方向并排设置的多条第二子导线;相邻设置的所述第二子导线之间的间隙位于相邻设置的所述子像素之间;和/或,
    所述第二子冗余结构中的第八导电线包括沿所述第二方向并排设置的多条第三子导线;相邻设置的所述第三子导线之间的间隙位于相邻设置的所述子像素之间。
  17. 根据权利要求16所述的显示基板,其中,相邻设置的所述第二子导线之间的间隙的宽度为2μm-6μm;和/或,
    相邻设置的所述第三子导线之间的间隙的宽度为2μm-6μm。
  18. 根据权利要求16所述的显示基板,其中,所述显示基板还包括:
    公共电极线,设置在所述衬底基板上,且位于外围区;所述公共电极线包括沿所述第一方向延伸的第一子公共电极线和沿所述第二方向延伸的第二子公共电极线;所述第一子公共电极线与第一导线结构同层设置,且材料相同;所述第二子公共电极线与所述第二导电结构同层设置,且材料相同;所述第一子公共电极线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接;
    所述第一子冗余结构的所述第八导电线与所述第一子公共电极线通过贯穿所述层间绝缘层的过孔电连接;和/或,
    所述第二子冗余结构中的第七导电线与所述第二子公共电极线通过贯穿所述层间绝缘层的过孔电连接。
  19. 根据权利要求14所述的显示基板,其中,所述显示基板还包括设置在所述衬底基板上的连接跳线,所述连接跳线与所述线圈部连接,构成螺旋线圈。
  20. 根据权利要求14所述的显示基板,其中,所述显示基板还包括柔性线路板,在所述柔性线路板上设置有连接跳线,所述连接跳线与所述线圈 部连接,构成螺旋线圈。
  21. 根据权利要求19或20所述的显示基板,其中,所述线圈部的数量为两个,两个所述线圈部分别为第一线圈部和第二线圈部,且所述第一线圈部环绕第二线圈部;所述第一线圈部和所述第二线圈部均包括第一端和第二端,所述连接跳线的两端分别连接所述第一线圈部的第一端和第二线圈部的第二端。
  22. 根据权利要求21所述的显示基板,其中,所述第一线圈部的第二端连接第一引出电极;所述第二线圈部的第一端连接第二引出电极;所述第一引出电极和/或所述第二引出电极包括在设置在所述衬底基板上,且通过贯穿层间绝缘层的过孔电连接第一子引出部和第二子引出部;所述第一子引出部和所述第一子结构同层设置且材料相同,所述第二子引出部与所述第二子结构同层设置且材料相同。
  23. 根据权利要求2-22中任一项所述的显示基板,其中,所述显示基板还包括:第一导电层,设置在衬底基板上;所述第一导电层包括所述第一导电结构和所述栅线;
    第二导电层,设置在层间绝缘层背离所述衬底基板的一侧;所述第二导电层包括所述第二导电结构和所述数据线。
  24. 根据权利要求2-22中任一项所述的显示基板,其中,所述第一导电结构包括第一主体部和第一连接部;所述第一主体部沿所述第一方向延伸,所述第一连接部连接在所述第一主体部上;所述第二导电结构包括第二主体部和第二连接部;所述第二主体部沿所述第二方向延伸,且所述第二连接部连接在所述第二主体部上;所述第一导电结构的第一连接部通过贯穿所述层间绝缘层的过孔,和与之交叉设置的所述第二导电结构的第二连接部连接。
  25. 根据权利要求24所述的显示基板,其中,所述第一连接部位于其所连接的所述第一主体部靠近距离该第一主体部最近的所述栅线的一侧;所述第二连接部位于其所连接的所述第二主体部背离该第二主体部最靠近的所述数据线的一侧;
    所述第一连接部和所述第二连接部均包括在所述第一方向上相对的第一侧边和第二侧边,以及沿所述第二方向相对的第三侧边和第四侧边;其中,
    所述第一连接部的第三侧边连接所述第一主体部;所述第二连接部的第二侧边连接所述第二主体部;
    所述第一连接部的第一侧边和第三侧边在所述衬底基板上的正投影到所述过孔在所述衬底基板上的正投影的距离均不小于2.0μ;和/或,
    所述第二连接部的第一侧边、第三侧边和第四侧边在所述衬底基板上的正投影到所述过孔在所述衬底基板上的正投影的距离均不小于2.0μm。
  26. 根据权利要求24所述的显示基板,其中,所述第一连接部和与之最靠近的所述栅线之间的距离不小于4μm。
  27. 根据权利要求24所述的显示基板,其中,所述第二主体部和与之最靠近的所述数据线之间的距离不小于3.5μm。
  28. 根据权利要求24所述的显示基板,其中,所述子像素至少包括薄膜晶体管、像素电极、公共电极;所述薄膜晶体管的栅极与所述栅线同层设置,且材料相同,所述薄膜晶体管的源极和漏极与所述数据线同层设置,且材料相同;所述像素电极与所述薄膜晶体管的漏极连接,所述公共电极位于所述像素电极背离所述衬底基板的一侧,且在所述公共电极所在层和所述像素电极所在层之间设置有钝化层;
    所述第二连接部和与之对靠近的所述像素电极之间的距离不小于2.0μm。
  29. 根据权利要求2-22中任一项所述的显示基板,其中,所述子像素至少包括薄膜晶体管、像素电极、公共电极;所述薄膜晶体管的栅极与所述栅线同层设置,且材料相同,所述薄膜晶体管的源极和漏极与所述数据线同层设置,且材料相同;所述像素电极与所述薄膜晶体管的漏极连接,所述公共电极位于所述像素电极背离所述衬底基板的一侧,且在所述公共电极所在层和所述像素电极所在层之间设置有钝化层;
    各个所述子像素中的所述公共电极连接为一体结构形成公共电极层;
    所述公共电极层包括沿所述第二方向延伸且沿所述第一方向并排设置的多个第一开口;一个所述第一开口在所述衬底基板上的正投影与一个所述第二导电结构在所述衬底基板上的正投影部分重叠。
  30. 根据权利要求29所述的显示基板,其中,所述公共电极为狭缝电极;所述第一导电结构与所述公共电极在所述衬底基板上的正投影至少部分重叠。
  31. 根据权利要求29所述的显示基板,其中,所述公共电极层还包括多个沿第一方向延伸且沿所述第二方向并排设置的多个第二开口,一个所述第二开口在所述衬底基板上的正投影与沿所述第一方向并排设置的多个所述薄膜晶体管在所述衬底基板上的正投影至少部分重叠。
  32. 根据权利要求1-31中任一项所述的显示基板,其中,所述外围区包括位于所述显示区在所述第二方向上的两相对侧的第一焊盘区和第二焊盘区;在所述显示区靠近所述第一焊盘区的一侧和/或所述第二焊盘区的一侧均设置有所述第三导电结构。
  33. 根据权利要求1-32中任一项所述的显示基板,其中,所述第三导电结构包括近场通信天线。
  34. 一种显示装置,其包括权利要求1-33中任一项所述的显示基板。
  35. 根据权利要求34所述的显示装置,其中,所述显示装置还包括对盒基板,所述对盒基板上设置有黑矩阵,所述第三导电结构在所述衬底基板上的正投影位于所述黑矩阵在所述衬底基板上的正投影范围之内。
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