WO2022257525A1 - 一种印刷电路板、印刷电路板制备方法以及电子设备 - Google Patents

一种印刷电路板、印刷电路板制备方法以及电子设备 Download PDF

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Publication number
WO2022257525A1
WO2022257525A1 PCT/CN2022/080756 CN2022080756W WO2022257525A1 WO 2022257525 A1 WO2022257525 A1 WO 2022257525A1 CN 2022080756 W CN2022080756 W CN 2022080756W WO 2022257525 A1 WO2022257525 A1 WO 2022257525A1
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Prior art keywords
core board
layer
metal layer
plating layer
plating
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PCT/CN2022/080756
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English (en)
French (fr)
Inventor
谢剑
魏仲民
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中兴通讯股份有限公司
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Publication of WO2022257525A1 publication Critical patent/WO2022257525A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits

Definitions

  • the present application relates to the field of electronic technology, and in particular to a printed circuit board, a method for preparing the printed circuit board, and electronic equipment.
  • PCB Printed circuit board
  • the signal rate of electronic products such as bearer network is also increasing.
  • Conventional printed circuit boards and manufacturing methods are difficult to meet the higher speed development of these electronic products.
  • the back-drilling process is usually used in the preparation of printed circuit boards, and the back-drilling process is prone to stumps;
  • the conventional one-time press-fit printed circuit board processing process can only prepare a single-hole single-channel structure. Therefore, there is a need to improve circuit board performance.
  • Embodiments of the present application provide a printed circuit board, a method for preparing the printed circuit board, and electronic equipment, so as to improve the performance of the circuit board and meet the requirements of high signal rate electronic equipment.
  • a method for preparing a printed circuit board comprising the following steps: preparing a first plating resist layer on a first core board; forming a second anti-plating layer; the second anti-plating layer is the patterned first anti-plating layer; laminating and pressing the first core board and the second core board; and preparing a through hole; the through hole Pass through the second anti-plating layer and run through the first core board and the second core board; remove the second anti-plating layer; prepare a metal layer; The first metal layer in one region and the second metal layer arranged in the second region of the inner wall of the through hole; the second metal layer is removed to expose the first metal layer.
  • a method for preparing a printed circuit board comprising: preparing a first plating resist on a first core board, preparing a seventh plating resist on a second core board, and preparing a seventh plating resist on a third core board.
  • a third anti-plating layer through a patterning process, form a fourth anti-plating layer on the first core board, form a fifth anti-plating layer on the second core board, and form a sixth anti-plating layer on the second core board ; stacking and pressing the first core board, the second core board, the fourth core board and the third core board in sequence; preparing a through hole; the through hole passes through the fourth anti-plating layer, the The fifth anti-plating layer and the sixth anti-plating layer, and run through the first core board, the second core board, the fourth core board and the third core board; remove the fourth anti-plating layer , the fifth anti-plating layer and the sixth anti-plating layer; prepare a metal layer; the metal layer includes a first metal layer disposed on the first region of the inner wall of the through hole, a second metal layer disposed on the inner wall of the through hole The fifth metal layer in the region, the fourth metal layer arranged in the fourth region of the inner wall of the through hole, and the third metal layer arranged
  • a printed circuit board is provided, and the printed circuit board is obtained by the above-mentioned preparation method.
  • an electronic device including the above-mentioned printed circuit board.
  • Fig. 1 is the flow chart of a specific embodiment of the printed circuit board preparation method in the embodiment of the present application
  • Fig. 2 is a flowchart of removing the second metal layer in the embodiment of the present application.
  • Fig. 3 is the sectional view of the first core board in the embodiment of the present application.
  • Fig. 4 is the cross-sectional view of the first core plate with plating resist in the embodiment of the application;
  • Fig. 5 is a partial cross-sectional view of a multilayer composite board in an embodiment of the present application.
  • Fig. 6 is a partial cross-sectional view of a multilayer composite board in an embodiment of the present application.
  • Fig. 7 is the sectional view before the drilling of the multilayer composite board in the embodiment of the present application.
  • Figure 8 is a cross-sectional view of the multilayer composite board after drilling in the embodiment of the present application.
  • Fig. 9 is a cross-sectional view of a multilayer composite board during electroless copper deposition in the embodiment of the present application.
  • Figure 10 is a cross-sectional view of a multilayer composite board after slight etching in the embodiment of the present application.
  • Figure 11 is a cross-sectional view of a multilayer composite board after electroplating copper in the embodiment of the present application.
  • Fig. 12 is a cross-sectional view after removing the second metal layer in the embodiment of the present application.
  • Fig. 13 is a cross-sectional view of a multi-layer composite board formed by stacking the first core board, the second core board, the third core board and the fourth core board in the embodiment of the present application;
  • Figure 14 is a sectional view of the multilayer composite board in Figure 13 after electroplating copper.
  • FIG. 15 is a cross-sectional view of FIG. 14 after removing the second metal layer.
  • first”, “second” and the like in the specification and claims and the above drawings are used to distinguish similar objects, and not necessarily used to describe a specific sequence or sequence. It should be understood that if it involves orientation descriptions, for example, the orientation or positional relationship indicated by up, down, front, rear, left, right, etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and The description is simplified, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and operate, and thus should not be construed as limiting the application.
  • the stump will cause reflection and resonance of the signal, causing insertion loss and return loss to deteriorate.
  • the length of the stub has a greater impact on the integrity of signal transmission.
  • back drilling is usually used to remove the stump. By back-drilling, the length of the stump can be reduced, shifting its resonant frequency to high frequencies, thereby reducing the impact on the signal.
  • Back drilling is to use the depth control function of the drilling machine to realize the processing of blind holes. Its tolerance is mainly affected by the accuracy of the back drilling equipment and the tolerance of the medium thickness. In addition, its accuracy is easily affected by the outside world, such as the resistance of the drill, The angle of the drill tip, the contact effect between the cover plate and the measuring unit, the warpage of the plate, etc. Moreover, since the tip of the drill is generally V-shaped, during back drilling, in order to keep the tip away from the position of the first metal layer, in the partial area between the first metal layer and the second metal layer, There will be some stumps that cannot be removed, which will affect electrical conduction and signal integrity, and the ideal situation of zero stubs cannot be achieved.
  • the method for preparing a printed circuit board according to the embodiment of the first aspect of the embodiment of the present application includes the following steps:
  • S106 preparing a metal layer, including a first metal layer 280 and a second metal layer 270;
  • the boundary layer between the first metal layer 280 and the second metal layer 270 that needs to be processed with metallized holes is selected in advance.
  • the first core board 200 is selected from each layer of core boards to be fabricated to form the printed circuit board 500.
  • the first core board 200 has an inner layer copper foil 210 and an outer layer copper foil.
  • the outer layer copper foil 240 may also be disposed on the first core board 200 through the prepreg 230
  • the inner layer copper foil 210 on the first core board 200 is the boundary layer.
  • the first anti-plating layer 220 is formed on the preset drilling area of the inner layer copper foil 210 .
  • the material of the first anti-plating layer 220 may be green oil, ink, dry film or wet film.
  • the first anti-plating layer 220 can be formed by screen printing or stencil printing, or by exposure and development.
  • the inner layer copper foil 210 is made, and the inner layer copper foil 210 on the first core board 200 is partially reserved, so that the areas of the inner layer copper foil 210 and the second anti-plating layer 221 are mutually
  • the preset drilling area is located within the area, and the area should be larger than the preset drilling area.
  • the area of the second anti-plating layer 221 is smaller than the area of the remaining inner copper foil 210 , and the difference between the two areas is between 1.5mil and 2.5mil. As an example, the difference between the two areas is 2mil.
  • a second core board 600 is provided under the first core board 200, the second core board 600 has the same structure as the first core board, and has an inner layer of copper foil 210 and an outer layer Copper foil 240, the two can jointly form a multilayer composite board 300, before forming the multilayer composite board 300, the first core board 200 and the second core board 600 are stacked in sequence, so that the second anti-plating layer 221 is located on the first core board 200 and the second core plate 600, after superposition, adopt high temperature and high pressure method to press the laminated structure, so that all parts are fused together to form a multi-layer composite board 300, which is the hole to be drilled.
  • printed circuit board 500 is provided under the first core board 200, the second core board 600 has the same structure as the first core board, and has an inner layer of copper foil 210 and an outer layer Copper foil 240, the two can jointly form a multilayer composite board 300, before forming the multilayer composite board 300, the first core board 200 and the second core board 600 are stacked in sequence, so that the second
  • any outer layer copper foil 240 on the laminated multilayer composite board 300 is used as the drilling surface, and drilling is carried out in the predetermined drilling area on the drilling surface.
  • hole to form a through hole 400 the through hole 400 runs through the entire multilayer composite board 300 from top to bottom, that is, through the first core board 200 and the second core board 600, and at the same time, the through hole 400 passes through the second core board 600 Anti-plating layer 221.
  • the second plating resist 221 located between the first core plate 200 and the second core plate 600 can be completely removed by using a conventional method for removing the second plating resist 221, For example, chemical liquid can be used to completely remove the second anti-plating layer 221 . After removing the second plating resist 221 , a cavity is formed between the first core board 200 and the second core board 600 , and the through hole 400 forms a fault at the cavity.
  • the method for removing the second anti-plating layer 221 is: for the board surface and the internal through hole 400 of the multilayer composite board 300 composed of the first core board 200 and the second core board 600 after lamination Electroless copper deposition is carried out so that the second plating resist 221 in the through hole 400 and the non-plating resist region are attached with a copper layer on the board surface, because the copper absorption rate of the second resist 221 and the non-plating resist region are different, so that The copper thickness on the second anti-plating layer 221 is smaller than the copper thickness in the non-plating anti-layer area, and the difference between the copper thickness attached to the two is 22 ⁇ m.
  • the second anti-plating layer 220 located on the first core board 200 can be completely removed by a conventional method for removing the second anti-plating layer 221.
  • the plated area forms a protection such that only the second plating resist 221 is removed during application of the chemical solution.
  • step S106 apply electroplating copper layer 260 on the board surface of multilayer composite board 300 and electroplating copper in through hole 400, non-plating-resistant area will all be plated copper layer again, and in The cavity is no longer plated with copper.
  • the inner wall of the through hole 400 is divided into a first area and a second area by a cavity without copper plating.
  • the first metal layer 280 is attached to the first area, and the second area is attached to the second area.
  • There is a second metal layer 270 such that the via 400 is formed as a discontinuous metallized hole.
  • the first metal layer 280 and the second metal layer 270 in the metallized hole can be separated.
  • the stumps can be completely removed without touching the first metal layer 280 to achieve zero stubs.
  • step S107 the second metal layer 270 is removed, leaving only the first metal layer 280 , so that the conductive connection of the printed circuit board 500 in the area of the first metal layer 280 can be realized.
  • the method for removing the second metal layer 270 is "applying a protective layer-three wet etching", and the steps include:
  • the secondary chemical solution is only in contact with the second metal layer 270
  • a chemical reaction occurs, that is, the second metal layer 270 (i.e. stump) is completely removed; through three potions, the area protected by tin plating (the first protective layer), that is, the board surface of the multilayer composite board 300 and the second
  • the area of a metal layer 280 is wet-etched for the third time, so that the tin plating layer covering the board surface of the multilayer composite board 300 and the first metal layer 280 is removed, thereby exposing the first metal layer 280 .
  • the first core board 200 and the second core board 600 can be stacked through the prepreg 230, and the stacking sequence is the first core board 200-the prepreg 230-the second core board 600,
  • the second anti-plating layer 221 on the first core board 200 and the prepreg 230 are in contact with each other, and after lamination, they are pressed together by high temperature and high pressure.
  • a groove 250 is formed in the prepreg 230 .
  • the first metal layer 280 and the second metal layer 270 are respectively arranged on both sides of the groove 250 along the vertical direction.
  • grooves 231 can be provided in the prepreg 230 at positions corresponding to the second plating resist 221, so that During pressing, the second anti-plating layer 221 and the retained inner layer copper foil 210 can be accommodated in the groove portion 231 , so that the area of the prepreg 230 without the groove portion 231 can be closely attached to the first core board 200 .
  • the diameter of the groove 231 provided is larger than the diameter of the through hole, and the diameter difference is between 5.5mil and 6.5mil. As an example, the diameter The difference is 6mil.
  • the method for preparing a printed circuit board according to the second aspect of the embodiment of the present application includes:
  • the fourth anti-plating layer 222 is formed on the first core board 200, the fifth anti-plating layer 611 is formed on the second core board 600, and the sixth anti-plating layer 711 is formed on the third core board 700;
  • the first core board 200, the second core board 600, the fourth core board 800 and the third core board 700 are sequentially laminated and pressed together;
  • the through hole 400 passes through the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711, and runs through the first core board 200, the second core board 600, the fourth core board 800 and the third core board 700;
  • the metal layer includes the first metal layer 280 disposed on the first region of the inner wall of the through hole 400 , the fifth metal layer 620 disposed on the second region of the inner wall of the through hole 400 , and the fourth metal layer disposed on the fourth region of the inner wall of the through hole 400 820 and the third metal layer 720 disposed in the third region of the inner wall of the through hole 400; and
  • the fourth metal layer 820 is removed; the first metal layer 280 , the fifth metal layer 620 and the third metal layer 720 are exposed.
  • the first anti-plating layer, the seventh anti-plating layer 610 and the third anti-plating layer 710 are respectively applied on the first core board 200, the second core board 600 and the third core board 700, all of which are The whole board is applied on the three core boards; again, through the patterning process, the first anti-plating layer, the seventh anti-plating layer 610 and the third anti-plating layer 710 are respectively converted into the fourth anti-plating layer 222, the fifth anti-plating layer 222 and the fifth anti-plating layer with suitable shapes and sizes.
  • the anti-plating layer 611 and the sixth anti-plating layer 711 in the process of the patterning process, make the inner layer copper foil 210 on the first core board 200, the second core board 600 and the third core board 700, and partially keep each core board
  • the inner layer copper foil 210 on the upper layer so that the areas of the fourth anti-plating layer 222 , the fifth anti-plating layer 611 , and the sixth anti-plating layer 711 are adapted to the areas of the respective inner layer copper foil 210 .
  • the fourth core board 800 is added, and the above four core boards are stacked sequentially in the order of the first core board 200-the second core board 600-the fourth core board 800-the third core board 700, and are subjected to high temperature and high pressure Pressing together to form a multi-layer composite board; then starting from the outer layer copper foil of the first core board 200, drilling holes in the preset drilling area from top to bottom, so that the multi-layer composite board 300 is formed through the first The through holes 400 of the first core board 200 , the second core board 600 , the fourth core board 800 and the third core board 700 .
  • the fourth anti-plating layer 222, the fifth anti-plating layer 611, and the sixth anti-plating layer 711 are removed by chemical methods.
  • the non-plating-resistant layer area can be protected by electroless copper-slight etching. So that only the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711 are removed, so that a cavity is formed in the region where three anti-plating layers have been removed, and a single through hole 400 can be formed with more than one hole due to the cavity. The through hole 400 of the channel. Next, copper electroplating is performed in the one-hole multi-channel through-hole 400, so that the area in the through-hole 400 except the cavity is attached with a metal layer (copper layer).
  • the copper layer includes in turn: the first metal layer 280 (located on the first core board 200), the fifth metal layer 620 (located on the second core board 600), the fourth metal layer 820 (located on the fourth core board 800) and the third metal layer layer 720 (on the third core 700 ), so far, the vias 400 have been formed as one-hole multi-channel discontinuous metallized holes. Since in the laminated multilayer composite board 300, electrical conduction and signal transmission are not required at the fourth metal layer 820 located in the middle, therefore, the fourth metal layer 820 in the through hole 400 is removed, and only the fourth metal layer 820 remains The first metal layer 280 , the fifth metal layer 620 and the third metal layer 720 . The printed circuit board after removing the fourth metal layer 820 has no stubs and does not affect the integrity of signal transmission.
  • the steps include: preparing a dry film (second protective layer) in the region of the fourth metal layer 820, so that the region of the fourth metal layer 820 is completely covered Covered by a dry film; the first metal layer 280, the fifth metal layer 620, and the third metal layer 720 are protected by tin plating (the first protective layer).
  • the dry film (second protective layer) on the surface of the fourth metal layer 820 is removed.
  • the primary potion only chemically reacts with the dry film and makes the dry film fade away;
  • the fourth metal layer 820 is wet-etched for the second time.
  • the secondary liquid medicine only reacts chemically with the fourth metal layer 820, that is, the fourth metal layer 820 (i.e.
  • the area protected by tin plating (the first protective layer), that is, the area of the first metal layer 280, the fifth metal layer 620, and the third metal layer 720, is wet-etched for the third time, so that the area covered by the first metal layer 280 , the tin plating layer at the fifth metal layer 620 and the third metal layer 720 is removed, thereby exposing the first metal layer 280 , the fifth metal layer 620 and the third metal layer 720 .
  • the step of removing the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711 includes: pressing the first core board 200, the second core board 600 , the through-holes 400 of the fourth core board 800 and the third core board 700 carry out electroless copper deposition, so that the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711 in the through-hole 400 and the non-plating anti-coating area Copper layers are all attached, because the copper absorption rate of the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711 is different from that of the non-plating anti-coating area, the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth The copper thickness on the plating resist 711 is smaller than that of the non-plating resist region.
  • Adopt the mode of slight etching again remove the copper layer attached on the 4th anti-plating layer 222, the 5th anti-plating layer 611 and the 6th anti-plating layer 711, because the copper thickness on the non-plating resisting layer area is greater than the 4th anti-plating layer 222, the 5th anti-plating layer 222, the 5th anti-plating layer 711, etc.
  • the copper thickness on the anti-plating layer 611 and the sixth anti-plating layer 711 therefore, after slight etching, only the copper layer on the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711 is completely removed, but not the anti-plating layer.
  • the copper layer attached to the non-plating-resistant area can protect the non-plating-resistant area, and then use chemical potions to coat the fourth anti-plating layer 222, the fifth anti-plating layer 611 and the sixth anti-plating layer 711 remove.
  • the first core board 200 , the second core board 600 , the fourth core board 800 and the third core board 700 are added between the four-core board 800 and the third core board 700 respectively, and the first core board 200 , the second core board 600 , the fourth core board 800 , the third core board 700 and the respective prepregs 230 are laminated.
  • the fourth anti-plating layer 222 , the fifth anti-plating layer 611 and the sixth anti-plating layer 711 are attached to the prepreg 230 respectively.
  • the fourth anti-plating layer 222 , the fifth anti-plating layer 611 and the sixth anti-plating layer 711 can sink into the corresponding prepreg 230 . Therefore, after removing the fourth plating resist 222 , the fifth plating resist 611 and the sixth plating resist 711 , grooves 250 are formed in the corresponding prepregs 230 .
  • a three-layer core board in order to provide a circuit board with one hole and multiple channels, can be laminated and laminated, that is, the first core board 200, the second core board 600, and the third core board.
  • the boards 700 are stacked and pressed in sequence, and the above-mentioned preparation method is used to apply a plating resist to the first core board 200 and the third core board 700 respectively.
  • copper is plated in the through hole 400, and finally the attached
  • the copper layer (stub) on the second core board 600 is removed by "applying a protective layer-three wet etching" to form a printed circuit board with one hole and three channels.
  • a method of laminating and pressing multiple layers of core boards in sequence may also be adopted, and the steps will not be repeated here.
  • the printed circuit board 500 of the embodiment of the third aspect of the embodiment of the present application is manufactured according to the above manufacturing method.
  • the printed circuit board 500 made by the above manufacturing method is prepared by adopting anti-plating layer, one-time lamination technology and selective etching to prepare a zero stump printed circuit board, thereby improving the performance of the printed circuit board; at the same time, through a hole Multi-channel printed circuit boards, which can increase board density to meet the needs of high signal rate electronic equipment.
  • the electronic device of the fourth aspect of the embodiment of the present application includes the above-mentioned printed circuit board 500. Since the above-mentioned printed circuit board has the characteristic of zero stub, it can improve the signal transmission performance and electrical conduction performance of the electronic device.
  • the technical solution provided by the embodiment of the present application prepares a zero stub circuit board by adopting anti-plating layer, one-time lamination technology and selective etching, thereby improving the performance of the circuit board; at the same time, adopting the method provided by the embodiment of the present application
  • the technology can also prepare one-hole multi-channel circuit boards and increase the density of circuit boards to meet the needs of high signal rate electronic devices.

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Abstract

一种印刷电路板、印刷电路板制备方法以及电子设备,其中印刷电路板制备方法包括：S101：在第一芯板(200)上制备第一抗镀层(220)；S102：通过图形化工艺，在第一芯板(200)上形成第二抗镀层(221)；第二抗镀层(221)为图形化后的第一抗镀层(220)；S103：将第一芯板(200)和第二芯板(600)层叠并压合；S104：制备通孔(400)；通孔(400)经过第二抗镀层(221)，且贯穿第一芯板(200)和第二芯板(600)；S105：去除第二抗镀层(221)；以及S106：制备金属层；金属层包括，设置在通孔(400)内壁第一区域的第一金属层(280)和设置在通孔(400)内壁第二区域的第二金属层(270)；以及S107：去除第二金属层(270)，暴露第一金属层(280)。

Description

一种印刷电路板、印刷电路板制备方法以及电子设备
相关申请的交叉引用
本申请基于申请号为202110637081.6、申请日为2021年6月8日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及电子技术领域，尤其涉及一种印刷电路板、印刷电路板制备方法以及电子设备。
背景技术
印刷电路板(printed circuit board，PCB)是电子产品的重要部件。随着通信技术的发展，承载网等电子产品的信号速率也不断提升。常规的印刷电路板以及制备方法难以满足这些电子产品往更高速率发展。一方面，印刷电路板制备通常会采用背钻工艺，背钻工艺容易产生残桩；另一方面，常规一次压合印刷电路板加工工艺仅能制备一孔单通道结构。因此，需要改善电路板性能。
发明内容
本申请实施例提供了一种印刷电路板、印刷电路板制备方法以及电子设备，以改善电路板的性能，从而满足高信号速率电子设备的需求。
根据本申请实施例的第一方面，提供了一种印刷电路板的制备方法，包括以下步骤：在第一芯板上制备第一抗镀层；通过图形化工艺，在所述第一芯板上形成第二抗镀层；所述第二抗镀层为图形化后的所述第一抗镀层；将所述第一芯板和第二芯板层叠并压合；以及制备通孔；所述通孔经过所述第二抗镀层，且贯穿所述第一芯板和所述第二芯板；去除所述第二抗镀层；制备金属层；所述金属层包括，设置在所述通孔内壁第一区域的第一金属层和设置在所述通孔内壁第二区域的第二金属层；去除所述第二金属层，暴露所述第一金属层。
根据本申请实施例的第二方面，提供了一种印刷电路板制备方法，包括：在第一芯板上制备第一抗镀层，第二芯板上制备第七抗镀层，第三芯板上制备第三抗镀层；通过图形化工艺，在所述第一芯板上形成第四抗镀层、所述第二芯板上形成第五抗镀层、所述第二芯板上形成第六抗镀层；将所述第一芯板、所述第二芯板、第四芯板和所述第三芯板依次层叠并压合；制备通孔；所述通孔经过所述第四抗镀层、所述第五抗镀层和所述第六抗镀层，且贯穿所述第一芯板、所述第二芯板、所述第四芯板和所述第三芯板；去除所述第四抗镀层、所述第五抗镀层和所述第六抗镀层；制备金属层；所述金属层包括，设置在所述通孔内壁第一区域的第一金属层、设置在所述通孔内壁第二区域的第五金属层、设置在所述通孔内壁第四区域的第四金属层和设置在所述通孔内壁第三区域的第三金属层；去除所述第四金属层；暴露所述第一金属层、所述第五金属层和所述第三金属层。
根据本申请实施例的第三方面，提供了一种印刷电路板，所述印刷电路板由上述的制备 方法得到。
根据本申请实施例的第三方面，提供了电子设备，包括上述的印刷电路板。
附图说明
图1是本申请实施例中印刷电路板制备方法的一具体实施例的流程图；
图2是本申请实施例中去除第二金属层的流程图；
图3是本申请实施例中第一芯板的剖面图；
图4是本申请实施例中带有抗镀层的第一芯板的剖面图；
图5是本申请实施例中多层复合板的局部剖面图；
图6是本申请实施例中多层复合板的局部剖面图；
图7是本申请实施例中多层复合板的钻孔前的剖面图；
图8是本申请实施例中多层复合板的钻孔后的剖面图；
图9是本申请实施例中化学沉铜时多层复合板的剖面图；
图10是本申请实施例中轻微蚀刻后多层复合板的剖面图；
图11是本申请实施例中电镀铜后多层复合板的剖面图；
图12是本申请实施例中去除第二金属层后的剖面图；
图13是本申请实施例中第一芯板、第二芯板、第三芯板以及第四芯板叠加后所形成的多层复合板的剖面图；
图14是图13中的多层复合板电镀铜后的剖面图；以及
图15是图14中去除第二金属层后的剖面图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。需要理解的是，如果涉及到方位描述，例如上、下、前、后、左、右等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
需要说明的是，若干的含义是一个或者多个，多个的含义是两个以上，大于、小于、超过等理解为不包括本数，以上、以下、以内等理解为包括本数。如果有描述到第一、第二只是用于区分技术特征为目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量或者隐含指明所指示的技术特征的先后关系。
在一些情形下，残桩会造成信号的反射和谐振，引起插损和回损恶化，随着信号传输速度的不断提高，残桩的长度对信号传输完整性的影响越来越大。为了减小残桩的长度，通常使用背钻的方式来除去残桩。通过背钻，残桩的长度得以减小，使其谐振频率往高频偏移，从而降低对信号的影响。
背钻是利用钻机的深度控制功能实现盲孔的加工，其公差主要受到背钻设备精度和介质 厚度公差的影响，除此之外，其精度容易受外界的影响，如钻刀的电阻大小、钻刀刀尖角度、盖板与测量单元接触效果，板的翘曲度等。并且，由于钻刀的刀尖一般为V型，因此，在背钻时，为了使得刀尖避开第一金属层的位置，在第一金属层与第二金属层之间的部分区域中，会有部分残桩无法被去除，影响电气导通和信号完整性，无法实现零残桩的理想情况。
下文的公开提供了许多不同的实施方式或例子用来实现本申请实施例的不同方案。参照图1、图3至图12，根据本申请实施例的第一方面实施例的印刷电路板制备方法，包括以下步骤：
S101：在第一芯板上制备第一抗镀层220；
S102：通过图形化工艺，形成第二抗镀层221
S103：将第一芯板200和第二芯板600层叠并压合；
S104：制备通孔400，贯穿第一芯板200和第二芯板600；
S105:去除第二抗镀层221；
S106:制备金属层，包括第一金属层280和第二金属层270；以及
S107:去除第二金属层270，暴露第一金属层280。
在步骤S101中，预先选取需要加工金属化孔的第一金属层280与第二金属层270的分界层。根据分界层的位置，从待制作形成印刷电路板500的各层芯板中选取出第一芯板200，在一些实施例中，第一芯板200具有内层铜箔210以及外层铜箔240，外层铜箔240也可以通过半固化片230设置到第一芯板200上，该第一芯板200上的内层铜箔210即为分界层。在内层铜箔210的预设钻孔区域上制作第一抗镀层220。第一抗镀层220的材料可以为绿油、油墨、干膜或者湿膜。第一抗镀层220可以通过丝网印刷也可以通过钢网印刷，或者通过曝光显影形成第一抗镀层220。
参照图3至图5，在步骤S102中制作第一抗镀层220之后，对第一芯板200进行图形化工艺，通过图形化工艺，使得第一抗镀层220被制作为适合的第二抗镀层221，同时，在图形化工艺的过程中，制作内层铜箔210，部分地保留第一芯板200上的内层铜箔210，使得内层铜箔210与第二抗镀层221的面积相互适应，预设钻孔区域位于该面积内，且该面积应大于预设钻孔区域。第二抗镀层221的面积小于保留下的内层铜箔210的面积，二者的面积差值在1.5mil至2.5mil之间，作为一示例，二者的面积差值为2mil。
参照图5至图7，在步骤S103中，在第一芯板200的下方提供第二芯板600，第二芯板600与第一芯板结构相同，统一具有内层铜箔210以及外层铜箔240，二者可以共同组成多层复合板300，在构成多层复合板300之前，将第一芯板200以及第二芯板600依次叠加，使得第二抗镀层221位于第一芯板200以及第二芯板600之间，叠加后采取高温高压方式，对层叠结构进行压合，使得各部分熔合为一体，形成多层复合板300，该多层复合板300即为待钻孔的印刷电路板500。
参照图5以及图8，在步骤S104中，以压合后的多层复合板300上的任一外层铜箔240为入钻面，在入钻面上于预定的钻孔区域内进行钻孔，以形成通孔400，该通孔400自上而下贯穿整个多层复合板300，也即，贯穿第一芯板200以及第二芯板600，同时，该通孔400穿过第二抗镀层221。
参照图5、图8至图10，在步骤S104之后，可采用常规的去除第二抗镀层221的方法完全去除位于第一芯板200以及第二芯板600之间的第二抗镀层221，例如，可以选用化学药 水彻底去除第二抗镀层221。去除第二抗镀层221后，第一芯板200以及第二芯板600之间形成有空腔，通孔400在空腔处形成断层。在某些实施例中，去除第二抗镀层221的方法为：对由压合后的第一芯板200和第二芯板600构成的多层复合板300的板面以及内部的通孔400进行化学沉铜，使得板面上、通孔400中的第二抗镀层221以及非抗镀层区域上均附着有铜层，由于第二抗镀层221与非抗镀层区域的吸铜速率不同，使得位于第二抗镀层221上的铜厚小于非抗镀层区域的铜厚，二者上所附着铜厚的差值为22m。接下来，采用轻微蚀刻的方式，去除附着在第二抗镀层221上的铜层，由于非抗镀层区域上的铜厚大于第二抗镀层221上的铜厚，因此，在轻微蚀刻后，仅第二抗镀层220上的铜层被完全去除，而非抗镀层区域上的铜层仍然有部分被保留，使得在通孔400内部，仅第二抗镀层220被暴露在空气中。之后，可采用常规的去除第二抗镀层221的方法完全去除位于第一芯板200上的第二抗镀层220，此时，化学沉铜后附着在非抗镀层区域的铜层能够对非抗镀区域形成保护，使得在使用化学药水期间，仅第二抗镀层221被去除。
参照图10至图12，在步骤S106中，在多层复合板300的板面上施加电镀铜层260以及在通孔400内电镀铜，非抗镀层区域将全部再次镀上铜层，而在空腔处不再镀有铜层。对多层复合板300进行整板电镀后，通孔400内壁被未镀铜的空腔分隔为第一区域以及第二区域，第一区域上附着有第一金属层280，第二区域上附着有第二金属层270，使得通孔400形成为断层的金属化孔。通过形成断层的金属化孔，使得金属化孔内的第一金属层280以及第二金属层270能够被分隔开，在后续需要去除第二金属层270时，无论是采用背钻的方式，还是通过其他方式，均可以在不触及第一金属层280的前提下，将残桩完全去除，实现零残桩。
在步骤S107中，将第二金属层270去除，只保留第一金属层280，从而能够实现印刷电路板500在第一金属层280的区域内导电连接。在某些实施例中，去除第二金属层270的方法为“施加保护层-三次湿法蚀刻”，其步骤包括：
在第一金属层280表面制备第一保护层，在第二金属层270表面制备第二保护层；
湿法蚀刻，去除第二保护层；
湿法蚀刻，去除第二金属层；以及
湿法蚀刻，去除第一保护层，暴露第一金属层280。
在第二金属层270的区域内施加干膜(第二保护层)，使得第二金属层270的区域完全地被干膜所覆盖；对多层复合板300以及第一金属层280进行镀锡(第一保护层)保护，镀锡后，通过一次药水蚀刻(第一次湿法蚀刻)，将第二金属层270表面的干膜(第二保护层)除去，此时，一次药水仅与干膜发生化学法应并使得干膜褪去；再通过二次药水，对褪去干膜后的第二金属层270进行第二次湿法蚀刻，此时，二次药水仅与第二金属层270发生化学反应，即，将第二金属层270(即残桩)完全去除；，通过三次药水，对被镀锡(第一保护层)保护的区域，即多层复合板300的板面以及第一金属层280的区域，进行第三次湿法蚀刻，使得覆盖在多层复合板300的板面以及第一金属层280处的镀锡层被去除，从而暴露第一金属层280。通过该方式去除第二金属层270，能够降低生产成本，无需通过背钻的方式，同时能够保证加工质量。该去除第二金属层270后的多层复合板300即为零残桩的印刷电路板500。
参照图5至图7，在一些实施例中，第一芯板200和第二芯板600可以通过半固化片230进行层叠，层叠顺序依次为第一芯板200-半固化片230-第二芯板600，使得位于第一芯板200 上的第二抗镀层221与半固化片230相互接触，层叠后通过高温高压进行压合。在去除了第二抗镀层221后，在半固化片230中会形成一个凹槽250，电镀铜后，第一金属层280以及第二金属层270就分设在凹槽250沿上下方向的两侧。在某些实施例中，为了使得各层芯板以及第一芯板200之间的压合更加紧密，可以在半固化片230的与第二抗镀层221相对应的位置处开设槽部231，使得在压合时，第二抗镀层221以及保留后的内层铜箔210能够容置在槽部231中，从而，半固化片230上未开设槽部231的区域能够与第一芯板200紧密贴合。为了避免在印制电路板偏位时第二抗镀层221进入到图形内，所开设的槽部231的直径大于通孔的直径，直径差在5.5mil至6.5mil之间，作为一示例，直径差为6mil。
参照图13至图15，本申请实施例第二方面实施例的印刷电路板制备方法，包括：
在第一芯板200上制备第一抗镀层220，第二芯板600上制备第七抗镀层610，第三芯板700上制备第三抗镀层710；
通过图形化工艺，在第一芯板200上形成第四抗镀层222、第二芯板600上形成第五抗镀层611、第三芯板700上形成第六抗镀层711；
将第一芯板200、第二芯板600、第四芯板800和第三芯板700依次层叠并压合；
制备通孔400；
通孔400经过第四抗镀层222、第五抗镀层611和第六抗镀层711，且贯穿第一芯板200、第二芯板600、第四芯板800和第三芯板700；
去除第四抗镀层222、第五抗镀层611和第六抗镀层711；
制备金属层；
金属层包括，设置在通孔400内壁第一区域的第一金属层280、设置在通孔400内壁第二区域的第五金属层620、设置在通孔400内壁第四区域的第四金属层820和设置在通孔400内壁第三区域的第三金属层720；以及
去除第四金属层820；暴露第一金属层280、第五金属层620和第三金属层720。
通过该方法，在不需要电气导通以及信号传输的区域中不布设铜层，得到一孔多通道的零残桩印刷电路板500，提高电路板密度，以满足高信号速率电子设备的需求。
与第一方面实施例相同，在第一芯板200、第二芯板600以及第三芯板700上分别施加第一抗镀层、第七抗镀层610以及第三抗镀层710，三者均为整板施加在三个芯板上；再次，通过图形化工艺，将第一抗镀层、第七抗镀层610以及第三抗镀层710分别转化为形状、大小适合的第四抗镀层222、第五抗镀层611以及第六抗镀层711，在图形化工艺的过程中，制作第一芯板200、第二芯板600以及第三芯板700上的内层铜箔210，部分地保留各个芯板上的内层铜箔210，使得第四抗镀层222、第五抗镀层611、第六抗镀层711分别与各自的内层铜箔210的面积相互适配。接下来，增加第四芯板800，并将以上四个芯板按照第一芯板200-第二芯板600-第四芯板800-第三芯板700的顺序依次层叠，并通过高温高压压合，以形成多层复合板；再从第一芯板200的外层铜箔起始，自上而下在预设的钻孔区域钻孔，使得在多层复合板300中形成贯穿第一芯板200、第二芯板600、第四芯板800以及第三芯板700的通孔400。接下来，通过化学方法去除第四抗镀层222、第五抗镀层611以及第六抗镀层711，在去除三个抗镀层之前可以采用化学沉铜-轻微蚀刻的方式将非抗镀层区域进行保护，以使仅第四抗镀层222、第五抗镀层611以及第六抗镀层711被去除，使得去除了三个抗镀层的区域形成有空腔，由于空腔能够使单个通孔400形成一孔多通道的通孔400。接下来，在一孔 多通道的通孔400内进行电镀铜，使得通孔400内除空腔外的区域均附着有金属层(铜层)。铜层依次包括：第一金属层280(位于第一芯板200)、第五金属层620(位于第二芯板600)、第四金属层820(位于第四芯板800)以及第三金属层720(位于第三芯板700)，至此，通孔400已经形成为一孔多通道的断层的金属化孔。由于在压合后的多层复合板300中，位于中间位置的第四金属层820处并不需要电气导通以及信号传输，因此，将通孔400内的第四金属层820去除，仅保留第一金属层280、第五金属层620以及第三金属层720。去除第四金属层820后的印刷电路板不具有残桩，并且不会影响信号传输的完整性。
参照图2以及图14，在某些实施例中，为了完全去除第四金属层820，暴露第一金属层280、第五金属层620和第三金属层720，且降低成本，可以采用“施加保护层-三次湿法蚀刻”方法去除第四金属层820，其步骤包括：在第四金属层820的区域内制备干膜(第二保护层)，使得第四金属层820的区域完全地被干膜所覆盖；对第一金属层280、第五金属层620、第三金属层720进行镀锡(第一保护层)保护，镀锡后，通过一次药水蚀刻(第一次湿法蚀刻)，将第四金属层820表面的干膜(第二保护层)除去，此时，一次药水仅与干膜发生化学法应并使得干膜褪去；再通过二次药水，对褪去干膜后的第四金属层820进行第二次湿法蚀刻，此时，二次药水仅与第四金属层820发生化学反应，即，将第四金属层820(即残桩)完全去除；通过三次药水，对被镀锡(第一保护层)保护的区域，即第一金属层280、第五金属层620、第三金属层720的区域，进行第三次湿法蚀刻，使得覆盖在第一金属层280、第五金属层620、第三金属层720处的镀锡层被去除，从而暴露第一金属层280、第五金属层620、第三金属层720。
参照图13，在某些实施例中，去除第四抗镀层222、第五抗镀层611和第六抗镀层711的步骤包括：对由压合后的第一芯板200、第二芯板600、第四芯板800和第三芯板700的通孔400进行化学沉铜，使得通孔400中的第四抗镀层222、第五抗镀层611和第六抗镀层711以及非抗镀层区域上均附着有铜层，由于第四抗镀层222、第五抗镀层611和第六抗镀层711与非抗镀层区域的吸铜速率不同，位于第四抗镀层222、第五抗镀层611和第六抗镀层711上的铜厚小于非抗镀层区域的铜厚。再采用轻微蚀刻的方式，去除附着在第四抗镀层222、第五抗镀层611和第六抗镀层711上的铜层，由于非抗镀层区域上的铜厚大于第四抗镀层222、第五抗镀层611和第六抗镀层711上的铜厚，因此，在轻微蚀刻后，仅第四抗镀层222、第五抗镀层611和第六抗镀层711上的铜层被完全去除，而非抗镀层区域上的铜层仍然有部分被保留，使得在通孔400内部，仅第四抗镀层222、第五抗镀层611和第六抗镀层711被暴露在空气中。而在化学沉铜后，附着在非抗镀层区域的铜层能够对非抗镀区域形成保护，之后，再使用化学药水，将第四抗镀层222、第五抗镀层611和第六抗镀层711去除。
参照图13，为了使得第一芯板200、第二芯板600、第四芯板800和第三芯板700在压合时更加紧密，在第一芯板200、第二芯板600、第四芯板800和第三芯板700之间分别加入半固化片230，将第一芯板200、第二芯板600、第四芯板800和第三芯板700以及各自的半固化片230层叠。第四抗镀层222、第五抗镀层611以及第六抗镀层711分别与半固化片230相互贴合。在压合时，第四抗镀层222、第五抗镀层611以及第六抗镀层711能够陷入对应的半固化片230中。因此，在去除第四抗镀层222、第五抗镀层611和第六抗镀层711后，在对应的半固化片230中会形成凹槽250。
参照图13，在某些实施例中，为了提供一孔多通道的电路板，可以采用三层芯板层叠压 合的方式，即，第一芯板200、第二芯板600、第三芯板700依次层叠并压合，采用上述的制备方法分别在第一芯板200以及第三芯板700中施加抗镀层，钻孔并除去抗镀层后，在通孔400内镀铜，最后将附着在第二芯板600上的铜层(残桩)通过“施加保护层-三次湿法蚀刻”的方式去除，形成一孔三通道的印刷电路板。同样的，也可以采用多层芯板依次层叠压合的方式，步骤在此不再赘述。
本申请实施例第三方面实施例的印刷电路板500，由根据上述的制作方法制成。通过上述制作方法制成的印刷电路板500，通过采用抗镀层、一次压合技术以及选择性蚀刻的方式，制备得到零残桩印刷电路板，从而改善印刷电路板的性能；同时，通过一孔多通道印刷电路板，能够提高电路板密度，以满足高信号速率电子设备的需求。
本申请实施例第四方面实施例的电子设备，包括上述的印刷电路板500，由于上述印刷电路板具备零残桩的特性，因此，能够提高电子设备的信号传输性能以及电气导通性能。
本申请实施例所提供的技术方案，通过采用抗镀层、一次压合技术以及选择性蚀刻的方式，制备得到零残桩电路板，从而改善电路板的性能；同时，采用本申请实施例所提供的技术还能够制备一孔多通道电路板，提高电路板密度，以满足高信号速率电子设备的需求。
以上是对本申请实施例的若干实施进行了具体说明，但本申请实施例并不局限于上述实施方式，熟悉本领域的技术人员在不违背本申请实施例精神的前提下还可作出种种的等同变形或替换，这些等同的变形或替换均包含在本申请实施例权利要求所限定的范围内。

Claims (15)

  1. 一种印刷电路板制备方法，包括：
    在第一芯板上制备第一抗镀层；
    通过图形化工艺，在所述第一芯板上形成第二抗镀层；
    所述第二抗镀层为图形化后的所述第一抗镀层；
    将所述第一芯板和第二芯板层叠并压合；
    制备通孔，所述通孔经过所述第二抗镀层，且贯穿所述第一芯板和所述第二芯板；
    去除所述第二抗镀层；
    制备金属层；
    所述金属层包括，设置在所述通孔内壁第一区域的第一金属层和设置在所述通孔内壁第二区域的第二金属层；以及
    去除所述第二金属层，暴露所述第一金属层。
  2. 根据权利要求1所述的制备方法，其中，所述去除所述第二金属层；暴露所述第一金属层，包括：
    在所述第一金属层表面制备第一保护层，在所述第二金属层表面制备第二保护层；
    湿法蚀刻，去除所述第二保护层；
    湿法蚀刻，去除所述第二金属层；以及
    湿法蚀刻，去除所述第一保护层，暴露所述第一金属层。
  3. 根据权利要求1所述的制备方法，其中：去除所述第二抗镀层包括：
    对压合后的所述第一芯板和所述第二芯板进行化学沉铜；
    对压合后的所述第一芯板和所述第二芯板进行蚀刻；以及
    通过化学药水去除所述第二抗镀层。
  4. 根据权利要求1所述的制备方法，其中：
    所述第一芯板和所述第二芯板通过半固化片层叠并压合；以及
    去除所述第二抗镀层后，在所述半固化片中形成凹槽。
  5. 根据权利要求4所述的制备方法，其中：所述第一金属层和所述第二金属层分别设置在所述凹槽两侧。
  6. 根据权利要求4所述的制备方法，其中：在所述半固化片的靠近所述第二抗镀层的一侧设置槽部，以使所述第二抗镀层容置在所述槽部中。
  7. 根据权利要求6所述的制备方法，其中：所述槽部的直径大于所述通孔的直径，直径差为5.5mil～6.5mil。
  8. 根据权利要求1所述的制备方法，其中：所述第一芯板包括内层铜箔，通过图形化工艺，在所述第一芯板上形成所述第二抗镀层时，部分地保留所述内层铜箔，以使内层铜箔的面积与所述第二抗镀层的面积相互对应。
  9. 根据权利要求8所述的印刷电路板制备方法，其中：所述第二抗镀层与所述内层铜箔的面积差为1.5mil～2.5mil。
  10. 一种印刷电路板制备方法，包括：
    在第一芯板上制备第一抗镀层，第二芯板上制备第七抗镀层，第三芯板上制备第三抗镀 层；
    通过图形化工艺，在所述第一芯板上形成第四抗镀层、所述第二芯板上形成第五抗镀层、所述第二芯板上形成第六抗镀层；
    将所述第一芯板、所述第二芯板、第四芯板和所述第三芯板依次层叠并压合；
    制备通孔；
    所述通孔经过所述第四抗镀层、所述第五抗镀层和所述第六抗镀层，且贯穿所述所述第一芯板、所述第二芯板、所述第四芯板和所述第三芯板；
    去除所述第四抗镀层、所述第五抗镀层和所述第六抗镀层；
    制备金属层；
    所述金属层包括，设置在所述通孔内壁第一区域的第一金属层、设置在所述通孔内壁第二区域的第五金属层、设置在所述通孔内壁第四区域的第四金属层和设置在所述通孔内壁第三区域的第三金属层；以及
    去除所述第四金属层；暴露所述第一金属层、所述第二金属层和所述第三金属层。
  11. 根据权利要求10所述的制备方法，其中，所述去除所述第四金属层；暴露所述第一金属层、所述第五金属层和所述第三金属层，包括：
    在所述第一、五、三金属层表面制备第一保护层，在所述第四金属层表面制备第二保护层；
    湿法蚀刻，去除所述第二保护层；
    湿法蚀刻，去除所述第四金属层；以及
    湿法蚀刻，去除所述第一保护层，暴露所述第一、五、三金属层。
  12. 根据权利要求10所述的制备方法，其中：
    去除所述第四抗镀层、所述第五抗镀层和所述第六抗镀层包括：
    对压合后的所述第一芯板、所述第二芯板、所述第四芯板和所述第三芯板进行化学沉铜；
    对压合后的所述第一芯板、所述第二芯板、所述第四芯板和所述第三芯板进行蚀刻；以及
    通过化学药水去除所述第四抗镀层、所述第五抗镀层和所述第六抗镀层。
  13. 根据权利要求10所述的制备方法，其中：
    所述第一芯板、所述第二芯板、所述第四芯板和所述第三芯板通过半固化片层叠并压合；
    去除所述第四抗镀层、所述第五抗镀层和所述第六抗镀层后，在对应所述半固化片中形成凹槽。
  14. 一种印刷电路板，所述印刷电路板由根据权利要求1-13中任一项所述的方法得到。
  15. 一种电子设备，包括：如权利要求14所述的印刷电路板。
PCT/CN2022/080756 2021-06-08 2022-03-14 一种印刷电路板、印刷电路板制备方法以及电子设备 WO2022257525A1 (zh)

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