WO2022247280A1 - 驱动电路的制造方法、驱动电路和光罩 - Google Patents

驱动电路的制造方法、驱动电路和光罩 Download PDF

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Publication number
WO2022247280A1
WO2022247280A1 PCT/CN2021/143322 CN2021143322W WO2022247280A1 WO 2022247280 A1 WO2022247280 A1 WO 2022247280A1 CN 2021143322 W CN2021143322 W CN 2021143322W WO 2022247280 A1 WO2022247280 A1 WO 2022247280A1
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WIPO (PCT)
Prior art keywords
pixel control
control circuit
photoresist
pattern
photoresist layer
Prior art date
Application number
PCT/CN2021/143322
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English (en)
French (fr)
Inventor
孙晓振
邱添辉
郑浩旋
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惠科股份有限公司
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Application filed by 惠科股份有限公司 filed Critical 惠科股份有限公司
Publication of WO2022247280A1 publication Critical patent/WO2022247280A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the present application relates to the field of display technology, in particular to a method for manufacturing a driving circuit, a driving circuit and a photomask.
  • GOA Gate Driver on Array, array substrate row drive
  • GOA technology refers to the gate drive circuit (Gate driver IC) is directly fabricated on the array (Array) substrate to realize the driving method of progressive scanning of the gate.
  • GOA technology can simplify the manufacturing process of the display panel, save the chip bonding (Bonding) process in the direction of the horizontal scanning line, and reduce the production cost. At the same time, it can improve the integration of the display panel and make the display panel lighter and thinner.
  • shorting bar testing is required to light up the display panel to check whether the display panel can display normally.
  • the photo mask (Photo Mask) tends to accumulate charges, resulting in Electro Static discharge (ESD), which causes damage to the circuit in the corresponding area of the photo mask and affects the yield rate of the drive circuit manufacturing.
  • ESD Electro Static discharge
  • One of the purposes of the embodiments of the present application is to provide a method for manufacturing a driving circuit, a driving circuit, and a photomask, aiming to solve the problem that the photomask tends to accumulate charges and generate static electricity during the manufacturing of the existing shorting bar test driving circuit during exposure. release, causing damage to the circuit in the corresponding area of the mask, and affecting the yield rate of the drive circuit manufacturing.
  • a method for manufacturing a driving circuit including:
  • the photomask includes a pixel control circuit pattern, and the pixel control circuit pattern is provided with a plurality of partitions to release the pixel control circuit pattern during exposure.
  • Generated static electricity the length of the partition between two adjacent pixel control circuit patterns is a preset distance;
  • a driving circuit including a pixel control circuit and a switch module, the pixel control circuit includes a first pixel control circuit, a second pixel control circuit and a third pixel control circuit, and the switch module includes a first Switch unit, second switch unit and third switch unit:
  • the first pixel control circuit is connected to the first switch unit for outputting a first color pixel control signal, and the first switch unit is used for controlling the output of the first color pixel control signal to the display panel;
  • the second pixel control circuit is connected to the second switch unit for outputting a second color pixel control signal, and the second switch unit is used for controlling the second color pixel control signal to be output to the display panel;
  • the third pixel control circuit is connected to the third switch unit for outputting a third color pixel control signal, and the third switch unit is used for controlling the third color pixel control signal to be output to the display panel.
  • a photomask which includes a pixel control circuit pattern, and the pixel control circuit pattern is provided with a plurality of partitions to release static electricity generated in the pixel control circuit pattern during exposure.
  • the length of the partition between the pixel control line graphics is a preset distance.
  • the beneficial effect of the manufacturing method of the driving circuit provided by the embodiment of the present application is that it can effectively derive the electrostatic charge on the pixel control circuit pattern, avoid the accumulation of electrostatic charge on the pixel control circuit pattern, and reduce the probability of electrostatic discharge, thereby The risk of damage to components used for exposure is reduced, and the integrity of the formed pixel control circuit can be guaranteed, so that the driving circuit can operate normally.
  • the pixel control circuit is used to output the color pixel control signal
  • the switch unit is used to control the color pixel control signal to be output to the display panel, which can be used to perform a short bar test on the display panel, and Determine whether the display panel is faulty according to the displayed screen.
  • Fig. 1 is a schematic diagram of the first structure of the photomask provided by the embodiment of the present application
  • Fig. 2 is a schematic flow chart of the first type of manufacturing method of the driving circuit provided by the embodiment of the present application;
  • Fig. 3 is a schematic diagram of the scene when the substrate, conductive layer, photoresist layer and photomask provided by the embodiment of the present application are exposed under the exposure machine;
  • Fig. 4 is a second structural schematic diagram of the photomask provided by the embodiment of the present application.
  • FIG. 5 is a second schematic flow chart of the manufacturing method of the driving circuit provided by the embodiment of the present application.
  • FIG. 6 is a schematic diagram of the third structure of the photomask provided by the embodiment of the present application.
  • FIG. 7 is a schematic flowchart of a third method of manufacturing a driving circuit provided in an embodiment of the present application.
  • FIG. 8 is a schematic diagram of the first structure of the driving circuit provided by the embodiment of the present application.
  • FIG. 9 is a second structural schematic diagram of the driving circuit provided by the embodiment of the present application.
  • FIG. 10 is a schematic diagram of a third structure of the driving circuit provided by the embodiment of the present application.
  • the embodiment of the present application provides a method for manufacturing a driving circuit, which can be applied to the manufacturing process of a driving circuit for a display panel. Specifically, it can be realized when a photomask is covered on a substrate and exposed. Partition, reduce the static electricity generated on the photomask during the exposure process, so as to reduce the probability of electrostatic discharge of the photomask, thereby improving the yield rate of driving circuit manufacturing, and then improving the yield rate of display panel production.
  • the display panel can be based on TFT-LCD (Thin Film Transistor Liquid Crystal Display, thin film transistor liquid crystal display) technology liquid crystal display panel, liquid crystal display panel based on LCD (Liquid Crystal Display, liquid crystal display) technology, OLED (Organic Light-Emitting Organic electro-laser display panels based on Diode (Organic Light Emitting Diode) technology, based on QLED (Quantum Dot Light Emitting Diodes, quantum dot light-emitting diode) technology quantum dot light-emitting diode display panel or curved display panel, etc.
  • TFT-LCD Thi Film Transistor Liquid Crystal Display, thin film transistor liquid crystal display
  • LCD Liquid Crystal Display, liquid crystal display
  • OLED Organic Light-Emitting Organic electro-laser display panels based on Diode (Organic Light Emitting Diode) technology
  • QLED Quantum Dot Light Emitting Diodes, quantum dot light-emitting diode
  • Embodiment 1 of the present application exemplarily shows a first structural schematic diagram of a photomask 100; wherein, the photomask 100 includes a pixel control circuit pattern 101, and the pixel control circuit pattern 101 is provided in multiple places
  • the partition 102 is used to release the static electricity generated in the pixel control circuit pattern 101 during exposure, and the length of the partition 102 between two adjacent pixel control circuit patterns 101 is a preset distance.
  • the photomask can be different types of photomasks such as metal photomasks and glass photomasks.
  • the design pattern of the mask can be hollowed out or non-hollowed out. Specifically, when the design pattern of the mask is hollowed out, the remaining area of the mask is not hollowed out; when the design pattern of the mask is not hollowed out, The remaining area of the mask is hollowed out.
  • the pixel control line graphics are used as design graphics.
  • the partition and non-design graphics are not hollowed out; when the pixel control line graphics are not hollowed out, the partition and non-design graphics are hollowed out.
  • the existing pixel control circuit pattern is easy to generate or absorb static electricity, and because the existing pixel control circuit pattern includes a complete circuit pattern and does not have a partition, the length is relatively long, so that Electrostatic charge is easy to accumulate on the existing pixel control circuit pattern. When the electrostatic charge reaches a certain amount, electrostatic discharge will occur, resulting in damage to the formed pixel control circuit, and even damage to the components used for exposure.
  • the electrostatic charge on the pixel control circuit pattern can be effectively derived, and the electrostatic charge can be avoided from accumulating on the pixel control circuit pattern, reducing the probability of electrostatic discharge, and making the formed pixel control circuit
  • the circuit is a complete pixel control circuit and reduces the risk of damage to components used for exposure.
  • a driving circuit manufacturing method provided in Embodiment 2 of the present application is used to manufacture the photomask 100 provided in Embodiment 1 corresponding to FIG. 1 , including steps S201 to S205:
  • Step S201 covering the substrate with a conductive layer
  • Step S202 covering the conductive layer with a photoresist layer
  • Step S203 covering the photoresist layer with a photomask and performing exposure; wherein, the photomask includes a pixel control circuit pattern, and the pixel control circuit pattern is provided with multiple partitions to release static electricity generated in the pixel control circuit pattern during exposure.
  • the length of the partition between two adjacent pixel control line graphics is a preset distance;
  • Step S204 developing the photoresist layer, removing the area of the photoresist layer not covered by the pixel control circuit pattern, so as to form a photoresist area;
  • Step S205 etching the conductive layer to remove the area of the conductive layer not covered by the photoresist area, so as to form the pixel control circuit.
  • covering the conductive layer on the substrate, covering the photoresist layer on the conductive layer, developing the photoresist and etching the conductive layer are existing processes for manufacturing the driving circuit, which will not be repeated here.
  • the difference is that by covering the photoresist layer with the pixel control circuit pattern with partitions for exposure, the static electricity generated in the pixel control circuit pattern during exposure can be released, and the integrity of the formed pixel control circuit will not be affected.
  • the exposure process and photomask of the embodiment are introduced in detail.
  • the substrate can be a glass substrate (Glass Substrate), a ceramic substrate (Ceramic Substrate), or a metal substrate (Metal Base Printed Circuit Board, MBPCB), specifically conductive film glass substrate (Indium Tin Oxide Glass Substrate), the embodiment of the present application does not impose any limitation on the type of the substrate.
  • the preset distance means the length less than the analytical accuracy of the exposure machine.
  • the value range of the preset distance is smaller than the minimum resolution precision of the exposure machine, or the preset distance
  • the value range of the distance is included in the accuracy range that the exposure machine cannot resolve.
  • the value range of the preset distance can be any interval less than 1 micron; or when the exposure machine cannot
  • the value range of the preset distance can be any open interval between 0.5 micron and 1 micron.
  • the embodiment of the present application does not impose any limitation on the value range of the preset distance.
  • step S205 including:
  • the conductive circuit or components consistent with the design pattern can be obtained, but in the development and etching process, it is easy to make the removed photoresist adhere to the substrate , the substrate is stripped by the stripping solution, which can remove the remaining photoresist covering the substrate, so as to ensure the performance of the substrate and recover the remaining photoresist.
  • FIG. 3 exemplarily shows a schematic view of the scene when the substrate 10 , the conductive layer 20 , the photoresist layer 30 and the mask 100 are exposed under the exposure machine 40 .
  • FIG. 3 the schematic diagram of the scene in FIG. 3 is a front view of the substrate 10, the conductive layer 20, the photoresist layer 30, the photomask 100 and the exposure machine 40.
  • the structural diagrams of the photomask 100 in FIG. 1 and other drawings are A top view of the photomask 100 .
  • Embodiment 3 of the present application exemplarily shows a second structural schematic diagram of the photomask 100; wherein the pixel control circuit pattern 101 includes:
  • the first color pixel control circuit pattern 103 is used to cover the photoresist layer for exposure, and after the photoresist layer is developed and the conductive layer is etched, the first color pixel control circuit is formed;
  • the second color pixel control circuit pattern 104 is used to cover the photoresist layer for exposure, and after the photoresist layer is developed and the conductive layer is etched, the second color pixel control circuit is formed;
  • the third color pixel control circuit pattern 105 is used to cover the photoresist layer for exposure, and after developing the photoresist layer and etching the conductive layer, the third color pixel control circuit is formed.
  • the first color pixel control circuit pattern, the second color pixel control circuit pattern and the third color pixel control circuit pattern are partitioned in the same way as the pixel control circuit pattern in the figure, which will not be repeated here.
  • the difference is that the length of the cut-off on the first color pixel control circuit pattern, the second color pixel control circuit pattern and the third color pixel control circuit pattern can be a preset line distance, so that the first color pixel control line, the second color pixel control line
  • Step S204 includes Step S501 to step S503
  • step S205 includes step S504 to step S506:
  • Step S501 developing the photoresist layer, removing the area of the photoresist layer not covered by the first pixel control circuit pattern, so as to form a first sub-photoresist area;
  • Step S502 developing the photoresist layer, removing the area of the photoresist layer not covered by the second pixel control circuit pattern, so as to form a second sub-photoresist area;
  • Step S503 develop the photoresist layer, and remove the area of the photoresist layer not covered by the third pixel control circuit pattern, so as to form a third sub-photoresist area.
  • Step S504 etching the conductive layer to remove the region of the conductive layer not covered by the first sub-photoresist region, so as to form the first pixel control circuit;
  • Step S505 etching the conductive layer to remove the region of the conductive layer not covered by the second sub-photoresist region, so as to form a second pixel control circuit
  • Step S506 etching the conductive layer to remove a region of the conductive layer not covered by the third sub-photoresist region, so as to form a third pixel control circuit.
  • the pixel control circuit pattern of the photomask may include the pixel control circuit pattern of the first color pixel control circuit pattern, the second color pixel control circuit pattern and the third color pixel control circuit pattern.
  • the exposure, development and etching methods of the control circuit pattern, the second-color pixel control circuit pattern and the third-color pixel control circuit pattern are the same as the exposure, development and etching methods of steps S203 to S205, and will not be repeated here. The difference is that steps S203 to S205 are used to expose, develop and etch a pixel control circuit pattern of the photomask.
  • the pixel control circuit pattern is exposed, developed and etched.
  • the method of partitioning the first color pixel control circuit pattern, the second color pixel control circuit pattern and the third color pixel control circuit pattern is the same as the above-mentioned method of partitioning the pixel control circuit pattern, and will not be repeated here.
  • Embodiment 5 of the present application exemplarily shows a third structural schematic view of the photomask 100; wherein the photomask 100 further includes:
  • the switch module pattern 106 is used to cover and expose the photoresist layer to form a switch module after developing and etching.
  • the switch module pattern can include multiple switch patterns, and the switch pattern can be a pattern of a transistor that acts as a switch in the circuit, and the transistor that acts as a switch can be an NPN type triode (NPN Type Triode), or a PNP type
  • NPN Type Triode NPN type triode
  • PNP Type Triode PNP type Triode
  • TFT Thin Film Transistor
  • the reticle further includes:
  • the wire pattern 107 is used to cover and expose the photoresist layer to form wires for pixel control circuits after development and etching.
  • the photomask may include multiple wire patterns, and the wire patterns and switch patterns correspond one-to-one.
  • One wire pattern can connect a switch pattern and a pixel control circuit pattern; specifically, a wire pattern can connect a switch pattern and a
  • the first color pixel control circuit pattern may also be connected with a switch pattern and a second color pixel control circuit pattern, and may also be connected with a switch pattern and a third color pixel control circuit pattern.
  • Step S204 includes Step S701
  • step S205 includes step S702:
  • S701 develop the photoresist layer, and remove the area of the photoresist layer not covered by the switch module pattern, so as to form a fourth sub-photoresist area;
  • the switch module pattern can include a plurality of switch patterns, because the switch pattern can be a transistor pattern that acts as a switch in the circuit, when the switch pattern is a triode pattern, the distance between the source and the drain of the triode pattern is too large Closely, it is easy to accumulate electrostatic charge between the source and drain of the triode pattern during exposure and cause electrostatic discharge.
  • step S701 and step S702 may be performed after step S504 to step S506, or may be performed before step S501 to step S503.
  • the embodiment of the present application does not impose any limitation on the execution order of step S701 and step S702.
  • step S701 also includes:
  • the photoresist layer is developed to remove the area of the photoresist layer not covered by the wire pattern, so as to form the fifth sub-photoresist area.
  • Step S702 also includes:
  • Etching the conductive layer to remove the region of the conductive layer not covered by the fifth sub-photoresist region, so as to form the wires of the pixel control circuit.
  • the pixel control circuit may specifically be a first pixel control circuit, a second pixel control circuit and a third pixel control circuit.
  • the switch module pattern is connected with the pixel control circuit pattern through the wire pattern, it is easy to cause electrostatic discharge to occur together with the wire pattern and the pixel control circuit pattern.
  • the electrostatic charge on the switch pattern can be derived, and the electrostatic charge can be avoided from accumulating on the pixel control circuit pattern, reducing the probability of electrostatic discharge, so that the exposed pixel control circuit and pixel control circuit Consistent patterning and reduced risk of damage to exposed components.
  • the manufacturing method of the drive circuit provided in the embodiment of the present application is to cover the substrate with the conductive layer;
  • Control circuit graphics the pixel control circuit graphics are provided with multiple partitions, the length of the partition between two adjacent pixel control circuit graphics is a preset distance, to release the static electricity generated in the pixel control circuit graphics during exposure; for photolithography Developing the adhesive layer, removing the area not covered by the pixel control circuit pattern in the photoresist layer to form a photoresist area; etching the conductive layer, removing the area not covered by the photoresist area in the conductive layer, To form a pixel control circuit, it can effectively lead out the electrostatic charge on the pixel control circuit pattern, and avoid the accumulation of electrostatic charge on the pixel control circuit pattern, reduce the probability of electrostatic discharge, thereby reducing the risk of damage to the components used for exposure risk, and can ensure the integrity of the formed pixel control circuit, so that the driving circuit can operate normally.
  • the driving circuit 200 provided by Embodiment 7 of the present application includes a pixel control circuit 210 and a switch module 220 , and the pixel control circuit 210 includes a first pixel control circuit 211 , a second pixel control circuit 212 and a third pixel control circuit 212 .
  • the switch module 220 includes a first switch unit 221, a second switch unit 222 and a third switch unit 223:
  • the first pixel control circuit 211 is connected to the first switch unit 221 for outputting the first color pixel control signal, and the first switch unit 221 is used for controlling the output of the first color pixel control signal to the display panel 300;
  • the second pixel control circuit 212 is connected to the second switch unit 222 for outputting the second color pixel control signal, and the second switch unit 222 is used for controlling the output of the second color pixel control signal to the display panel 300;
  • the third pixel control circuit 213 is connected to the third switch unit 223 for outputting the third color pixel control signal, and the third switch unit 223 is used for controlling the third color pixel control signal to output to the display panel 300 .
  • the first color, the second color and the third color can be one of the three primary colors, specifically, the first color can be red, the second color can be green, and the third color can be blue
  • the first color pixel control circuit can be a red pixel control circuit, and the first color pixel control signal is a red control signal
  • the second color pixel control circuit can be a green pixel control circuit, and the second color control signal is a green pixel control signal
  • the three-color pixel control circuit may be a blue pixel control circuit, and the third color control signal is a blue pixel control signal to form an RGB pixel control circuit and an RGB control signal.
  • first pixel control lines are connected to multiple first switch units in one-to-one correspondence, and one first switch unit is used to control the output of the first color pixel control signal sent by the correspondingly connected first pixel control lines to the display.
  • Panel specifically, when a first switch unit is turned on, the first color pixel control signal sent by the correspondingly connected first pixel control line can be output to the display panel; when a first switch unit is turned off, the correspondingly connected first pixel control signal The first color pixel control signal sent by a pixel control circuit stops outputting to the display panel.
  • the working principles of the second switch unit and the second pixel control circuit, and the third switch unit and the third pixel control circuit are the same as those of the first switch unit and the first pixel control circuit, and will not be repeated here.
  • any color pixel control signal among the first color pixel control signal, the second color pixel control signal and the third color pixel control signal can be controlled by the first switch unit, the second switch unit and the third switch unit Realize independent output, and can also mix and output any two color pixel control signals, and can also mix and output three color pixel control signals; when one color pixel control signal is output alone, the display panel displays a solid color picture, and the display can be judged according to the display screen Whether any color pixel of the panel is faulty; when any two color pixel control signals are mixed and output, it can be judged according to the display screen whether the above-mentioned any two pixel of the display panel will fail when the mixed output; when the three color pixel control signals During the mixed output, it can be judged according to the display screen whether the three types of pixels of the display panel will fail during the mixed output.
  • the driving circuit provided by the eighth embodiment of the present application is based on the seventh embodiment corresponding to FIG. 222 is connected to the third switch unit 223, the driving module 230 is used to output the first driving signal to the display panel 300 according to the pixel control signal of the first color, and is also used to output the second driving signal to the display panel 300 according to the pixel control signal of the second color , and is also used to output a third driving signal to the display panel 300 according to the third color pixel control signal, so as to drive the display panel 300 to display images.
  • the driving module can output corresponding pixel driving signals to the display panel according to the pixel control signal, so as to drive the display panel to display images, wherein the display panel can include pixels of various colors, specifically red pixels, green pixels and blue pixels.
  • the pixel driving signal can be used to drive the pixel of the corresponding color in the display panel to emit light according to the color pixel driving signal, and can also be used to drive the luminous degree of the pixel of the display panel according to the voltage of the pixel control signal to adjust the gray scale of the pixel Level, so that the electrical signal of the pixel control signal is converted into the optical signal of the display panel display screen, so as to perform a short-circuit bar test on the display panel; when the display panel displays according to the output pixel control signal, it means that the display panel is normal.
  • the output pixel control signal it indicates that there is a fault in the display panel, and it can be determined whether the pixel of the corresponding color of the display panel has a fault by changing the color of the color pixel control signal.
  • the pixel driving signal is the source driving signal of the TFT of the pixel of the display panel. Therefore, when a switch is turned on and sends a pixel control signal to the driving module, The driving module can control the degree of liquid crystal deflection of a pixel according to the pixel driving signal output by the pixel control signal, so as to control the degree of light emission of the pixel.
  • the driving circuit provided by the ninth embodiment of the present application in one embodiment, based on the eighth embodiment corresponding to FIG. connected for sending the first driving signal, the second driving signal and the third driving signal to the display panel 300 .
  • the fan-out module may include multiple fan-out lines, and the pixel driving signal sent by one fan-out line corresponds to the pixel control signal sent by one switch.
  • the driving circuit provided in the embodiment of the present application includes a pixel control circuit and a switch module, the pixel control circuit is used to output the color pixel control signal, and the switch unit is used to control the color pixel control signal to be output to the display panel, and can be used to short-circuit the display panel Stick test, and judge whether the display panel is faulty according to the display screen.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
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  • Electroluminescent Light Sources (AREA)

Abstract

本申请公开一种驱动电路的制造方法、驱动电路和光罩，该驱动电路的制造方法通过将光罩（100）覆盖于光刻胶层并进行曝光；其中，光罩（100）包括像素控制线路图形（101），像素控制线路图形（101）设置有多处隔断（102），相邻的两个像素控制线路图形（101）之间的隔断（102）的长度为预设距离，以释放曝光时在像素控制线路图形（101）产生的静电，可以有效的将像素控制线路图形（101）上的静电电荷导出，以及避免静电电荷在像素控制线路图形（101）上累积，降低发生静电释放的概率，从而降低用于曝光的元器件受损的风险，并可以保证曝光得到的形成的像素控制线路的完整性，使驱动电路可以正常运行。

Description

驱动电路的制造方法、驱动电路和光罩
本申请要求于2021年05月26日在中国专利局提交的、申请号为202110576057.6、申请名称为“驱动电路的制造方法、驱动电路和光罩”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，具体涉及一种驱动电路的制造方法、驱动电路和光罩。
 背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然构成现有技术。随着显示技术的不断发展，显示面板在娱乐、教育、安防等各种领域得到广泛应用。GOA(Gate Driver on Array，阵列基板行驱动)技术是指将栅极驱动电路(Gate driver IC)直接制作在阵列(Array)基板上，实现对栅极逐行扫描的驱动方式。GOA技术能够简化显示面板的制备工序，省去水平扫描线方向的芯片邦定（Bonding）工序，并降低生产成本，同时可以提高显示面板的集成度，使显示面板更轻薄化。
使用GOA技术的显示面板在生产过程中，需要进行短路棒测试（Shorting Bar Testing）点亮显示面板以检测显示面板能否正常显示，短路棒测试的驱动电路的制造需要经过一系列流程，其中进行曝光时光罩（Photo Mask）容易累积电荷从而发生静电释放（Electro Static discharge，ESD），导致光罩对应区域的电路损坏，影响驱动电路制造的良品率。
 技术问题
本申请实施例的目的之一在于：提供一种驱动电路的制造方法、驱动电路、光罩，旨在解决现有的短路棒测试的驱动电路制造进行曝光时，光罩容易累积电荷从而发生静电释放，导致光罩对应区域的电路损坏，影响驱动电路制造的良品率的问题。
 技术解决方案
本申请实施例采用的技术方案是：
第一方面，提供了一种驱动电路的制造方法，包括：
将导电层覆盖于基板；
将光刻胶层覆盖于所述导电层；
将光罩覆盖于所述光刻胶层并进行曝光；其中，所述光罩包括像素控制线路图形，所述像素控制线路图形设置有多处隔断，以释放曝光时在所述像素控制线路图形产生的静电，相邻的两个所述像素控制线路图形之间的隔断的长度为预设距离；
对所述光刻胶层进行显影，去除所述光刻胶层中未被所述像素控制线路图形所覆盖的区域，以形成光刻胶区域；
对所述导电层进行蚀刻，去除所述导电层中未被所述光刻胶区域所覆盖的区域，以形成像素控制线路。
第二方面，提供了一种驱动电路，包括像素控制线路和开关模块，所述像素控制线路包括第一像素控制线路、第二像素控制线路和第三像素控制线路，所述开关模块包括第一开关单元、第二开关单元和第三开关单元：
所述第一像素控制线路，与所述第一开关单元连接，用于输出第一颜色像素控制信号，所述第一开关单元用于控制第一颜色像素控制信号输出至显示面板；
所述第二像素控制线路，与所述第二开关单元连接，用于输出第二颜色像素控制信号，所述第二开关单元用于控制第二颜色像素控制信号输出至显示面板；
所述第三像素控制线路，与所述第三开关单元连接，用于输出第三颜色像素控制信号，所述第三开关单元用于控制第三颜色像素控制信号输出至显示面板。
第三方面，提供一种光罩，包括像素控制线路图形，所述像素控制线路图形设置有多处隔断，以释放曝光时在所述像素控制线路图形产生的静电，相邻的两个所述像素控制线路图形之间的隔断的长度为预设距离。
 有益效果
本申请实施例提供的驱动电路的制造方法的有益效果在于：可以有效的将像素控制线路图形上的静电电荷导出，以及避免静电电荷在像素控制线路图形上累积，降低发生静电释放的概率，从而降低用于曝光的元器件受损的风险，并可以保证形成的像素控制线路的完整性，使驱动电路可以正常运行。
本申请实施例提供的驱动电路的有益效果在于：像素控制线路用于输出颜色像素控制信号，开关单元用于控制颜色像素控制信号输出至显示面板，可以用于对显示面板进行短路棒测试，并根据显示画面判断显示面板是否故障。
本申请实施例提供的光罩的有益效果可以参见上述驱动电路的制造方法中的相关描述，在此不再赘述。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例或示范性技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其它的附图。
图1是本申请实施例提供的光罩的第一种结构示意图；
图2是本申请实施例提供的驱动电路的制造方法的第一种流程示意图；
图3是本申请实施例提供的基板、导电层、光刻胶层及光罩在曝光机下曝光时的场景示意图；
图4是本申请实施例提供的光罩的第二种结构示意图；
图5是本申请实施例提供的驱动电路的制造方法的第二种流程示意图；
图6是本申请实施例提供的光罩的第三种结构示意图；
图7是本申请实施例提供的驱动电路的制造方法的第三种流程示意图；
图8是本申请实施例提供的驱动电路的第一种结构示意图；
图9是本申请实施例提供的驱动电路的第二种结构示意图；
图10是本申请实施例提供的驱动电路的第三种结构示意图。
 本发明的实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
需说明的是，术语“上”、“下”、“左”、“右”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制，对于本领域的普通技术人员而言，可以根据具体情况理解上述术语的具体含义。术语“第一”、“第二”仅用于便于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明技术特征的数量。“多个”的含义是两个或两个以上，除非另有明确具体的限定。
为了说明本申请所提供的技术方案，以下结合具体附图及实施例进行详细说明。
本申请实施例提供一种驱动电路的制造方法，可以应用于显示面板的驱动电路制造流程，具体可以在光罩覆盖于基板并进行曝光时实现，通过在光罩的像素控制线路图形设置多处隔断，减少曝光过程中在光罩上产生的静电，以降低光罩发生静电释放的概率，从而提高驱动电路制造的良品率，进而提高显示面板生产的良品率。
在应用中，显示面板可以是基于TFT-LCD（Thin Film Transistor Liquid Crystal Display，薄膜晶体管液晶显示器）技术的液晶显示面板、基于LCD（Liquid Crystal Display，液晶显示器）技术的液晶显示面板、基于OLED（Organic Light-Emitting Diode，有机发光二极管）技术的有机电激光显示面板、基于QLED（Quantum Dot Light Emitting Diodes，量子点发光二极管）技术的量子点发光二极管显示面板或曲面显示面板等。
实施例一
如图1所示，本申请实施例一示例性的示出了光罩100的第一种结构示意图；其中，光罩100包括像素控制线路图形101，所述像素控制线路图形101设置有多处隔断102，以释放曝光时在所述像素控制线路图形101产生的静电，相邻的两个像素控制线路图形101之间的隔断102的长度为预设距离。
在应用中，光罩可以是金属光罩、玻璃光罩等不同类型的光罩。光罩上具有设计图形，设计图形可以根据实际需要进行设置，通过曝光机进行曝光可以将光罩上的设计图形映射在光刻胶上，光刻胶覆盖于导电层，导电层覆盖于基板，再经过显影、烘烤、蚀刻和剥膜等工序流程，可以得到和设计图形的形状一致的可导电线路或元器件。光罩的设计图形可以是镂空的，也可以是非镂空的，具体的，当光罩的设计图形为镂空的，光罩的剩余区域为非镂空的；当光罩的设计图形为非镂空的，光罩的剩余区域为镂空的。
在应用中，像素控制线路图形作为设计图形，当像素控制线路图形为镂空的，隔断和非设计图形为非镂空的；当像素控制线路图形为非镂空的，隔断和非设计图形为镂空的。由于当光罩的像素控制线路图形进行曝光时，现有的像素控制线路图形容易产生或吸附静电，并且由于现有的像素控制线路图形包括完整的线路图形且不具有隔断，长度较长，使静电电荷容易在现有的像素控制线路图形上累积，当静电电荷达到一定数量会产生静电释放，导致形成的像素控制线路损坏，甚至损坏用于曝光的元器件。本实施例通过在像素控制线路图形设置隔断，可以有效的将像素控制线路图形上的静电电荷导出，以及避免静电电荷在像素控制线路图形上累积，降低发生静电释放的概率，使形成的像素控制线路为完整的像素控制线路，并降低用于曝光的元器件受损的风险。
实施例二
如图2所示，本申请实施例二提供的一种驱动电路制造方法，用于制造图1所对应的实施例一提供的光罩100，包括步骤S201至步骤S205：
步骤S201、将导电层覆盖于基板；
步骤S202、将光刻胶层覆盖于导电层；
步骤S203、将光罩覆盖于光刻胶层并进行曝光；其中，光罩包括像素控制线路图形，像素控制线路图形设置有多处隔断，以释放曝光时在像素控制线路图形产生的静电，相邻的两个像素控制线路图形之间的隔断的长度为预设距离；
步骤S204、对光刻胶层进行显影，去除光刻胶层中未被像素控制线路图形所覆盖的区域，以形成光刻胶区域；
步骤S205、对导电层进行蚀刻，去除导电层中未被光刻胶区域所覆盖的区域，以形成像素控制线路。
在应用中，将导电层覆盖于与基板、将光刻胶层覆盖于导电层、对光刻胶进行显影和对导电层进行蚀刻是制造驱动电路的现有工艺，在此不再赘述。区别在于，通过包括具有隔断的像素控制线路图形覆盖于光刻胶层进行曝光，可以释放曝光时在像素控制线路图形产生的静电，并且不会影响形成的像素控制线路的完整性，下面对本申请实施例的曝光工序和光罩进行详细介绍。
在应用中，通过将光罩覆盖于光刻胶层，并通过覆盖于光罩的曝光机进行曝光，可以在光刻胶层被像素控制线路图形覆盖的区域得到和像素控制线路图形一致的形状。其中，基板可以是玻璃基板（Glass Substrate），也可以是陶瓷基板（Ceramic Substrate），还可以是金属基板（Metal Base Printed Circuit Board，MBPCB），具体可以是导电膜玻璃基板（Indium Tin Oxide Glass Substrate），本申请实施例对基板的种类不作任何限制。
在应用中，由于曝光机解析精度的限制，当曝光机对光罩中长度小于解析精度的隔断进行曝光时，曝光机将无法解析该隔断，从而曝光后在光刻胶层上得到的线路是连续且不具有隔断的。预设距离表示小于曝光机解析精度的长度，当相邻的两个像素控制线路图形之间的隔断的长度位于预设距离时，曝光后在光刻胶层上像素控制线路图形所覆盖的区域是连续且不具有隔断的，在实际运用中，预设距离的取值可以根据曝光机的解析精度确定，具体的，预设距离的取值范围小于曝光机的最小解析精度，或者，预设距离的取值范围包含在曝光机无法解析的精度范围内，例如，当曝光机的最小解析精度为1微米时，预设距离的取值范围可以小于1微米的任意区间；或者当曝光机无法解析0.5微米至1微米长度的隔断时，预设距离的取值范围可以是0.5微米至1微米之间的任意开区间。本申请实施例对预设距离的取值范围不做任何限制。
在一个实施例中，步骤S205之后，包括：
对基板进行剥膜，以去除覆盖于基板的剩余光刻胶。
在应用中，在曝光、显影和蚀刻的工序之后，已经可以得到和设计图形一致的可导电线路或元器件，不过在显影和蚀刻的工序中，容易使被去除的光刻胶附着在基板上，通过剥膜液对基板进行剥膜，可以去除覆盖于基板的剩余光刻胶，以保证基板性能并可以回收剩余光刻胶。
图3示例性的示出了基板10、导电层20、光刻胶层30及光罩100在曝光机40下曝光时的场景示意图。
需要说明的是，图3的场景示意图为基板10、导电层20、光刻胶层30、光罩100及曝光机40的正视图，图1及其他附图中的光罩100的结构示意图为光罩100的俯视图。
实施例三
如图4所示，本申请实施例三示例性的示出了光罩100的第二种结构示意图；其中像素控制线路图形101包括：
第一颜色像素控制线路图形103，用于覆盖于光刻胶层进行曝光，并对所述光刻胶层进行显影和对导电层进行蚀刻之后，形成第一颜色像素控制线路；
第二颜色像素控制线路图形104，用于覆盖于光刻胶层进行曝光，并对所述光刻胶层进行显影和对导电层进行蚀刻之后，形成第二颜色像素控制线路；
第三颜色像素控制线路图形105，用于覆盖于光刻胶层进行曝光，并对所述光刻胶层进行显影和对导电层进行蚀刻之后，形成第三颜色像素控制线路。
在应用中，第一颜色像素控制线路图形、第二颜色像素控制线路图形和第三颜色像素控制线路图形和图中的像素控制线路图形设置隔断的方式一致，在此不再赘述。区别在于，第一颜色像素控制线路图形、第二颜色像素控制线路图形和第三颜色像素控制线路图形上的隔断的长度可以为预设线路距离，使第一颜色像素控制线路、第二颜色像素控制线路和第三颜色像素控制线路之间可以留有更多空间进行导线的连接，便于驱动电路进行布线，预设线路距离可以根据实际需要进行设置。
实施例四
如图5所示，基于图2所对应的实施例二提供的制造方法，本申请实施例四提供的制造方法，用于制造图4所对应的实施例三提供的光罩100，步骤S204包括步骤S501至步骤S503，步骤S205包括步骤S504至步骤S506：
步骤S501、对光刻胶层进行显影，去除光刻胶层中未被第一像素控制线路图形所覆盖的区域，以形成第一子光刻胶区域；
步骤S502、对光刻胶层进行显影，去除光刻胶层中未被第二像素控制线路图形所覆盖的区域，以形成第二子光刻胶区域；
步骤S503、对光刻胶层进行显影，去除光刻胶层中未被第三像素控制线路图形所覆盖的区域，以形成第三子光刻胶区域。
步骤S504、对导电层进行蚀刻，去除导电层中未被第一子光刻胶区域所覆盖的区域，以形成第一像素控制线路；
步骤S505、对导电层进行蚀刻，去除导电层中未被第二子光刻胶区域所覆盖的区域，以形成第二像素控制线路；
步骤S506、对导电层进行蚀刻，去除导电层中未被第三子光刻胶区域所覆盖的区域，以形成第三像素控制线路。
在应用中，光罩的像素控制线路图形可以包括第一颜色像素控制线路图形、第二颜色像素控制线路图形和第三颜色像素控制线路图形三种颜色的像素控制线路图形，对第一颜色像素控制线路图形、第二颜色像素控制线路图形和第三颜色像素控制线路图形的曝光、显影和蚀刻方法和上述步骤S203至步骤S205的曝光、显影和蚀刻方法相同，在此不再赘述。区别在于，步骤S203至步骤S205用于对光罩的一种像素控制线路图形进行曝光、显影和蚀刻，当光罩包括上述三种颜色的像素控制线路图形时，可以同时对上述三种颜色的像素控制线路图形进行曝光、显影和蚀刻。
在应用中，第一颜色像素控制线路图形、第二颜色像素控制线路图形和第三颜色像素控制线路图形设置隔断的方式，和上述像素控制线路图形设置隔断的方式一致，在此不再赘述。
实施例五
如图6所示，本申请实施例五示例性的示出了光罩100的第三种结构示意图；其中光罩100还包括：
开关模块图形106，用于覆盖于光刻胶层并进行曝光，以在显影和蚀刻后形成开关模块。
在应用中，开关模块图形可以包括多个开关图形，开关图形可以是在电路中起开关作用的晶体管的图形，起开关作用的晶体管可以是NPN型三极管（NPN Type Triode），也可以是PNP型三极管（PNP Type Triode），具体的，可以是薄膜场效应晶体管（Thin Film Transistor，TFT）。
在一个实施例中，光罩还包括：
导线图形107，用于覆盖于光刻胶层并进行曝光，以在显影和蚀刻后形成像素控制线路的导线。
在应用中，光罩可以包括多个导线图形，导线图形和开关图形一一对应，一个导线图形可以连接一个开关图形和一个像素控制线路图形；具体的，一个导线图形可以连接一个开关图形和一个第一颜色像素控制线路图形，也可以连接一个开关图形和一个第二颜色像素控制线路图形，还可以连接一个开关图形和一个第三颜色像素控制线路图形。
实施例六
如图7所示，基于图5所对应的实施例四提供的制造方法，本申请实施例六提供的制造方法，用于制造图6所对应的实施例五提供的光罩100，步骤S204包括步骤S701，步骤S205包括步骤S702：
S701、对光刻胶层进行显影，去除光刻胶层中未被开关模块图形所覆盖的区域，以形成第四子光刻胶区域；
S702、对导电层进行蚀刻，去除导电层中未被第四子光刻胶区域所覆盖的区域，以形成开关模块。
在应用中，开关模块图形可以包括多个开关图形，由于开关图形可以是在电路中起开关作用的晶体管的图形，当开关图形为三极管图形时，三极管图形的源极和漏极之间距离过近，导致进行曝光时三极管图形的源极和漏极之间容易累积静电电荷并导致静电释放。
在应用中，步骤S701和步骤S702可以在步骤S504至步骤S506之后执行，也可以在步骤S501至步骤S503之前执行，本申请实施例对步骤S701和步骤S702的执行顺序不做任何限制。
在一个实施例中，步骤S701还包括：
对光刻胶层进行显影，去除光刻胶层中未被导线图形所覆盖的区域，以形成第五子光刻胶区域。
步骤S702还包括：
对导电层进行蚀刻，去除导电层中未被第五子光刻胶区域所覆盖的区域，以形成像素控制线路的导线。
在应用中，像素控制线路具体可以是第一像素控制线路、第二像素控制线路及第三像素控制线路。
在应用中，由于在光罩中，开关模块图形通过导线图形与像素控制线路图形连接，容易导致导线图形和像素控制线路图形一起发生静电释放。通过在像素控制线路图形设置多处隔断，可以将开关图形上的静电电荷导出，以及避免静电电荷在像素控制线路图形上累积，降低发生静电释放的概率，使曝光得到的像素控制线路和像素控制线路图形一致，并降低用于曝光的元器件受损的风险。
本申请实施例的提供的驱动电路的制造方法，通过将导电层覆盖于基板；将光刻胶层覆盖于导电层；将光罩覆盖于光刻胶层并进行曝光；其中，光罩包括像素控制线路图形，像素控制线路图形设置有多处隔断，相邻的两个像素控制线路图形之间的隔断的长度为预设距离，以释放曝光时在像素控制线路图形产生的静电；对光刻胶层进行显影，去除光刻胶层中未被像素控制线路图形所覆盖的区域，以形成光刻胶区域；对导电层进行蚀刻，去除导电层中未被光刻胶区域所覆盖的区域，以形成像素控制线路，可以有效的将像素控制线路图形上的静电电荷导出，以及避免静电电荷在像素控制线路图形上累积，降低发生静电释放的概率，从而降低用于曝光的元器件受损的风险，并可以保证形成的像素控制线路的完整性，使驱动电路可以正常运行。
应理解，上述实施例中各步骤的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
实施例七
如图8所示，本申请实施例七提供的驱动电路200，包括像素控制线路210和开关模块220，像素控制线路210包括第一像素控制线路211、第二像素控制线路212和第三像素控制线路213，开关模块220包括第一开关单元221、第二开关单元222和第三开关单元223：
第一像素控制线路211，与第一开关单元221连接，用于输出第一颜色像素控制信号，第一开关单元221用于控制第一颜色像素控制信号输出至显示面板300；
第二像素控制线路212，与第二开关单元222连接，用于输出第二颜色像素控制信号，第二开关单元222用于控制第二颜色像素控制信号输出至显示面板300；
第三像素控制线路213，与第三开关单元223连接，用于输出第三颜色像素控制信号，第三开关单元223用于控制第三颜色像素控制信号输出至显示面板300。
在应用中，第一颜色、第二颜色和第三颜色可以分别是三基色中的一种，具体的，第一颜色可以是红色，第二颜色可以是绿色，第三颜色可以是蓝色，从而第一颜色像素控制线路可以是红色像素控制线路，第一颜色像素控制信号为红色控制信号；第二颜色像素控制线路可以是绿色像素控制线路，第二颜色控制信号为绿色像素控制信号；第三颜色像素控制线路可以是蓝色像素控制线路，第三颜色控制信号为蓝色像素控制信号，以组成RGB像素控制线路和RGB控制信号。
在应用中，多条第一像素控制线路和多个第一开关单元一一对应连接，一个第一开关单元用于控制对应连接的第一像素控制线路发送的第一颜色像素控制信号输出至显示面板，具体的，当一个第一开关单元打开时，对应连接的第一像素控制线路发送的第一颜色像素控制信号可以输出至显示面板，当一个第一开关单元关断时，对应连接的第一像素控制线路发送的第一颜色像素控制信号停止输出至显示面板。第二开关单元和第二像素控制线路的工作原理、第三开关单元和第三像素控制线路的工作原理与上述第一开关单元和第一像素控制线路的工作原理相同，在此不再赘述。
在应用中，第一颜色像素控制信号、第二颜色像素控制信号和第三颜色像素控制信号中的任意一种颜色像素控制信号，通过第一开关单元、第二开关单元和第三开关单元可以实现单独输出，也可以任意两种颜色像素控制信号混合输出，还可以三种颜色像素控制信号混合输出；当一种颜色像素控制信号单独输出时，显示面板显示纯色画面，可以根据显示画面判断显示面板的任意一种颜色像素是否故障；当任意两种颜色像素控制信号混合输出时，可以根据显示画面判断显示面板的上述任意两种像素混合输出时是否会发生故障；当三种颜色像素控制信号混合输出时，可以根据显示画面判断显示面板的三种像素混合输出时是否会发生故障。
实施例八
如图9所示，本申请实施例八提供的驱动电路，基于图8所对应的实施例七，驱动电路200还包括驱动模块230，驱动模块230分别与第一开关单元221、第二开关单元222和第三开关单元223连接，驱动模块230用于根据第一颜色像素控制信号输出第一驱动信号至显示面板300，还用于根据第二颜色像素控制信号输出第二驱动信号至显示面板300，还用于根据第三颜色像素控制信号输出第三驱动信号至显示面板300，以驱动显示面板300显示画面。
在应用中，驱动模块可以根据像素控制信号输出对应的像素驱动信号至显示面板，以驱动显示面板显示画面，其中，显示面板可以包括多种颜色的像素，具体可以包括红色像素、绿色像素和蓝色像素，像素驱动信号可以用于根据颜色像素驱动信号，驱动显示面板中对应颜色的像素发光，还可以用于根据像素控制信号的电压大小驱动显示面板的像素的发光程度以调节像素的灰度级别，从而将像素控制信号的电信号转化为显示面板显示画面的光信号，以对显示面板进行短路棒测试；当显示面板按照输出的像素控制信号显示时，说明显示面板正常，当显示面板未按照输出的像素控制信号显示时，说明显示面板存在故障，可以通过改变颜色像素控制信号的颜色确定显示面板对应颜色的像素是否存在故障。
在应用中，当显示面板是基于TFT技术的液晶显示面板时，像素驱动信号为显示面板的像素的TFT的源极驱动信号，因此，当一个开关导通并向驱动模块发送像素控制信号时，驱动模块可以根据上述像素控制信号输出的像素驱动信号控制一个像素的液晶偏转程度，以控制该像素的发光程度。
实施例九
如图10所示，本申请实施例九提供的驱动电路，在一个实施例中，基于图9所对应的实施例八，驱动电路200还包括扇出模块240，扇出模块240与驱动模块230连接，用于发送第一驱动信号、第二驱动信号和第三驱动信号至显示面板300。
在应用中，扇出模块可以包括多条扇出线路，一条扇出线路发送的像素驱动信号对应一个开关发送的像素控制信号。
本申请实施例提供的驱动电路，包括像素控制线路和开关模块，像素控制线路用于输出颜色像素控制信号，开关单元用于控制颜色像素控制信号输出至显示面板，可以用于对显示面板进行短路棒测试，并根据显示画面判断显示面板是否故障。
在上述实施例中，对各个实施例的描述都各有侧重，某个实施例中没有详述或记载的部分，可以参见其它实施例的相关描述。
以上仅为本申请的可选实施例而已，并不用于限制本申请。对于本领域的技术人员来说，本申请可以有各种更改和变化。凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的权利要求范围之内。

Claims (16)

  1. 一种驱动电路（200）的制造方法，其中，所述驱动电路（200）包括像素控制线路（210），所述制造方法包括：
    将导电层（20）覆盖于基板（10）；
    将光刻胶层（30）覆盖于所述导电层（20）；
    将光罩（100）覆盖于所述光刻胶层（30）并进行曝光；其中，所述光罩（100）包括像素控制线路图形（101），所述像素控制线路图形（101）设置有多处隔断（102），以释放曝光时在所述像素控制线路图形（101）产生的静电，相邻的两个所述像素控制线路图形（101）之间的隔断（102）的长度为预设距离；
    对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被所述像素控制线路图形（101）所覆盖的区域，以形成光刻胶区域；
    对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述光刻胶区域所覆盖的区域，以形成像素控制线路（210）。
  2. 根据权利要求1所述的驱动电路（200）的制造方法，其中，所述预设距离的取值范围小于曝光机（40）的最小解析精度。
  3. 根据权利要求1所述的驱动电路（200）的制造方法，其中，所述像素控制线路（210）包括第一颜色像素控制线路（211）、第二颜色像素控制线路（212）和第三颜色像素控制线路（213）；
    所述像素控制线路图形（101）包括第一颜色像素控制线路图形（103）、第二颜色像素控制线路图形（104）和第三颜色像素控制线路图形（105）；
    所述对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被所述像素控制线路图形（101）所覆盖的区域，以形成光刻胶区域，包括：
    对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被第一像素控制线路图形（103）所覆盖的区域，以形成第一子光刻胶区域；
    对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被第二像素控制线路图形（104）所覆盖的区域，以形成第二子光刻胶区域；
    对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被第三像素控制线路图形（105）所覆盖的区域，以形成第三子光刻胶区域。
  4. 根据权利要求3所述的驱动电路（200）的制造方法，其中，所述对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述光刻胶区域所覆盖的区域，以形成像素控制线路（210），包括：
    对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述第一子光刻胶区域所覆盖的区域，以形成第一像素控制线路（211）；
    对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述第二子光刻胶区域所覆盖的区域，以形成第二像素控制线路（212）；
    对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述第三子光刻胶区域所覆盖的区域，以形成第三像素控制线路（213）。
  5. 根据权利要求1所述的驱动电路（200）的制造方法，其中，所述光罩（100）还包括开关模块图形（106）；
    所述将光罩（100）覆盖于所述光刻胶层（30）并进行曝光之后，包括：
    对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被开关模块图形（106）所覆盖的区域，以形成第四子光刻胶区域。
  6. 根据权利要求5所述的驱动电路的制造方法，其中，所述对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被开关模块图形（106）所覆盖的区域，以形成第四子光刻胶区域之后，包括：
    对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述第四子光刻胶区域所覆盖的区域，以形成开关模块（220）。
  7. 根据权利要求1所述的驱动电路（200）的制造方法，其中，所述光罩还包括导线图形（107）；
    所述将光罩（100）覆盖于所述光刻胶层（30）并进行曝光之后，包括：
    对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被导线图形（107）所覆盖的区域，以形成第五子光刻胶区域。
  8. 根据权利要求7所述的驱动电路（200）的制造方法，其中，所述对所述光刻胶层（30）进行显影，去除所述光刻胶层（30）中未被导线图形（107）所覆盖的区域，以形成第五子光刻胶区域之后，包括：
    对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述第五子光刻胶区域所覆盖的区域，以形成所述像素控制线路（210）的导线。
  9. 根据权利要求1所述的驱动电路（200）的制造方法，其中，所述对所述导电层（20）进行蚀刻，去除所述导电层（20）中未被所述光刻胶区域所覆盖的区域，以形成像素控制线路（210）之后，包括：
    对所述基板（10）进行剥膜，以去除覆盖于所述基板（10）的剩余光刻胶。
  10. 一种驱动电路（200），其中，基于权利要求1所述的驱动电路（200）的制造方法实现，所述驱动电路（200）包括像素控制线路（210）和开关模块（220），所述像素控制线路（210）包括第一像素控制线路（211）、第二像素控制线路（212）和第三像素控制线路（213），所述开关模块（220）包括第一开关单元（221）、第二开关单元（222）和第三开关单元（223）：
    所述第一像素控制线路（211），与所述第一开关单元（221）连接，用于输出第一颜色像素控制信号，所述第一开关单元（221）用于控制第一颜色像素控制信号输出至显示面板（300）；
    所述第二像素控制线路（212），与所述第二开关单元（222）连接，用于输出第二颜色像素控制信号，所述第二开关单元（222）用于控制第二颜色像素控制信号输出至显示面板（300）；
    所述第三像素控制线路（213），与所述第三开关单元（223）连接，用于输出第三颜色像素控制信号，所述第三开关单元（223）用于控制第三颜色像素控制信号输出至显示面板（300）。
  11. 根据权利要求10所述的驱动电路（200），其中，还包括驱动模块（230）；
    所述驱动模块（230）分别与所述第一开关单元（221）、所述第二开关单元（222）和所述第三开关单元（223）连接，所述驱动模块（230）用于根据第一颜色像素控制信号输出第一驱动信号至显示面板（300），还用于根据第二颜色像素控制信号输出第二驱动信号至显示面板（300），还用于根据第三颜色像素控制信号输出第三驱动信号至显示面板（300），以驱动所述显示面板（300）显示画面。
  12. 根据权利要求11所述的驱动电路（200），其中，还包括扇出模块（240）；
    所述扇出模块（240）与所述驱动模块（230）连接，用于发送所述第一驱动信号、所述第二驱动信号和所述第三驱动信号至所述显示面板（300）。
  13. 一种光罩（100），其中，包括像素控制线路图形（101），所述像素控制线路图形（101）设置有多处隔断（102），以释放曝光时在所述像素控制线路图形（101）产生的静电，相邻的两个所述像素控制线路图形（101）之间的隔断（102）的长度为预设距离。
  14. 根据权利要求13所述的光罩（100），其中，所述像素控制线路图形（101）包括：
    第一颜色像素控制线路图形（103），用于覆盖于光刻胶层（30）进行曝光，并对所述光刻胶层（30）进行显影和对导电层进行蚀刻之后，形成第一颜色像素控制线路（211）；
    第二颜色像素控制线路图形（104），用于覆盖于光刻胶层（30）进行曝光，并对所述光刻胶层（30）进行显影和对导电层进行蚀刻之后，形成第二颜色像素控制线路（212）；
    第三颜色像素控制线路图形（105），用于覆盖于光刻胶层（30）进行曝光，并对所述光刻胶层（30）进行显影和对导电层进行蚀刻之后，形成第三颜色像素控制线路（213）。
  15. 根据权利要求13所述的光罩（100），其中，还包括开关模块图形（106），所述开关模块图形（106）用于覆盖于光刻胶层（30）并进行曝光，以在显影和蚀刻后形成开关模块（220）。
  16. 根据权利要求15所述的光罩（100），其中，还包括导线图形（107），所述导线图形（107）分别与所述像素控制线路图形（101）和所述开关模块图形（106）连接，所述导线图形（107）用于覆盖于所述光刻胶层（30）并进行曝光，以在显影和蚀刻后形成像素控制线路（210）的导线。
PCT/CN2021/143322 2021-05-26 2021-12-30 驱动电路的制造方法、驱动电路和光罩 WO2022247280A1 (zh)

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