WO2022224946A1 - 銅/セラミックス接合体、および、絶縁回路基板 - Google Patents
銅/セラミックス接合体、および、絶縁回路基板 Download PDFInfo
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- WO2022224946A1 WO2022224946A1 PCT/JP2022/018126 JP2022018126W WO2022224946A1 WO 2022224946 A1 WO2022224946 A1 WO 2022224946A1 JP 2022018126 W JP2022018126 W JP 2022018126W WO 2022224946 A1 WO2022224946 A1 WO 2022224946A1
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- Prior art keywords
- copper
- active metal
- ceramic
- thickness
- ceramic substrate
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- 239000000919 ceramic Substances 0.000 title claims abstract description 173
- 239000010949 copper Substances 0.000 title claims abstract description 149
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 146
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 144
- 229910052751 metal Inorganic materials 0.000 claims abstract description 152
- 239000002184 metal Substances 0.000 claims abstract description 151
- 150000004767 nitrides Chemical class 0.000 claims abstract description 52
- 150000002736 metal compounds Chemical class 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims description 106
- 229910017944 Ag—Cu Inorganic materials 0.000 claims description 23
- 229910045601 alloy Inorganic materials 0.000 claims description 22
- 239000000956 alloy Substances 0.000 claims description 22
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 20
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 238000005304 joining Methods 0.000 claims description 2
- 239000000463 material Substances 0.000 description 38
- 238000010438 heat treatment Methods 0.000 description 24
- 239000010936 titanium Substances 0.000 description 24
- 238000001816 cooling Methods 0.000 description 22
- 238000005336 cracking Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 239000000843 powder Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 7
- 229910052719 titanium Inorganic materials 0.000 description 7
- 238000005219 brazing Methods 0.000 description 6
- 229910000679 solder Inorganic materials 0.000 description 6
- 229910008484 TiSi Inorganic materials 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 229910000765 intermetallic Inorganic materials 0.000 description 3
- 239000007791 liquid phase Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- 238000002490 spark plasma sintering Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000012790 confirmation Methods 0.000 description 2
- 239000000498 cooling water Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004453 electron probe microanalysis Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 229910017945 Cu—Ti Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- JAWMENYCRQKKJY-UHFFFAOYSA-N [3-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-ylmethyl)-1-oxa-2,8-diazaspiro[4.5]dec-2-en-8-yl]-[2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidin-5-yl]methanone Chemical compound N1N=NC=2CN(CCC=21)CC1=NOC2(C1)CCN(CC2)C(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F JAWMENYCRQKKJY-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000012809 cooling fluid Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002149 energy-dispersive X-ray emission spectroscopy Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 150000004678 hydrides Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- C04B37/023—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles characterised by the interlayer used
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
Definitions
- the present invention provides a copper/ceramic bonded body in which a copper member made of copper or a copper alloy and a ceramic member are joined together, and an insulating circuit in which a copper plate made of copper or a copper alloy is joined to the surface of a ceramic substrate. It relates to substrates.
- a power module, an LED module, and a thermoelectric module have a structure in which a power semiconductor element, an LED element, and a thermoelectric element are joined to an insulating circuit board in which a circuit layer made of a conductive material is formed on one side of an insulating layer.
- power semiconductor elements for high power control used to control wind power generation, electric vehicles, hybrid vehicles, etc. generate a large amount of heat during operation.
- Patent Document 1 proposes an insulated circuit board in which a circuit layer and a metal layer are formed by bonding copper plates to one side and the other side of a ceramic substrate.
- copper plates are arranged on one surface and the other surface of a ceramic substrate with an Ag—Cu—Ti brazing material interposed therebetween, and the copper plates are joined by heat treatment (so-called active metal brazing method).
- Patent Document 2 proposes a power module substrate in which a copper plate made of copper or a copper alloy and a ceramic substrate made of silicon nitride are bonded using a bonding material containing Ag and Ti.
- a copper plate and a ceramic substrate are bonded using a bonding material containing Ti
- Ti which is an active metal, reacts with the ceramic substrate, thereby improving the wettability of the bonding material and the copper plate.
- the bonding strength with the ceramic substrate is improved.
- the heat generation temperature of the semiconductor elements mounted on the insulated circuit board tends to be higher, and the insulated circuit board is required to have higher cooling/heating cycle reliability to withstand severe cooling/heating cycles.
- Ti which is an active metal
- an intermetallic compound containing Cu and Ti precipitates.
- the vicinity of the joint interface becomes hard, cracks may occur in the ceramic member during thermal cycle loading, and there is a risk of deterioration in thermal cycle reliability.
- the present invention has been made in view of the above-mentioned circumstances. It is an object of the present invention to provide an insulated circuit board made of this copper/ceramic bonded body.
- the inventors of the present invention conducted intensive studies and found that the shape of the copper member to be bonded to one surface and the other surface of the ceramic member, the application state of the bonding material, and the liquid phase during bonding It was found that the structure of the bonding interface between the copper plate bonded to one surface of the ceramic member and the bonding interface between the copper plate bonded to the other surface of the ceramic member differs depending on the occurrence conditions. If the hardness of the bonding interface between the copper member bonded to one surface and the other surface of the ceramic member is different, the balance of the thermal stress applied to the ceramic member during the thermal cycle load will be lost, and the ceramic member will be damaged. It was found that cracks are likely to occur.
- the copper/ceramic joined body of the present invention is formed by joining a copper member made of copper or a copper alloy and a ceramic member made of silicon nitride.
- the active metal compound containing Si and the active metal has an area ratio of 10% or less in a region of 10 ⁇ m from the active metal nitride layer to the copper member side, and is bonded to the one surface side.
- a ratio A1/A2 between an area ratio A1 of the active metal compound in the copper member and an area ratio A2 of the active metal compound in the copper member joined to the other surface is 0.7 or more. It is characterized by being within the range of 4 or less.
- the copper/ceramic joined body of the present invention a region of 10 ⁇ m from the active metal nitride layer to the copper member side at the joint interface with the copper member joined to one surface and the other surface of the ceramic member Since the area ratio of the active metal compound containing Si and the active metal is set to 10% or less, the bonding interface between the ceramic member and the copper member is suppressed from becoming unnecessarily hard.
- a ratio A1 between the area ratio A1 of the active metal compound in the copper member bonded to the one surface side and the area ratio A2 of the active metal compound in the copper member bonded to the other surface side /A2 is in the range of 0.7 or more and 1.4 or less, so that there is no large difference in the hardness of the bonding interface between the copper member bonded to one surface and the other surface of the ceramic member. , the occurrence of cracks in the ceramic member under a thermal cycle load can be suppressed, and the thermal cycle reliability is excellent.
- the thickness ta1 of the active metal nitride layer formed on the one surface side of the ceramic member, and the thickness ta1 on the other surface side of the ceramic member is in the range of 0.05 ⁇ m or more and 0.8 ⁇ m or less, and the thickness ratio ta1/ta2 is in the range of 0.7 or more and 1.4 or less. preferably.
- the thickness ta1 of the active metal nitride layer formed on the one surface side of the ceramic member and the thickness ta1 of the active metal nitride layer formed on the other surface side of the ceramic member Since the thickness ta2 is in the range of 0.05 ⁇ m or more and 0.8 ⁇ m or less, the ceramic member and the copper member are reliably and strongly bonded by the active metal, and the hardening of the bonding interface is further suppressed. be done.
- the thickness ratio ta1/ta2 is set within the range of 0.7 or more and 1.4 or less, the hardness of the bonding interface between the copper members bonded to the one surface and the other surface of the ceramic member respectively , and cracking of the ceramic member under thermal cycle load can be further suppressed.
- an Ag—Cu alloy layer is formed on the copper member side at the bonding interface between the ceramic member and the copper member, and the one side of the ceramic member.
- the ratio tb1/tb2 between the thickness tb1 of the Ag—Cu alloy layer formed on the surface side and the thickness tb2 of the Ag—Cu alloy layer formed on the other surface side of the ceramic member is 0. .7 or more and 1.4 or less.
- the thickness tb1 of the Ag—Cu alloy layer formed on the one surface side of the ceramic member and the thickness of the Ag—Cu alloy layer formed on the other surface side of the ceramic member Since the ratio tb1/tb2 to tb2 is within the range of 0.7 or more and 1.4 or less, the hardness of the bonding interface between the copper members bonded to one surface and the other surface of the ceramic member respectively , and cracking of the ceramic member under thermal cycle load can be further suppressed.
- the insulated circuit board of the present invention is an insulated circuit board in which a copper plate made of copper or a copper alloy is bonded to the surface of a ceramic substrate, and the copper plates are bonded to one surface and the other surface of the ceramic substrate, respectively.
- An active metal nitride layer is formed on the copper plate on the ceramic substrate side, and an active metal containing Si and an active metal is formed in a region of 10 ⁇ m from the active metal nitride layer to the copper plate side.
- the area ratio of the compound is 10% or less, and the area ratio A1 of the active metal compound in the copper plate bonded to the one surface side and the active metal in the copper plate bonded to the other surface side It is characterized in that the ratio A1/A2 to the area ratio A2 of the compound is in the range of 0.7 or more and 1.4 or less.
- the insulated circuit board of the present invention at the bonding interface between the copper plate bonded to one surface and the other surface of the ceramic substrate, Si and active silicon in a region of 10 ⁇ m from the active metal nitride layer toward the copper plate side. Since the area ratio of the active metal compound containing metal is set to 10% or less, it is suppressed that the joint interface between the ceramic substrate and the copper plate becomes hard more than necessary. A ratio A1/A2 between the area ratio A1 of the active metal compound in the copper plate bonded to the one surface side and the area ratio A2 of the active metal compound in the copper plate bonded to the other surface side is within the range of 0.7 or more and 1.4 or less. Cracking of the ceramic substrate can be suppressed under cyclic load, and the thermal cycle reliability is excellent.
- the thickness ta1 of the active metal nitride layer formed on the one surface side of the ceramic substrate and the thickness ta1 formed on the other surface side of the ceramic substrate It is preferable that the thickness ta2 of the active metal nitride layer is in the range of 0.05 ⁇ m or more and 0.8 ⁇ m or less, and the thickness ratio ta1/ta2 is in the range of 0.7 or more and 1.4 or less. .
- the thickness ta1 of the active metal nitride layer formed on the one surface side of the ceramic substrate and the thickness of the active metal nitride layer formed on the other surface side of the ceramic substrate Since the thickness ta2 is in the range of 0.05 ⁇ m or more and 0.8 ⁇ m or less, the ceramic substrate and the copper plate are reliably and strongly bonded by the active metal, and hardening of the bonding interface is further suppressed. be.
- the thickness ratio ta1/ta2 is in the range of 0.7 or more and 1.4 or less, the hardness of the bonding interface between the copper plates respectively bonded to one surface and the other surface of the ceramic substrate A large difference does not occur, and it is possible to further suppress the occurrence of cracks in the ceramic substrate under a thermal cycle load.
- an Ag—Cu alloy layer is formed on the copper plate side at the bonding interface between the ceramic substrate and the copper plate, and is formed on the one surface side of the ceramic member.
- a ratio tb1/tb2 between the thickness tb1 of the Ag--Cu alloy layer formed on the ceramic member and the thickness tb2 of the Ag--Cu alloy layer formed on the other side of the ceramic member is 0.7 or more1. It is preferable to be in the range of 4 or less.
- the thickness tb1 of the Ag—Cu alloy layer formed on the one surface side of the ceramic substrate and the thickness of the Ag—Cu alloy layer formed on the other surface side of the ceramic substrate Since the ratio tb1/tb2 to tb2 is in the range of 0.7 or more and 1.4 or less, the hardness of the bonding interface between the copper plates bonded to one surface and the other surface of the ceramic substrate is large. There is no difference, and the occurrence of cracks in the ceramic substrate under thermal cycle load can be further suppressed.
- the present invention even when a severe thermal cycle is applied, the occurrence of cracks in the ceramic member can be suppressed, and the copper / ceramics joined body has excellent thermal cycle reliability, and the copper / ceramics joined body It is possible to provide an insulated circuit board that is
- FIG. 1 is a schematic explanatory diagram of a power module using an insulated circuit board according to an embodiment of the present invention
- FIG. FIG. 2 is an enlarged explanatory view of a bonding interface between the circuit layer of the insulated circuit board and the ceramic substrate according to the embodiment of the present invention
- FIG. 2 is an enlarged explanatory view of a bonding interface between a metal layer of an insulated circuit board and a ceramic substrate according to an embodiment of the present invention
- 1 is a flowchart of a method for manufacturing an insulated circuit board according to an embodiment of the present invention
- FIG. It is a schematic explanatory drawing of the manufacturing method of the insulation circuit board which concerns on embodiment of this invention.
- FIG. 4 is an explanatory diagram showing a method of calculating the area ratio of active metal compounds in the examples of the present invention.
- the copper/ceramic bonded body according to the present embodiment includes a ceramic substrate 11 as a ceramic member made of ceramics, and a copper plate 42 (circuit layer 12) and a copper plate 43 (metal layer 13) as copper members made of copper or a copper alloy. is an insulating circuit board 10 formed by bonding the .
- FIG. 1 shows a power module 1 having an insulated circuit board 10 according to this embodiment.
- This power module 1 includes an insulating circuit board 10 on which a circuit layer 12 and a metal layer 13 are arranged, and a semiconductor element 3 bonded to one surface (upper surface in FIG. 1) of the circuit layer 12 via a bonding layer 2. and a heat sink 5 arranged on the other side (lower side in FIG. 1) of the metal layer 13 .
- the semiconductor element 3 is made of a semiconductor material such as Si.
- the semiconductor element 3 and the circuit layer 12 are bonded via the bonding layer 2 .
- the bonding layer 2 is made of, for example, a Sn--Ag-based, Sn--In-based, or Sn--Ag--Cu-based solder material.
- the heat sink 5 is for dissipating heat from the insulating circuit board 10 described above.
- the heat sink 5 is made of copper or a copper alloy, and is made of phosphorus-deoxidized copper in this embodiment.
- the heat sink 5 is provided with a channel through which cooling fluid flows.
- the heat sink 5 and the metal layer 13 are joined by a solder layer 7 made of a solder material.
- the solder layer 7 is made of, for example, a Sn--Ag-based, Sn--In-based, or Sn--Ag--Cu-based solder material.
- the insulating circuit board 10 of the present embodiment includes a ceramic substrate 11, a circuit layer 12 provided on one surface (upper surface in FIG. 1) of the ceramic substrate 11, and a ceramic substrate. and a metal layer 13 disposed on the other surface (lower surface in FIG. 1) of the substrate 11 .
- the ceramic substrate 11 is made of silicon nitride (Si 3 N 4 ), which has excellent insulation and heat dissipation properties.
- the thickness of the ceramic substrate 11 is set, for example, within a range of 0.2 mm or more and 1.5 mm or less, and is set to 0.32 mm in this embodiment.
- the circuit layer 12 is formed by bonding a copper plate 42 made of copper or a copper alloy to one surface (upper surface in FIG. 4) of the ceramic substrate 11. As shown in FIG. In the present embodiment, the circuit layer 12 is formed by punching out a rolled plate of oxygen-free copper, arranging it in a circuit pattern and bonding it to the ceramic substrate 11 .
- the thickness of the copper plate 42 that forms the circuit layer 12 is set within a range of 0.1 mm or more and 2.0 mm or less, and is set to 0.6 mm in this embodiment.
- the metal layer 13 is formed by bonding a copper plate 43 made of copper or a copper alloy to the other surface of the ceramic substrate 11 (the lower surface in FIG. 4).
- the metal layer 13 is formed by bonding a rolled plate of oxygen-free copper to the ceramic substrate 11 .
- the thickness of the copper plate 43 that forms the metal layer 13 is set within a range of 0.1 mm or more and 2.0 mm or less, and is set to 0.6 mm in this embodiment.
- an active metal nitride layer 21 and an Ag—Cu alloy layer 22 are formed in this order from the ceramic substrate 11 side.
- Si and the active metal (Ti in this embodiment) in the region E1 of 10 ⁇ m from the interface of the active metal nitride layer 21 on the circuit layer 12 side (interface with the Ag—Cu alloy layer 22) to the circuit layer 12 side are separated.
- the area ratio A1 of the active metal compound contained is set to 10% or less. Although the lower limit of the area ratio A1 is not limited, it is set to 1%, for example.
- Examples of the intermetallic compound containing Si and an active metal ( Ti) include TiSi 2 , TiSi, Ti 5 Si 4 , Ti 5 Si 3 and Ti 5 Si. It is
- an active metal nitride layer 31 and an Ag—Cu alloy layer 32 are formed in this order from the ceramic substrate 11 side.
- Si and the active metal (Ti in this embodiment) in the region E2 of 10 ⁇ m from the interface of the active metal nitride layer 31 on the metal layer 13 side (interface with the Ag—Cu alloy layer 32) to the metal layer 13 side are separated.
- the area ratio A2 of the active metal compound contained is set to 10% or less. Although the lower limit of the area ratio A2 is not limited, it is set to 1%, for example.
- Examples of the intermetallic compound containing Si and an active metal ( Ti) include TiSi 2 , TiSi, Ti 5 Si 4 , Ti 5 Si 3 and Ti 5 Si. It is
- the area ratio A1 of the active metal compound in the circuit layer 12 formed on one surface of the ceramic substrate 11 and the active metal compound in the metal layer 13 formed on the other surface of the ceramic substrate 11 The ratio A1/A2 to the area ratio A2 of is within the range of 0.7 or more and 1.4 or less.
- the thickness ta1 of the active metal nitride layer 21 formed on one side of the ceramic substrate 11 and the thickness ta1 of the active metal nitride layer formed on the other side of the ceramic substrate 11 are It is preferable that the thickness ta2 of 31 is within the range of 0.05 ⁇ m or more and 0.8 ⁇ m or less, and the thickness ratio ta1/ta2 is within the range of 0.7 or more and 1.4 or less.
- the bonding material 45 contains Ti as an active metal and the ceramic substrate 11 is made of aluminum nitride
- the active metal nitride layers 21 and 31 are made of titanium nitride (TiN). be.
- the thickness tb1 of the Ag--Cu alloy layer 22 formed on one side of the ceramic substrate 11 and the thickness tb1 of the Ag--Cu alloy layer 32 formed on the other side of the ceramic substrate 11 It is preferable that the ratio tb1/tb2 to the thickness tb2 of the substrate be within the range of 0.7 or more and 1.4 or less. Further, the thickness of the Ag--Cu alloy layer 22 (Ag--Cu alloy layer 32) is preferably 1 ⁇ m or more and 30 ⁇ m or less.
- FIG. 1 A method for manufacturing the insulated circuit board 10 according to the present embodiment will be described below with reference to FIGS. 3 and 4.
- FIG. 1 A method for manufacturing the insulated circuit board 10 according to the present embodiment will be described below with reference to FIGS. 3 and 4.
- a copper plate 42 to be the circuit layer 12 and a copper plate 43 to be the metal layer 13 are prepared.
- the copper plate 42 to be the circuit layer 12 is a pressed piece arranged in a circuit pattern.
- a bonding material 45 is applied to the bonding surfaces of the copper plate 42 to be the circuit layer 12 and the copper plate 43 to be the metal layer 13 and dried.
- the coating thickness of the paste-like bonding material 45 is preferably within the range of 10 ⁇ m or more and 50 ⁇ m or less after drying.
- the paste bonding material 45 is applied by screen printing.
- the bonding material 45 contains Ag and active metals (Ti, Zr, Nb, Hf).
- an Ag--Ti based brazing material (Ag--Cu--Ti based brazing material) is used as the bonding material 45.
- the Ag--Ti-based brazing material (Ag--Cu--Ti-based brazing material) contains, for example, Cu in the range of 0 mass% or more and 32 mass% or less, and Ti, which is an active metal, in the range of 0.5 mass% or more and 20 mass% or less. It is preferable to use a composition that is included within the range and that the balance is Ag and unavoidable impurities.
- the specific surface area of Ag powder is preferably 0.15 m 2 /g or more, more preferably 0.25 m 2 /g or more, and more preferably 0.40 m 2 /g or more.
- the specific surface area of Ag powder is preferably 1.40 m 2 /g or less, more preferably 1.00 m 2 /g or less, and more preferably 0.75 m 2 /g or less.
- the particle size of the Ag powder contained in the paste-like bonding material 45 is preferably in the range of 0.7 ⁇ m to 3.5 ⁇ m in D10 and 4.5 ⁇ m to 23 ⁇ m in D100.
- a copper plate 42 to be the circuit layer 12 is laminated on one surface (upper surface in FIG. 4) of the ceramic substrate 11 with a bonding material 45 interposed therebetween, and on the other surface (lower surface in FIG. 4) of the ceramic substrate 11 , a copper plate 43 to be the metal layer 13 is laminated with a bonding material 45 interposed therebetween.
- Heating step S03 Next, the copper plate 42, the ceramic substrate 11, and the copper plate 43 are heated in a heating furnace in a vacuum atmosphere to melt the bonding material 45 while being pressurized.
- the pressurized state here means, for example, a state in which the copper plates 42 and 43 are pressed toward the ceramic substrate 11 side.
- the heating temperature in the heating step S03 is preferably within the range of 800° C. or higher and 850° C. or lower. Further, it is preferable that the sum of the temperature integral values in the heating step from 780° C. to the heating temperature and the holding step at the heating temperature is within the range of 7° C. ⁇ h or more and 120° C. ⁇ h or less.
- the pressure load in the heating step S03 is preferably in the range of 0.029 MPa or more and 2.94 MPa or less. Furthermore, the degree of vacuum in the heating step S03 is preferably in the range of 1 ⁇ 10 ⁇ 6 Pa or more and 5 ⁇ 10 ⁇ 2 Pa or less.
- cooling step S04 After the heating step S03, cooling is performed to solidify the molten bonding material 45, thereby bonding the copper plate 42 that will be the circuit layer 12 and the ceramic substrate 11, and the ceramic substrate 11 and the copper plate 43 that will be the metal layer 13. do.
- the cooling rate in this cooling step S04 is preferably within the range of 2° C./min or more and 20° C./min or less.
- the cooling rate here is the cooling rate from the heating temperature to 780° C., which is the Ag—Cu eutectic temperature.
- the active metal nitride layers 21 and 31 on the circuit layer 12 side and the metal layer 13 side are cooled.
- the area ratios A1 and A2 of the active metal compound containing Si and the active metal in the regions E1 and E2 of 10 ⁇ m from the side interface to the circuit layer 12 side and the metal layer 13 side are controlled. That is, when the cooling rate is high, diffusion of the active metal stops early, and the area ratio of the active metal compound decreases. On the other hand, when the cooling rate is slow, diffusion of the active metal continues for a long period of time, increasing the area ratio of the active metal compound.
- the cooling step S04 by flowing an inert gas to either the circuit layer 12 (copper plate 42) side or the metal layer 13 (copper plate 43) side, the circuit layer 12 (copper plate 42) side and the metal layer 13 side are cooled. It becomes possible to adjust the cooling rate on the (copper plate 43) side.
- the heating step S03 and the cooling step S04 when the SPS (discharge plasma sintering) method is applied, the electrode on the circuit layer 12 (copper plate 42) side and the electrode on the metal layer 13 (copper plate 43) side By adjusting the flow rate of the cooling water, it is possible to adjust the cooling rate on the circuit layer 12 (copper plate 42) side and the metal layer 13 (copper plate 43) side.
- the insulated circuit board 10 of the present embodiment is manufactured through the bonding material disposing step S01, the laminating step S02, the heating step S03, and the cooling step S04.
- Heat-sink bonding step S05 Next, the heat sink 5 is bonded to the other side of the metal layer 13 of the insulated circuit board 10 .
- the insulating circuit board 10 and the heat sink 5 are laminated with a solder material interposed therebetween and placed in a heating furnace.
- semiconductor element bonding step S06 Next, the semiconductor element 3 is soldered to one surface of the circuit layer 12 of the insulating circuit board 10 .
- the power module 1 shown in FIG. 1 is produced by the above-described steps.
- the circuit layer 12 formed on one surface of the ceramic substrate 11 and the metal layer formed on the other surface
- Si and the active metal in the regions E1, E2 of 10 ⁇ m from the interface of the active metal nitride layers 21, 31 on the circuit layer 12 side and the metal layer 13 side to the circuit layer 12 side and the metal layer 13 side
- the area ratios A1 and A2 of the active metal compounds containing are set to 10% or less, the bonding interface between the ceramic substrate and the circuit layer 12 and the metal layer 13 is suppressed from being hardened more than necessary.
- the area ratios A1 and A2 of the active metal compounds should be 8% or less. is preferred, and 5% or less is more preferred.
- the area ratio A1 of the active metal compound in the circuit layer 12 formed on one side of the ceramic substrate 11 and the area ratio A2 of the active metal compound in the metal layer 13 bonded to the other side of the ceramic substrate 11 is within the range of 0.7 or more and 1.4 or less, the circuit layer 12 formed on one side of the ceramic substrate and the metal layer 13 formed on the other side Therefore, it is possible to suppress cracking of the ceramic substrate 11 under a thermal cycle load and improve thermal cycle reliability.
- the area ratio A1 of the active metal compound in the circuit layer 12 formed on one side of the ceramic substrate 11 and the area ratio A1 of the ceramic substrate 11 is preferably within the range of 0.8 or more and 1.2 or less, more preferably 0.9 or more It is more preferable to make it within the range of 1.1 or less.
- the thickness ta1 of the active metal nitride layer 21 formed on one surface of the ceramic substrate 11 on the side of the circuit layer 12, and the thickness ta1 formed on the other surface of the ceramic substrate 11 When the thickness ta2 of the active metal nitride layer 31 formed on the metal layer 13 side is 0.05 ⁇ m or more, the active metal of the bonding material 45 sufficiently reacts with the ceramic substrate 11, The ceramic substrate 11, the circuit layer 12 and the metal layer 13 are joined more firmly.
- the thickness ta1 of the active metal nitride layer 21 and the thickness ta2 of the active metal nitride layer 31 are set to 0.8 ⁇ m or less, it is possible to suppress the bonding interface from becoming unnecessarily hard, thereby Cycle reliability can be further improved.
- the thickness ta1 of the active metal nitride layer 21 and the thickness ta2 of the active metal nitride layer 31 should be 0.08 ⁇ m or more. and more preferably 0.15 ⁇ m or more. Further, in order to further suppress the bonding interface from becoming unnecessarily hard, it is preferable to set the thickness ta1 of the active metal nitride layer 21 and the thickness ta2 of the active metal nitride layer 31 to 0.6 ⁇ m or less. , 0.4 ⁇ m or less.
- the thickness ratio ta1/ta2 of the thickness ta1 of the active metal nitride layer 21 and the thickness ta2 of the active metal nitride layer 31 is in the range of 0.7 to 1.4. In this case, there is no large difference in the hardness of the bonding interface between the circuit layer 12 formed on one surface of the ceramic substrate 11 and the metal layer 13 formed on the other surface of the ceramic substrate 11, and the thermal cycle It is possible to further suppress the occurrence of cracks in the ceramic substrate 11 under load.
- the thickness ratio ta1/ta2 of the thickness ta1 of the active metal nitride layer 21 and the thickness ta2 of the active metal nitride layer 31 is more preferably in the range of 0.8 to 1.2, more preferably in the range of 0.9 to 1.1.
- the thickness tb1 of the Ag—Cu alloy layer 22 formed on one side of the ceramic substrate 11 and the thickness tb1 of the Ag—Cu alloy layer 32 formed on the other side of the ceramic substrate 11 are When the ratio tb1/tb2 to the thickness tb2 is in the range of 0.7 to 1.4, the circuit layer 12 formed on one surface of the ceramics substrate 11 and the other surface of the ceramics substrate 11 There is no large difference in the hardness of the joint interface with the metal layer 13 formed on the surface, and the occurrence of cracks in the ceramic substrate 11 under thermal cycle load can be further suppressed.
- the thickness ratio tb1/ tb2 is more preferably in the range of 0.8 or more and 1.2 or less, and more preferably in the range of 0.9 or more and 1.1 or less.
- a power module is configured by mounting a semiconductor element on an insulated circuit board, but the present invention is not limited to this.
- an LED module may be configured by mounting an LED element on the circuit layer of the insulating circuit board, or a thermoelectric module may be configured by mounting a thermoelectric element on the circuit layer of the insulating circuit board.
- Ti was used as an example of the active metal contained in the bonding material. It suffices if it contains the above active metals. These active metals may be contained as hydrides.
- a ceramic substrate 40 mm ⁇ 40 mm, thickness 0.32 mm
- silicon nitride Si 3 N 4
- two copper pieces of 37 mm ⁇ 18 mm and 0.8 mm in thickness made of oxygen-free copper were prepared as a copper plate serving as a circuit layer.
- a copper plate made of oxygen-free copper and having a size of 37 mm ⁇ 37 mm and a thickness of 0.8 mm was prepared as a copper plate serving as a metal layer.
- a bonding material containing Ag powder having a BET value shown in Table 1 was applied to a copper plate serving as a circuit layer so that the target thickness after drying was 30 ⁇ m.
- a bonding material containing Ag powder having a BET value shown in Table 1 was applied to a copper plate serving as a metal layer so that the target thickness after drying was 30 ⁇ m.
- a paste material was used as the bonding material, and the amounts of Ag, Cu, and active metal were as shown in Table 1.
- the BET value (specific surface area) of the Ag powder was measured by using AUTOSORB-1 manufactured by QUANTACHRROME, vacuum deaeration by heating at 150 ° C. for 30 minutes as pretreatment, N 2 adsorption, liquid nitrogen 77 K, BET multipoint method. It was measured.
- a copper plate serving as a circuit layer was laminated on one surface of the ceramic substrate. At this time, two copper pieces were arranged with an interval of 1 mm. A copper plate serving as a metal layer was laminated on the other surface of the ceramic substrate.
- This laminate was heated while being pressed in the lamination direction to melt the bonding material.
- the pressure load was set to 0.245 MPa, and the temperature integral value was set as shown in Table 1.
- the bonding was performed by the SPS (Spark Plasma Sintering) method, and the cooling rate shown in Table 1 was obtained by adjusting the flow rate of cooling water between the electrode on the circuit layer side and the electrode on the metal layer side. was adjusted to be
- the area ratio of the active metal compound, the active metal nitride layer, the Ag-Cu alloy layer, and the thermal cycle reliability were evaluated as follows.
- Comparative Example 1 in which the area ratio A1 of the active metal compound on the circuit layer side was 14.6% and the area ratio A2 of the active metal compound on the metal layer side was 13.4%, cracking was confirmed at 1100 cycles. and the reliability of the cooling/heating cycle was insufficient.
- Comparative Example 2 in which the ratio A1/A2 of the area ratio A1 of the active metal compound on the circuit layer side to the area ratio A2 of the active metal compound on the metal layer side was set to 0.62, cracking was confirmed at 1200 cycles. and the reliability of the cooling/heating cycle was insufficient.
- both the area ratio A1 of the active metal compound on the circuit layer side and the area ratio A2 of the active metal compound on the metal layer side are set to 10% or less, and the area ratio A1 of the active metal compound on the circuit layer side and the metal layer
- Example 1-8 of the present invention in which the ratio A1/A2 to the area ratio A2 of the active metal compound on the side was in the range of 0.7 or more and 1.4 or less, the number of cycles in which cracking was confirmed was 1500 or more. It had excellent thermal cycle reliability.
- the present invention even when a severe thermal cycle is applied, the occurrence of cracks in the ceramic member can be suppressed, and the copper / ceramics joined body has excellent thermal cycle reliability, and the copper / ceramics joined body It is possible to provide an insulated circuit board that is
- Insulated circuit board (copper/ceramic joint) 11 Ceramic substrate (ceramic member) 12 circuit layer (copper member) 13 metal layer (copper member) 21, 31 Active metal nitride layer 22, 32 Ag—Cu alloy layer
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Abstract
Description
本願は、2021年4月19日に、日本に出願された特願2021-070220号に基づき優先権を主張し、その内容をここに援用する。
例えば、風力発電、電気自動車、ハイブリッド自動車等を制御するために用いられる大電力制御用のパワー半導体素子は、動作時の発熱量が多いことから、これを搭載する基板としては、セラミックス基板と、このセラミックス基板の一方の面に導電性の優れた金属板を接合して形成した回路層と、セラミックス基板の他方の面に金属板を接合して形成した放熱用の金属層と、を備えた絶縁回路基板が、従来から広く用いられている。
前述のように、Tiを含む接合材を用いて銅板とセラミックス基板とを接合した場合には、活性金属であるTiがセラミックス基板と反応することにより、接合材の濡れ性が向上し、銅板とセラミックス基板との接合強度が向上することになる。
ここで、前述のように、Tiを含む接合材を用いて銅板とセラミックス基板とを接合した場合には、銅板側に活性金属であるTiが拡散し、CuとTiを含む金属間化合物が析出することで、接合界面近傍が硬くなり、冷熱サイクル負荷時にセラミックス部材に割れが生じ、冷熱サイクル信頼性が低下するおそれがあった。
そして、セラミックス部材の一方の面と他方の面にそれぞれ接合された銅部材との接合界面の硬さが異なる場合には、冷熱サイクル負荷時にセラミックス部材に加わる熱応力のバランスが崩れ、セラミックス部材に割れが生じやすくなるとの知見を得た。
そして、前記一方の面側に接合された前記銅部材における前記活性金属化合物の面積率A1と、前記他方の面側に接合された前記銅部材における前記活性金属化合物の面積率A2との比A1/A2が0.7以上1.4以下の範囲内とされているので、セラミックス部材の一方の面と他方の面にそれぞれ接合された銅部材との接合界面の硬さに大きな差が生じず、冷熱サイクル負荷時におけるセラミックス部材の割れの発生を抑制でき、冷熱サイクル信頼性に優れている。
この場合、前記セラミックス部材の前記一方の面側に形成された前記活性金属窒化物層の厚さta1、および、前記セラミックス部材の前記他方の面側に形成された前記活性金属窒化物層の厚さta2が、0.05μm以上0.8μm以下の範囲内とされているので、活性金属によってセラミックス部材と銅部材とが確実に強固に接合されているとともに、接合界面が硬くなることがさらに抑制される。
そして、厚さ比ta1/ta2が0.7以上1.4以下の範囲内とされているので、セラミックス部材の一方の面と他方の面にそれぞれ接合された銅部材との接合界面の硬さに大きな差が生じず、冷熱サイクル負荷時におけるセラミックス部材の割れの発生をさらに抑制することができる。
この場合、前記セラミックス部材の前記一方の面側に形成された前記Ag-Cu合金層の厚さtb1と、前記セラミックス部材の前記他方の面側に形成された前記Ag-Cu合金層の厚さtb2との比tb1/tb2が、0.7以上1.4以下の範囲内とされているので、セラミックス部材の一方の面と他方の面にそれぞれ接合された銅部材との接合界面の硬さに大きな差が生じず、冷熱サイクル負荷時におけるセラミックス部材の割れの発生をさらに抑制することができる。
そして、前記一方の面側に接合された前記銅板における前記活性金属化合物の面積率A1と、前記他方の面側に接合された前記銅板における前記活性金属化合物の面積率A2との比A1/A2が、0.7以上1.4以下の範囲内とされているので、セラミックス基板の一方の面と他方の面にそれぞれ接合された銅板との接合界面の硬さに大きな差が生じず、冷熱サイクル負荷時におけるセラミックス基板の割れの発生を抑制でき、冷熱サイクル信頼性に優れている。
この場合、前記セラミックス基板の前記一方の面側に形成された前記活性金属窒化物層の厚さta1、および、前記セラミックス基板の前記他方の面側に形成された前記活性金属窒化物層の厚さta2が、0.05μm以上0.8μm以下の範囲内とされているので、活性金属によってセラミックス基板と銅板とが確実に強固に接合されているとともに、接合界面が硬くなることがさらに抑制される。
そして、厚さ比ta1/ta2が0.7以上1.4以下の範囲内とされているので、セラミックス基板の一方の面と他方の面にそれぞれ接合された銅板との接合界面の硬さに大きな差が生じず、冷熱サイクル負荷時におけるセラミックス基板の割れの発生をさらに抑制することができる。
この場合、前記セラミックス基板の前記一方の面側に形成された前記Ag-Cu合金層の厚さtb1と、前記セラミックス基板の前記他方の面側に形成された前記Ag-Cu合金層の厚さtb2との比tb1/tb2が0.7以上1.4以下の範囲内とされているので、セラミックス基板の一方の面と他方の面にそれぞれ接合された銅板との接合界面の硬さに大きな差が生じず、冷熱サイクル負荷時におけるセラミックス基板の割れの発生をさらに抑制することができる。
本実施形態に係る銅/セラミックス接合体は、セラミックスからなるセラミックス部材としてのセラミックス基板11と、銅又は銅合金からなる銅部材としての銅板42(回路層12)および銅板43(金属層13)とが接合されてなる絶縁回路基板10である。図1に、本実施形態である絶縁回路基板10を備えたパワーモジュール1を示す。
接合層2は、例えばSn-Ag系、Sn-In系、若しくはSn-Ag-Cu系のはんだ材で構成されている。
なお、本実施形態においては、ヒートシンク5と金属層13とが、はんだ材からなるはんだ層7によって接合されている。このはんだ層7は、例えばSn-Ag系、Sn-In系、若しくはSn-Ag-Cu系のはんだ材で構成されている。
本実施形態においては、回路層12は、無酸素銅の圧延板を打ち抜いたものが回路パターン状に配置された状態でセラミックス基板11に接合されることで形成されている。
なお、回路層12となる銅板42の厚さは0.1mm以上2.0mm以下の範囲内に設定されており、本実施形態では、0.6mmに設定されている。
本実施形態においては、金属層13は、無酸素銅の圧延板がセラミックス基板11に接合されることで形成されている。
なお、金属層13となる銅板43の厚さは0.1mm以上2.0mm以下の範囲内に設定されており、本実施形態では、0.6mmに設定されている。
また、活性金属窒化物層21の回路層12側の界面(Ag-Cu合金層22との界面)から回路層12側へ10μmの領域E1におけるSiと活性金属(本実施形態ではTi)とを含む活性金属化合物の面積率A1が10%以下とされている。面積率A1の下限値は限定されないが、例えば1%とされている。Siと活性金属(Ti)とを含む金属間化合物としては、例えば、TiSi2,TiSi,Ti5Si4,Ti5Si3,Ti5Siが挙げられ、本実施形態では、Ti5Si3とされている。
また、活性金属窒化物層31の金属層13側の界面(Ag-Cu合金層32との界面)から金属層13側へ10μmの領域E2におけるSiと活性金属(本実施形態ではTi)とを含む活性金属化合物の面積率A2が10%以下とされている。面積率A2の下限値は限定されないが、例えば1%とされている。Siと活性金属(Ti)とを含む金属間化合物としては、例えば、TiSi2,TiSi,Ti5Si4,Ti5Si3,Ti5Siが挙げられ、本実施形態では、Ti5Si3とされている。
なお、本実施形態では、接合材45が活性金属としてTiを含有し、セラミックス基板11が窒化アルミニウムで構成されているため、活性金属窒化物層21,31は、窒化チタン(TiN)で構成される。
また、Ag-Cu合金層22(Ag-Cu合金層32)の厚さは、1μm以上30μm以下とすることが好ましい。
回路層12となる銅板42と、金属層13となる銅板43とを準備する。ここで、回路層12となる銅板42は、回路パターン状に配設されたプレス片とされている。
そして、回路層12となる銅板42および金属層13となる銅板43の接合面に、接合材45を塗布し、乾燥させる。ペースト状の接合材45の塗布厚さは、乾燥後で10μm以上50μm以下の範囲内とすることが好ましい。
本実施形態では、スクリーン印刷によってペースト状の接合材45を塗布する。
すなわち、Ag粉の比表面積が小さいとペースト状の接合材45の焼結性が高くなり、後述する加熱工程S03において液相が発生し易くなり、活性金属の拡散が促進され、前述の活性金属化合物の面積率が高くなる。一方、Ag粉の比表面積が大きいとペースト状の接合材45の焼結性が低くなり、後述する加熱工程S03において液相が発生し難くなり、活性金属の拡散が抑制され、前述の活性金属化合物の面積率が低くなる。
Ag粉の比表面積は、0.15m2/g以上とすることが好ましく、0.25m2/g以上とすることがさらに好ましく、0.40m2/g以上とすることがより好ましい。一方、Ag粉の比表面積は、1.40m2/g以下とすることが好ましく、1.00m2/g以下とすることがさらに好ましく、0.75m2/g以下とすることがより好ましい。
なお、ペースト状の接合材45に含まれるAg粉の粒径は、D10が0.7μm以上3.5μm以下かつD100が4.5μm以上23μm以下の範囲内とすることが好ましい。
次に、セラミックス基板11の一方の面(図4において上面)に、接合材45を介して回路層12となる銅板42を積層するとともに、セラミックス基板11の他方の面(図4において下面)に、接合材45を介して金属層13となる銅板43を積層する。
次に、銅板42とセラミックス基板11と銅板43とを加圧した状態で、真空雰囲気の加熱炉内で加熱し、接合材45を溶融する。ここでの加圧した状態は、例えば、銅板42、43を、それぞれセラミックス基板11側に向けて押圧した状態を意味している。
ここで、加熱工程S03における加熱温度は、800℃以上850℃以下の範囲内とすることが好ましい。また、780℃から加熱温度までの昇温工程および加熱温度での保持工程における温度積分値の合計が7℃・h以上120℃・h以下の範囲内とすることが好ましい。
また、加熱工程S03における加圧荷重は、0.029MPa以上2.94MPa以下の範囲内とすることが好ましい。
さらに、加熱工程S03における真空度は、1×10-6Pa以上5×10-2Pa以下の範囲内とすることが好ましい。
そして、加熱工程S03の後、冷却を行うことにより、溶融した接合材45を凝固させて、回路層12となる銅板42とセラミックス基板11、セラミックス基板11と金属層13となる銅板43とを接合する。
なお、この冷却工程S04における冷却速度は、2℃/min以上20℃/min以下の範囲内とすることが好ましい。なお、ここでの冷却速度は加熱温度からAg-Cu共晶温度である780℃までの冷却速度である。
すなわち、冷却速度が速い場合には、活性金属の拡散が早期に停止し、前述の活性金属化合物の面積率が低くなる。一方、冷却速度が遅い場合には、活性金属の拡散が長期に継続し、前述の活性金属化合物の面積率が高くなる。
また、加熱工程S03および冷却工程S04において、SPS(放電プラズマ焼結)法を適用した場合には、回路層12(銅板42)側の電極と、金属層13(銅板43)側の電極とで、冷却水の流量を調整することにより、回路層12(銅板42)側と金属層13(銅板43)側とで冷却速度を調整することが可能となる。
次に、絶縁回路基板10の金属層13の他方の面側にヒートシンク5を接合する。
絶縁回路基板10とヒートシンク5とを、はんだ材を介して積層して加熱炉に装入し、はんだ層7を介して絶縁回路基板10とヒートシンク5とをはんだ接合する。
次に、絶縁回路基板10の回路層12の一方の面に、半導体素子3をはんだ付けにより接合する。
前述の工程により、図1に示すパワーモジュール1が製出される。
なお、セラミックス基板11と回路層12および金属層13との接合界面が必要以上に硬くなることをさらに抑制するためには、上述の活性金属化合物の面積率A1,A2を8%以下とすることが好ましく、5%以下とすることがより好ましい。
一方、活性金属窒化物層21の厚さta1および活性金属窒化物層31の厚さta2が0.8μm以下とされている場合には、接合界面が必要以上に硬くなることを抑制でき、冷熱サイクル信頼性をさらに向上させることができる。
また、接合界面が必要以上に硬くなることをさらに抑制するためには、活性金属窒化物層21の厚さta1および活性金属窒化物層31の厚さta2を0.6μm以下とすることが好ましく、0.4μm以下とすることがより好ましい。
なお、冷熱サイクル負荷時におけるセラミックス基板11の割れの発生をさらに抑制するためには、活性金属窒化物層21の厚さta1および活性金属窒化物層31の厚さta2の厚さ比ta1/ta2を0.8以上1.2以下の範囲内とすることがさらに好ましく、0.9以上1.1以下の範囲内とすることがより好ましい。
なお、冷熱サイクル負荷時におけるセラミックス基板11の割れの発生をさらに抑制するためには、Ag-Cu合金層22の厚さtb1とAg-Cu合金層32の厚さtb2との厚さ比tb1/tb2を0.8以上1.2以下の範囲内とすることがさらに好ましく、0.9以上1.1以下の範囲内とすることがより好ましい。
例えば、本実施形態では、絶縁回路基板に半導体素子を搭載してパワーモジュールを構成するものとして説明したが、これに限定されることはない。例えば、絶縁回路基板の回路層にLED素子を搭載してLEDモジュールを構成してもよいし、絶縁回路基板の回路層に熱電素子を搭載して熱電モジュールを構成してもよい。
また、回路層となる銅板として、無酸素銅からなり、37mm×18mm、厚さ0.8mmの銅片を2つ準備した。さらに、金属層となる銅板として、無酸素銅からなり、37mm×37mm、厚さ0.8mmの銅板を準備した。
金属層となる銅板に、表1に示すBET値のAg粉を含む接合材を、乾燥後の目標厚さが30μmとなるように塗布した。
なお、接合材はペースト材を用い、Ag,Cu,活性金属の量は表1の通りとした。
また、Ag粉のBET値(比表面積)はQUANTACHRROME社製AUTOSORB-1を用い、前処理として150℃で30分加熱の真空脱気を行い、N2吸着、液体窒素77K、BET多点法で測定した。
また、セラミックス基板の他方の面に、金属層となる銅板を積層した。
そして、加熱した積層体を冷却することにより、回路層となる銅板とセラミックス基板と金属層となる金属板を接合し、絶縁回路基板(銅/セラミックス接合体)を得た。
なお、実施例では、SPS(放電プラズマ焼結)法により接合を行い、回路層側の電極と、金属層側の電極とで、冷却水の流量を調整することにより、表1に示す冷却速度となるよう調整した。
回路層とセラミックス基板との接合界面、および、セラミックス基板と金属層との接合界面の断面を、EPMA装置によって観察し、回路層および金属層中の活性金属およびSiに関して元素マップ(幅50μm×高さ30μm)を、各5視野ずつ取得した。
そして、図5に示すように、活性金属窒化物層から回路層(金属層)表面に向かって10μmまでの領域において、Siと活性金属とが重なる部分をSiと活性金属とを含む活性金属化合物と認定し、活性金属化合物の面積率を算出した。面積率は、50μm×10μmの面積を100%とした時の値である。なお、それぞれ5視野の平均値を表2に記載した。
回路層とセラミックス基板との接合界面、および、セラミックス基板と金属層との接合界面の断面を、走査型電子顕微鏡(カールツァイスNTS社製ULTRA55、加速電圧1.8kV)を用いて倍率30000倍で測定し、エネルギー分散型X線分析法により、N、O及び活性金属元素の元素マッピングを取得した。活性金属元素とNまたはOが同一領域に存在する場合に活性金属窒化物層が有ると判断した。
それぞれ5視野で観察を行い、活性金属元素とNまたはOが同一領域に存在する範囲の面積を測定した幅で割ったものの平均値を「活性金属窒化物層の厚さ」とした。
回路層とセラミックス基板との接合界面、および、セラミックス基板と金属層との接合界面の断面を、EPMA装置を用いて、それぞれ5視野でライン分析を行った。
そして、Ag+Cu+活性金属=100質量%としたとき、Ag濃度が15質量%以上である領域をAg-Cu合金層とし、その厚さを測定した。それぞれ5視野での測定値の平均をAg-Cu合金層の厚さとして表2に記載した。
上述の絶縁回路基板に対して、40℃×5min、150℃×5minを交互に繰り返す冷熱サイクルを負荷し、2000サイクルまで100サイクル毎にSAT検査を行い、セラミックス割れの有無を確認し、セラミックス割れの発生回数を評価した。評価結果を表2に示す。ここでのセラミックス割れの発生回数は、セラミックス割れが発生するまでに要した冷熱サイクル数を意味している。
回路層側の活性金属化合物の面積率A1と金属層側の活性金属化合物の面積率A2との比A1/A2が0.62とされた比較例2においては、1200サイクルで割れが確認されており、冷熱サイクル信頼性が不十分であった。
回路層側の活性金属化合物の面積率A1と金属層側の活性金属化合物の面積率A2との比A1/A2が1.48とされた比較例3においては、1200サイクルで割れが確認されており、冷熱サイクル信頼性が不十分であった。
11 セラミックス基板(セラミックス部材)
12 回路層(銅部材)
13 金属層(銅部材)
21、31 活性金属窒化物層
22、32 Ag-Cu合金層
Claims (6)
- 銅又は銅合金からなる銅部材と、窒化ケイ素からなるセラミックス部材とが接合されてなる銅/セラミックス接合体であって、
前記セラミックス部材の一方の面および他方の面にそれぞれ前記銅部材が接合されており、
前記銅部材のうち前記セラミックス部材側には、活性金属窒化物層が形成されており、前記活性金属窒化物層から前記銅部材側へ10μmの領域におけるSiと活性金属とを含む活性金属化合物の面積率が10%以下とされており、
前記一方の面側に接合された前記銅部材における前記活性金属化合物の面積率A1と、前記他方の面側に接合された前記銅部材における前記活性金属化合物の面積率A2との比A1/A2が、0.7以上1.4以下の範囲内とされていることを特徴とする銅/セラミックス接合体。 - 前記セラミックス部材の前記一方の面側に形成された前記活性金属窒化物層の厚さta1、および、前記セラミックス部材の前記他方の面側に形成された前記活性金属窒化物層の厚さta2が、0.05μm以上0.8μm以下の範囲内とされ、厚さ比ta1/ta2が0.7以上1.4以下の範囲内とされていることを特徴とする請求項1に記載の銅/セラミックス接合体。
- 前記セラミックス部材と前記銅部材との接合界面において、前記銅部材側にはAg-Cu合金層が形成されており、
前記セラミックス部材の前記一方の面側に形成された前記Ag-Cu合金層の厚さtb1と、前記セラミックス部材の前記他方の面側に形成された前記Ag-Cu合金層の厚さtb2との比tb1/tb2が、0.7以上1.4以下の範囲内とされていることを特徴とする請求項1または請求項2に記載の銅/セラミックス接合体。 - セラミックス基板の表面に、銅又は銅合金からなる銅板が接合されてなる絶縁回路基板であって、
前記セラミックス基板の一方の面および他方の面にそれぞれ前記銅板が接合されており、
前記銅板のうち前記セラミックス基板側には、活性金属窒化物層が形成されており、前記活性金属窒化物層から前記銅板側へ10μmの領域におけるSiと活性金属とを含む活性金属化合物の面積率が10%以下とされており、
前記一方の面側に接合された前記銅板における前記活性金属化合物の面積率A1と、前記他方の面側に接合された前記銅板における前記活性金属化合物の面積率A2との比A1/A2が、0.7以上1.4以下の範囲内とされていることを特徴とする絶縁回路基板。 - 前記セラミックス基板の前記一方の面側に形成された活性金属窒化物層の厚さta1、および、前記セラミックス基板の前記他方の面側に形成された活性金属窒化物層の厚さta2が、0.05μm以上0.8μm以下の範囲内とされ、厚さ比ta1/ta2が0.7以上1.4以下の範囲内とされていることを特徴とする請求項4に記載の絶縁回路基板。
- 前記セラミックス基板と前記銅板との接合界面において、前記銅板側にはAg-Cu合金層が形成されており、
前記セラミックス基板の前記一方の面側に形成された前記Ag-Cu合金層の厚さtb1と、前記セラミックス基板の前記他方の面側に形成された前記Ag-Cu合金層の厚さtb2との比tb1/tb2が、0.7以上1.4以下の範囲内とされていることを特徴とする請求項4または請求項5に記載の絶縁回路基板。
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- 2022-04-19 US US18/287,088 patent/US20240203819A1/en active Pending
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