WO2022217678A1 - 显示面板及显示装置 - Google Patents

显示面板及显示装置 Download PDF

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Publication number
WO2022217678A1
WO2022217678A1 PCT/CN2021/092579 CN2021092579W WO2022217678A1 WO 2022217678 A1 WO2022217678 A1 WO 2022217678A1 CN 2021092579 W CN2021092579 W CN 2021092579W WO 2022217678 A1 WO2022217678 A1 WO 2022217678A1
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WO
WIPO (PCT)
Prior art keywords
display panel
metal layer
area
layer
gate driving
Prior art date
Application number
PCT/CN2021/092579
Other languages
English (en)
French (fr)
Inventor
王无悔
刘梦阳
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to EP21731036.6A priority Critical patent/EP4325283A1/en
Priority to US17/309,482 priority patent/US20240053645A1/en
Priority to JP2021526344A priority patent/JP7397556B2/ja
Publication of WO2022217678A1 publication Critical patent/WO2022217678A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/50—Protective arrangements

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a display device.
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • GOA Gate Driver on Array, array substrate row drive
  • This technology directly designs the electrode driver circuit on the array substrate, which can reduce the width of the frame and reduce the production process at the same time. , reduce product cost and make the panel thinner and lighter.
  • the circuit integration of the display panel in the GOA area is complex.
  • the protective film covering the first metal layer and the second metal layer such as the passivation layer on the second metal layer, has a relatively thin thickness. During some via etching processes , the protective film layer is easily damaged by etching, resulting in the exposure of the second metal layer, or the short circuit between the first metal layer and the second metal layer, thereby causing the display panel to function abnormally.
  • the GOA region of the display panel is prone to a technical problem of short circuit between two metal layers.
  • the present application provides a display panel and a display device for alleviating the technical problem of easy short-circuiting in the metal layer in the GOA region of the display panel.
  • the present application provides a display panel, which includes a display area and a gate driving wiring area disposed on at least one side of the display area;
  • the display panel further includes a color resist layer corresponding to the display area and the gate driving wiring area, and the color resist layer includes a color resist;
  • the gate driving wiring area includes a first metal layer and a second metal layer disposed on the first metal layer, and the color resist located in the gate driving wiring area at least covers the second metal layer .
  • the gate driving wiring area further includes a first insulating layer disposed between the first metal layer and the second metal layer, located in the gate driving wiring area The color resist covers the first insulating layer.
  • the gate driving wiring area includes a photoresist layer, and the photoresist layer covers the color resist located in the gate driving wiring area.
  • the display area is provided with the photoresist layer, and the photoresist layer covers the color resist located in the display area.
  • the gate driving wiring area further includes a second insulating layer disposed between the second metal layer and the color resist layer, and is located in the gate driving wiring area.
  • the color resist covers the second insulating layer.
  • the display panel further includes pixel electrodes, and at least part of the pixel electrodes are located in the gate driving wiring area.
  • the pixel electrode located in the gate driving wiring region is disposed on the photoresist layer.
  • a semiconductor layer is further disposed between the first metal layer and the first insulating layer, and the second metal layer is disposed on the semiconductor layer.
  • the first metal layer is disposed corresponding to the display area and the gate driving wiring area;
  • the second metal layer is disposed corresponding to the display area and the gate driving wiring area.
  • the color resists located in the gate driving wiring region include blue resists.
  • the display panel further includes a common wiring area disposed on a side of the gate driving wiring area away from the display area, and a common wiring area is provided in the common wiring area .
  • the first metal layer covers the display area and the gate driving wiring area of the display panel.
  • the second metal layer covers the display area and the gate driving wiring area of the display panel.
  • the first metal layer includes a gate electrode for forming a thin film transistor.
  • the second metal layer includes a source electrode and a drain electrode for constituting a thin film transistor.
  • the pixel electrode disposed corresponding to the display area is electrically connected to the second metal layer.
  • the first metal layer includes a source electrode and a drain electrode for constituting a thin film transistor.
  • the second metal layer includes a gate electrode for forming a thin film transistor.
  • the pixel electrodes disposed corresponding to the display area are electrically connected to the first metal layer.
  • the present application also provides a display device, which includes a display panel; the display panel includes a display area and a gate driving wiring area disposed on at least one side of the display area;
  • the display panel further includes a color resist layer corresponding to the display area and the gate driving wiring area, and the color resist layer includes a color resist;
  • the gate driving wiring area includes a first metal layer and a second metal layer disposed on the first metal layer, and the color resist located in the gate driving wiring area at least covers the second metal layer .
  • the present application provides a display panel and a display device.
  • the display panel includes a display area and a gate driving wiring area disposed on at least one side of the display area, and the display panel further includes a color corresponding to the display area and the gate driving wiring area.
  • the gate driving wiring area includes a first metal layer and a second metal layer disposed on the first metal layer, and the color resist located in the gate driving wiring area at least covers the second metal layer metal layer.
  • the second metal layer is short-circuited, which is beneficial to improve the process yield of the display panel; and the color resistance covering the second metal layer is the same as the color resistance of the display area, and can be fabricated through the same process, so the color resistance is increased in the gate driving wiring area.
  • the structure does not complicate the manufacturing process of the display panel.
  • FIG. 1 is a schematic plan view of a display panel provided by an embodiment of the present application.
  • FIG. 2 is a schematic diagram of a first partial cross-sectional structure of the gate driving wiring area of the display panel shown in FIG. 1 .
  • FIG. 3 is a schematic diagram of a first partial cross-sectional structure of the display area of the display panel shown in FIG. 1 .
  • FIG. 4 is a schematic diagram of a second partial cross-sectional structure of the gate driving wiring area of the display panel shown in FIG. 1 .
  • FIG. 5 is a schematic diagram of a third partial cross-sectional structure of the gate driving wiring area of the display panel shown in FIG. 1 .
  • FIG. 6 is a schematic diagram of a second partial cross-sectional structure of the display area of the display panel shown in FIG. 1 .
  • Embodiments of the present application provide a display panel and a display device, the display panel includes a display area and a gate driving wiring area disposed on at least one side of the display area, and the display panel further includes and corresponding to the display area and a color resist layer arranged in the gate driving wiring area, the color resisting layer includes a color resist; the gate driving wiring area includes a first metal layer and a second metal layer arranged on the first metal layer A metal layer, the color resist located in the gate driving wiring area covers at least the second metal layer.
  • the protection of the second metal layer is enhanced, and the process such as etching of the display panel can prevent the second metal layer from being exposed and the first metal layer being exposed.
  • the layer and the second metal layer are short-circuited, which is beneficial to improve the process yield of the display panel; and the color resistance covering the second metal layer is the same as the color resistance of the display area, and can be fabricated through the same process, so the increase in the gate drive wiring area
  • the color resist structure does not complicate the display panel manufacturing process.
  • FIG. 1 is a schematic plan view of a display panel provided by an embodiment of the present application.
  • the display panel includes a display area 10 , a gate driving wiring area 20 disposed on the side of the display area 10 , and a common driving wiring area 20 disposed on a side of the gate driving wiring area 20 away from the display area 10 .
  • the display area 10 is an area on the display panel that performs a display function, and a plurality of pixel units for realizing the display function are arranged in the display area 10 .
  • the gate driving wiring area 20 includes two parts, which are respectively disposed on opposite sides of the display area 10 .
  • a gate driving circuit is disposed in the gate driving wiring area 20 , and the gate driving circuit is used to drive the pixel units in the display area 10 to display.
  • the common wiring area 30 includes two parts, which are respectively disposed on opposite sides of the display panel, and both are located on the side of the gate driving wiring area 20 away from the display area 10 .
  • Common wirings are disposed in the common wiring area 30 , and the common wirings are used for providing common voltage signals to the pixel units located in the display area 10 .
  • FIG. 2 is a schematic diagram of a first partial cross-sectional structure of the gate driving wiring area of the display panel shown in FIG. 1
  • FIG. 3 is the display shown in FIG. 1 .
  • the display panel includes a base substrate 101 covering the display area 10 and the gate driving wiring area 20.
  • the base substrate 101 may be a rigid substrate such as glass, or a flexible substrate such as polyimide. substrate.
  • the display panel includes a first metal layer 102 disposed on the base substrate 101 , and the first metal layer 102 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • Metal traces are disposed on the first metal layer 102 , such as gates and gate lines located in the gate driving trace region 20 .
  • the display panel includes a first insulating layer 103 covering the first metal layer 102, and the first insulating layer 103 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the first insulating layer 103 includes an inorganic insulating material.
  • the first insulating layer 103 may be a gate insulating layer.
  • the display panel includes a semiconductor layer 104 disposed on the first insulating layer 103, and the semiconductor layer 104 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the semiconductor layer 104 is provided with a semiconductor material, and the semiconductor material is used to form an active layer of a thin film transistor.
  • the display panel further includes a second metal layer 105 disposed on the semiconductor layer 104, and the second metal layer 105 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • a local area of the second metal layer 105 is located on the first insulating layer 103 , and the second metal layer 105 and the first metal layer 102 are kept electrically insulated by the first insulating layer 103 .
  • Metal traces are disposed on the second metal layer 105 , and the metal traces include source lines and drain lines for forming thin film transistors.
  • the display panel further includes a second insulating layer 106 covering the second metal layer 105, and the second insulating layer 106 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the second insulating layer 106 may further cover the first insulating layer 103 and the semiconductor layer 104 .
  • the second insulating layer 106 includes an inorganic insulating material.
  • the display panel further includes a color resist layer 107 on the second insulating layer 106 , and the color resist layer 107 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the color resist layer 107 includes a plurality of color resists.
  • the color resist in the color resist layer 107 at least covers the region where the second metal layer 105 is located. Since the second metal layer 105 is located on the upper layer of the first metal layer 102 and the first insulating layer 103 , the color resist covering the second metal layer 105 also naturally covers the first metal layer 102 and the first insulating layer 103 . An insulating layer 103 ; and the color resist layer 107 is located on the upper layer of the second insulating layer 106 , so it must cover the second insulating layer 106 . Therefore, in this embodiment, the color resist layer 107 can be used to protect the second metal layer 105 and the insulating film layer near the second metal layer 105 .
  • the color resistor located in the gate driving wiring region 20 may be at least one of blue resistor, green resistor and red resistor, preferably blue resistor.
  • the color resistance of the gate driving wiring region 20 is set as a blue resistance, the second metal layer 105 and the film layers near the second metal layer 105 are protected by the color resistance, and the transparent blue
  • the characteristic of the color resistance is that the light is relatively dark, so as to achieve the effect of low light transmission or opacity of the display panel in the gate driving wiring area 20, and improve the display quality of the display panel.
  • the present embodiment is beneficial to improve the process yield of the display panel.
  • the color resist layer 107 includes a plurality of color resist blocks arranged in an array, and each of the color resist blocks is disposed corresponding to one pixel unit of the display panel.
  • the color resistors located in the display area 10 include red resistors, green resistors and blue resistors, the red resistors, the green resistors and the blue resistors are alternately arranged, and the red resistors correspond to the red resistors of the display panel.
  • the color resist located in the display area 10 is used to filter the light emitted from the display panel, thereby realizing color display.
  • the color resists located in the display area 10 and the color resists located in the gate driving wiring area 20 are kept the same in terms of materials and manufacturing processes. Therefore, when manufacturing the color resists in the display area 10, the gate can be completed simultaneously. Fabrication of color resistors in the electrode drive routing area 20 . Therefore, the design of fabricating the color resist structure in the gate driving wiring region 20 provided by this embodiment does not lead to the complexity of the display panel manufacturing process.
  • the display panel further includes a photoresist layer 108 disposed on the color resist layer 107, and the photoresist layer 108 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the photoresist layer 108 is used to provide further protection for the color resist layer 107 and the metal layer and insulating film layer below the color resist layer 107 to reduce the risk of etching damage.
  • the display panel further includes a pixel electrode 109 disposed on the photoresist layer 108 , the pixel electrode 109 covers the display area 10 , and the pixel electrode 109 at least covers part of the gate driving wiring area 20 .
  • the pixel electrode 109 in the display area 10 is electrically connected to the second metal layer 105 through the via holes on the photoresist layer 108 , the color resist layer 107 and the second insulating layer 106 .
  • the pixel electrode 109 is disposed corresponding to the pixel unit of the display panel, and the pixel electrode 109 receives the data signal transmitted by the second metal layer 105 to control the display of each pixel unit.
  • the display panel further includes a liquid crystal layer 111 disposed on the pixel electrode 109 , and the liquid crystal layer 111 is disposed corresponding to the display area 10 .
  • the gate driving wiring area 20 is provided with a sealant 110 on the film layer corresponding to the liquid crystal layer 111 .
  • the liquid crystal layer 111 is provided with liquid crystals, and the liquid crystals are used to adjust the display gray scale of the display panel.
  • the frame sealant 110 is used for encapsulating the sides of the liquid crystal layer 111 .
  • the display panel further includes a common electrode 112 disposed on the liquid crystal layer 111 and the frame sealant 110 , and the common electrode 112 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the common electrode 112 is electrically connected to the common wiring area 30 .
  • the common electrode 112 is used for providing a common voltage to drive the liquid crystal in the liquid crystal layer 111 to deflect.
  • the display panel further includes an upper substrate 113 located on the common electrode 112 , and the upper substrate 113 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • FIG. 4 is a schematic diagram of a second partial cross-sectional structure of the gate driving wiring area of the display panel shown in FIG. 1 .
  • the cross-sectional structure of the display area corresponding to FIG. 4 is the same as the cross-sectional structure of the display area shown in FIG. 3 .
  • the cross-sectional structure of the gate driving wiring region 20 shown in FIG. 4 is similar to the cross-sectional structure of the gate driving wiring region 20 shown in FIG. 2 , and the difference is only in the following aspects:
  • the first insulating layer 103 covers the entire exposed surface of the first metal layer 102 along the arrangement position of the first metal layer 102 .
  • the second insulating layer 106 covers the entire exposed surface of the second metal layer 105 along the arrangement position of the second metal layer 105 .
  • the color resist layer 107 forms a surrounding covering on the entire exposed surfaces of the first insulating layer 103 and the second insulating layer 106 , so as to form a comprehensive coverage of the first insulating layer 103 and the second insulating layer 106 Protection, to prevent the first insulating layer 103 and the second insulating layer 106 from being damaged by processes such as etching of the display panel.
  • the second metal layer 105 and the film layers near the second metal layer 105 are protected to prevent the etching of the display panel and other processes from covering the
  • the insulating film layer of the second metal layer 105 and the insulating film layer between the first metal layer 102 and the second metal layer 105 are etched and damaged, thereby preventing the second metal layer 105 from being exposed and the first metal layer 102 and the second metal layer 105 from being exposed.
  • the metal layer 105 is short-circuited, which is beneficial to improve the process yield of the display panel; and the color resistance covering the second metal layer 105 is the same as the color resistance of the display area 10, and can be fabricated by the same process, so the increase in the gate driving wiring area 20 is increased.
  • the color resist structure does not complicate the display panel manufacturing process.
  • FIG. 5 is a schematic diagram of a third partial cross-sectional structure of the gate driving wiring area of the display panel shown in FIG. 1
  • FIG. 6 is the display shown in FIG. 1
  • the structure of the display panel in the gate driving wiring area shown in FIG. 5 is the same as or similar to the display panel structure in the gate driving wiring area shown in FIG. 2
  • the structure of the display panel in the display area shown in 3 is the same or similar.
  • the structure of the display panel shown in FIG. 5 and FIG. 6 will be described below.
  • the display panel includes a base substrate 101 covering the display area 10 and the gate driving wiring area 20 .
  • a first metal layer 102 and a semiconductor layer 104 are disposed on the base substrate 101 , and both the first metal layer 102 and the semiconductor layer 104 cover the display area 10 and the gate driving wiring area 20 of the display panel .
  • the semiconductor layer 104 is provided with a semiconductor material, and the semiconductor material is used to form an active layer of a thin film transistor.
  • Metal traces are disposed on the first metal layer 102 , and the metal traces include a source electrode and a drain electrode for forming a thin film transistor.
  • the display panel includes a first insulating layer 103 covering the first metal layer 102 and the semiconductor layer 104, the first insulating layer 103 covering the display area 10 and the gate driving wiring area 20 of the display panel .
  • the first insulating layer 103 includes an inorganic insulating material.
  • the first insulating layer 103 may be a gate insulating layer.
  • the display panel further includes a second metal layer 105 disposed on the first insulating layer 103, and the second metal layer 105 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • Metal traces are disposed on the second metal layer 105 , and the metal traces include gate electrodes for forming thin film transistors.
  • the display panel further includes a second insulating layer 106 covering the second metal layer 105, and the second insulating layer 106 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the display panel further includes a color resist layer 107 on the second insulating layer 106 , and the color resist layer 107 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the color resist layer 107 includes a plurality of color resists.
  • the color resist in the color resist layer 107 at least covers the region where the second metal layer 105 is located. Since the second metal layer 105 is located on the upper layer of the first metal layer 102 and the first insulating layer 103 , the color resist covering the second metal layer 105 also naturally covers the first metal layer 102 and the first insulating layer 103 . An insulating layer 103 ; and the color resist layer 107 is located on the upper layer of the second insulating layer 106 , so it must cover the second insulating layer 106 . Therefore, in this embodiment, the color resist layer 107 can be used to protect the second metal layer 105 and the insulating film layer near the second metal layer 105 .
  • the color resistor located in the gate driving wiring region 20 may be at least one of blue resistor, green resistor and red resistor, preferably blue resistor.
  • the color resistance of the gate driving wiring region 20 is set as a blue resistance, the second metal layer 105 and the film layers near the second metal layer 105 are protected by the color resistance, and the transparent blue
  • the characteristic of the color resistance is that the light is relatively dark, so as to achieve the effect of low light transmission or opacity of the display panel in the gate driving wiring area 20, and improve the display quality of the display panel.
  • the present embodiment is beneficial to improve the process yield of the display panel.
  • the color resist layer 107 includes a plurality of color resist blocks arranged in an array, and each of the color resist blocks is disposed corresponding to one pixel unit of the display panel.
  • the color resistors located in the display area 10 include red resistors, green resistors and blue resistors, the red resistors, the green resistors and the blue resistors are alternately arranged, and the red resistors correspond to the red resistors of the display panel.
  • the color resist located in the display area 10 is used to filter the light emitted from the display panel, thereby realizing color display.
  • the color resists located in the display area 10 and the color resists located in the gate driving wiring area 20 are kept the same in terms of materials and manufacturing processes. Therefore, when manufacturing the color resists in the display area 10, the gate can be completed simultaneously. Fabrication of color resistors in the electrode drive routing area 20 . Therefore, the design of fabricating the color resist structure in the gate driving wiring region 20 provided by this embodiment does not lead to the complexity of the display panel manufacturing process.
  • the display panel further includes a photoresist layer 108 disposed on the color resist layer 107, and the photoresist layer 108 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the display panel further includes a pixel electrode 109 disposed on the photoresist layer 108 , the pixel electrode 109 covers the display area 10 , and the pixel electrode 109 at least covers part of the gate driving wiring area 20 .
  • the pixel electrode 109 in the display area 10 is connected to the first insulating layer 103 through the photoresist layer 108 , the color resist layer 107 , the second insulating layer 106 and the via holes on the first insulating layer 103 .
  • a metal layer 102 is electrically connected.
  • the pixel electrode 109 is disposed corresponding to the pixel unit of the display panel, and the pixel electrode 109 receives the data signal transmitted by the first metal layer 102 to control the display of each pixel unit.
  • the display panel further includes a liquid crystal layer 111 disposed on the pixel electrode 109 , and the liquid crystal layer 111 is disposed corresponding to the display area 10 .
  • the gate driving wiring area 20 is provided with a sealant 110 on the film layer corresponding to the liquid crystal layer 111 .
  • the liquid crystal layer 111 is provided with liquid crystals, and the liquid crystals are used to adjust the display gray scale of the display panel.
  • the frame sealant 110 is used for encapsulating the sides of the liquid crystal layer 111 .
  • the display panel further includes a common electrode 112 disposed on the liquid crystal layer 111 and the frame sealant 110 , and the common electrode 112 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the common electrode 112 is electrically connected to the common wiring area 30 .
  • the common electrode 112 is used for providing a common voltage to drive the liquid crystal in the liquid crystal layer 111 to deflect.
  • the display panel further includes an upper substrate 113 located on the common electrode 112 , and the upper substrate 113 covers the display area 10 and the gate driving wiring area 20 of the display panel.
  • the first insulating layer 103 may also cover the entire exposed surface of the first metal layer 102 along the arrangement position of the first metal layer 102 .
  • the second insulating layer 106 may also cover the entire exposed surface of the second metal layer 105 along the arrangement position of the second metal layer 105 .
  • the color resist layer 107 forms a surrounding covering on the entire exposed surfaces of the first insulating layer 103 and the second insulating layer 106 , so as to form a comprehensive coverage of the first insulating layer 103 and the second insulating layer 106 Protect.
  • the second metal layer and the film layers near the second metal layer are protected by arranging color resists in the gate driving wiring area to prevent the display panel from being etched.
  • Etc. process produces an etching damage effect on the insulating film covering the second metal layer and the insulating film between the first metal layer and the second metal layer, thereby preventing the second metal layer from being exposed and the first metal layer and the second metal layer from being exposed.
  • the two metal layers are short-circuited, which is beneficial to improve the process yield of the display panel; and the color resistance covering the second metal layer is the same as the color resistance of the display area, and can be fabricated through the same process, so a color resistance structure is added in the gate driving wiring area. It will not lead to the complexity of the display panel manufacturing process.
  • Embodiments of the present application further provide a display device, where the display device includes the display panel provided by the embodiments of the present application.
  • the display device may be a display device, a mobile phone, a tablet computer, a notebook computer, a navigator, a television, or the like, which has a display function.

Abstract

一种显示面板及显示装置；该显示面板包括显示区（10）和设置于显示区（10）至少一侧的栅极驱动走线区（20），对应显示区（10）和栅极驱动走线区（20）的区域设置有色阻（107），栅极驱动走线区（20）包括第一金属层（102）和设置于第一金属层（102）之上的第二金属层（105），并且位于栅极驱动走线区（20）的色阻（107）至少覆盖第二金属层（105）。

Description

显示面板及显示装置
本申请要求于2021年04月13日提交中国专利局、申请号为202110392451.4、发明名称为“显示面板及显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及显示装置。
 背景技术
薄膜晶体管液晶显示器（Thin Film Transistor Liquid Crystal Display，TFT-LCD）具有轻薄、环保、高性能等优点，已广泛应用于各种电子产品中，尤其是大尺寸显示产品中。为了提升人们的视觉效果，拓宽可视范围，显示器的边框宽度要求越来越窄。目前，GOA（Gate Driver on Array，阵列基板行驱动）技术是实现窄边框的一种重要手段，该技术直接将电极驱动电路设计在阵列基板上，在缩小边框宽度的同时，还可以减少制作程序，降低产品成本，使面板更加轻薄。
GOA区域的显示面板线路集成复杂，覆盖第一金属层和第二金属层的保护性膜层，比如第二金属层上的钝化层，厚度较薄，在一些过孔刻蚀处理的过程中，这种保护性膜层容易被刻蚀损伤，导致第二金属层裸露，或第一金属层与第二金属层短路，进而造成显示面板功能异常。
 技术问题
目前显示面板的GOA区域容易出现两层金属层之间短路的技术问题。
 技术解决方案
本申请提供一种显示面板及显示装置，用于缓解显示面板GOA区域的金属层存在的容易短路的技术问题。
本申请提供一种显示面板，其包括显示区和设置于所述显示区至少一侧的栅极驱动走线区；
所述显示面板还包括对应所述显示区和所述栅极驱动走线区设置的色阻层，所述色阻层包括色阻；
所述栅极驱动走线区包括第一金属层和设置于所述第一金属层之上的第二金属层，位于所述栅极驱动走线区的色阻至少覆盖所述第二金属层。
在本申请的显示面板中，所述栅极驱动走线区还包括设置于所述第一金属层与所述第二金属层之间的第一绝缘层，位于所述栅极驱动走线区的色阻覆盖所述第一绝缘层。
在本申请的显示面板中，所述栅极驱动走线区包括光阻层，所述光阻层覆盖位于所述栅极驱动走线区的色阻。
在本申请的显示面板中，所述显示区设置有所述光阻层，所述光阻层覆盖位于所述显示区的色阻。
在本申请的显示面板中，所述栅极驱动走线区还包括设置于所述第二金属层与所述色阻层之间的第二绝缘层，位于所述栅极驱动走线区的色阻覆盖所述第二绝缘层。
在本申请的显示面板中，所述显示面板还包括像素电极，至少部分所述像素电极位于所述栅极驱动走线区。
在本申请的显示面板中，位于所述栅极驱动走线区的像素电极设置于所述光阻层上。
在本申请的显示面板中，所述第一金属层与所述第一绝缘层之间还设置有半导体层，所述第二金属层设置于所述半导体层上。
在本申请的显示面板中，所述第一金属层对应所述显示区和所述栅极驱动走线区设置；
所述第二金属层对应所述显示区和所述栅极驱动走线区设置。
在本申请的显示面板中，位于所述栅极驱动走线区的色阻包括蓝色阻。
在本申请的显示面板中，所述显示面板还包括设置于所述栅极驱动走线区的远离所述显示区一侧的公共走线区，所述公共走线区内设置有公共走线。
在本申请的显示面板中，所述第一金属层覆盖所述显示面板的显示区和栅极驱动走线区。
在本申请的显示面板中，所述第二金属层覆盖所述显示面板的显示区和栅极驱动走线区。
在本申请的显示面板中，所述第一金属层包括用于构成薄膜晶体管的栅极。
在本申请的显示面板中，所述第二金属层包括用于构成薄膜晶体管的源极和漏极。
在本申请的显示面板中，对应所述显示区设置的所述像素电极与所述第二金属层电性连接。
在本申请的显示面板中，所述第一金属层包括用于构成薄膜晶体管的源极和漏极。
在本申请的显示面板中，所述第二金属层包括用于构成薄膜晶体管的栅极。
在本申请的显示面板中，对应所述显示区设置的所述像素电极与所述第一金属层电性连接。
本申请还提供一种显示装置，其包括显示面板；所述显示面板包括显示区和设置于所述显示区至少一侧的栅极驱动走线区；
所述显示面板还包括对应所述显示区和所述栅极驱动走线区设置的色阻层，所述色阻层包括色阻；
所述栅极驱动走线区包括第一金属层和设置于所述第一金属层之上的第二金属层，位于所述栅极驱动走线区的色阻至少覆盖所述第二金属层。
 有益效果
本申请提供一种显示面板及显示装置，显示面板包括显示区和设置于显示区至少一侧的栅极驱动走线区，该显示面板还包括对应显示区和栅极驱动走线区设置的色阻层，色阻层包括色阻；栅极驱动走线区包括第一金属层和设置于第一金属层之上的第二金属层，位于栅极驱动走线区的色阻至少覆盖第二金属层。本申请通过在栅极驱动走线区设置覆盖第二金属层的色阻，增强了对第二金属层的保护，防止显示面板的刻蚀等制程导致第二金属层暴露以及第一金属层与第二金属层短路，有利于提升显示面板的制程良率；且覆盖第二金属层的色阻与显示区的色阻相同，可以通过同一制程制作，因此在栅极驱动走线区增加色阻结构不会导致显示面板制程工艺的复杂化。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本申请实施例提供的显示面板的平面结构示意图。
图2是图1所示的显示面板的栅极驱动走线区的第一种局部截面结构示意图。
图3是图1所示的显示面板的显示区的第一种局部截面结构示意图。
图4是图1所示的显示面板的栅极驱动走线区的第二种局部截面结构示意图。
图5是图1所示的显示面板的栅极驱动走线区的第三种局部截面结构示意图。
图6是图1所示的显示面板的显示区的第二种局部截面结构示意图。
 本发明的实施方式
以下各实施例的说明是参考附加的图示，用以例示本申请可用以实施的特定实施例。本申请所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本申请，而非用以限制本申请。在图中，结构相似的单元是用以相同标号表示。
本申请实施例提供一种显示面板及显示装置，所述显示面板包括显示区和设置于所述显示区至少一侧的栅极驱动走线区，所述显示面板还包括对应所述显示区和所述栅极驱动走线区设置的色阻层，所述色阻层包括色阻；所述栅极驱动走线区包括第一金属层和设置于所述第一金属层之上的第二金属层，位于所述栅极驱动走线区的色阻至少覆盖所述第二金属层。本申请实施例通过在栅极驱动走线区设置覆盖第二金属层的色阻，增强了对第二金属层的保护，防止显示面板的刻蚀等制程导致第二金属层暴露以及第一金属层与第二金属层短路，有利于提升显示面板的制程良率；且覆盖第二金属层的色阻与显示区的色阻相同，可以通过同一制程制作，因此在栅极驱动走线区增加色阻结构不会导致显示面板制程工艺的复杂化。
请参阅图1，图1是本申请实施例提供的显示面板的平面结构示意图。所述显示面板包括显示区10、设置于所述显示区10侧边的栅极驱动走线区20和设置于所述栅极驱动走线区20的远离所述显示区10的一侧的公共走线区30。所述显示区10是所述显示面板上发挥显示功能的区域，所述显示区10内设置有用于实现其显示功能的多个像素单元。
可选地，所述栅极驱动走线区20包括两部分，分别对应设置于所述显示区10的相对两侧。所述栅极驱动走线区20内设置有栅极驱动电路，所述栅极驱动电路用于驱动所述显示区10内的像素单元进行显示。
可选地，所述公共走线区30包括两部分，分别对应设置于所述显示面板的相对两侧，且均位于所述栅极驱动走线区20的远离所述显示区10的侧边。所述公共走线区30内设置有公共走线，所述公共走线用于位于所述显示区10内的像素单元提供公共电压信号。
在一种实施例中，请参阅图2和图3，图2是图1所示的显示面板的栅极驱动走线区的第一种局部截面结构示意图，图3是图1所示的显示面板的显示区的第一种局部截面结构示意图。
所述显示面板包括覆盖所述显示区10和所述栅极驱动走线区20的衬底基板101，所述衬底基板101可以是玻璃等硬质基板，也可以是聚酰亚胺等柔性基板。
所述显示面板包括设置于所述衬底基板101上的第一金属层102，所述第一金属层102覆盖所述显示面板的显示区10和栅极驱动走线区20。所述第一金属层102上设置有金属走线，比如位于所述栅极驱动走线区20内的栅极和栅极线。
所述显示面板包括覆盖所述第一金属层102的第一绝缘层103，所述第一绝缘层103覆盖所述显示面板的显示区10和栅极驱动走线区20。所述第一绝缘层103包括无机绝缘材料。所述第一绝缘层103可以是栅极绝缘层。
所述显示面板包括设置于所述第一绝缘层103上的半导体层104，所述半导体层104覆盖所述显示面板的显示区10和栅极驱动走线区20。所述半导体层104内设置有半导体材料，所述半导体材料用于形成薄膜晶体管的有源层。
所述显示面板还包括设置于所述半导体层104上的第二金属层105，所述第二金属层105覆盖所述显示面板的显示区10和栅极驱动走线区20。所述第二金属层105的局部区域位于所述第一绝缘层103上，所述第二金属层105与所述第一金属层102通过所述第一绝缘层103保持电性绝缘。所述第二金属层105上设置有金属走线，所述金属走线包括用于构成薄膜晶体管的源极线和漏极线。
所述显示面板还包括覆盖所述第二金属层105的第二绝缘层106，所述第二绝缘层106覆盖所述显示面板的显示区10和栅极驱动走线区20。所述第二绝缘层106还可以进一步覆盖所述第一绝缘层103和所述半导体层104。所述第二绝缘层106包括无机绝缘材料。
所述显示面板还包括位于所述第二绝缘层106上的色阻层107，所述色阻层107覆盖所述显示面板的显示区10和栅极驱动走线区20。所述色阻层107包括多个色阻。
在所述栅极驱动走线区20内，所述色阻层107内的色阻至少覆盖所述第二金属层105所在的区域。由于所述第二金属层105位于所述第一金属层102和第一绝缘层103的上层，因此，覆盖所述第二金属层105的色阻也自然覆盖所述第一金属层102和第一绝缘层103；并且所述色阻层107由于位于所述第二绝缘层106的上层，其必然会对所述第二绝缘层106形成覆盖。因此，本实施例可以利用所述色阻层107实现对所述第二金属层105以及所述第二金属层105附近的绝缘膜层的保护。
进一步地，位于所述栅极驱动走线区20的色阻可以是蓝色阻、绿色阻和红色阻中的至少一种，优选为蓝色阻。当所述栅极驱动走线区20的色阻设置为蓝色阻时，在实现利用色阻对第二金属层105及第二金属层105附近的膜层进行保护的同时，利用透过蓝色阻的光线偏暗的特点，达到显示面板在栅极驱动走线区20内低透光或不透光的效果，提升显示面板的显示品质。
本实施例通过在所述栅极驱动走线区20内设置覆盖所述第二金属层105的色阻，增强了对第二金属层105及第二金属层105的附近膜层的保护，防止显示面板的刻蚀等制程对覆盖所述第二金属层105的绝缘膜层以及第一金属层102与第二金属层105之间的绝缘膜层产生刻蚀破坏效果，并导致第二金属层105暴露以及第一金属层102与第二金属层105短路。因此，本实施例有利于提升显示面板的制程良率。
在所述显示区10内，所述色阻层107包括阵列排布的多个色阻块，每个所述色阻块对应所述显示面板的一个像素单元设置。位于所述显示区10内的色阻包括红色阻、绿色阻和蓝色阻，所述红色阻、所述绿色阻和所述蓝色阻交替排列，所述红色阻对应所述显示面板的红像素单元，所述绿色阻对应所述显示面板的绿像素单元，所述蓝色阻对应所述显示面板的蓝像素单元。位于所述显示区10的色阻用于对所述显示面板的出光进行过滤，从而实现彩色显示。
此外，位于所述显示区10的色阻和位于所述栅极驱动走线区20的色阻在材料和制作工艺上保持一致，因此，在制作显示区10内的色阻时可以同步完成栅极驱动走线区20内色阻的制作。因此，本实施例提供的在栅极驱动走线区20制作色阻结构的设计不会导致显示面板制程工艺的复杂化。
所述显示面板还包括设置于所述色阻层107上的光阻层108，所述光阻层108覆盖所述显示面板的显示区10和栅极驱动走线区20。所述光阻层108用于对所述色阻层107及所述色阻层107以下的金属层和绝缘性膜层提供进一步的保护，降低出现刻蚀损伤的风险。
所述显示面板还包括设置于所述光阻层108上的像素电极109，所述像素电极109覆盖所述显示区10，并且所述像素电极109至少覆盖部分所述栅极驱动走线区20。位于所述显示区10内的像素电极109通过所述光阻层108、所述色阻层107和所述第二绝缘层106上的过孔，与所述第二金属层105电性连接。所述像素电极109对应显示面板的像素单元设置，所述像素电极109接收由所述第二金属层105传输的数据信号以控制各个像素单元的显示。
所述显示面板还包括设置于所述像素电极109上的液晶层111，且所述液晶层111对应所述显示区10设置。所述栅极驱动走线区20在对应所述液晶层111的膜层设置有封框胶110。所述液晶层111内设置有液晶，所述液晶用于调整所述显示面板的显示灰阶。所述封框胶110用于对所述液晶层111的侧边进行封装。
所述显示面板还包括设置于所述液晶层111和所述封框胶110上的公共电极112，所述公共电极112覆盖所述显示面板的显示区10和栅极驱动走线区20。所述公共电极112电性连接至所述公共走线区30。所述公共电极112用于提供公共电压，以驱动所述液晶层111内的液晶产生偏转。
所述显示面板还包括位于所述公共电极112上的上基板113，所述上基板113覆盖所述显示面板的显示区10和栅极驱动走线区20。
在一种实施例中，请参阅图4，图4是图1所示的显示面板的栅极驱动走线区的第二种局部截面结构示意图。其中，与图4对应的显示区的截面结构和图3所示的显示区的截面结构相同。
图4所示的栅极驱动走线区20的截面结构与图2所示的栅极驱动走线区20的截面结构相似，其不同之处仅在于以下方面：
所述第一绝缘层103沿所述第一金属层102的布置位置覆盖所述第一金属层102的全部外露表面。所述第二绝缘层106沿所述第二金属层105的布置位置覆盖所述第二金属层105的全部外露表面。所述色阻层107对所述第一绝缘层103和所述第二绝缘层106的全部外露表面形成包围式覆盖，从而对所述第一绝缘层103和所述第二绝缘层106形成全面保护，防止显示面板的刻蚀等制程对所述第一绝缘层103和所述第二绝缘层106造成破坏。
本实施例通过在所述栅极驱动走线区20内设置色阻，对第二金属层105及第二金属层105的附近膜层进行保护，防止显示面板的刻蚀等制程对覆盖所述第二金属层105的绝缘膜层以及第一金属层102与第二金属层105之间的绝缘膜层产生刻蚀破坏效果，进而防止第二金属层105暴露以及第一金属层102与第二金属层105短路，有利于提升显示面板的制程良率；且覆盖第二金属层105的色阻与显示区10的色阻相同，可以通过同一制程制作，因此在栅极驱动走线区20增加色阻结构不会导致显示面板制程工艺的复杂化。
在一种实施例中，请参阅图5和图6，图5是图1所示的显示面板的栅极驱动走线区的第三种局部截面结构示意图，图6是图1所示的显示面板的显示区的第二种局部截面结构示意图。其中，图5所示的栅极驱动走线区的显示面板结构与图2所示的栅极驱动走线区的显示面板结构相同或相似，图6所示的显示区的显示面板结构与图3所示的显示区的显示面板结构相同或相似，下面对图5和图6所示的显示面板结构进行说明，其中未详述之处，请参阅上述实施例的记载。
所述显示面板包括覆盖所述显示区10和所述栅极驱动走线区20的衬底基板101。所述衬底基板101上设置有第一金属层102和半导体层104，所述第一金属层102和所述半导体层104均覆盖所述显示面板的显示区10和栅极驱动走线区20。所述半导体层104内设置有半导体材料，所述半导体材料用于形成薄膜晶体管的有源层。所述第一金属层102上设置有金属走线，所述金属走线包括用于构成薄膜晶体管的源极和漏极。
所述显示面板包括覆盖所述第一金属层102和所述半导体层104的第一绝缘层103，所述第一绝缘层103覆盖所述显示面板的显示区10和栅极驱动走线区20。所述第一绝缘层103包括无机绝缘材料。所述第一绝缘层103可以是栅极绝缘层。
所述显示面板还包括设置于所述第一绝缘层103上的第二金属层105，所述第二金属层105覆盖所述显示面板的显示区10和栅极驱动走线区20。所述第二金属层105上设置有金属走线，所述金属走线包括用于构成薄膜晶体管的栅极。
所述显示面板还包括覆盖所述第二金属层105的第二绝缘层106，所述第二绝缘层106覆盖所述显示面板的显示区10和栅极驱动走线区20。
所述显示面板还包括位于所述第二绝缘层106上的色阻层107，所述色阻层107覆盖所述显示面板的显示区10和栅极驱动走线区20。所述色阻层107包括多个色阻。
在所述栅极驱动走线区20内，所述色阻层107内的色阻至少覆盖所述第二金属层105所在的区域。由于所述第二金属层105位于所述第一金属层102和第一绝缘层103的上层，因此，覆盖所述第二金属层105的色阻也自然覆盖所述第一金属层102和第一绝缘层103；并且所述色阻层107由于位于所述第二绝缘层106的上层，其必然会对所述第二绝缘层106形成覆盖。因此，本实施例可以利用所述色阻层107实现对所述第二金属层105以及所述第二金属层105附近的绝缘膜层的保护。
进一步地，位于所述栅极驱动走线区20的色阻可以是蓝色阻、绿色阻和红色阻中的至少一种，优选为蓝色阻。当所述栅极驱动走线区20的色阻设置为蓝色阻时，在实现利用色阻对第二金属层105及第二金属层105附近的膜层进行保护的同时，利用透过蓝色阻的光线偏暗的特点，达到显示面板在栅极驱动走线区20内低透光或不透光的效果，提升显示面板的显示品质。
本实施例通过在所述栅极驱动走线区20内设置覆盖所述第二金属层105的色阻，增强了对第二金属层105及第二金属层105的附近膜层的保护，防止显示面板的刻蚀等制程对覆盖所述第二金属层105的绝缘膜层以及第一金属层102与第二金属层105之间的绝缘膜层产生刻蚀破坏效果，并导致第二金属层105暴露以及第一金属层102与第二金属层105短路。因此，本实施例有利于提升显示面板的制程良率。
在所述显示区10内，所述色阻层107包括阵列排布的多个色阻块，每个所述色阻块对应所述显示面板的一个像素单元设置。位于所述显示区10内的色阻包括红色阻、绿色阻和蓝色阻，所述红色阻、所述绿色阻和所述蓝色阻交替排列，所述红色阻对应所述显示面板的红像素单元，所述绿色阻对应所述显示面板的绿像素单元，所述蓝色阻对应所述显示面板的蓝像素单元。位于所述显示区10的色阻用于对所述显示面板的出光进行过滤，从而实现彩色显示。
此外，位于所述显示区10的色阻和位于所述栅极驱动走线区20的色阻在材料和制作工艺上保持一致，因此，在制作显示区10内的色阻时可以同步完成栅极驱动走线区20内色阻的制作。因此，本实施例提供的在栅极驱动走线区20制作色阻结构的设计不会导致显示面板制程工艺的复杂化。
所述显示面板还包括设置于所述色阻层107上的光阻层108，所述光阻层108覆盖所述显示面板的显示区10和栅极驱动走线区20。
所述显示面板还包括设置于所述光阻层108上的像素电极109，所述像素电极109覆盖所述显示区10，并且所述像素电极109至少覆盖部分所述栅极驱动走线区20。位于所述显示区10内的像素电极109通过所述光阻层108、所述色阻层107、所述第二绝缘层106和所述第一绝缘层103上的过孔，与所述第一金属层102电性连接。所述像素电极109对应显示面板的像素单元设置，所述像素电极109接收由所述第一金属层102传输的数据信号以控制各个像素单元的显示。
所述显示面板还包括设置于所述像素电极109上的液晶层111，且所述液晶层111对应所述显示区10设置。所述栅极驱动走线区20在对应所述液晶层111的膜层设置有封框胶110。所述液晶层111内设置有液晶，所述液晶用于调整所述显示面板的显示灰阶。所述封框胶110用于对所述液晶层111的侧边进行封装。
所述显示面板还包括设置于所述液晶层111和所述封框胶110上的公共电极112，所述公共电极112覆盖所述显示面板的显示区10和栅极驱动走线区20。所述公共电极112电性连接至所述公共走线区30。所述公共电极112用于提供公共电压，以驱动所述液晶层111内的液晶产生偏转。
所述显示面板还包括位于所述公共电极112上的上基板113，所述上基板113覆盖所述显示面板的显示区10和栅极驱动走线区20。
可选地，请参阅图5，所述第一绝缘层103还可以沿所述第一金属层102的布置位置覆盖所述第一金属层102的全部外露表面。所述第二绝缘层106还可以沿所述第二金属层105的布置位置覆盖所述第二金属层105的全部外露表面。所述色阻层107对所述第一绝缘层103和所述第二绝缘层106的全部外露表面形成包围式覆盖，从而对所述第一绝缘层103和所述第二绝缘层106形成全面保护。
综上所述，本申请实施例提供的显示面板，通过在栅极驱动走线区内设置色阻，对第二金属层及第二金属层的附近膜层进行保护，防止显示面板的刻蚀等制程对覆盖所述第二金属层的绝缘膜层以及第一金属层与第二金属层之间的绝缘膜层产生刻蚀破坏效果，进而防止第二金属层暴露以及第一金属层与第二金属层短路，有利于提升显示面板的制程良率；且覆盖第二金属层的色阻与显示区的色阻相同，可以通过同一制程制作，因此在栅极驱动走线区增加色阻结构不会导致显示面板制程工艺的复杂化。
本申请实施例还提供一种显示装置，所述显示装置包括本申请实施例提供的显示面板。所述显示装置可以是显示器、手机、平板电脑、笔记本电脑、导航仪、电视机等具有显示功能的器件。
需要说明的是，虽然本申请以具体实施例揭露如上，但上述实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板，其包括显示区和设置于所述显示区至少一侧的栅极驱动走线区；
    所述显示面板还包括对应所述显示区和所述栅极驱动走线区设置的色阻层，所述色阻层包括色阻；
    所述栅极驱动走线区包括第一金属层和设置于所述第一金属层之上的第二金属层，位于所述栅极驱动走线区的色阻至少覆盖所述第二金属层。
  2. 根据权利要求1所述的显示面板，其中，所述栅极驱动走线区还包括设置于所述第一金属层与所述第二金属层之间的第一绝缘层，位于所述栅极驱动走线区的色阻覆盖所述第一绝缘层。
  3. 根据权利要求2所述的显示面板，其中，所述栅极驱动走线区包括光阻层，所述光阻层覆盖位于所述栅极驱动走线区的色阻。
  4. 根据权利要求3所述的显示面板，其中，所述显示区设置有所述光阻层，所述光阻层覆盖位于所述显示区的色阻。
  5. 根据权利要求3所述的显示面板，其中，所述栅极驱动走线区还包括设置于所述第二金属层与所述色阻层之间的第二绝缘层，位于所述栅极驱动走线区的色阻覆盖所述第二绝缘层。
  6. 根据权利要求3所述的显示面板，其中，所述显示面板还包括像素电极，至少部分所述像素电极位于所述栅极驱动走线区。
  7. 根据权利要求6所述的显示面板，其中，位于所述栅极驱动走线区的像素电极设置于所述光阻层上。
  8. 根据权利要求2所述的显示面板，其中，所述第一金属层与所述第一绝缘层之间还设置有半导体层，所述第二金属层设置于所述半导体层上。
  9. 根据权利要求1所述的显示面板，其中，所述第一金属层对应所述显示区和所述栅极驱动走线区设置；
    所述第二金属层对应所述显示区和所述栅极驱动走线区设置。
  10. 根据权利要求1所述的显示面板，其中，位于所述栅极驱动走线区的色阻包括蓝色阻。
  11. 根据权利要求1所述的显示面板，其中，所述显示面板还包括设置于所述栅极驱动走线区的远离所述显示区一侧的公共走线区，所述公共走线区内设置有公共走线。
  12. 根据权利要求1所述的显示面板，其中，所述第一金属层覆盖所述显示面板的显示区和栅极驱动走线区。
  13. 根据权利要求1所述的显示面板，其中，所述第二金属层覆盖所述显示面板的显示区和栅极驱动走线区。
  14. 根据权利要求1所述的显示面板，其中，所述第一金属层包括用于构成薄膜晶体管的栅极。
  15. 根据权利要求14所述的显示面板，其中，所述第二金属层包括用于构成薄膜晶体管的源极和漏极。
  16. 根据权利要求15所述的显示面板，其中，对应所述显示区设置的所述像素电极与所述第二金属层电性连接。
  17. 根据权利要求1所述的显示面板，其中，所述第一金属层包括用于构成薄膜晶体管的源极和漏极。
  18. 根据权利要求17所述的显示面板，其中，所述第二金属层包括用于构成薄膜晶体管的栅极。
  19. 根据权利要求18所述的显示面板，其中，对应所述显示区设置的所述像素电极与所述第一金属层电性连接。
  20. 一种显示装置，其包括显示面板；所述显示面板包括显示区和设置于所述显示区至少一侧的栅极驱动走线区；
    所述显示面板还包括对应所述显示区和所述栅极驱动走线区设置的色阻层，所述色阻层包括色阻；
    所述栅极驱动走线区包括第一金属层和设置于所述第一金属层之上的第二金属层，位于所述栅极驱动走线区的色阻至少覆盖所述第二金属层。
PCT/CN2021/092579 2021-04-13 2021-05-10 显示面板及显示装置 WO2022217678A1 (zh)

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