WO2022205523A1 - 一种双面太阳能电池及其制备方法 - Google Patents

一种双面太阳能电池及其制备方法 Download PDF

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WO2022205523A1
WO2022205523A1 PCT/CN2021/088063 CN2021088063W WO2022205523A1 WO 2022205523 A1 WO2022205523 A1 WO 2022205523A1 CN 2021088063 W CN2021088063 W CN 2021088063W WO 2022205523 A1 WO2022205523 A1 WO 2022205523A1
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pressure
layer
silicon
temperature
nitrogen
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PCT/CN2021/088063
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French (fr)
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任勇
何悦
任海亮
郭帅
张磊
周东
陈德爽
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横店集团东磁股份有限公司
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Priority to EP21934177.3A priority Critical patent/EP4184591A4/en
Priority to US18/043,174 priority patent/US20240014340A1/en
Priority to JP2023513415A priority patent/JP2023539251A/ja
Publication of WO2022205523A1 publication Critical patent/WO2022205523A1/zh

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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
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    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
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    • H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0324—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIVBVI or AIIBIVCVI chalcogenide compounds, e.g. Pb Sn Te
    • H—ELECTRICITY
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0684—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells double emitter cells, e.g. bifacial solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868—Passivation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the application belongs to the technical field of solar cells, and relates to a double-sided solar cell and a preparation method thereof.
  • PID Potential Induced Degradation
  • the AlOx /Si interface of the passivation film on the backside of the PERC bifacial cell has a high negative charge density, resulting in a good field passivation effect.
  • Na + ions will be precipitated in the glass.
  • the cell Under the action of positive voltage, the cell is at a high potential, and the frame is at a low potential, and Na + ions will flow out of the cell and will not accumulate on the surface of the cell.
  • Under negative voltage the cell is at a low potential and the frame is at a high potential, and Na + ions will pass through the encapsulation material to the surface of the cell.
  • CN106876490A discloses an N-type crystalline silicon double-sided battery with high conversion efficiency and anti-PID.
  • a P+ layer, a silicon oxide layer, an aluminum oxide layer and a metal electrode are sequentially formed on the front side of the N-type silicon substrate.
  • An N+ layer, a silicon nitride layer and a metal electrode are sequentially formed on the back side, wherein: a dense silicon oxide layer with a thickness of more than 20 nm exists under the front side metallization region.
  • the technical solution disclosed by CN110137309A is (1) clarifying the conditions for growing the oxide layer; (2) when using the atomic layer deposition method for the backside aluminum oxide coating process, ensure that the thickness of the backside aluminum oxide is 2-10nm; (3) double-sided PERC cell oxidation After the aluminum coating process, the backside silicon nitride coating process is performed to ensure that the thickness of the silicon nitride coating on the back of the double-sided PERC cell is 80-110nm, and the refractive index is 2.12-2.3; (4) After the double-sided PERC battery is subjected to the backside silicon nitride coating process, The front side silicon nitride coating process, the back side laser grooving process, and the screen printing process can be detected and sorted, and the preparation can be completed.
  • CN209119114U provides an anti-PID double-sided battery, which includes a silicon substrate, a front surface film and a back surface film respectively arranged on both sides of the silicon substrate, and the front surface film includes a front anti-reflection film and a front medium arranged in layers. film; the back surface film includes a back anti-reflection film and a back dielectric film.
  • the anti-PID double-sided battery of the utility model can effectively block ion migration through the front dielectric film and the back dielectric film, reduce the potential-induced attenuation, and improve the conversion efficiency.
  • Both the front dielectric film and the back dielectric film are set to be silicon oxide films; (2) The refractive indices of the front dielectric film and the back dielectric film are both 1.4 to 1.7; (3) The thicknesses of the front dielectric film and the back dielectric film are both set (4)
  • the back surface film also includes an aluminum oxide film, and the back dielectric film, the aluminum oxide film and the back anti-reflection film are sequentially stacked along the direction away from the silicon substrate; (5)
  • the front anti-reflection film Both the film and the backside antireflection film are provided as either a SiNx film or a SiOxNy film.
  • CN207602585U discloses a PID-resistant double-sided battery module package structure, including glass, EVA film, double-sided battery, EVA film and backplane; the double-sided battery module package structure is divided into single-glass structure and double-glass structure; single-glass structure The structure from top to bottom is: glass, EVA film, double-sided battery, EVA film and backplane; double-glass structure from top to bottom: glass, EVA film, double-sided battery, EVA film and glass; back The board includes a high-resistance water layer, a water-resistance layer and a protective layer; from top to bottom, the high-resistance water layer, the water-resistance layer and the protective layer are in sequence.
  • CN207624714U discloses an anti-PID double-sided battery single-glass packaging structure, comprising glass, a first packaging film, a double-sided battery, a second packaging film and a back plate; the glass, the first packaging film, the double-sided battery, the second The second encapsulation film and the backplane are connected in sequence from top to bottom; the backplane is a three-layer structure, from top to bottom are the polyolefin material doped with titanium dioxide, electrical insulation and oxygen barrier layer and protective layer; the three-layer structure is from top to bottom Connect in sequence from bottom to bottom; the first packaging film is a three-layer structure, from top to bottom, it is an adhesive layer, a barrier layer, and an adhesive layer, and the second packaging film is a two-layer structure, from top to bottom.
  • CN109087956A introduces a new type of double-sided PERC cell structure and its preparation process.
  • the front and back surfaces of the cell are symmetrical in structure, which greatly reduces the warpage of the double-sided cell and improves the mechanical load strength of the module; stacking
  • the layer passivation structure adopts a unique surface passivation layer deposition process to optimize the front and back optical (anti-reflection effect) and electrical (improving hydrogen passivation effect) performance.
  • the SiO2 and AlOx layers on the front and back are respectively formed by thermal oxidation and ALD at the same time.
  • the SiNx/SiNy/SiOxNy/SiOx stacks are formed by PECVD deposition, respectively, and the deposition order of the front and back surfaces can be adjusted.
  • the scheme clarifies that the dielectric layer close to the silicon substrate is the silicon oxide layer, and the refractive index and thickness are specified, but the structure of the backside film layer is described in sequence as the backside dielectric film, the aluminum oxide film and the backside anti-reflection film.
  • the directions away from the silicon substrate are stacked in sequence, and this structure has some film defects, which cannot effectively block the enrichment of surface ions and the resulting potential field effect.
  • the invention scheme of this utility model only provides the package end of the module, and the packaging materials used to encapsulate the double-sided PERC cell into single-glass modules and double-sided modules are designed and described to achieve the effect of anti-PID , and there is no corresponding improvement description for the double-sided PERC cell end.
  • the invention scheme of this utility model described in CN207624714U it focuses on the improvement of the resistance to PID of the module packaging materials used in the packaging of double-sided PERC cells in the single-glass module packaging, and there is no corresponding improvement on the double-sided PERC cell side. illustrate.
  • the invention patent focuses on the double-sided PERC cell structure and introduces the detailed description of the film layer for the double-sided cell structure; first of all, the invention patent does not focus on the research and development of the PID problem.
  • the protection statement is not supported and reflected by any data; secondly, although the film structure of the double-sided PERC cell is somewhat similar to this application, there are obvious film structure defects, mainly the back film in the film structure.
  • the layer is a SiO 2 /AlOx/SiNx/SiNy/SiOxNy/SiOx stack structure, in which the PID failure mechanism of the backside, one of which is the erosion of the backside film layer by Na + ions, which leads to the failure of the AlOx passivation layer,
  • the SiO 2 film is very effective and can block the damage of Na + ions to the AlO x passivation layer.
  • the key SiO 2 film is placed on a layer close to the Si substrate, which is obviously inconsistent with the resistance to PID membrane structure design.
  • the purpose of this application is to provide a double-sided solar cell and a preparation method thereof.
  • the double-sided solar cell provided by the present application adopts a special film layer structure design, which strengthens the compactness and electrical properties of the comprehensive film layer, and can very effectively slow down the generation of the PID phenomenon on the back side.
  • the present application provides a double-sided solar cell, the double-sided solar cell comprising: a silicon wafer with a PN junction, located on one side of the N-type layer of the silicon wafer and along a direction away from the silicon wafer
  • the first front silicon oxide layer, the second front silicon oxide layer, the first nitrogen-containing silicon compound layer on the front, the second nitrogen-containing silicon compound layer on the front, and the third silicon oxide layer on the front, which are stacked in sequence; are located on the silicon wafer
  • a passivation layer, a backside silicon oxide layer, a backside first nitrogen-containing silicon compound layer and a backside second nitrogen-containing silicon compound layer are sequentially stacked on one side of the P-type layer and along the direction away from the silicon wafer.
  • the first front silicon oxide layer functions as an interface passivation layer
  • the front second silicon oxide layer functions as a front blocking layer
  • the front first nitrogen-containing silicon compound layer functions as a front surface barrier layer. It is the blocking layer and the light absorbing layer under the high refractive index
  • the second nitrogen-containing silicon compound layer on the front is the light absorbing layer under the middle refractive index
  • the third silicon oxide layer on the front is the light under the low refractive index.
  • Absorbent layer is the blocking layer and the light absorbing layer under the high refractive index
  • the second nitrogen-containing silicon compound layer on the front is the light absorbing layer under the middle refractive index
  • the third silicon oxide layer on the front is the light under the low refractive index.
  • the function of the passivation layer is to improve the passivation of the back interface
  • the function of the backside silicon oxide layer is to block the intrusion of external ions
  • the function of the first nitrogen-containing silicon compound layer on the backside is the blocking layer and the light absorbing layer under the high refractive index
  • the second The dinitrogen-containing silicon compound layer functions as a light absorbing layer at a low refractive index.
  • the backside silicon oxide layer and the backside first nitrogen-containing silicon compound layer are the most critical structures to solve the PID on the backside of the double-sided PERC cell.
  • the inventors found that it is very critical to prevent the enrichment and erosion of Na + ions in the component glass after precipitation, especially for the exposed film layer on the back of the double-sided PERC cell.
  • the compactness and electrical properties of the film layer can effectively slow down the PID phenomenon on the backside.
  • the front side can effectively block the corrosion of Na + ions, and the back side can effectively slow down the enrichment polarization phenomenon and corrosion of Na + ions.
  • the inventor found the following problems through the establishment and analysis of the PID failure model of the double-sided PERC cell: (1) When the module is under negative bias, a large amount of Na+ ions will migrate out of the glass of the module, and the electric potential field 2) Part of Na + ions will penetrate into the vicinity of the PN junction area through the non-dense film gap on the front, causing damage to the PN junction area (PID-shunt), resulting in the failure of the battery’s power generation; 3 A part of Na + ions will migrate to the back of the battery through the gap between the cell and the cell at the module end, and accumulate in the passivation area, forming a harmful potential field (PID-polarization) on the back, causing the polarization on the back.
  • PID-polarization harmful potential field
  • the front first silicon oxide layer, the front second silicon oxide layer, the front third silicon oxide layer and the back silicon oxide layer are all SiO 2 layers.
  • the front first silicon oxide layer is a thermal silicon oxide layer.
  • the front second silicon oxide layer, the front third silicon oxide layer and the rear silicon oxide layer are electrodeposited silicon oxide layers.
  • the front first nitrogen-containing silicon compound layer and the rear first nitrogen-containing silicon compound layer are both SiN x1 layers, and x1 is independently 0.75-1.34, such as 0.75, 0.8, 0.9, 1.0 , 1.1, 1.2, 1.3 or 1.34 etc.
  • the front-side second nitrogen-containing silicon compound layer and the back-side second nitrogen-containing silicon compound layer are independently a SiN x2 /SiN x3 stacked structure stacked in a direction away from the silicon wafer or along a direction away from the silicon wafer.
  • the second nitrogen-containing silicon compound layer on the front side is a SiN x2 /SiN x3 /SiO x Ny stacked layer structure that is sequentially stacked along a direction away from the silicon wafer
  • the second nitrogen-containing silicon compound layer on the back side is a stacked structure.
  • the layers are a SiN x2 /SiN x3 stack structure stacked in sequence along a direction away from the silicon wafer.
  • the passivation layer is an aluminum oxide layer.
  • the double-sided solar cell further includes a silver electrode.
  • the silver electrode on one side of the N-type layer of the silicon wafer passes through the first silicon oxide layer on the front side, the second silicon oxide layer on the front side, the first nitrogen-containing silicon compound layer on the front side, and the second nitrogen-containing silicon compound layer on the front side. layer and a front third silicon oxide layer.
  • the silver electrode on one side of the P-type layer of the silicon wafer passes through the backside silicon oxide layer, the backside first nitrogen-containing silicon compound layer and the backside second nitrogen-containing silicon compound layer.
  • the refractive index of the second silicon oxide layer on the front side is above 1.4, for example, 1.4, 1.5, 1.6, or 1.7.
  • the thickness of the front second silicon oxide layer is more than 5 nm, for example, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm.
  • the film layer will not be dense enough, thereby affecting the blocking effect of the film layer on external ions.
  • the refractive index of the first nitrogen-containing silicon compound layer on the front side is above 2.0, for example, 2.0, 2.1, 2.2, 2.3, or 2.4.
  • the thickness of the first nitrogen-containing silicon compound layer on the front side is more than 15 nm, for example, 15 nm, 16 nm, 17 nm, 18 nm, or 19 nm.
  • the thickness of the first nitrogen-containing silicon compound layer on the front side is too low, the compactness of the film layer will be insufficient, thereby affecting the blocking effect of the film layer on the invading ions from the outside.
  • the refractive index of the front third silicon oxide layer is above 1.4, for example, 1.4, 1.5, 1.6, 1.7, or 1.8. In the present application, if the refractive index of the front-side third silicon oxide layer is too low, light absorption mismatch will be caused, which will eventually affect the photoelectric conversion efficiency of the solar cell.
  • the thickness of the front third silicon oxide layer is more than 5 nm, for example, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm. In the present application, if the thickness of the front-side third silicon oxide layer is too low, light absorption mismatch will be caused, which will eventually affect the photoelectric conversion efficiency of the solar cell.
  • the thickness of the passivation layer is more than 10 nm, for example, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, or 15 nm.
  • the thickness of the passivation layer is too thin, on the one hand, the passivation effect will be affected, and on the other hand, it will be more sensitive to the invasion and enrichment of external ions.
  • the refractive index of the backside silicon oxide layer is above 1.4, for example, 1.4, 1.5, 1.6, 1.7, or 1.8.
  • the thickness of the backside silicon oxide layer is more than 5 nm, for example, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, or 10 nm. If the thickness of the backside silicon oxide is too low, the compactness of the film layer will be poor, thereby affecting the blocking effect of the film layer on external ions.
  • the refractive index of the first nitrogen-containing silicon compound layer on the back surface is above 2.0, for example, 2.0, 2.1, 2.2, 2.3, 2.4, or 2.5.
  • the thickness of the first nitrogen-containing silicon compound layer on the backside is more than 10 nm, for example, 10 nm, 11 nm, 12 nm, 13 nm, 14 nm, or 15 nm. If the thickness of the first nitrogen-containing silicide layer on the backside is too low, the compactness of the film layer will be poor, thereby affecting the blocking effect of the film layer on external ions.
  • the present application can effectively resist the polarization phenomenon caused by the potential field effect generated when Na + ions are enriched on the backside.
  • the present application provides a method for preparing a double-sided solar cell according to the first aspect, the method comprising the steps of: growing a front-side first silicon oxide on the N-type layer side of a silicon wafer with a PN junction After the material layer, front-side growth and back-side growth are performed to obtain the double-sided solar cell; the front-side growth includes sequentially growing the front-side second silicon oxide layer, the front-side first nitrogen-containing silicon compound layer, and the front-side second nitrogen-containing silicon compound layer.
  • the growth on the back surface includes sequentially growing a passivation layer, a silicon oxide layer on the back surface, a first nitrogen-containing silicon compound layer on the back surface, and a second nitrogen-containing silicon compound layer on the back surface.
  • the preparation method provided by the present application has mature technology and simple process, and is suitable for industrialized large-scale production.
  • the method for growing the front-side second silicon oxide layer is a thermal oxidation method.
  • both the front-side growth and the back-side growth are plasma-enhanced chemical vapor deposition (PECVD) growth.
  • PECVD plasma-enhanced chemical vapor deposition
  • the advantages of using the PECVD method are: fast film formation, which is conducive to mass production; 2.
  • the gas flow rate and chemical bond ratio can be flexibly adjusted; 3.
  • the multi-layer film structure can be realized in the same furnace tube.
  • the preparation method further includes preparing the silver electrode after the front-side growth and the back-side growth.
  • the working gas includes nitrous oxide.
  • the method for growing the passivation layer includes: setting the temperature to 310-330°C, such as 310°C, 320°C or 330°C, etc., and setting the pressure to 1450-1550Pa, such as 1450Pa, 1480Pa, 1500Pa, 1520Pa or 1550Pa, etc., Pass in the working gas and the raw material gas of the passivation layer, constant temperature and pressure for 170-190s, 170s, 180s or 190s, etc., and then vacuumize for 45-55s, such as 45s, 50s or 55s, etc., set the temperature to 470-490°C, For example, 470°C, 480°C or 490°C, etc., the pressure is set to 850-950Pa, such as 850Pa, 900Pa or 950Pa, etc., and the working gas and ammonia gas are introduced, and the constant temperature and pressure are 9-11s, such as 9s, 10s or 11s, etc., After that,
  • the method for growing the backside silicon oxide layer includes: setting the temperature to 470-490°C, such as 470°C, 480°C or 490°C, and setting the pressure to 1450-1550Pa, such as 1450Pa, 1500Pa or 1550Pa, etc.
  • the working gas includes nitrous oxide.
  • the silicon feed gas includes silane.
  • the method for growing the first nitrogen-containing silicon compound layer on the back side includes: setting the temperature to 470-490°C, setting the pressure to 1650-1750Pa, such as 1650Pa, 1700Pa or 1750Pa, etc., feeding ammonia gas and silicon raw material gas, and keeping the temperature constant.
  • the constant pressure is 235-245s, such as 235s, 240s or 245s, etc., to obtain the first nitrogen-containing silicon compound layer on the back side.
  • the silicon feed gas includes silane.
  • the method for growing the second nitrogen-containing silicon compound layer on the back side includes: setting the temperature to 470-490°C, such as 470°C, 480°C or 490°C, and the like, and setting the pressure to 1650-1750Pa, such as 1650Pa, 1700Pa or 1750Pa, etc.
  • feed ammonia gas and silicon raw material gas, constant temperature and pressure for 125-135s, such as 125s, 130s or 135s, etc. then set the temperature to 470-490°C, such as 470°C, 480°C or 490°C, etc., and set the pressure to 1650 -1750Pa, such as 1650Pa, 1700Pa or 1750Pa, etc., reduce the feeding amount of silicon raw material gas, increase the feeding amount of ammonia gas, constant temperature and pressure 125-135s, such as 125s, 130s or 135s, etc., to obtain the second nitrogen-containing silicon on the back compound.
  • the silicon feed gas includes silane.
  • the backside growth further includes: after growing the second nitrogen-containing silicon compound layer on the backside, vacuuming and filling with protective gas to return to normal pressure, and taking out the product.
  • the silicon wafer with PN and on which the front-side first silicon oxide layer is grown is placed in plasma enhanced chemical vapor deposition In the furnace, vacuumize, pick up leaks, vacuumize again, pass in the working gas and silicon raw material gas, and set the temperature of the reactor to 490-510 °C, such as 490 °C, 500 °C or 510 °C, etc., and the pressure is set to 195 -205Pa, such as 195Pa, 200Pa or 205Pa, etc., constant temperature and pressure 15-25s, such as 15s, 20s or 25s, etc.
  • the working gas includes nitrous oxide.
  • the silicon feed gas includes silane.
  • the method for growing the second silicon oxide layer on the front side includes: setting the temperature to 490-510°C, such as 490°C, 500°C or 510°C, and the like, and setting the pressure to 195-205Pa, such as 195Pa, 200Pa or 205Pa, etc., Pour in working gas and silicon raw material gas, constant temperature and pressure for 75-85s, such as 75s, 80s or 85s, etc., and then vacuumize for 15-25s, such as 15s, 20s or 25s, etc., set the temperature to 490-510°C, such as 490 °C, 500 °C or 510 °C, etc., the pressure is set to 225-235Pa, such as 225Pa, 230Pa or 235Pa, etc., feed silicon raw material gas and ammonia gas, constant temperature and pressure for 15-25s, such as 15s, 20s or 25s, etc., get A second silicon oxide layer on the front side.
  • the working gas includes nitrous oxide
  • the method for growing the first nitrogen-containing silicon compound layer on the front side includes: setting the temperature to 490-510°C, such as 490°C, 500°C, or 510°C, and the like, and setting the pressure to 225-235Pa, such as 225Pa, 230Pa, or 235Pa, etc. , feeding ammonia gas and silicon raw material gas, constant temperature and pressure for 60-70s, such as 60s, 65s or 70s, etc., to obtain the first nitrogen-containing silicon compound layer on the front.
  • the silicon feed gas includes silane.
  • the method for growing the second nitrogen-containing silicon compound layer on the front side includes: setting the temperature to 490-510°C, such as 490°C, 500°C or 510°C, and the like, and setting the pressure to 225-235Pa, such as 225Pa, 230Pa, or 235Pa, etc.
  • feed ammonia gas and silicon raw material gas, constant temperature and pressure for 155-165s, such as 155s, 160s or 165s, etc. then set the temperature to 490-510°C, such as 490°C, 500°C or 510°C, etc., and set the pressure to 225 -235Pa, such as 225Pa, 230Pa or 235Pa, etc., reduce the feeding amount of silicon raw material gas, increase the feeding amount of ammonia gas, constant temperature and pressure for 240-260s, such as 240s, 250s or 260s, etc., then the temperature is set to 490-510 °C, such as 490 °C, 500 °C or 510 °C, etc., the pressure is set to 185-195Pa, such as 185Pa, 190Pa or 195Pa, etc., feed silicon raw material gas, ammonia gas and working gas, constant temperature and pressure 155-165s, such as 155s, 160s or 160s, etc.
  • the method for growing the front third silicon oxide layer includes: setting the temperature to 490-510°C, such as 490°C, 500°C or 510°C, etc., and setting the pressure to 175-185Pa, such as 175Pa, 180Pa or 185Pa, etc., Pass in the working gas and the silicon raw material gas, and keep the constant temperature and pressure for 175-185s, such as 175s, 180s or 185s.
  • the working gas includes nitrous oxide.
  • the silicon feed gas includes silane.
  • the front-side growth further includes: after growing the front-side third silicon oxide layer, vacuuming, cleaning the furnace tube, vacuuming and returning to normal pressure again, and taking out the product.
  • the method comprises the following steps:
  • the front side growth includes: The second silicon oxide layer on the front side, the first nitrogen-containing silicon compound layer on the front side, the second nitrogen-containing silicon compound layer on the front side, and the third silicon oxide layer on the front side are grown in sequence; a material layer, a first nitrogen-containing silicon compound layer on the backside, and a second nitrogen-containing silicon compound layer on the backside;
  • the front growth and the back growth are both plasma enhanced chemical vapor deposition growth;
  • the method for growing the passivation layer includes: setting the temperature to 310-330° C., the pressure to 1450-1550 Pa, and feeding the working gas and the raw material gas of the passivation layer , constant temperature and pressure for 170-190s, then vacuumize for 45-55s, set the temperature to 470-490°C, set the pressure to 850-950Pa, pass in the working gas and ammonia gas, the constant temperature and pressure for 9-11s, and then keep The temperature, pressure, working gas and ammonia gas supply amount are maintained for 340-360s to obtain a passivation layer;
  • the method for growing the backside silicon oxide layer includes: the temperature is set to 470-490°C, the pressure is set to 1450-1550Pa, and the working Gas and silicon raw material gas, constant temperature and constant pressure for 75-85s, then vacuumize for 290-310s, set the temperature to 470-490 °C, and set the pressure to 1600-18
  • the method for growing the second nitrogen-containing silicon compound layer on the front side includes: setting the temperature to 490-510°C, setting the pressure to 225-235Pa, feeding ammonia gas and silicon raw material gas, constant temperature and pressure for 155-165s, and then adding The temperature is set to 490-510°C, the pressure is set to 225-235Pa, the amount of silicon raw material gas is reduced, the amount of ammonia gas is increased, the constant temperature and pressure are set for 240-260s, and then the temperature is set to 490-510°C, and the pressure is set to For 185-195Pa, feed silicon raw material gas, ammonia gas and working gas, constant temperature and pressure for 155-165s, then vacuumize, and then feed silicon raw material gas and working gas , the temperature is set to 490-510°C, the pressure is set to 175-185Pa, the constant temperature and pressure are set to 6-15s, and the second nitrogen-containing silicon compound layer on the front side is obtained; the method for growing the third silicon oxide layer on the
  • This application provides an inventive solution for effectively solving the anti-PID failure of double-sided PERC battery through the establishment and analysis of the PID failure model under the premise of considering safety without adding additional capital investment on the existing equipment.
  • the bifacial solar cell provided by this application adopts a special film structure design (including the multi-layer design of the front film layer and the multi-layer design of the back film layer, wherein the back side silicon oxide layer and the back side first nitrogen-containing silicon compound layer are the solution to the problem.
  • the most critical structure of the PID on the back of the double-sided PERC cell strengthens the compactness and electrical properties of the comprehensive film layer, and can effectively slow down the generation of the PID phenomenon on the back.
  • the preparation method of the present application is simple to operate, has a short process flow, and is easy to realize industrialized large-scale production.
  • Fig.1 PID failure EL image of double-sided cell-dual glass module under -1500V bias in laboratory
  • Example 3 is a schematic structural diagram of the double-sided solar cell provided in Example 1, wherein 1- silicon wafer with PN junction, 2- passivation layer, 3- backside silicon oxide layer, 4-backside first nitrogen-containing silicon Compound layer, 5-backside second nitrogen-containing silicon compound layer, 6-frontside first silicon oxide layer, 7-frontside second silicon oxide layer, 8-frontside first nitrogen-containing silicon compound layer, 9-frontside second Nitrogen-containing silicon compound layer, 10-front third silicon oxide layer;
  • Example 4 is a schematic flowchart of a method for preparing a double-sided solar cell provided in Example 1;
  • Figure 5(A) is the initial EL picture of the double-sided solar cell single-glass module provided by Example 1 in one test;
  • Figure 5(B) is the sample 1# in the double-sided solar cell single-glass module provided by Example 1.
  • Figure 5(C) is the EL picture of Sample 1# in the double-sided solar cell single glass module provided by Example 1 after 192h PID;
  • Figure 5(D) is the double-sided solar cell provided by Example 1.
  • Figure 6(A) is the initial EL picture of Sample 2# in the double-sided solar cell single glass module provided by Example 1;
  • Figure 6(B) is the sample 2# in the double-sided solar cell single glass module provided by Example 1
  • Figure 6(C) is the EL picture of Sample 2# in the double-sided solar cell single glass module provided by Example 1 after 192h PID;
  • Figure 6(D) is the double-sided solar cell provided by Example 1.
  • Figure 7(A) is the initial EL picture of the double-sided solar cell double-glass module provided by Example 1;
  • Figure 7(B) is the EL picture of the double-sided solar cell double-glass module provided by Example 1 after 96h PID;
  • Figure 7 (C) is the EL picture of the double-sided solar cell double-glass module provided by Example 1 through 192h PID;
  • Figure 7 (D) is the EL picture of the double-sided solar cell double-glass module provided by Example 1 through 288h PID.
  • This embodiment provides a double-sided solar cell.
  • the structure of the solar cell is shown in FIG. 3 .
  • the double-sided solar cell includes: a silicon wafer 1 with a PN junction, which is located at the bottom of the silicon wafer 1 with a PN junction.
  • a first front silicon oxide layer 6 , a front second silicon oxide layer 7 , a first nitrogen-containing silicon compound layer 8 on the front side, and a front side second nitrogen-containing silicon compound layer on the N-type layer side and in the direction away from the silicon wafer are sequentially stacked
  • the silicon compound layer 9 and the front third silicon oxide layer 10; the passivation layer 2 and the backside silicon oxide which are located on the P-type layer side of the silicon wafer 1 with the PN junction and are stacked in sequence along the direction away from the silicon wafer Layer 3 , the first nitrogen-containing silicon compound layer 4 on the back and the second nitrogen-containing silicon compound layer 5 on the back.
  • the double-sided solar cell also includes a silver electrode, and the silver electrode on the N-type layer side of the silicon wafer 1 with PN junction passes through the first silicon oxide layer on the front side, the second silicon oxide layer on the front side, and the first silicon oxide layer on the front side.
  • the nitrogen-containing silicon compound layer, the second nitrogen-containing silicon compound layer on the front and the third silicon oxide layer on the front; the silver electrode on the P-type layer side of the silicon wafer 1 with PN junction passes through the silicon oxide layer on the back, the third silicon oxide layer on the back.
  • the front first silicon oxide layer 6, the front second silicon oxide layer 7, the front third silicon oxide layer 10 and the back silicon oxide layer 3 are all SiO2 layers;
  • the oxide layer 6 is a thermal silicon oxide layer, and the front second silicon oxide layer 7 , the front third silicon oxide layer 10 and the rear silicon oxide layer 3 are electrodeposited silicon oxide layers.
  • the refractive index of the second silicon oxide layer 7 on the front is 1.45 and the thickness is 6 nm; the refractive index of the first nitrogen-containing silicon compound layer 8 on the front is 2.2 and the thickness is 20 nm;
  • the refractive index of the tri-silicon oxide layer 10 is 1.4 and the thickness is 5; the thickness of the passivation layer 2 is 10 nm; the refractive index of the rear silicon oxide layer 3 is 1.45 and the thickness is 12 nm;
  • the refractive index is 2.2 and the thickness is 15nm.
  • This embodiment also provides a method for preparing the double-sided solar cell, the specific steps of which are as follows: the P-type gallium-doped silicon wafer is subjected to front-end processing (texturing, HF/HCl mixed acid cleaning, diffusion, front-side laser doping SE ), obtain a silicon wafer with PN junction, grow the first front silicon oxide layer on the N-type layer side of the silicon wafer with PN junction by thermal oxidation, and then perform front growth and back growth, and laser groove on the back , screen printing silver electrodes and sintering to obtain the double-sided solar cell.
  • front-end processing texturing, HF/HCl mixed acid cleaning, diffusion, front-side laser doping SE
  • front-end processing texturing, HF/HCl mixed acid cleaning, diffusion, front-side laser doping SE
  • obtain a silicon wafer with PN junction grow the first front silicon oxide layer on the N-type layer side of the silicon wafer with PN junction by thermal oxidation, and then perform front growth and back growth, and laser
  • the method of backside growth includes:
  • step 2 the mechanical arm is pulled out from the furnace tube, and the furnace tube is closed, and the temperature is set to 320 ° C at the same time, and the vacuum test, leak detection and pressure maintenance test are carried out;
  • Step 4 enter the alumina deposition stage, the time is set to 180s, the temperature is set to 320°C, the pressure is set to 1500pa, the flow rate of nitrous oxide is 5800sccm, the opening of trimethylaluminum TMA is 75%, the radio frequency power is is 7000W, and the pulse switching ratio is 20/1000;
  • Step (7) carry out the activation pretreatment process of alumina, that is, carry out partial ion implantation of H passivation to the alumina grown in step (4), the time is set to 350s, the temperature is set to 480°C, and the pressure is set to It is 900pa, the flow of ammonia gas is 2500sccm, the flow of nitrous oxide is 2500sccm, the radio frequency power is 3500W, and the pulse switch ratio is 30/120;
  • step vacuumize to evacuate the gas remaining in the reaction, the time is set to 300s, the temperature is set to 480°C, and the pressure is set to 0pa;
  • step 10 enter the third constant temperature and constant pressure stage, the time is set to 10s, the temperature is set to 480 °C, the pressure is set to 1700pa, the flow rate of silane is passed into 1250sccm, and the flow of ammonia gas is passed into 4880sccm;
  • (11) step enter the growth stage of the first layer of high-refractive-index SiN x1 layer, the time is set to 240s, the temperature is set to 480°C, the pressure is set to 1700pa, the flow rate of silane is 1250sccm, and the flow rate of ammonia gas is 4880sccm, The RF power is 13000W, and the pulse switching ratio is 50/700;
  • Step 3 enter the growth stage of the third SiN x3 layer, the time is set to 130s, the temperature is set to 480°C, the pressure is set to 1700pa, the flow rate of silane is 600sccm, the flow rate of ammonia gas is 6500sccm, and the radio frequency power is 13000W, the pulse switch ratio is 50/600;
  • the method of frontal growth includes:
  • Step 10 deposition of the second SiN x2 layer, the time is set to 160s, the temperature is set to 500°C, the pressure is set to 230pa, the flow rate of silane is 1000sccm, the flow rate of ammonia gas is 12000sccm, and the radio frequency power is 17500W , the pulse switching ratio is 5/80;
  • the pulse switching ratio is 5/150;
  • the double-sided solar cell provided in this embodiment is prepared into a double-sided PERC cell-single glass module, which has a structure of front glass/front EVA/cell/back white EVA/white back sheet.
  • Figures 5(A) to 5(D) are the EL pictures of 1# at different times (EL refers to Electroluminescenc, that is, electroluminescence), and Figures 6(A) to 6(D) are respectively the pictures of 2# at different times.
  • EL refers to Electroluminescenc, that is, electroluminescence
  • Figures 6(A) to 6(D) are respectively the pictures of 2# at different times.
  • the EL pictures at different times can be seen from the above figures, from the initial test to 288h, no obvious battery failure dark film is seen in the EL pictures.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-double-glass module, the structure of which is front glass/high-transparency EVA/cell/transparent POE/back glass.
  • the sample (3#) was taken out of the above-mentioned double-glass module for PID test, and the bias voltage of PID test was -1500V.
  • the test results are shown in the table below.
  • the criteria for judging qualified are that the PID 96h peak power attenuation does not exceed 3%, and the PID 192h and 288h peak power attenuation does not exceed 5%.
  • the power attenuation of the double-glass module can still be maintained at around 1.0% after 288h of -1500V bias test.
  • Figures 7(A) to 7(D) are the EL pictures of 3# at different times. It can be seen from the above pictures that from the initial test to 288h, there is no obvious battery failure dark film in the EL pictures.
  • the structure and material types of the bifacial solar cell provided in this embodiment are the same as those in Embodiment 1.
  • the specific thickness parameters of the bifacial solar cell provided in this embodiment are: the refractive index of the second silicon oxide layer 7 on the front side is 1.43, and the thickness The refractive index of the first nitrogen-containing silicon compound layer 8 on the front side is 2.1 and the thickness is 23nm; the refractive index of the third silicon oxide layer 10 on the front side is 1.4 and the thickness is 8; the thickness of the passivation layer 2 is 12nm; The refractive index of the silicon oxide layer 3 is 1.485, and the thickness is 12 nm; the refractive index of the first nitrogen-containing silicon compound layer 4 on the back surface is 2.3, and the thickness is 18 nm.
  • the method of backside growth includes:
  • step 2 the mechanical arm is pulled out from the furnace tube, and the furnace tube is closed, and the temperature is set to 310 ° C, and the vacuum test, leak detection, and pressure maintenance test are carried out;
  • Step 4 enter the alumina deposition stage, the time is set to 170s, the temperature is set to 310°C, the pressure is set to 1450pa, the flow rate of nitrous oxide is 5800sccm, the opening of trimethylaluminum TMA is 75%, the radio frequency power is is 7000W, and the pulse switching ratio is 20/1000;
  • step (7) carry out the activation pretreatment process of alumina, that is, carry out partial ion implantation of H passivation to the alumina grown in step (4), the time is set to 340s, the temperature is set to 470°C, and the pressure is set to It is 850pa, the flow of ammonia gas is 2500sccm, the flow of nitrous oxide is 2500sccm, the radio frequency power is 3500W, and the pulse switch ratio is 30/120;
  • step vacuumize to evacuate the gas remaining in the reaction, the time is set to 290s, the temperature is set to 470°C, and the pressure is set to 0pa;
  • step 10 enter the third constant temperature and constant pressure stage, the time is set to 9s, the temperature is set to 470 °C, the pressure is set to 1650pa, the flow of silane is passed into 1250sccm, and the flow of ammonia gas is passed into 4880sccm;
  • Step 3 enter the growth stage of the third SiN x3 layer, the time is set to 125s, the temperature is set to 470°C, the pressure is set to 1650pa, the flow rate of silane is 600sccm, the flow rate of ammonia gas is 6500sccm, and the radio frequency power is 13000W, the pulse switch ratio is 50/600;
  • the method of frontal growth includes:
  • Step 10 deposition of the second SiN x2 layer, the time is set to 155s, the temperature is set to 490°C, the pressure is set to 225pa, the flow rate of silane is 1000sccm, the flow rate of ammonia gas is 12000sccm, and the radio frequency power is 17500W , the pulse switching ratio is 5/80;
  • the pulse switching ratio is 5/150;
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the structure and material types of the bifacial solar cell provided in this embodiment are the same as those in Embodiment 1.
  • the specific thickness parameters of the bifacial solar cell provided in this embodiment are: the refractive index of the second silicon oxide layer 7 on the front side is 1.48, and the thickness The refractive index of the first nitrogen-containing silicon compound layer 8 on the front side is 2.4 and the thickness is 20nm; the refractive index of the third silicon oxide layer 10 on the front side is 1.42 and the thickness is 8nm; the thickness of the passivation layer 2 is 15nm; The refractive index of the silicon oxide layer 3 is 1.48 and the thickness is 15 nm; the refractive index of the first nitrogen-containing silicon compound layer 4 on the back surface is 2.4 and the thickness is 20 nm.
  • the method of backside growth includes:
  • Step 2 the mechanical arm is pulled out from the furnace tube, and the furnace tube is closed, and the temperature is set to 330 ° C at the same time, and the vacuum test, leak detection and pressure maintenance test are carried out;
  • Step 4 enter the alumina deposition stage, the time is set to 190s, the temperature is set to 330°C, the pressure is set to 1550pa, the flow rate of nitrous oxide is 5800sccm, the opening of trimethylaluminum TMA is 75%, the radio frequency power is is 7000W, and the pulse switching ratio is 20/1000;
  • Step (7) carry out the activation pretreatment process of alumina, that is, carry out partial ion implantation of H passivation to the alumina grown in step (4), the time is set to 360s, the temperature is set to 490°C, and the pressure is set to It is 950pa, the flow of ammonia gas is 2500sccm, the flow of nitrous oxide is 2500sccm, the radio frequency power is 3500W, and the pulse switch ratio is 30/120;
  • step vacuumize to evacuate the gas remaining in the reaction, the time is set to 300s, the temperature is set to 490°C, and the pressure is set to 0pa;
  • step 10 enter the third constant temperature and constant pressure stage, the time is set to 11s, the temperature is set to 490 °C, the pressure is set to 1800pa, the flow of silane is passed into 1250sccm, and the flow of ammonia gas is passed into 4880sccm;
  • (11) step enter the growth stage of the first layer of high-refractive-index SiN x1 layer, the time is set to 245s, the temperature is set to 490°C, the pressure is set to 1750pa, the flow rate of silane is 1250sccm, and the flow rate of ammonia gas is 4880sccm, The RF power is 13000W, and the pulse switching ratio is 50/700;
  • Step 3 enter the growth stage of the third SiN x3 layer, the time is set to 135s, the temperature is set to 490°C, the pressure is set to 1750pa, the flow rate of silane is 600sccm, the flow rate of ammonia gas is 6500sccm, and the radio frequency power is 13000W, the pulse switch ratio is 50/600;
  • the method of frontal growth includes:
  • Step 4 vacuumize, and quickly vacuumize the furnace tube again, the time is set to 20s, the temperature is set to 510°C, and the pressure is 0pa;
  • Step 10 deposition of the second SiN x2 layer, the time is set to 165s, the temperature is set to 510°C, the pressure is set to 235pa, the flow rate of silane is 1000sccm, the flow rate of ammonia gas is 12000sccm, and the radio frequency power is 17500W , the pulse switching ratio is 5/80;
  • the pulse switching ratio is 5/150;
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the difference between the double-sided solar cell provided in this embodiment and Embodiment 1 is only that the refractive index of the backside silicon oxide layer 3 is 1.2.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the difference between the double-sided solar cell provided in this embodiment and the embodiment 1 is only that the thickness of the backside silicon oxide layer 3 is 4 nm.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1. The test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the difference between the double-sided solar cell provided in this embodiment and Embodiment 1 is only that the refractive index of the first nitrogen-containing silicon compound layer 4 on the back side is 1.8.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the difference between the double-sided solar cell provided in this embodiment and Embodiment 1 is only that the thickness of the first nitrogen-containing silicon compound layer 4 on the back side is 4 nm.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this comparative example differs from Example 1 only in that the backside silicon oxide layer 3 is not included.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the difference between the double-sided solar cell provided in this comparative example and Example 1 is only that the backside first nitrogen-containing silicon compound layer 4 is not included.
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-single glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1.
  • the test results are as follows:
  • the double-sided solar cell provided in this example is prepared into a double-sided PERC cell-dual glass module according to the method of Example 1, and the PID test is carried out with this module according to the method of Example 1, and the test results are as follows:
  • the double-sided solar cells provided in Examples 1-3 adopt a special film structure design (including the multi-layer design of the front film layer and the multi-layer design of the back film layer, wherein the backside silicon
  • the oxide layer and the first nitrogen-containing silicon compound layer on the back are the most critical structures to solve the PID on the back of the double-sided PERC cell), which strengthens the compactness and electrical properties of the comprehensive film layer, which can effectively slow down the generation of the PID phenomenon on the back.
  • Example 4 because the refractive index of the backside silicon oxide layer 3 is relatively low, the film layer is not dense enough, which causes Na + ions to damage the backside passivation layer.
  • Example 5 the thickness of the backside silicon oxide layer 3 is relatively low, resulting in a thin film layer, which is likely to cause damage to the backside passivation layer by Na + ions.
  • Example 6 because the refractive index of the first nitrogen-containing silicon compound layer 4 on the back side is relatively low, the film layer is not dense enough, which causes Na + ions to damage the backside passivation layer.
  • Example 7 the thickness of the first nitrogen-containing silicon compound layer 4 on the backside is relatively low, resulting in a thin film layer, which is likely to cause damage to the backside passivation layer by Na + ions.
  • Comparative Example 1 does not contain the backside silicon oxide layer 3, resulting in no protective film layer blocking, resulting in the destruction of the backside passivation layer by Na + ions.
  • the present application illustrates the detailed method of the present application through the above-mentioned embodiments, but the present application is not limited to the above-mentioned detailed method, which does not mean that the present application must rely on the above-mentioned detailed method for implementation.

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Abstract

本文公开了一种双面太阳能电池及其制备方法。所述双面太阳能电池包括：带有PN结的硅片，位于硅片N型层一侧且沿着远离硅片的方向依次层叠的正面第一硅氧化物层、正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；位于硅片P型层一侧且沿着远离硅片的方向依次层叠的钝化层、背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。

Description

一种双面太阳能电池及其制备方法 技术领域
本申请属于太阳能电池技术领域，涉及一种双面太阳能电池及其制备方法。
背景技术
近年来倍受关注的由于组件的电位诱发衰减(Potential Induced Degradation，简记为PID)现象引起的光伏系统发电量下降的问题越来越多的受到人们的关注。该现象最早是由Sunpower公司在2005年发现，PID是指组件长期在高电压作用下使得玻璃、封装材料之间存在漏电流，导致组件性能低于设计标准。2010年，美国可再生能源实验室(NREL)和Solon公司研究发现采用P型晶体硅电池片所制备的组件在负偏压下都有潜在的PID现象。
一些光伏电站实际经历表明，光伏发电系统的系统电压存在对晶体硅电池组件有持续的“电位诱发衰减”效用，产生原因主要为玻璃上Na +离子在高电压的影响下迁移至电池表面，从而造成组件功率快速下降。近年来PID现象，已经成为影响电站质量的重要因素之一，严重时候它可以引起一块组件功率衰减50％以上，从而影响整个电站的功率输出，使电站投资商损失惨重，因此组件的PID现象越来越受到光伏行业的重视。近两年双面发电组件由于可以大幅提升电站投资商收益，所以得到了大规模发展及应用。双面组件的PID问题得到了业界的广泛重视。
PERC双面电池背面的钝化膜AlO x/Si界面具有较高的负电荷密度，形成了良好的场钝化效果。在高温高湿环境下，玻璃中会析出Na +离子。在正电压作用下，电池片呈高电势，边框呈低电势，Na +离子会流出电池片，不会在电池片表面富集。在负电压下，电池片呈低电势，边框呈高电势，Na +离子会穿过封装材料到达电池片表面。背面Na +离子的富集，形成额外的场效应，引起AlOx钝化膜中电荷进行重新分布，导致场钝化效果的降低。结果表明，如图1所示，电池片的背钝化效果恶化，组件功率明显衰减；越靠近组件边框，电池受到的电势越大，Na +离子迁移率越高，因此边框周围的电池片发生PID衰减的概率更大。
CN106876490A公开了一种高转化效率抗PID的N型晶体硅双面电池，在N型硅衬底的正面依次形成P+层、氧化硅层、氧化铝层和金属电极，在N型硅衬底的背面依次形成N+层、氮化硅层和金属电极，其中：在正面金属化区域下方存在一层20nm以上的致密氧化硅层。CN110137309A公开的技术方案是(1)明确生长氧化层的条件；(2)使用原子层沉积法进行背面氧化铝镀膜工艺时，确保背面氧化铝厚度为2-10nm；(3)双面PERC电池氧化铝镀膜工艺后，进行背面氮化硅镀膜工艺，确保双面PERC电池背面氮化硅镀膜厚度80-110nm，折射率2.12-2.3；(4)双面PERC电池经背面氮化硅镀膜工艺后，进行正面氮化硅镀膜工艺、背面激光开槽工艺、丝网印刷工艺，即可检测分选，完成制备。CN209119114U提供了一种抗PID双面电池，包括硅基体、分别设置在所述硅基体两侧表面的正表面膜与背表面膜，所述正表面膜包括层叠设置的正面减反射 膜与正面介质膜；所述背表面膜包括背面减反射膜与背面介质膜。本实用新型抗PID双面电池通过正面介质膜与背面介质膜能够有效阻挡离子迁移，降低电势诱导衰减，提升转换效率。(1)正面介质膜与背面介质膜均设置为氧化硅膜；(2)正面介质膜与背面介质膜的折射率均为1.4～1.7；(3)正面介质膜与背面介质膜的厚度均设置为1～10nm；(4)背表面膜还包括氧化铝膜，且所述背面介质膜、氧化铝膜与背面减反射膜沿背离所述硅基体的方向依次层叠设置；(5)正面减反射膜、背面减反射膜均设置为SiNx膜或SiOxNy膜中的任一种。
CN207602585U公开了一种抗PID的双面电池组件封装结构，包括玻璃、EVA膜、双面电池、EVA膜和背板；该双面电池组件封装结构分为单玻结构和双玻结构；单玻结构由上至下结构依次为：玻璃、EVA膜、双面电池、EVA膜和背板；双玻结构由上至下结构依次为：玻璃、EVA膜、双面电池、EVA膜和玻璃；背板包括高阻水层、阻水层和保护层；从上至下依次为高阻水层、阻水层和保护层。CN207624714U公开了一种抗PID双面电池单玻封装结构，包括玻璃、第一封装胶膜、双面电池、第二封装胶膜和背板；玻璃、第一封装胶膜、双面电池、第二封装胶膜和背板从上到下依次连接；背板为三层结构，从上到下依次为掺杂二氧化钛的聚烯烃材料、电气绝缘及阻氧层和保护层；三层结构从上到下依次连接；第一封装胶膜为三层结构，从上到下依次为粘结层、阻隔层、粘结层，第二封装胶膜为两层结构，从上到下依次为粘结层和阻隔层。CN109087956A介绍了一种新型的双面PERC电池结构及其制备工艺，所述电池的正面与背面钝化层结构对称，极大降低了双面电池的翘曲度，提升组件的机械载荷强度；叠层钝化结构在保证电池抗PID性能的基础上，采用了独特的表面钝化层沉积工艺，最佳化正面和背面光学(减反射效果)和电学(提升氢钝化效果)性能，实现电池正面转换效率、双面率和抗LID效果的改善与提升；同时，该发明所采用的双面PERC电池工艺，正面和背面的SiO2和AlOx层分别通过热氧化和ALD同时形成，正面和背面的SiNx/SiNy/SiOxNy/SiOx叠层分别通过PECVD沉积形成，正面和背面的沉积次序可调整。
但是几种抗PID的方案中，存在如下缺点：针对CN106876490A中所描述，该方案首先是针对N型电池所描述，应用范围有局限性；其次，该解决方案仅仅是增加一层20nm以上的致密氧化硅层，无法有效解决电势场效应。针对CN110137309A中所描述，该方案仅仅是针对双面电池结构进行了说明，正面结构依次为SiN x层和氧化硅层，背面结构依次为氧化铝层和SiN x膜层结构，这种工艺结构方案背面存在明显的缺陷，无法有效阻挡离子的富集或者侵入，容易形成双面PERC电池的抗PID失效。针对CN209119114U中所描述，该方案明确了靠近硅基体的介质层为氧化硅层，并明确了折射率和厚度，但背面膜层结构说明依次为背面介质膜、氧化铝膜与背面减反射膜沿背离所述硅基体的方向依次层叠设置，这个结构存在部分膜层缺陷，无法有效阻挡表面离子的富集，产生的电势场效应。针对CN207602585U中所描述，该实用新型发明方案，仅仅是提供了组件封装端，针对双面PERC电池封装成单玻组件和双面组件，所 用到的封装材料设计和说明，以达到抗PID的效果，并没有就双面PERC电池端进行相应的改善说明。针对CN207624714U中所描述，该实用新型发明方案，重点介绍了双面PERC电池在单玻组件封装中，所使用到的组件封装材料对抗PID的改善，并没有就双面PERC电池端进行相应的改善说明。针对CN109087956A中所描述，该发明专利侧重点说明的是双面的PERC电池结构和针对该双面电池结构进行了膜层的详细说明介绍；该发明专利首先，并没有针对PID的问题进行研究和保护说明，也没有任何数据的支持和体现；其次，该双面PERC电池的膜层结构虽和本申请有一些类似，但存在明显的膜层结构缺陷，主要是该膜层结构中的背面膜层为SiO 2/AlOx/SiNx/SiNy/SiOxNy/SiOx叠层结构，其中背面的PID失效机理，其中有一点是Na +离子对背面膜层的侵蚀，从而导致了AlO x钝化层的失效，而SiO 2膜是非常有效，可阻挡Na +离子对AlO x钝化层的破坏影响，但是CN109087956A的方案中把该关键SiO 2膜层放在靠近Si基体的一层，这明显是不符合抗PID膜层结构设计的。
发明内容
本申请的目的在于提供一种双面太阳能电池及其制备方法。本申请提供的双面太阳能电池采用特殊的膜层结构设计，加强综合膜层的致密性和电学特性，能非常有效的减缓背面PID现象的产生。
为达此目的，本申请采用以下技术方案：
第一方面，本申请提供一种双面太阳能电池，所述双面太阳能电池包括：带有PN结的硅片，位于所述硅片N型层一侧且沿着远离所述硅片的方向依次层叠的正面第一硅氧化物层、正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；位于所述硅片P型层一侧且沿着远离所述硅片的方向依次层叠的钝化层、背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。
本申请提供发的双面太阳能电池中，正面第一硅氧化物层的作用为界面钝化层，正面第二硅氧化物层的作用为正面阻挡层，正面第一含氮硅化合物层的作用为高折射率下的阻挡层和光吸收层，正面第二含氮硅化合物层的作用为为中间折射率下的光吸收层，正面第三硅氧化物层的作用为为低折射率下的光吸收层。钝化层的作用为提高背界面的钝化，背面硅氧化物层的作用为阻挡外界离子侵入，背面第一含氮硅化合物层的作用为高折射率下的阻挡层和光吸收层，背面第二含氮硅化合物层的作用为低折射率下的光吸收层。背面硅氧化物层和背面第一含氮硅化合物层是解决双面PERC电池背面PID最关键的结构。通过研究发明人发现，如何阻挡组件玻璃中Na +离子析出后的富集和侵蚀是非常关键的，尤其是对双面PERC电池的背面裸露膜层来说，通过膜层的结构优化，加强综合膜层的致密性和电学特性，能非常有效的减缓背面PID现象的产生。
因此，通过本申请的膜层结构的优化，正面可以有效阻挡Na +离子的侵蚀，背面可以有效减缓Na +离子的富集极化现象和侵蚀。
如图2所示，发明人通过对双面PERC电池PID失效模型的建立和分析， 发现如下问题：①当组件处于负偏压下，组件玻璃中会有大量的Na+离子迁移出来，通过电势场的作用，向电池附近移动；②一部分的Na +离子会通过正面不致密的膜层间隙，侵入到PN结区附近，造成PN结区的破坏(PID-shunt)，导致电池的发电失效；③一部分的Na +离子会通过组件端电池与电池间的缝隙，迁移到电池的背面，并且在钝化区域富集起来，形成背面的有害电势场(PID-polarization)，造成背面的极化现象。
以下作为本申请可选的技术方案，但不作为对本申请技术方案的限制，通过以下可选的技术方案，可以更好的达到和实现本申请的技术目的和有益效果。
作为本申请可选的技术方案，所述正面第一硅氧化物层、正面第二硅氧化物层、正面第三硅氧化物层和背面硅氧化物层均为SiO 2层。可选地，所述正面第一硅氧化物层为热氧化硅层。可选地，所述正面第二硅氧化物层、正面第三硅氧化物层和背面硅氧化物层为电沉积氧化硅层。
作为本申请可选的技术方案，所述正面第一含氮硅化合物层和背面第一含氮硅化合物层均为SiN x1层，x1独立地为0.75-1.34，例如0.75、0.8、0.9、1.0、1.1、1.2、1.3或1.34等。
可选地，所述正面第二含氮硅化合物层和背面第二含氮硅化合物层独立地为沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3叠层结构或沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3/SiO xN y叠层结构，其中x2为0.75-1.34，例如0.75、0.8、0.9、1.0、1.1、1.2、1.3或1.34等；x3为0.75-1.34，例如0.75、0.8、0.9、1.0、1.1、1.2、1.3或1.34等；x为1-2，例如1、1.5或2等，y为1-2，例如1、1.5或2等，x1>x2>x3。
可选地，所述正面第二含氮硅化合物层为沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3/SiO xN y叠层结构，所述背面第二含氮硅化合物层为沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3叠层结构。
可选地，所述钝化层为氧化铝层。
可选地，所述双面太阳能电池中还包含银电极。可选地，所述硅片N型层一侧的银电极穿过正面第一硅氧化物层、正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层。可选地，所述硅片P型层一侧的银电极穿过背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。
作为本申请可选的技术方案，所述正面第二硅氧化物层的折射率在1.4以上，例如1.4、1.5、1.6或1.7等。本申请中，如果正面第二硅氧化物层的折射率过低，会导致该正面第二硅氧化物层的膜层致密性不好，从而影响膜层对外界离子的阻挡作用。可选地，所述正面第二硅氧化物层的厚度在5nm以上，例如5nm、6nm、7nm、8nm、9nm或10nm等。本申请中，如果正面第二硅氧化物层的厚度过低，会导致膜层不够致密，从而影响膜层对外界离子的阻挡作用。
可选地，所述正面第一含氮硅化合物层的折射率在2.0以上，例如2.0、2.1、2.2、2.3或2.4等。本申请中，如果正面第一含氮硅化合物层的折射率过低，会 导致膜层致密性不够，从而影响膜层对外界侵入离子的阻挡作用。可选地，所述正面第一含氮硅化合物层的厚度在15nm以上，例如15nm、16nm、17nm、18nm或19nm等。本申请中，如果正面第一含氮硅化合物层的厚度过低，会导致膜层致密性不够，从而影响膜层对外界侵入离子的阻挡作用。
可选地，所述正面第三硅氧化物层的折射率在1.4以上，例如1.4、1.5、1.6、1.7或1.8等。本申请中，如果正面第三硅氧化物层的折射率过低，会导致光吸收失配，最终会影响太阳能电池的光电转换效率。可选地，所述正面第三硅氧化物层的厚度在5nm以上，例如5nm、6nm、7nm、8nm、9nm或10nm等。本申请中，如果正面第三硅氧化物层的厚度过低，会导致光吸收失配，最终会影响太阳能电池的光电转换效率。
本申请中，通过对正面第二硅氧化物层、正面第一含氮硅化合物层和正面第三硅氧化物层的设计优化，可以有效阻挡Na+离子通过正面不致密的膜层间隙，侵入到PN结区附近，造成PN结区的破坏，最终导致电池抗PID的失效。
作为本申请可选的技术方案，所述钝化层的厚度在10nm以上，例如10nm、11nm、12nm、13nm、14nm或15nm等。本申请中，如果钝化层的厚度过薄，会导致一方面影响钝化效果，另外一方面对外部离子的侵入和富集会比较敏感。
可选地，所述背面硅氧化物层的折射率在1.4以上，例如1.4、1.5、1.6、1.7或1.8等。本申请中，如果背面硅氧化物层的折射率过低会导致该膜层致密性不好从而影响膜层对外界离子的阻挡作用。可选地，所述背面硅氧化物层的厚度在5nm以上，例如5nm、6nm、7nm、8nm、9nm或10nm等。如果背面硅氧化物的厚度过低，会导致该膜层致密性不好从而影响膜层对外界离子的阻挡作用。
可选地，所述背面第一含氮硅化合物层的折射率在2.0以上，例如2.0、2.1、2.2、2.3、2.4或2.5等。本申请中，如果背面第一含氮硅化物层的折射率过低，会导致该膜层致密性不好，从而影响膜层对外界离子的阻挡作用。可选地，所述背面第一含氮硅化合物层的厚度在10nm以上，例如10nm、11nm、12nm、13nm、14nm或15nm等。如果背面第一含氮硅化物层的厚度过低，会导致该膜层致密性不好，从而影响膜层对外界离子的阻挡作用。
本申请通过对钝化层、背面硅氧化物层和背面第一含氮硅化合物层的设计优化，可以有效抵抗Na +离子在背面富集时产生的电势场效应引起的极化现象。
第二方面，本申请提供一种如第一方面所述双面太阳能电池的制备方法，所述方法包括以下步骤：在带有PN结的硅片的N型层一侧生长正面第一硅氧化物层后，再进行正面生长和背面生长，得到所述双面太阳能电池；所述正面生长包括依次生长正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；所述背面生长包括依次生长钝化层、背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。本申请提供的制备方法技术成熟，工艺简单，适于进行产业化大规模生产。
作为本申请可选的技术方案，生长正面第二硅氧化物层的方法为热氧化法。
可选地，所述正面生长和背面生长均为等离子体增强化学气相沉积 (PECVD)生长。本申请中，采用PECVD法的好处在于：成膜快速，有利于量产；2.气体流量和化学键配比可灵活调整；3.可在同一炉管内实现多层膜结构。
可选地，所述制备方法还包括在正面生长和背面生长之后，制备银电极。
作为本申请可选的技术方案，背面生长在生长钝化层之前，先将带有PN且生长了正面第一硅氧化物层的硅片置于等离子体增强化学气相沉积炉中，进行抽真空测试和检漏、保压测试，通入工作气体并将反应器的温度设为310-330℃，例如310℃、320℃或330℃等，压力设为1450-1550Pa，例如1450Pa、1480Pa、1500Pa、1520Pa或1550Pa等，恒温恒压9-11s，例如9s、10s或11s等。可选地，所述工作气体包括笑气。
可选地，生长钝化层的方法包括：温度设为310-330℃，例如310℃、320℃或330℃等，压力设为1450-1550Pa，例如1450Pa、1480Pa、1500Pa、1520Pa或1550Pa等，通入工作气体和钝化层原料气，恒温恒压170-190s，170s、180s或190s等，之后抽真空45-55s，例如45s、50s或55s等，将温度设定为470-490℃，例如470℃、480℃或490℃等，压力设定为850-950Pa，例如850Pa、900Pa或950Pa等，通入工作气体和氨气，恒温恒压9-11s，例如9s、10s或11s等，之后保持温度、压力、工作气体以及氨气通入量维持340-360s，例如340s、350s或360s等，得到钝化层。可选地，所述工作气体包括笑气。可选地，所述钝化层原料气包括三甲基铝(TMA)。
可选地，生长背面硅氧化物层的方法包括：温度设为470-490℃，例如470℃、480℃或490℃等，压力设为1450-1550Pa，例如1450Pa、1500Pa或1550Pa等，通入工作气体和硅原料气，恒温恒压75-85s，例如75s、80s或85s等，之后抽真空290-310s，例如280s、300s或310s等，温度设定为470-490℃，例如470℃、480℃或490℃等，压力设定为1600-1800Pa，例如1600Pa、1700Pa或1800Pa等，通入硅原料气和氨气，恒温恒压9-11s，例如9s、10s或11s等，得到背面硅氧化物层。可选地所述工作气体包括笑气。可选地，所述硅原料气包括硅烷。
可选地，生长背面第一含氮硅化合物层的方法包括：温度设为470-490℃，压力设为1650-1750Pa，例如1650Pa、1700Pa或1750Pa等，通入氨气和硅原料气，恒温恒压235-245s，例如235s、240s或245s等，得到背面第一含氮硅化合物层。可选地，所述硅原料气包括硅烷。
可选地，生长背面第二含氮硅化合物层的方法包括：温度设为470-490℃，例如470℃、480℃或490℃等，压力设为1650-1750Pa，例如1650Pa、1700Pa或1750Pa等，通入氨气和硅原料气，恒温恒压125-135s，例如125s、130s或135s等，之后将温度设为470-490℃，例如470℃、480℃或490℃等，压力设为1650-1750Pa，例如1650Pa、1700Pa或1750Pa等，减少硅原料气的通入量，增加氨气的通入量，恒温恒压125-135s，例如125s、130s或135s等，得到背面第二含氮硅化合物。可选地，所述硅原料气包括硅烷。
可选地，所述背面生长还包括：在生长背面第二含氮硅化合物层之后，进行抽真空和充保护性气体回常压，并取出产品。
作为本申请可选的技术方案，所述正面生长在生长正面第二硅氧化物层之前，先将带有PN且生长了正面第一硅氧化物层的硅片置于等离子体增强化学气相沉积炉中，进行抽真空，捡漏，再次抽真空，通入工作气体和硅原料气，并将反应器的温度设为490-510℃，例如490℃、500℃或510℃等，压力设为195-205Pa，例如195Pa、200Pa或205Pa等，恒温恒压15-25s，例如15s、20s或25s等。可选地，所述工作气体包括笑气。可选地，所述硅原料气包括硅烷。
可选地，生长正面第二硅氧化物层的方法包括：温度设为490-510℃，例如490℃、500℃或510℃等，压力设为195-205Pa，例如195Pa、200Pa或205Pa等，通入工作气体和硅原料气，恒温恒压75-85s，例如75s、80s或85s等，之后抽真空15-25s，例如15s、20s或25s等，温度设定为490-510℃，例如490℃、500℃或510℃等，压力设定为225-235Pa，例如225Pa、230Pa或235Pa等，通入硅原料气和氨气，恒温恒压15-25s，例如15s、20s或25s等，得到正面第二硅氧化物层。可选地所述工作气体包括笑气。可选地所述硅原料气包括硅烷。
可选地，生长正面第一含氮硅化合物层的方法包括：温度设为490-510℃，例如490℃、500℃或510℃等，压力设为225-235Pa，例如225Pa、230Pa或235Pa等，通入氨气和硅原料气，恒温恒压60-70s，例如60s、65s或70s等，得到正面第一含氮硅化合物层。可选地，所述硅原料气包括硅烷。
可选地，生长正面第二含氮硅化合物层的方法包括：温度设为490-510℃，例如490℃、500℃或510℃等，压力设为225-235Pa，例如225Pa、230Pa或235Pa等，通入氨气和硅原料气，恒温恒压155-165s，例如155s、160s或165s等，之后将温度设为490-510℃，例如490℃、500℃或510℃等，压力设为225-235Pa，例如225Pa、230Pa或235Pa等，减少硅原料气的通入量，增加氨气的通入量，恒温恒压240-260s，例如240s、250s或260s等，之后温度设为490-510℃，例如490℃、500℃或510℃等，压力设为185-195Pa，例如185Pa、190Pa或195Pa等，通入硅原料气、氨气和工作气体，恒温恒压155-165s，例如155s、160s或160s等，之后抽真空，再通入硅原料气和工作气体，温度设为490-510℃，例如490℃、500℃或510℃等，压力设为175-185Pa，例如175Pa、180Pa或185Pa等，恒温恒压6-15s，例如6s、10s或15s等，得到正面第二含氮硅化合物层。可选地，所述硅原料气包括硅烷。所述工作气体包括笑气。
可选地，生长正面第三硅氧化物层的方法包括：温度设为490-510℃，例如490℃、500℃或510℃等，压力设为175-185Pa，例如175Pa、180Pa或185Pa等，通入工作气体和硅原料气，恒温恒压175-185s，例如175s、180s或185s。可选地，所述工作气体包括笑气。可选地，所述硅原料气包括硅烷。
可选地，所述正面生长还包括：在生长正面第三硅氧化物层之后，进行抽真空、清洗炉管、再次抽真空和回常压，并取出产品。
作为本申请所述制备方法的进一步可选技术方案，所述方法包括以下步骤：
在带有PN结的硅片的N型层一侧生长正面第一硅氧化物层后，再进行正面生长和背面生长，再制备银电极，得到所述双面太阳能电池；所述正面生长 包括依次生长正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；所述背面生长包括依次生长钝化层、背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层；
所述正面生长和背面生长均为等离子体增强化学气相沉积生长；生长钝化层的方法包括：温度设为310-330℃，压力设为1450-1550Pa，通入工作气体和钝化层原料气，恒温恒压170-190s，之后抽真空45-55s，将温度设定为470-490℃，压力设定为850-950Pa，通入工作气体和氨气，恒温恒压9-11s，之后保持温度、压力、工作气体以及氨气通入量维持340-360s，得到钝化层；生长背面硅氧化物层的方法包括：温度设为470-490℃，压力设为1450-1550Pa，通入工作气体和硅原料气，恒温恒压75-85s，之后抽真空290-310s，将温度设定为470-490℃，压力设定为1600-1800Pa，通入硅原料气和氨气，恒温恒压9-11s得到背面硅氧化物层；生长背面第一含氮硅化合物层的方法包括：温度设为470-490℃，压力设为1650-1750Pa，通入氨气和硅原料气，恒温恒压235-245s，得到背面第一含氮硅化合物层；生长背面第二含氮硅化合物层的方法包括：温度设为470-490℃，压力设为1650-1750Pa，通入氨气和硅原料气，恒温恒压125-135s，之后将温度设为470-490℃，压力设为1650-1750Pa，减少硅原料气的通入量，增加氨气的通入量，恒温恒压125-135s，得到背面第二含氮硅化合物；生长正面第二硅氧化物层的方法包括：温度设为490-510℃，压力设为195-205Pa，通入工作气体和硅原料气，恒温恒压75-85s，之后抽真空15-25s，将温度设定为490-510℃，压力设定为225-235Pa，通入硅原料气和氨气，恒温恒压15-25s得到正面第二硅氧化物层；生长正面第一含氮硅化合物层的方法包括：温度设为490-510℃，压力设为225-235Pa，通入氨气和硅原料气，恒温恒压60-70s，得到正面第一含氮硅化合物层；生长正面第二含氮硅化合物层的方法包括：温度设为490-510℃，压力设为225-235Pa，通入氨气和硅原料气，恒温恒压155-165s，之后将温度设为490-510℃，压力设为225-235Pa，减少硅原料气的通入量，增加氨气的通入量，恒温恒压240-260s，之后温度设为490-510℃，压力设为185-195Pa，通入硅原料气、氨气和工作气体，恒温恒压155-165s，之后抽真空，再通入硅原料气和工作气体，温度设为490-510℃，压力设为175-185Pa，恒温恒压6-15s，得到正面第二含氮硅化合物层；生长正面第三硅氧化物层的方法包括：温度设为490-510℃，压力设为175-185Pa，通入工作气体和硅原料气，恒温恒压175-185s。
与现有技术相比，本申请具有以下有益效果：
(1)本申请在现有设备上，不增加额外的资金投入，同时考虑安全性的前提下，通过对PID失效模型的建立和分析，提供了有效解决双面PERC电池抗PID失效的发明方案。本申请提供的双面太阳能电池采用特殊的膜层结构设计(包括正面膜层的多层设计和背面膜层的多层设计，其中背面硅氧化物层和背面第一含氮硅化合物层是解决双面PERC电池背面PID最关键的结构)，加强综合膜层的致密性和电学特性，能非常有效的减缓背面PID现象的产生。
(2)本申请的制备方法操作简单，流程短，易于实现产业化大规模生产。
附图说明
图1双面电池-双玻组件在实验室-1500V偏压下的PID失效EL图像；
图2双面PERC电池PID失效模型；
图3为实施例1提供的双面太阳能电池的结构示意图，其中，1-带有PN结的硅片，2-钝化层，3-背面硅氧化物层，4-背面第一含氮硅化合物层，5-背面第二含氮硅化合物层，6-正面第一硅氧化物层，7-正面第二硅氧化物层，8-正面第一含氮硅化合物层，9-正面第二含氮硅化合物层，10-正面第三硅氧化物层；
图4为实施例1提供的双面太阳能电池制备方法流程示意图；
图5(A)为实施例1提供的双面太阳能电池单玻组件1次测试中的初始EL图片；图5(B)为实施例1提供的双面太阳能电池单玻组件中样品1#经过96h PID的EL图片；图5(C)为实施例1提供的双面太阳能电池单玻组件中样品1#经过192h PID的EL图片；图5(D)为实施例1提供的双面太阳能电池单玻组件中样品1#经过288h PID的EL图片；
图6(A)为实施例1提供的双面太阳能电池单玻组件中样品2#的初始EL图片；图6(B)为实施例1提供的双面太阳能电池单玻组件中样品2#经过96h PID的EL图片；图6(C)为实施例1提供的双面太阳能电池单玻组件中样品2#经过192h PID的EL图片；图6(D)为实施例1提供的双面太阳能电池单玻组件中样品2#经过288h PID的EL图片；
图7(A)为实施例1提供的双面太阳能电池双玻组件的初始EL图片；图7(B)为实施例1提供的双面太阳能电池双玻组件经过96h PID的EL图片；图7(C)为实施例1提供的双面太阳能电池双玻组件经过192h PID的EL图片；图7(D)为实施例1提供的双面太阳能电池双玻组件经过288h PID的EL图片。
具体实施方式
为更好地说明本申请，便于理解本申请的技术方案，下面对本申请进一步详细说明。但下述的实施例仅仅是本申请的简易例子，并不代表或限制本申请的权利保护范围，本申请保护范围以权利要求书为准。以下为本申请典型但非限制性实施例：
实施例1
本实施例提供一种双面太阳能电池，所述太阳能电池的结构如图3所示，所述双面太阳能电池包括：带有PN结的硅片1，位于带有PN结的硅片1的N型层一侧且沿着远离该硅片的方向依次层叠的正面第一硅氧化物层6、正面第二硅氧化物层7、正面第一含氮硅化合物层8、正面第二含氮硅化合物层9和正面第三硅氧化物层10；位于带有PN结的硅片1的P型层一侧且沿着远离该硅片的方向依次层叠的钝化层2、背面硅氧化物层3、背面第一含氮硅化合物层4和背面第二含氮硅化合物层5。所述双面太阳能电池中还包含银电极，带有PN结的硅片1的N型层一侧的银电极穿过正面第一硅氧化物层、正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；带有PN结的硅片1的P型层一侧的银电极穿过背面硅氧化物层、背面第一 含氮硅化合物层和背面第二含氮硅化合物层。
本实施例中，所述正面第一硅氧化物层6、正面第二硅氧化物层7、正面第三硅氧化物层10和背面硅氧化物层3均为SiO 2层；正面第一硅氧化物层6为热氧化硅层，正面第二硅氧化物层7、正面第三硅氧化物层10和背面硅氧化物层3为电沉积氧化硅层。所述钝化层2为氧化铝层(AlOx，x＝1.5)。
本实施例中，正面第一含氮硅化合物层为SiN x1层(x1＝4/3)，背面第一含氮硅化合物层也为SiN x1层(x1＝4/3)。正面第二含氮硅化合物层9为沿着远离带有PN结的硅片1的方向依次层叠的SiN x2/SiN x3/SiO xN y叠层结构(x2＝4/3，x3＝4/3，x＝1，y＝1)。背面第二含氮硅化合物层5为沿着远离带有PN结的硅片1的方向依次层叠的SiN x2/SiN x3叠层结构(x2＝4/3，x3＝4/3)。
本实施例提供的双面太阳能电池中，正面第二硅氧化物层7的折射率为1.45，厚度为6nm；正面第一含氮硅化合物层8的折射率为2.2，厚度为20nm；正面第三硅氧化物层10的折射率为1.4，厚度为5；钝化层2的厚度为10nm；背面硅氧化物层3的折射率为1.45，厚度为12nm；背面第一含氮硅化合物层4的折射率为2.2，厚度为15nm。
本实施例还提供一种制备所述双面太阳能电池的方法，其具体步骤为：对P性掺镓硅片经过前端工序处理(制绒、HF/HCl混酸清洗、扩散、正面激光掺杂SE)，得到带有PN结的硅片，在带有PN结的硅片的N型层一侧热氧化法生长正面第一硅氧化物层，再进行正面生长和背面生长，经过背面激光开槽、丝网印刷银电极和烧结，得到所述双面太阳能电池。其流程示意图如图4所示。
所述背面生长的方法包括：
(1)步骤：将热氧化工序后的硅片，插入石墨舟内，并通过机械臂送入管式PECVD炉内管，时间设定为110s，温度设定为320℃，压力设定为10000pa，进舟速度设定为1000mm/min；
(2)步骤：机械臂从炉管内抽出，并关闭炉管，同时将温度设定为320℃，进行抽真空测试和检漏、保压测试；
(3)步骤：进入恒温和恒压阶段，时间设定为10s，温度设定为320℃，压力设定为1500pa，笑气流量通入5800sccm；
(4)步骤：进入氧化铝沉积阶段，时间设定为180s，温度设定为320℃，压力设定为1500pa，笑气流量通入5800sccm，三甲基铝TMA开度为75％，射频功率为7000W，脉冲开关比为20/1000；
(5)步骤：抽真空，以便排空反应残留的气体，时间设定为50s，温度设定为480℃，压力设定为0pa；
(6)步骤：进入第二次恒温和恒压阶段，时间设定为10s，温度设定为480℃，压力设定为900pa，氨气流量通入2500sccm，笑气流量通入2500sccm；
(7)步骤：进行氧化铝的激活预处理过程，即对步骤(4)生长的氧化铝进行H钝化的部分离子态注入，时间设定为350s，温度设定为480℃，压力设定为900pa，氨气流量通入2500sccm，笑气流量通入2500sccm，射频功率为 3500W,脉冲开关比为30/120；
(8)步骤：进入氧化硅生长阶段，时间设定为80s，温度设定为480℃，压力设定为1500pa，硅烷流量通入650sccm，笑气流量通入5200sccm，射频功率为8000W,脉冲开关比为36/1000；
(9)步骤：抽真空，以便排空反应残留的气体，时间设定为300s，温度设定为480℃，压力设定为0pa；
(10)步骤：进入第三次恒温和恒压阶段，时间设定为10s，温度设定为480℃，压力设定为1700pa，硅烷流量通入1250sccm，氨气流量通入4880sccm；
(11)步骤：进入第一层高折率SiN x1层生长阶段，时间设定为240s，温度设定为480℃，压力设定为1700pa，硅烷流量通入1250sccm，氨气流量通入4880sccm，射频功率为13000W，脉冲开关比为50/700；
(12)步骤：进入第二层SiN x2层生长阶段，时间设定为130s，温度设定为480℃，压力设定为1700pa，硅烷流量通入850sccm，氨气流量通入6000sccm，射频功率为13000W，脉冲开关比为50/600；
(13)步骤：进入第三层SiN x3层生长阶段，时间设定为130s，温度设定为480℃，压力设定为1700pa，硅烷流量通入600sccm，氨气流量通入6500sccm，射频功率为13000W，脉冲开关比为50/600；
(14)步骤：完成工艺后，进入抽真空和充氮回常压的阶段，时间设定为150s，温度设定为430℃，压力设定为10000pa，氮气流量通入40000sccm；
(15)步骤：开炉门取舟，结束整个背面PECVD镀膜工艺流程，时间设定为110s，温度设定为430℃，压力设定为10000pa，出舟速度设定为1000mm/min。
所述正面生长的方法包括：
(1)步骤：进舟，将硅片放置在石墨承载夹具上，并由机械臂送入管式PECVD镀膜设备，时间设定为120s，温度设定在500℃，压力10000pa；
(2)步骤：抽真空，将炉管进行第一次的抽真空，时间设定为200s，温度设定在500℃，压力0pa；
(3)步骤：检漏，测试真空是否泄漏，以便在工艺气体通入前，确保工艺效果，时间设定为20s，温度设定在500℃，压力10000pa；
(4)步骤：抽真空，再次将炉管进行快速的抽真空，时间设定为20s，温度设定在500℃，压力0pa；
(5)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为20s，温度设定在500℃，压力200pa，硅烷流量985sccm，笑气流量4620sccm；
(6)步骤：沉积氧化硅，时间设定为80s，温度设定为500℃，压力设定为200pa，硅烷流量通入985sccm，笑气流量通入4620sccm，射频功率为12600W，脉冲开关比为5/150；
(7)步骤：抽真空，将多余的反应气体抽走，准备进入下一个步骤，时间设定为20s，温度设定在500℃，压力0pa；
(8)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为20s，温度设定在500℃，压力230pa，硅烷流量2200sccm，氨气流量6600sccm；
(9)步骤：沉积第一层高折SiN x1层，时间设定为65s，温度设定为500℃，压力设定为230pa，硅烷流量通入2200sccm，氨气流量通入6600sccm，射频功率为16500W，脉冲开关比为5/80；
(10)步骤：沉积第二层SiN x2层阶段，时间设定为160s，温度设定为500℃，压力设定为230pa，硅烷流量通入1000sccm，氨气流量通入12000sccm，射频功率为17500W，脉冲开关比为5/80；
(11)步骤：沉积第三层SiN x3层阶段，时间设定为250s，温度设定为500℃，压力设定为230pa，硅烷流量通入800sccm，氨气流量通入12200sccm，射频功率为17500W，脉冲开关比为5/80；
(12)步骤：沉积SiO xN y层阶段，时间设定为160s，温度设定为500℃，压力设定为190pa，硅烷流量通入1000sccm，氨气流量通入2800sccm，笑气流量通入7800sccm，射频功率为17500W,脉冲开关比为5/80；
(13)步骤：抽真空，将多余的反应气体抽走，准备进入下一个步骤，时间设定为20s，温度设定在500℃，压力0pa；
(14)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为10s，温度设定在500℃，压力180pa，硅烷流量600sccm，笑气流量9600sccm；
(15)步骤：沉积最外层氧化硅层，时间设定为180s，温度设定为500℃，压力设定为180pa，硅烷流量通入600sccm，笑气流量通入9600sccm，射频功率为14500W，脉冲开关比为5/150；
(16)步骤：抽真空，将多余的反应气体抽走，时间设定为25s，温度设定在500℃，压力0pa；
(17)步骤：清洗炉管，吹扫炉内残余气体，时间设定为15s，温度设定在500℃，压力0pa，氮气流量25000sccm；
(18)步骤：抽真空，将多余的反应气体抽走，时间设定为15s，温度设定在500℃，压力0pa；
(19)步骤：回常压，准备开启炉门，时间设定为90s，温度设定在500℃，压力10000pa，氮气流量50000sccm；
(20)步骤：开炉门，取石墨舟，结束整个正面PECVD镀膜工艺流程，时间设定为110s，温度设定为500℃，压力设定为10000pa，出舟速度设定为1000mm/min。
对本实施例提供的双面太阳能电池制备成双面PERC电池-单玻组件,：其结构为前板玻璃/正面EVA/电池片/背面白EVA/白色背板。
在上述单玻组件中取出两个样品(1#和2#)进行PID测试，PID测试的偏压为-1500V。测试结果如下表所示，判定合格的标准为PID 96h峰值功率衰减不 超过3％，PID 192h和288h峰值功率衰减不超过5％。
表1
Figure PCTCN2021088063-appb-000001
从上表可以看出，单玻组件在经过288h的-1500V偏压测试，功率衰减仍然能保持<2.5％以内。
图5(A)～图5(D)分别为1#在不同时间下的EL图片(EL是指Electroluminescenc，即电致发光)，图6(A)～图6(D)分别为2#在不同时间下的EL图片，从上述图中可以看出，从初始测试至288h，EL图片中未见到明显的电池失效暗片。
对本实施例提供的双面太阳能电池制备成双面PERC电池-双玻组件，其结构为前板玻璃/高透EVA/电池片/透明POE/背板玻璃。
在上述双玻组件中取出样品(3#)进行PID测试，PID测试的偏压为-1500V。测试结果如下表所示，判定合格的标准为PID 96h峰值功率衰减不超过3％，PID 192h和288h峰值功率衰减不超过5％。
表2
Figure PCTCN2021088063-appb-000002
从上表可以看出，双玻组件在经过288h的-1500V偏压测试，功率衰减仍然能保持在1.0％附近。
图7(A)～图7(D)分别为3#在不同时间下的EL图片，从上述图中可以看出，从初始测试至288h，EL图片中未见到明显的电池失效暗片。
实施例2
本实施例提供的双面太阳能电池的结构和材料种类与实施例1相同，本实施例提供的双面太阳能电池的具体厚度参数为：正面第二硅氧化物层7的折射 率为1.43，厚度为7nm；正面第一含氮硅化合物层8的折射率为2.1，厚度为23nm；正面第三硅氧化物层10的折射率为1.4，厚度为8；钝化层2的厚度为12nm；背面硅氧化物层3的折射率为1.485，厚度为12nm；背面第一含氮硅化合物层4的折射率为2.3，厚度为18nm。
本实施例的制备方法与实施例1的区别在于，本实施例的背面生长和正面生长的方法如下：
所述背面生长的方法包括：
(1)步骤：将热氧化工序后的硅片，插入石墨舟内，并通过机械臂送入管式PECVD炉内管，时间设定为110s，温度设定为310℃，压力设定为10000pa，进舟速度设定为1000mm/min；
(2)步骤：机械臂从炉管内抽出，并关闭炉管，同时将温度设定为310℃，进行抽真空测试和检漏、保压测试；
(3)步骤：进入恒温和恒压阶段，时间设定为10s，温度设定为310℃，压力设定为1450pa，笑气流量通入5800sccm；
(4)步骤：进入氧化铝沉积阶段，时间设定为170s，温度设定为310℃，压力设定为1450pa，笑气流量通入5800sccm，三甲基铝TMA开度为75％，射频功率为7000W，脉冲开关比为20/1000；
(5)步骤：抽真空，以便排空反应残留的气体，时间设定为45s，温度设定为470℃，压力设定为0pa；
(6)步骤：进入第二次恒温和恒压阶段，时间设定为9s，温度设定为470℃，压力设定为850pa，氨气流量通入2500sccm，笑气流量通入2500sccm；
(7)步骤：进行氧化铝的激活预处理过程，即对步骤(4)生长的氧化铝进行H钝化的部分离子态注入，时间设定为340s，温度设定为470℃，压力设定为850pa，氨气流量通入2500sccm，笑气流量通入2500sccm，射频功率为3500W,脉冲开关比为30/120；
(8)步骤：进入氧化硅生长阶段，时间设定为75s，温度设定为470℃，压力设定为1450pa，硅烷流量通入650sccm，笑气流量通入5200sccm，射频功率为8000W,脉冲开关比为36/1000；
(9)步骤：抽真空，以便排空反应残留的气体，时间设定为290s，温度设定为470℃，压力设定为0pa；
(10)步骤：进入第三次恒温和恒压阶段，时间设定为9s，温度设定为470℃，压力设定为1650pa，硅烷流量通入1250sccm，氨气流量通入4880sccm；
(11)步骤：进入第一层高折率SiN x1层生长阶段，时间设定为235s，温度设定为470℃，压力设定为1650pa，硅烷流量通入1250sccm，氨气流量通入4880sccm，射频功率为13000W，脉冲开关比为50/700；
(12)步骤：进入第二层SiN x2层生长阶段，时间设定为125s，温度设定为470℃，压力设定为1650pa，硅烷流量通入850sccm，氨气流量通入6000sccm，射频功率为13000W，脉冲开关比为50/600；
(13)步骤：进入第三层SiN x3层生长阶段，时间设定为125s，温度设定为470℃，压力设定为1650pa，硅烷流量通入600sccm，氨气流量通入6500sccm，射频功率为13000W，脉冲开关比为50/600；
(14)步骤：完成工艺后，进入抽真空和充氮回常压的阶段，时间设定为150s，温度设定为430℃，压力设定为10000pa，氮气流量通入40000sccm；
(15)步骤：开炉门取舟，结束整个背面PECVD镀膜工艺流程，时间设定为110s，温度设定为430℃，压力设定为10000pa，出舟速度设定为1000mm/min。
所述正面生长的方法包括：
(1)步骤：进舟，将硅片放置在石墨承载夹具上，并由机械臂送入管式PECVD镀膜设备，时间设定为120s，温度设定在4900℃，压力10000pa；
(2)步骤：抽真空，将炉管进行第一次的抽真空，时间设定为200s，温度设定在490℃，压力0pa；
(3)步骤：检漏，测试真空是否泄漏，以便在工艺气体通入前，确保工艺效果，时间设定为20s，温度设定在490℃，压力10000pa；
(4)步骤：抽真空，再次将炉管进行快速的抽真空，时间设定为20s，温度设定在490℃，压力0pa；
(5)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为15s，温度设定在490℃，压力195pa，硅烷流量985sccm，笑气流量4620sccm；
(6)步骤：沉积氧化硅，时间设定为75s，温度设定为450℃，压力设定为195pa，硅烷流量通入985sccm，笑气流量通入4620sccm，射频功率为12600W，脉冲开关比为5/150；
(7)步骤：抽真空，将多余的反应气体抽走，准备进入下一个步骤，时间设定为15s，温度设定在500℃，压力0pa；
(8)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为15s，温度设定在490℃，压力225pa，硅烷流量2200sccm，氨气流量6600sccm；
(9)步骤：沉积第一层高折SiN x1层，时间设定为60s，温度设定为450℃，压力设定为225pa，硅烷流量通入2200sccm，氨气流量通入6600sccm，射频功率为16500W，脉冲开关比为5/80；
(10)步骤：沉积第二层SiN x2层阶段，时间设定为155s，温度设定为490℃，压力设定为225pa，硅烷流量通入1000sccm，氨气流量通入12000sccm，射频功率为17500W，脉冲开关比为5/80；
(11)步骤：沉积第三层SiN x3层阶段，时间设定为240s，温度设定为490℃，压力设定为225pa，硅烷流量通入800sccm，氨气流量通入12200sccm，射频功率为17500W，脉冲开关比为5/80；
(12)步骤：沉积SiO xN y层阶段，时间设定为160s，温度设定为490℃，压力设定为185pa，硅烷流量通入1000sccm，氨气流量通入2800sccm，笑气流 量通入7800sccm，射频功率为17500W,脉冲开关比为5/80；
(13)步骤：抽真空，将多余的反应气体抽走，准备进入下一个步骤，时间设定为20s，温度设定在490℃，压力0pa；
(14)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为10s，温度设定在490℃，压力180pa，硅烷流量600sccm，笑气流量9600sccm；
(15)步骤：沉积最外层氧化硅层，时间设定为175s，温度设定为490℃，压力设定为175pa，硅烷流量通入600sccm，笑气流量通入9600sccm，射频功率为14500W，脉冲开关比为5/150；
(16)步骤：抽真空，将多余的反应气体抽走，时间设定为25s，温度设定在490℃，压力0pa；
(17)步骤：清洗炉管，吹扫炉内残余气体，时间设定为15s，温度设定在490℃，压力0pa，氮气流量25000sccm；
(18)步骤：抽真空，将多余的反应气体抽走，时间设定为15s，温度设定在490℃，压力0pa；
(19)步骤：回常压，准备开启炉门，时间设定为90s，温度设定在490℃，压力10000pa，氮气流量50000sccm；
(20)步骤：开炉门，取石墨舟，结束整个正面PECVD镀膜工艺流程，时间设定为110s，温度设定为490℃，压力设定为10000pa，出舟速度设定为1000mm/min。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表3
Figure PCTCN2021088063-appb-000003
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表4
Figure PCTCN2021088063-appb-000004
实施例3
本实施例提供的双面太阳能电池的结构和材料种类与实施例1相同，本实施例提供的双面太阳能电池的具体厚度参数为：正面第二硅氧化物层7的折射率为1.48，厚度为10nm；正面第一含氮硅化合物层8的折射率为2.4，厚度为20nm；正面第三硅氧化物层10的折射率为1.42，厚度为8nm；钝化层2的厚度为15nm；背面硅氧化物层3的折射率为1.48，厚度为15nm；背面第一含氮硅化合物层4的折射率为2.4，厚度为20nm。
所述背面生长的方法包括：
(1)步骤：将热氧化工序后的硅片，插入石墨舟内，并通过机械臂送入管式PECVD炉内管，时间设定为110s，温度设定为330℃，压力设定为10000pa，进舟速度设定为1000mm/min；
(2)步骤：机械臂从炉管内抽出，并关闭炉管，同时将温度设定为330℃，进行抽真空测试和检漏、保压测试；
(3)步骤：进入恒温和恒压阶段，时间设定为11s，温度设定为330℃，压力设定为1550pa，笑气流量通入5800sccm；
(4)步骤：进入氧化铝沉积阶段，时间设定为190s，温度设定为330℃，压力设定为1550pa，笑气流量通入5800sccm，三甲基铝TMA开度为75％，射频功率为7000W，脉冲开关比为20/1000；
(5)步骤：抽真空，以便排空反应残留的气体，时间设定为50s，温度设定为490℃，压力设定为0pa；
(6)步骤：进入第二次恒温和恒压阶段，时间设定为11s，温度设定为490℃，压力设定为950pa，氨气流量通入2500sccm，笑气流量通入2500sccm；
(7)步骤：进行氧化铝的激活预处理过程，即对步骤(4)生长的氧化铝进行H钝化的部分离子态注入，时间设定为360s，温度设定为490℃，压力设定为950pa，氨气流量通入2500sccm，笑气流量通入2500sccm，射频功率为3500W,脉冲开关比为30/120；
(8)步骤：进入氧化硅生长阶段，时间设定为85s，温度设定为490℃，压力设定为1550pa，硅烷流量通入650sccm，笑气流量通入5200sccm，射频功率为8000W，脉冲开关比为36/1000；
(9)步骤：抽真空，以便排空反应残留的气体，时间设定为300s，温度设定为490℃，压力设定为0pa；
(10)步骤：进入第三次恒温和恒压阶段，时间设定为11s，温度设定为490℃，压力设定为1800pa，硅烷流量通入1250sccm，氨气流量通入4880sccm；
(11)步骤：进入第一层高折率SiN x1层生长阶段，时间设定为245s，温度设定为490℃，压力设定为1750pa，硅烷流量通入1250sccm，氨气流量通入4880sccm，射频功率为13000W，脉冲开关比为50/700；
(12)步骤：进入第二层SiN x2层生长阶段，时间设定为135s，温度设定为490℃，压力设定为1750pa，硅烷流量通入850sccm，氨气流量通入6000sccm，射频功率为13000W，脉冲开关比为50/600；
(13)步骤：进入第三层SiN x3层生长阶段，时间设定为135s，温度设定为490℃，压力设定为1750pa，硅烷流量通入600sccm，氨气流量通入6500sccm，射频功率为13000W，脉冲开关比为50/600；
(14)步骤：完成工艺后，进入抽真空和充氮回常压的阶段，时间设定为150s，温度设定为430℃，压力设定为10000pa，氮气流量通入40000sccm；
(15)步骤：开炉门取舟，结束整个背面PECVD镀膜工艺流程，时间设定为110s，温度设定为430℃，压力设定为10000pa，出舟速度设定为1000mm/min。
所述正面生长的方法包括：
(1)步骤：进舟，将硅片放置在石墨承载夹具上，并由机械臂送入管式PECVD镀膜设备，时间设定为120s，温度设定在510℃，压力10000pa；
(2)步骤：抽真空，将炉管进行第一次的抽真空，时间设定为200s，温度设定在510℃，压力0pa；
(3)步骤：检漏，测试真空是否泄漏，以便在工艺气体通入前，确保工艺效果，时间设定为20s，温度设定在510℃，压力10000pa；
(4)步骤：抽真空，再次将炉管进行快速的抽真空，时间设定为20s，温度设定在510℃，压力0pa；
(5)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为25s，温度设定在510℃，压力205pa，硅烷流量985sccm，笑气流量4620sccm；
(6)步骤：沉积氧化硅，时间设定为85s，温度设定为510℃，压力设定为205pa，硅烷流量通入985sccm，笑气流量通入4620sccm，射频功率为12600W，脉冲开关比为5/150；
(7)步骤：抽真空，将多余的反应气体抽走，准备进入下一个步骤，时间设定为25s，温度设定在510℃，压力0pa；
(8)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为25s，温度设定在510℃，压力235pa，硅烷流量2200sccm，氨气流量6600sccm；
(9)步骤：沉积第一层高折SiN x1层，时间设定为70s，温度设定为510℃，压力设定为235pa，硅烷流量通入2200sccm，氨气流量通入6600sccm，射频功率为16500W，脉冲开关比为5/80；
(10)步骤：沉积第二层SiN x2层阶段，时间设定为165s，温度设定为510℃，压力设定为235pa，硅烷流量通入1000sccm，氨气流量通入12000sccm，射频功率为17500W，脉冲开关比为5/80；
(11)步骤：沉积第三层SiN x3层阶段，时间设定为260s，温度设定为510℃，压力设定为235pa，硅烷流量通入800sccm，氨气流量通入12200sccm，射频功率为17500W，脉冲开关比为5/80；
(12)步骤：沉积SiO xN y层阶段，时间设定为165s，温度设定为510℃，压力设定为195pa，硅烷流量通入1000sccm，氨气流量通入2800sccm，笑气流 量通入7800sccm，射频功率为17500W,脉冲开关比为5/80；
(13)步骤：抽真空，将多余的反应气体抽走，准备进入下一个步骤，时间设定为20s，温度设定在510℃，压力0pa；
(14)步骤：恒压，将压力抽真空到工艺设定值，并预通入部分工艺气体，时间设定为15s，温度设定在510℃，压力185pa，硅烷流量600sccm，笑气流量9600sccm；
(15)步骤：沉积最外层氧化硅层，时间设定为185s，温度设定为510℃，压力设定为185pa，硅烷流量通入600sccm，笑气流量通入9600sccm，射频功率为14500W，脉冲开关比为5/150；
(16)步骤：抽真空，将多余的反应气体抽走，时间设定为25s，温度设定在510℃，压力0pa；
(17)步骤：清洗炉管，吹扫炉内残余气体，时间设定为15s，温度设定在510℃，压力0pa，氮气流量25000sccm；
(18)步骤：抽真空，将多余的反应气体抽走，时间设定为15s，温度设定在510℃，压力0pa；
(19)步骤：回常压，准备开启炉门，时间设定为90s，温度设定在510℃，压力10000pa，氮气流量50000sccm；
(20)步骤：开炉门，取石墨舟，结束整个正面PECVD镀膜工艺流程，时间设定为110s，温度设定为510℃，压力设定为10000pa，出舟速度设定为1000mm/min。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表5
Figure PCTCN2021088063-appb-000005
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表6
Figure PCTCN2021088063-appb-000006
实施例4
本实施例提供的双面太阳能电池与实施例1的区别仅在于，背面硅氧化物层3的折射率为1.2。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表7
Figure PCTCN2021088063-appb-000007
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表8
Figure PCTCN2021088063-appb-000008
实施例5
本实施例提供的双面太阳能电池与实施例1的区别仅在于，背面硅氧化物层3的厚度为4nm。本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表9
Figure PCTCN2021088063-appb-000009
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表10
Figure PCTCN2021088063-appb-000010
Figure PCTCN2021088063-appb-000011
实施例6
本实施例提供的双面太阳能电池与实施例1的区别仅在于，背面第一含氮硅化合物层4的折射率为1.8。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表11
Figure PCTCN2021088063-appb-000012
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表12
Figure PCTCN2021088063-appb-000013
实施例7
本实施例提供的双面太阳能电池与实施例1的区别仅在于，背面第一含氮硅化合物层4的厚度为4nm。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表13
Figure PCTCN2021088063-appb-000014
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表14
Figure PCTCN2021088063-appb-000015
Figure PCTCN2021088063-appb-000016
对比例1
本对比例提供的双面太阳能电池与实施例1的区别仅在于，不含背面硅氧化物层3。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表15
Figure PCTCN2021088063-appb-000017
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表16
Figure PCTCN2021088063-appb-000018
对比例2
本对比例提供的双面太阳能电池与实施例1的区别仅在于，不含背面第一含氮硅化合物层4。
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电池-单玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表17
Figure PCTCN2021088063-appb-000019
本实施例提供的双面太阳能电池按照实施例1的方法制备成双面PERC电 池-双玻组件，用此组件按照实施例1的方法进行PID测试，测试结果如下：
表18
Figure PCTCN2021088063-appb-000020
综合上述实施例和对比例的数据可知，实施例1-3提供的双面太阳能电池采用特殊的膜层结构设计(包括正面膜层的多层设计和背面膜层的多层设计，其中背面硅氧化物层和背面第一含氮硅化合物层是解决双面PERC电池背面PID最关键的结构)，加强综合膜层的致密性和电学特性，能非常有效的减缓背面PID现象的产生。
实施例4因为背面硅氧化物层3的折射率偏低，导致膜层不够致密，引起了Na +离子对背面钝化层的破坏。
实施例5因为背面硅氧化物层3的厚度偏低，导致膜层较薄，容易造成Na +离子对背面钝化层的破坏。
实施例6因为背面第一含氮硅化合物层4的折射率偏低，导致膜层不够致密，引起了Na +离子对背面钝化层的破坏。
实施例7因为背面第一含氮硅化合物层4的厚度偏低，导致膜层较薄，容易造成Na +离子对背面钝化层的破坏。
对比例1因为不含背面硅氧化物层3，导致没有保护膜层阻挡，造成Na +离子对背面钝化层的破坏。
对比例2因为不含背面第一含氮硅化合物层4，导致没有保护膜层阻挡，造成Na +离子对背面钝化层的破坏。
申请人声明，本申请通过上述实施例来说明本申请的详细方法，但本申请并不局限于上述详细方法，即不意味着本申请必须依赖上述详细方法才能实施。

Claims (12)

  1. 一种双面太阳能电池，其包括：带有PN结的硅片，位于所述硅片N型层一侧且沿着远离所述硅片的方向依次层叠的正面第一硅氧化物层、正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；位于所述硅片P型层一侧且沿着远离所述硅片的方向依次层叠的钝化层、背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。
  2. 根据权利要求1所述的双面太阳能电池，其中，所述正面第一硅氧化物层、正面第二硅氧化物层、正面第三硅氧化物层和背面硅氧化物层均为SiO 2层。
  3. 根据权利要求1或2所述的双面太阳能电池，其中，所述正面第二硅氧化物层、正面第三硅氧化物层和背面硅氧化物层为电沉积氧化硅层。
  4. 根据权利要求1-3任一项所述的双面太阳能电池，其中，所述正面第一硅氧化物层为热氧化硅层。
  5. 根据权利要求1-4任一项所述的双面太阳能电池，其中，所述正面第一含氮硅化合物层和背面第一含氮硅化合物层均为SiN x1层，x1独立地为0.75-1.34；
    可选地，所述正面第二含氮硅化合物层和背面第二含氮硅化合物层独立地为沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3叠层结构或沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3/SiO xN y叠层结构，其中x2为0.75-1.34，x3为0.75-1.34，x为1-2，y为1-2，x1>x2>x3；
    可选地，所述正面第二含氮硅化合物层为沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3/SiO xN y叠层结构，所述背面第二含氮硅化合物层为沿着远离所述硅片的方向依次层叠的SiN x2/SiN x3叠层结构；
    可选地，所述钝化层为氧化铝层；
    可选地，所述双面太阳能电池中还包含银电极；
    可选地，所述硅片N型层一侧的银电极穿过正面第一硅氧化物层、正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；
    可选地，所述硅片P型层一侧的银电极穿过背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。
  6. 根据权利要求1-5任一项所述的双面太阳能电池，其中，所述正面第二硅氧化物层的折射率在1.4以上；
    可选地，所述正面第二硅氧化物层的厚度在5nm以上；
    可选地，所述正面第一含氮硅化合物层的折射率在2.0以上；
    可选地，所述正面第一含氮硅化合物层的厚度在15nm以上；
    可选地，所述正面第三硅氧化物层的折射率在1.4以上；
    可选地，所述正面第三硅氧化物层的厚度在5nm以上。
  7. 根据权利要求1-6任一项所述的双面太阳能电池，其中，所述钝化层的厚度在10nm以上；
    可选地，所述背面硅氧化物层的折射率在1.4以上；
    可选地，所述背面硅氧化物层的厚度在5nm以上；
    可选地，所述背面第一含氮硅化合物层的折射率在2.0以上；
    可选地，所述背面第一含氮硅化合物层的厚度在10nm以上。
  8. 一种如权利要求1-7任一项所述双面太阳能电池的制备方法，其包括以下步骤：
    在带有PN结的硅片的N型层一侧生长正面第一硅氧化物层后，再进行正面生长和背面生长，得到所述双面太阳能电池；所述正面生长包括依次生长正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；所述背面生长包括依次生长钝化层、背面硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层。
  9. 根据权利要求8所述的制备方法，其中，所述生长正面第二硅氧化物层的方法为热氧化法；
    可选地，所述正面生长和背面生长均为等离子体增强化学气相沉积生长；
    可选地，所述制备方法还包括在正面生长和背面生长之后，制备银电极。
  10. 根据权利要求8或9所述的制备方法，其中，所述背面生长在生长钝化层之前，先将带有PN且生长了正面第一硅氧化物层的硅片置于等离子体增强化学气相沉积炉中，进行抽真空测试和检漏、保压测试，通入工作气体，并将反应器的温度设为310-330℃，压力设为1450-1550Pa，恒温恒压9-11s；
    可选地，所述工作气体包括笑气；
    可选地，生长钝化层的方法包括：温度设为310-330℃，压力设为1450-1550Pa，通入工作气体和钝化层原料气，恒温恒压170-190s，之后抽真空45-55s，将温度设定为470-490℃，压力设定为850-950Pa，通入工作气体和氨气，恒温恒压9-11s，之后保持温度、压力、工作气体以及氨气通入量维持340-360s，得到钝化层；
    可选地，所述工作气体包括笑气；
    可选地，所述钝化层原料气包括三甲基铝；
    可选地，生长背面硅氧化物层的方法包括：温度设为470-490℃，压力设为1450-1550Pa，通入工作气体和硅原料气，恒温恒压75-85s，之后抽真空290-310s，将温度设定为470-490℃，压力设定为1600-1800Pa，通入硅原料气和氨气，恒温恒压9-11s得到背面硅氧化物层；
    可选地，所述工作气体包括笑气；
    可选地，所述硅原料气包括硅烷；
    可选地，生长背面第一含氮硅化合物层的方法包括：温度设为470-490℃，压力设为1650-1750Pa，通入氨气和硅原料气，恒温恒压235-245s，得到背面第一含氮硅化合物层；
    可选地，所述硅原料气包括硅烷；
    可选地，生长背面第二含氮硅化合物层的方法包括：温度设为470-490℃， 压力设为1650-1750Pa，通入氨气和硅原料气，恒温恒压125-135s，之后将温度设为470-490℃，压力设为1650-1750Pa，减少硅原料气的通入量，增加氨气的通入量，恒温恒压125-135s，得到背面第二含氮硅化合物；
    可选地，所述硅原料气包括硅烷；
    可选地，所述背面生长还包括：在生长背面第二含氮硅化合物层之后，进行抽真空和充保护性气体回常压，并取出产品。
  11. 根据权利要求8-10任一项所述的制备方法，其中，所述正面生长在生长正面第二硅氧化物层之前，先将带有PN且生长了正面第一硅氧化物层的硅片置于等离子体增强化学气相沉积炉中，进行抽真空，捡漏，再次抽真空，通入工作气体和硅原料气，并将反应器的温度设为490-510℃，压力设为195-205Pa，恒温恒压15-25s；可选地，所述工作气体包括笑气；可选地，所述硅原料气包括硅烷；
    可选地，生长正面第二硅氧化物层的方法包括：温度设为490-510℃，压力设为195-205Pa，通入工作气体和硅原料气，恒温恒压75-85s，之后抽真空15-25s，将温度设定为490-510℃，压力设定为225-235Pa，通入硅原料气和氨气，恒温恒压15-25s得到正面第二硅氧化物层；可选地，所述工作气体包括笑气；可选地，所述硅原料气包括硅烷；
    可选地，生长正面第一含氮硅化合物层的方法包括：温度设为490-510℃，压力设为225-235Pa，通入氨气和硅原料气，恒温恒压60-70s，得到正面第一含氮硅化合物层；可选地，所述硅原料气包括硅烷；
    可选地，生长正面第二含氮硅化合物层的方法包括：温度设为490-510℃，压力设为225-235Pa，通入氨气和硅原料气，恒温恒压155-165s，之后将温度设为490-510℃，压力设为225-235Pa，减少硅原料气的通入量，增加氨气的通入量，恒温恒压240-260s，之后温度设为490-510℃，压力设为185-195Pa，通入硅原料气、氨气和工作气体，恒温恒压155-165s，之后抽真空，再通入硅原料气和工作气体，温度设为490-510℃，压力设为175-185Pa，恒温恒压6-15s，得到正面第二含氮硅化合物层；可选地，所述硅原料气包括硅烷；所述工作气体包括笑气；
    可选地，生长正面第三硅氧化物层的方法包括：温度设为490-510℃，压力设为175-185Pa，通入工作气体和硅原料气，恒温恒压175-185s；可选地，所述工作气体包括笑气；可选地，所述硅原料气包括硅烷；
    可选地，所述正面生长还包括：在生长正面第三硅氧化物层之后，进行抽真空、清洗炉管、再次抽真空和回常压，并取出产品。
  12. 根据权利要求8-11任一项所述的制备方法，其包括以下步骤：
    在带有PN结的硅片的N型层一侧生长正面第一硅氧化物层后，再进行正面生长和背面生长，再制备银电极，得到所述双面太阳能电池；所述正面生长包括依次生长正面第二硅氧化物层、正面第一含氮硅化合物层、正面第二含氮硅化合物层和正面第三硅氧化物层；所述背面生长包括依次生长钝化层、背面 硅氧化物层、背面第一含氮硅化合物层和背面第二含氮硅化合物层；
    所述正面生长和背面生长均为等离子体增强化学气相沉积生长；
    生长钝化层的方法包括：温度设为310-330℃，压力设为1450-1550Pa，通入工作气体和钝化层原料气，恒温恒压170-190s，之后抽真空45-55s，将温度设定为470-490℃，压力设定为850-950Pa，通入工作气体和氨气，恒温恒压9-11s，之后保持温度、压力、工作气体以及氨气通入量维持340-360s，得到钝化层；
    生长背面硅氧化物层的方法包括：温度设为470-490℃，压力设为1450-1550Pa，通入工作气体和硅原料气，恒温恒压75-85s，之后抽真空290-310s，将温度设定为470-490℃，压力设定为1600-1800Pa，通入硅原料气和氨气，恒温恒压9-11s得到背面硅氧化物层；
    生长背面第一含氮硅化合物层的方法包括：温度设为470-490℃，压力设为1650-1750Pa，通入氨气和硅原料气，恒温恒压235-245s，得到背面第一含氮硅化合物层；
    生长背面第二含氮硅化合物层的方法包括：温度设为470-490℃，压力设为1650-1750Pa，通入氨气和硅原料气，恒温恒压125-135s，之后将温度设为470-490℃，压力设为1650-1750Pa，减少硅原料气的通入量，增加氨气的通入量，恒温恒压125-135s，得到背面第二含氮硅化合物；
    生长正面第二硅氧化物层的方法包括：温度设为490-510℃，压力设为195-205Pa，通入工作气体和硅原料气，恒温恒压75-85s，之后抽真空15-25s，将温度设定为490-510℃，压力设定为225-235Pa，通入硅原料气和氨气，恒温恒压15-25s得到正面第二硅氧化物层；
    生长正面第一含氮硅化合物层的方法包括：温度设为490-510℃，压力设为225-235Pa，通入氨气和硅原料气，恒温恒压60-70s，得到正面第一含氮硅化合物层；
    生长正面第二含氮硅化合物层的方法包括：温度设为490-510℃，压力设为225-235Pa，通入氨气和硅原料气，恒温恒压155-165s，之后将温度设为490-510℃，压力设为225-235Pa，减少硅原料气的通入量，增加氨气的通入量，恒温恒压240-260s，之后温度设为490-510℃，压力设为185-195Pa，通入硅原料气、氨气和工作气体，恒温恒压155-165s，之后抽真空，再通入硅原料气和工作气体，温度设为490-510℃，压力设为175-185Pa，恒温恒压6-15s，得到正面第二含氮硅化合物层；
    生长正面第三硅氧化物层的方法包括：温度设为490-510℃，压力设为175-185Pa，通入工作气体和硅原料气，恒温恒压175-185s。
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