WO2022183602A1 - 一种Mini LED背光板的制作方法及Mini LED背光板 - Google Patents

一种Mini LED背光板的制作方法及Mini LED背光板 Download PDF

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Publication number
WO2022183602A1
WO2022183602A1 PCT/CN2021/095712 CN2021095712W WO2022183602A1 WO 2022183602 A1 WO2022183602 A1 WO 2022183602A1 CN 2021095712 W CN2021095712 W CN 2021095712W WO 2022183602 A1 WO2022183602 A1 WO 2022183602A1
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WO
WIPO (PCT)
Prior art keywords
substrate
areas
display area
led backlight
backlight panel
Prior art date
Application number
PCT/CN2021/095712
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English (en)
French (fr)
Inventor
李兰艳
Original Assignee
Tcl华星光电技术有限公司
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Publication date
Application filed by Tcl华星光电技术有限公司 filed Critical Tcl华星光电技术有限公司
Priority to US17/419,297 priority Critical patent/US20230154940A1/en
Publication of WO2022183602A1 publication Critical patent/WO2022183602A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0025—Processes relating to coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Definitions

  • the present application relates to the field of display technology, and in particular, to a manufacturing method of a Mini LED backlight panel and a Mini LED backlight panel.
  • An existing method of forming a passivation coating is to coat the surface of the substrate with a passivation coating.
  • passivation coating materials with high reflectivity most of the light of the light source is directly reflected after passing through the passivation coating. It is difficult to reach the surface of the metal marker, and the exposure machine cannot be accurately aligned, so that the passivation coating cannot form the set pattern; in addition, when the passivation coating process is completed and then cut into the corresponding size Due to the high film thickness of the passivation coating and the inherent characteristics of the material, the passivation coating in the cutting area is prone to appear serrated during cutting, which may lead to edge cracking and peeling in severe cases.
  • Another existing method of forming the passivation coating is to not apply the passivation coating on the entire edge of the surface of the substrate where the metal markers are arranged, so as to facilitate the CCD lens to read the position of the metal markers for accurate exposure to the exposure machine.
  • the edge area of the substrate is wasted, and the maximum utilization rate of the substrate cannot be achieved, which will lead to a sharp increase in product cost.
  • Another existing method of forming the passivation coating is to not apply the passivation coating on the entire edge of the surface of the substrate where the metal markers are arranged, so as to facilitate the CCD lens to read the position of the metal markers for accurate exposure to the exposure machine.
  • the edge area of the substrate is wasted, and the maximum utilization rate of the substrate cannot be achieved, which will lead to a sharp increase in product cost.
  • Embodiments of the present application provide a manufacturing method of a Mini LED backlight board and a Mini LED backlight board, which can form a passivation coating with a set pattern, and at the same time achieve the maximum utilization rate of the substrate and reduce the product cost.
  • An embodiment of the present application provides a method for manufacturing a Mini LED backlight, including the following steps:
  • a substrate is provided, at least one display area is divided on the surface of one side of the substrate, and other areas on the surface of the substrate side except the at least one display area are non-display areas, and the non-display area is divided into at least one display area.
  • a mask is placed on the surface on one side of the substrate, and the mask covers the at least one display area and a part of the non-display area on the surface on one side of the substrate, so that the at least one marking area is exposed, using a hydrophilic material to form a thin film on the at least one marking area;
  • the mask is removed, and a hydrophobic material is coated on the entire surface of one side of the substrate to form a passivation coating.
  • Embodiments of the present application also provide a method for manufacturing a Mini LED backlight panel, including the following steps:
  • a substrate is provided, a surface of one side of the substrate is divided into a plurality of display areas, and other areas on the surface of the substrate side except for the plurality of display areas are non-display areas, and the non-display area is divided into A plurality of cutting areas separated by any two adjacent display areas;
  • a mask is placed on the surface of one side of the substrate, and the mask covers the plurality of display areas and part of the non-display areas on the surface of one side of the substrate, so that the plurality of cutting areas are exposed outside, Using hydrophilic material to form a layer of film on the plurality of cutting regions;
  • the substrate is cut along the plurality of cutting regions to form a single-piece backlight panel.
  • the embodiment of the present application also provides a MINI LED backlight panel, which is manufactured by the above-mentioned manufacturing method.
  • a mask is placed on the surface of the substrate side to cover other areas on the surface of the substrate side except for at least one marking area, and hydrophilic material is used on the exposed at least one marking area.
  • a thin film is formed, the mask is removed and a hydrophobic passivation coating is applied to the entire surface of one side of the substrate, due to the hydrophilic film formed on at least one marked area, the hydrophobic passivation coating can be applied during the coating.
  • FIG. 1 is a flowchart of a manufacturing method of a Mini LED backlight panel provided by an embodiment of the present application.
  • FIG. 2 is a first process flow diagram provided by the embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a Mini LED backlight panel provided by an embodiment of the present application.
  • FIG. 4 is a block diagram of a flowchart for forming a driving circuit structure according to an embodiment of the present application.
  • FIG. 5 is a second process flow chart provided by the embodiment of the present application.
  • FIG. 6 is a third process flow chart provided by the embodiment of the present application.
  • FIG. 7 is a fourth process flow diagram provided by the embodiment of the present application.
  • FIG. 8 is a fifth process flow diagram provided by the embodiment of the present application.
  • FIG. 9 is a sixth process flow chart provided by the embodiment of the present application.
  • FIG. 10 is a seventh process flow diagram provided by the embodiment of the present application.
  • FIG. 11 is an eighth process flow diagram provided by this embodiment of the application.
  • FIG. 12 is a ninth process flow diagram provided in this embodiment of the present application.
  • FIG. 13 is a tenth process flow chart provided by this embodiment of the present application.
  • FIG. 14 is an eleventh process flow chart provided by this embodiment of the present application.
  • FIG. 15 is a flowchart of another manufacturing method of a Mini LED backlight panel provided by an embodiment of the present application.
  • FIG. 1 is a flowchart of a method for manufacturing a Mini LED backlight provided by an embodiment of the application
  • FIG. 2 is a first process flowchart provided by an embodiment of the application
  • FIG. 3 is a flowchart of the application.
  • FIG. 4 is the flowchart of forming the driving circuit structure provided by the embodiment of the application
  • FIG. 5 is the second process flowchart provided by the embodiment of the application
  • FIG. 6 is the application
  • FIG. 7 is the fourth type of process flow diagram provided by the embodiment of the application
  • FIG. 8 is the fifth type of process flow diagram provided by the embodiment of the application
  • FIG. 9 is the embodiment of the application.
  • the sixth type of process flow diagram provided FIG. 10 is the seventh type of process flow diagram provided by the embodiment of the application
  • FIG. 11 is the eighth type of process flow diagram provided by the embodiment of the application
  • FIG. 12 is provided by the embodiment of the application.
  • FIG. 13 is the tenth process flow chart provided by the embodiment of the application
  • FIG. 14 is the eleventh process flow chart provided by the embodiment of the application.
  • the Mini The manufacturing method of the LED backlight panel includes the following steps:
  • Step 10 as shown in FIG. 2 , a substrate 100 is provided.
  • the surface of the substrate 100 is divided into a plurality of display areas 110 arranged in a rectangular array, and other areas of the plurality of display areas 110 are removed from the surface of the substrate 100 .
  • the non-display area 120 is divided into a plurality of marking areas 130, and the plurality of marking areas 130 are respectively arranged in a one-to-one correspondence with the plurality of display areas 110.
  • Each marking area 130 is provided with a metal marker 140.
  • the display area 120 is further divided into a plurality of cutting areas 150 for separating any two adjacent display areas 110 .
  • the substrate 100 may be a glass substrate. It should be understood that the substrate 100 may also be made of other suitable rigid materials or flexible materials according to application requirements.
  • the display area 110 is used for arranging driving circuits and light-emitting devices to provide a display function.
  • the display area 110 is preferably arranged as a plurality of display areas 110 arranged in a rectangular array, so that it is convenient to process and fabricate a plurality of backlight panels on one substrate 100 to improve the performance of the display area.
  • Productivity is used for arranging driving circuits and light-emitting devices to provide a display function.
  • the display area 110 is preferably arranged as a plurality of display areas 110 arranged in a rectangular array, so that it is convenient to process and fabricate a plurality of backlight panels on one substrate 100 to improve the performance of the display area.
  • the plurality of marking areas 130 are respectively set in a one-to-one correspondence with the plurality of display areas 110 , and each marking area 130 is provided with a metal marker 140 , and the exposure machine is accurately positioned by the metal marker 140 , thereby forming the passivation of the set pattern. coating.
  • the backlight plate After the backlight plate is fabricated, it can be cut into a plurality of small pieces along the plurality of cutting areas 150 . It should be understood that, only one display area 110 and one corresponding marking area 130 may be provided on the substrate 100 . At this time, the backlight plate does not need to be cut into small pieces after the preparation is completed, so there is no need to divide and cut one side surface of the substrate 100 District 150.
  • Step 20 as shown in FIG. 3 , the structure of the driving circuit 200 is formed on the display area of the substrate 100 .
  • the driving circuit 200 includes a gate 210 , a first electrode 220 , a second electrode 230 , a third electrode 270 , a source-drain electrode 240 , an active layer 250 and a first binding electrode 260 .
  • the gate 210 and the first electrode 220 are in the same layer
  • the gate 210, the source-drain electrodes 240 and the active layer 250 constitute a thin film transistor
  • the first electrode 220, the second electrode 230 and the third electrode 270 are located on one side of the thin film transistor
  • the first binding electrode 260 is located on the side of the thin film transistor.
  • the second electrode 230 is electrically connected with the first electrode 220
  • the third electrode 270 is electrically connected with the second electrode 230
  • the third electrode 270 is used for electrical connection with the flip chip
  • the first binding electrode 260 is used for electrical connection with the flip-chip film.
  • the light emitting diodes are electrically connected.
  • the step of forming the structure of the driving circuit 200 on the display area of the substrate 100 includes the following steps:
  • Step 21 forming the gate electrode 210 and the first electrode 220 on the substrate 100 .
  • a first conductive layer 300 is formed on the substrate 100 , and the first conductive layer 300 is patterned to obtain a gate electrode 210 and a first electrode 220 provided on the same layer. .
  • an entire surface of the first conductive layer 300 is formed on the substrate 100, a photoresist layer covering the entire surface of the first conductive layer 300 is formed, the photoresist layer is exposed by a photomask, and the photoresist layer is exposed by a developing solution.
  • the first conductive layer 300 not covered by the photoresist layer is etched, and the remaining photoresist layer is removed to obtain the gate electrode 210 and the first electrode 220 .
  • Step 22 forming a second electrode 230 , a source-drain electrode 240 , an active layer 250 and a first binding electrode 260 , and the second electrode 230 is electrically connected to the first electrode 220 .
  • a first insulating layer 400 covering the gate electrode 210 , the first electrode 220 and the substrate 100 is formed, and a semiconductor is formed on the side of the first insulating layer 400 away from the substrate 100 .
  • the conductive layer 600 and the semiconductor layer 500 are patterned to obtain the second electrode 230 , the source-drain electrode 240 , the active layer 250 and the first binding electrode 260 .
  • the second electrode 230 is electrically connected to the first electrode 220 through the first via hole 280 . connect.
  • first insulating layer 400 covering the gate electrode 210 , the first electrode 220 and the substrate 100 .
  • the first insulating layer 400 is a gate insulating layer, and then an amorphous layer covering the first insulating layer 400 is sequentially formed
  • the silicon layer 510 and the n-type doped amorphous silicon layer 520 are sequentially formed.
  • An entire photoresist layer is formed on the n-type doped amorphous silicon layer 520 , the photoresist layer is exposed by a photomask, and after developing treatment with a developer solution, the n-type doped amorphous silicon corresponding to the first electrode 220 is etched layer 520 , the amorphous silicon layer 510 and the first insulating layer 400 to form a first via hole 280 penetrating the first insulating layer 400 , the n-type doped amorphous silicon layer 520 and the amorphous silicon layer 510 .
  • An entire second conductive layer 600 is formed in the first via hole 280 and on the n-type doped amorphous silicon layer 520 by sputtering deposition.
  • An entire photoresist layer is formed on the second conductive layer 600, and the photoresist layer is exposed by a halftone gray-scale mask to define a photoresist completely removed area, a photoresist semi-reserved area, and a photoresist completely reserved area.
  • the photoresist in the photoresist complete removal area is processed by the developer solution, the second conductive layer 600 , the amorphous silicon layer 510 and the n-type doped amorphous silicon layer 520 in the photoresist complete removal area are etched and removed to obtain the second electrode 230 and the second conductive layer 510 .
  • a binding electrode 260, the second electrode 230 is electrically connected to the first electrode 220 through the first via hole 280; after the developer processes the photoresist in the photoresist semi-reserved area, the n-type doping in the photoresist semi-reserved area is removed by etching
  • the amorphous silicon layer 520 and the second conductive layer 600 are the source-drain electrodes 240 and the active layer 250.
  • the source-drain electrodes 240 are disposed corresponding to the active layer 250 and are electrically connected to the active layer 250, and the photoresist completely reserved area is removed. photoresist layer.
  • Step 23 forming a third electrode 270 , and the third electrode 270 is electrically connected to the second electrode 230 .
  • a second insulating layer covering the first binding electrode 260 , the second electrode 230 , the source-drain electrode 240 , the active layer 250 and the first insulating layer 400 is formed Step 700 , forming a second via hole 290 penetrating the second insulating layer 700 and communicating with the second electrode 230 , forming a third via hole 295 penetrating the second insulating layer 700 and communicating with the first bonding electrode 260 .
  • a third conductive layer 800 is formed in the second via hole 290 and on the second insulating layer 700 , and the third conductive layer 800 is patterned to obtain a third electrode 270 , and the third electrode 270 passes through the second via hole 290 and the second Electrodes 230 are electrically connected.
  • a whole-surface third conductive layer 800 is formed in the second via hole 290 , in the third via hole 295 and on the second insulating layer 700 , and a whole-surface photoresist layer is formed on the third conductive layer 800 .
  • the photomask exposes the photoresist layer and develops the developer solution
  • the third conductive layer 800 is etched, the remaining photoresist layer is removed, and the first binding electrode 260 is exposed to obtain the third electrode 270 .
  • the preparation material of the third conductive layer 800 is indium tin oxide.
  • the third electrode 270 is electrically connected to the second electrode 230 through the second via hole 290 .
  • the substrate 100 provided in step 10 may already include the driving circuit 200 disposed in the display area 110 , and does not need to include a process step for forming the driving circuit 200 on the substrate 100 .
  • Step 30 cover the surface of the substrate 100 with a mask 900 , and the mask 900 covers the plurality of display areas 110 and part of the non-display area 120 on the surface of the substrate 100 side, so as to make a plurality of marking areas.
  • the 130 and the plurality of cutting regions 150 are exposed, and a film is formed on the plurality of marking regions 130 and the plurality of cutting regions 150 by using a hydrophilic material.
  • the mask 900 is used to block other areas on one side of the substrate 100 except the plurality of marking areas 130 and the plurality of cutting areas 150, and expose the plurality of marking areas 130 and the plurality of cutting areas 150, which is convenient for the hydrophilic material to be used in many areas.
  • a thin film is formed on the marking regions 130 and the cutting regions 150, and at the same time, the hydrophilic material will not be applied to other regions to affect the formation of a passivation coating on other regions.
  • the hydrophilic material is polymethyl methacrylate.
  • the hydrophilic material is formed into a thin film on the plurality of marking areas 130 and the plurality of cutting areas 150 by a steam spraying method or a spraying method.
  • Step 40 remove the mask 900, and coat a hydrophobic material on the entire surface of one side of the substrate 100 to form a passivation coating.
  • step 40 after removing the mask 900, when the hydrophobic passivation coating is applied on the entire surface of the substrate 100 side, since the plurality of marking areas 130 and the plurality of cutting areas 150 on the side of the substrate 100 are formed with The hydrophilic thin film and the hydrophobic passivation coating cannot be formed on the plurality of marking regions 130 and the plurality of cutting regions 150, and the metal markers 140 and the plurality of cutting regions 150 on the plurality of marking regions 130 are exposed. , a passivation coating may be formed on other regions on the surface of one side of the substrate 100 where the plurality of marking regions 130 and the plurality of cutting regions 150 are removed.
  • step 50 the substrate 100 is cut along the plurality of cutting regions 150 into a single backlight panel.
  • step 50 since the hydrophobic passivation coating cannot form a film on the cutting area 150, a plurality of cutting areas 150 are exposed, which can avoid cutting the passivation coating, and the passivation coating on the edge of the backlight panel will not appear. The condition of the outgoing wire being cracked and falling off. It should be understood that, if only one display area 110 is provided on the surface of one side of the substrate 100, the substrate 100 does not need to be cut.
  • the material of the hydrophobic passivation coating is WPR; the step of removing the mask 900 and coating the surface of one side of the substrate 100 with a hydrophobic material to form the passivation coating is the same as moving the substrate 100 along multiple lines.
  • the steps of cutting the strip cutting area 150 to form a single-piece backlight panel further include the following steps: sequentially performing first baking, exposing, developing and second baking processes on the substrate 100 .
  • WPR is a positive tone or negative tone photoresist material from JSR Micro, Inc. (Sunnyvale, CA) under the trademark WPR.
  • the WPR series photoresist materials are positive or negative tone photoresists with low curing temperatures and can be formed in thicknesses of about 5 microns to about 20 microns.
  • the RGB negative color resistance process of WPR material can form patterns by coating/exposure/development, which can be well connected with TFT-LCD (Thin Film Transistor Liquid Crystal Display) factories. The glass substrate is cut into small pieces for operation, which can greatly improve production efficiency.
  • the thickness of the passivation coating is less than 10 microns.
  • the passivation coating with a smaller thickness can reduce the cost, and at the same time have a high reflectivity of more than 80%, which can improve the optical quality of the backlight panel.
  • the surface of the substrate 100 is covered with the mask 900 to cover other areas on the surface of the substrate 100 except for the plurality of marking areas 130, and a hydrophilic material is used to cover the exposed areas on the surface of the substrate 100.
  • a thin film is formed on each of the marking regions 130, the mask 900 is removed and a hydrophobic passivation coating is applied on the entire surface of one side of the substrate 100, since the hydrophilic thin film formed on the plurality of marking regions 130 can make the hydrophobic coating It is difficult to form a film during coating, and the metal marker 140 is exposed, so that the exposure machine can be accurately positioned, and a passivation coating with a set pattern can be formed; at the same time, the surface of the substrate 100 can remove a plurality of marks The passivation coating can be applied to other areas of the area 130, which can realize the maximum utilization rate of the substrate 100 and reduce the product cost.
  • FIG. 15 is a flowchart of another method for fabricating a Mini LED backlight provided by an embodiment of the present application.
  • the manufacturing method of the Mini LED backlight panel includes the following steps:
  • a substrate 100 is provided.
  • the surface of the substrate 100 is divided into a plurality of display areas 110 , and other areas on the surface of the substrate 100 excluding the plurality of display areas 110 are the non-display areas 120 .
  • the non-display area 120 is divided into a plurality of cutting areas 150 for separating any two adjacent display areas 110 .
  • Step 20 ′ cover the surface of the substrate 100 with a mask 900 , and the mask 900 covers the plurality of display areas 110 and part of the non-display areas 120 on the surface of the substrate 100 side, so that a plurality of strips are cut
  • the regions 150 are exposed, and a hydrophilic material is used to form a thin film on the plurality of cutting regions 150 .
  • Step 30' remove the mask 900, and coat a hydrophobic material on the entire surface of one side of the substrate 100 to form a passivation coating.
  • Step 40' cutting the substrate 100 along the plurality of cutting regions 150 to form a single backlight panel.
  • the hydrophilic material is polymethyl methacrylate.
  • the hydrophilic material is formed into a thin film on the plurality of cutting regions 150 by steam spraying or spraying.
  • the non-display area 120 is further divided into a plurality of marking areas 130 , the plurality of marking areas 130 are respectively arranged in a one-to-one correspondence with the plurality of display areas 110 , and a metal is arranged on each marking area 130 .
  • Marker 140 in step 20', the mask covers the plurality of display areas 110 and part of the non-display area 120 on the surface of the substrate 100, so that the plurality of marking areas 130 and the plurality of cutting areas 150 are exposed, and the hydrophilic The material forms a thin film over the plurality of marking areas 130 and the plurality of cutting areas 150 .
  • the material of the hydrophobic passivation coating is WPR; between step 30 ′ and step 40 ′, the following steps are further included: first baking, exposing, developing and second baking sequentially on the substrate 100 Baked.
  • the embodiment of the present application also provides a MINI LED backlight panel, which is manufactured by the above-mentioned manufacturing method.

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Abstract

本申请实施例提供一种Mini LED背光板的制作方法及Mini LED背光板，包括：提供基板，并划分至少一个显示区，非显示区内划分至少一个带金属标记物的标记区；在基板上罩上面罩，至少一个标记区裸露，采用亲水性材料在至少一个标记区上形成一层薄膜；移开面罩，在基板上涂布疏水性的钝化涂层。将金属标记物露出，对曝光机准确定位。

Description

一种Mini LED背光板的制作方法及Mini LED背光板 技术领域
本申请涉及显示技术领域，特别涉及一种Mini LED背光板的制作方法及Mini LED背光板。
 背景技术
在Mini LED背光板制作中为保证薄膜晶体管器件工作稳定性，而且尽可能增大光利用率和光学品味，有一道钝化涂层制程，钝化涂层膜厚<30um，反射率>80%。为使钝化涂层能够在设定的位置形成图案，需要在基板的表面上设置金属标记物进行曝光机对位，曝光机在利用设置的金属标记物进行对位时，光源穿透钝化涂层，在金属标记物上进行反射，进而输入具有检测反射光功能的CCD(电荷耦合器件)镜头，从而完成钝化涂层在曝光机里的对位过程，从而使得钝化涂层可以按照设定的位置及尺寸，形成相应的图案。现有一种钝化涂层的形成方式是将基板的表面涂满钝化涂层，对于反射率较高的钝化涂层材料来说，光源经过钝化涂层后大部分光都被直接反射出去，而很难到达金属标记物表面，无法对曝光机进行准确对位，导致钝化涂层无法形成设定的图案；另外，在钝化涂层制程完成后续进行切割成相应的尺寸时，由于钝化涂层膜厚较高，且材料固有特性，在切割时容易出现切割区域的钝化涂层呈锯齿状，严重时会导致出现边缘龟裂脱落状况。现有另一种钝化涂层的形成方式是，在基板的表面上设置金属标记物的整个边缘上不涂布钝化涂层，便于CCD镜头读取金属标记物的位置以对曝光机准确定位，但是浪费了基板边缘区域，无法实现基板最大利用率，会导致产品成本急剧升高。
 技术问题
现有另一种钝化涂层的形成方式是，在基板的表面上设置金属标记物的整个边缘上不涂布钝化涂层，便于CCD镜头读取金属标记物的位置以对曝光机准确定位，但是浪费了基板边缘区域，无法实现基板最大利用率，会导致产品成本急剧升高。
 技术解决方案
本申请实施例提供一种Mini LED背光板的制作方法及Mini LED背光板，能够形成设定图案的钝化涂层，同时实现基板最大利用率，降低产品成本。
本申请实施例提供一种Mini LED背光板的制作方法，包括如下步骤：
提供基板，所述基板一侧的表面上划分有至少一个显示区，所述基板一侧的表面上除去所述至少一个显示区的其他区域为非显示区，所述非显示区内划分有至少一个标记区，所述标记区上设置有金属标记物；
在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述至少一个显示区和部分所述非显示区，以使所述至少一个标记区裸露在外，采用亲水性材料在所述至少一个标记区上形成一层薄膜；
移开所述面罩，在所述基板一侧的整个表面上涂布疏水性的材料形成钝化涂层。
本申请实施例还提供一种Mini LED背光板的制作方法，包括如下步骤：
提供基板，所述基板一侧的表面上划分有多个显示区，所述基板一侧的表面上除去所述多个显示区的其他区域为非显示区，所述非显示区内划分有将任意相邻两个所述显示区分隔开的多条切割区；
在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述多个显示区和部分所述非显示区，以使所述多条切割区裸露在外，采用亲水性材料在所述多条切割区上形成一层薄膜；
移开所述面罩，在所述基板一侧的整个表面上涂布疏水性的材料形成钝化涂层；
将所述基板沿着所述多条切割区切割形成单片的背光板。
本申请实施例还提供一种MINI LED背光板，采用如上所述制作方法制成。
 有益效果
本申请实施例的Mini LED背光板的制作方法中，通过在基板一侧的表面上罩上面罩来覆盖基板一侧的表面上除去至少一个标记区的其他区域，采用亲水性材料在裸露在外的至少一个标记区上形成一层薄膜，移开面罩并在基板一侧的整个表面上涂布疏水性的钝化涂层，由于至少一个标记区上形成的亲水性薄膜可使疏水性的钝化涂层在涂布时难以成膜而将金属标记物露出，从而可以对曝光机准确定位，能够形成设定图案的钝化涂层；同时，基板的表面除去至少一个标记区的其他区域均可涂布钝化涂层，能够实现基板最大利用率，降低产品成本。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍。显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的一种Mini LED背光板的制作方法的流程框图。
图2为本申请实施例提供的第一种工艺流程图。
图3为本申请实施例提供的Mini LED背光板的结构示意图。
图4为本申请实施例提供的形成驱动电路结构的流程框图。
图5为本申请实施例提供的第二种工艺流程图。
图6为本申请实施例提供的第三种工艺流程图。
图7为本申请实施例提供的第四种工艺流程图。
图8为本申请实施例提供的第五种工艺流程图。
图9为本申请实施例提供的第六种工艺流程图。
图10为本申请实施例提供的第七种工艺流程图。
图11为本申请实施例提供的第八种工艺流程图。
图12为本申请实施例提供的第九种工艺流程图。
图13为本申请实施例提供的第十种工艺流程图。
图14为本申请实施例提供的第十一种工艺流程图。
图15为本申请实施例提供的另一种Mini LED背光板的制作方法的流程框图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
请参阅图1-14，图1为本申请实施例提供的一种Mini LED背光板的制作方法的流程框图，图2为本申请实施例提供的第一种工艺流程图，图3为本申请实施例提供的Mini LED背光板的结构示意图，图4为本申请实施例提供的形成驱动电路结构的流程框图，图5为本申请实施例提供的第二种工艺流程图，图6为本申请实施例提供的第三种工艺流程图，图7为本申请实施例提供的第四种工艺流程图，图8为本申请实施例提供的第五种工艺流程图，图9为本申请实施例提供的第六种工艺流程图，图10为本申请实施例提供的第七种工艺流程图，图11为本申请实施例提供的第八种工艺流程图，图12为本申请实施例提供的第九种工艺流程图，图13为本申请实施例提供的第十种工艺流程图，图14为本申请实施例提供的第十一种工艺流程图。本申请实施例中，Mini LED背光板的制作方法包括如下步骤：
步骤10，如图2所示，提供基板100，基板100一侧的表面上划分有呈矩形阵列排布的多个显示区110，基板100一侧的表面上除去多个显示区110的其他区域为非显示区120，非显示区120内划分有多个标记区130，多个标记区130分别与多个显示区110一一对应设置，每个标记区130上设置有金属标记物140，非显示区120内还划分有将任意相邻两个显示区110分隔开的多条切割区150。
步骤10中，基板100可以为玻璃基板，应当理解的是根据应用需求，基板100也可以用其他合适的刚性材质或柔性材质制作。显示区110用于设置驱动电路和发光器件以提供显示功能，显示区110优选地设置为呈矩形阵列排布的多个显示区110，从而便于在一块基板100上加工制作多个背光板以提高生产效率。多个标记区130分别与多个显示区110一一对应设置，每个标记区130上设置有金属标记物140，通过金属标记物140来对曝光机准确定位，从而形成设定图案的钝化涂层。背光板制作完成后，可以沿着多条切割区150切割成多个小片。应当理解的是，基板100上也可以仅设置一个显示区110和一个与之相对应的标记区130，此时背光板制备完成后无需切割成小片，因此基板100的一侧表面上不用划分切割区150。
步骤20，如图3所示，在基板100的显示区上形成驱动电路200结构。
驱动电路200包括栅极210、第一电极220、第二电极230、第三电极270、源漏电极240、有源层250以及第一绑定电极260，栅极210与第一电极220同层设置，栅极210、源漏电极240和有源层250构成薄膜晶体管，第一电极220、第二电极230和第三电极270位于薄膜晶体管的一侧，第一绑定电极260位于薄膜晶体管的另一侧，第二电极230与第一电极220电连接，第三电极270与第二电极230电连接，第三电极270用于与覆晶薄膜电连接，第一绑定电极260用于与发光二极管电连接。
一些实施例中，如图4所示，在基板100的显示区上形成驱动电路200结构的步骤包括如下步骤：
步骤21，在基板100上形成栅极210以及第一电极220。
可选的，如图5、6所示，步骤21中，在基板100上形成第一导电层300，对第一导电层300图案化处理，得到同层设置的栅极210以及第一电极220。
具体的，在基板100上形成整面的第一导电层300，形成覆盖第一导电层300的整面光阻层，利用光罩对光阻层进行曝光，且利用显影液对光阻层进行显影处理，蚀刻未被光阻层覆盖的第一导电层300，去除剩余的光阻层，得栅极210以及第一电极220。
步骤22，形成第二电极230、源漏电极240、有源层250以及第一绑定电极260，第二电极230与第一电极220电连接。
可选的，如图7-10所示，步骤22中，形成覆盖栅极210、第一电极220以及基板100的第一绝缘层400，在第一绝缘层400远离基板100的一侧形成半导体层500，形成贯穿第一绝缘层400以及半导体层500并连通至第一电极220的第一过孔280；在第一过孔280中以及半导体层500上形成第二导电层600，对第二导电层600以及半导体层500图案化处理，得到第二电极230、源漏电极240、有源层250以及第一绑定电极260，第二电极230通过第一过孔280与第一电极220电连接。
具体的，采用化学气相沉积形成覆盖栅极210、第一电极220以及基板100的第一绝缘层400，第一绝缘层400为栅极绝缘层，再依次形成覆盖第一绝缘层400的非晶硅层510以及n型掺杂非晶硅层520。在n型掺杂非晶硅层520上形成整面的光阻层，利用光罩对光阻层进行曝光，经过显影液显影处理后，蚀刻对应第一电极220的n型掺杂非晶硅层520、非晶硅层510以及第一绝缘层400，以形成贯穿第一绝缘层400、n型掺杂非晶硅层520以及非晶硅层510的第一过孔280。采用溅射沉积于第一过孔280中以及n型掺杂非晶硅层520上形成整面的第二导电层600。在第二导电层600上形成整面的光阻层，采用半色调灰阶掩膜板对光阻层进行曝光，以定义光阻完全去除区、光阻半保留区以及光阻完全保留区，显影液处理光阻完全去除区的光阻后，蚀刻去除光阻完全去除区的第二导电层600、非晶硅层510以及n型掺杂非晶硅层520，得第二电极230以及第一绑定电极260，第二电极230通过第一过孔280与第一电极220电性连接；显影液处理光阻半保留区的光阻后，蚀刻去除光阻半保留区的n型掺杂非晶硅层520以及第二导电层600，得源漏电极240以及有源层250，源漏电极240对应有源层250设置且与有源层250电性连接，去除光阻完全保留区的光阻层。
步骤23，形成第三电极270，第三电极270与第二电极230电连接。
可选的，如图11-13所示，步骤23中，形成覆盖第一绑定电极260、第二电极230、源漏电极240、有源层250以及第一绝缘层400的第二绝缘层700，形成贯穿第二绝缘层700并连通至第二电极230的第二过孔290，形成贯穿第二绝缘层700并连通至第一绑定电极260的第三过孔295。在第二过孔290中以及第二绝缘层700上形成第三导电层800，对第三导电层800图案化处理，得到第三电极270，第三电极270通过第二过孔290与第二电极230电连接。
具体的，在第二过孔290中、第三过孔295中以及第二绝缘层700上形成整面的第三导电层800，在第三导电层800上形成整面的光阻层，利用光罩对光阻层进行曝光以及显影液显影后，蚀刻第三导电层800，去除剩余的光阻层，使第一绑定电极260暴露，得第三电极270。第三导电层800的制备材料为氧化铟锡。第三电极270通过第二过孔290与第二电极230电连接。
应当理解的是，本方法中，步骤10中提供的基板100可以是已经包含了设置在显示区110的驱动电路200，而无需包括专门在基板100形成驱动电路200的工艺步骤。
步骤30，如图14所示，在基板100一侧的表面上罩上面罩900，面罩900覆盖基板100一侧的表面的多个显示区110和部分非显示区120，以使多个标记区130和多条切割区150裸露在外，采用亲水性材料在多个标记区130和多条切割区150上形成一层薄膜。
步骤30中，面罩900用于遮挡基板100一侧除去多个标记区130和多条切割区150的其他区域，并且露出多个标记区130和多条切割区150，便于亲水性材料在多个标记区130和多条切割区150上形成薄膜，同时亲水性材料不会涂布到其他区域影响其他区域上形成钝化涂层。
一些实施例中，亲水性材料为聚甲基丙烯酸甲酯。
一些实施例中，采用蒸汽喷雾方式或喷淋方式将亲水性材料在多个标记区130和多条切割区150上形成薄膜。
步骤40，移开面罩900，在基板100一侧的整个表面上涂布疏水性的材料形成钝化涂层。
步骤40中，移开面罩900后，在基板100一侧的整个表面上涂布疏水性的钝化涂层时，由于基板100一侧的多个标记区130和多条切割区150上形成有亲水性的薄膜，疏水性的钝化涂层在多个标记区130和多条切割区150上无法成膜，而将多个标记区130上的金属标记物140和多条切割区150露出，基板100一侧的表面上除去多个标记区130和多条切割区150的其他区域可以形成钝化涂层。
步骤50，将基板100沿着多条切割区150切割成单片的背光板。
步骤50中，由于疏水性的钝化涂层在切割区150上无法成膜，而将多条切割区150露出，能够避免切割到钝化涂层，不会出现背光板边缘的钝化涂层出线龟裂脱落的状况。应当理解的是，如果基板100一侧的表面仅设置一个显示区110时，无需对基板100进行切割。
一些实施例中，疏水性的钝化涂层的材料为WPR；移开面罩900，在基板100一侧的表面上涂布疏水性的材料形成钝化涂层的步骤与将基板100沿着多条切割区150切割形成单片的背光板的步骤之间还包括如下步骤：对基板100依次进行第一次烘烤、曝光、显影和第二次烘烤处理。
WPR为来自捷时雅迈科公司(JSR Micro，Inc.)(加利福亚州桑尼维尔)的商标为WPR的正型色调或负型色调光致抗蚀剂材料。WPR系列光致抗蚀剂材料为具有低固化温度的正型或负型光致抗蚀剂且能够以约5微米到约20微米的厚度形成。WPR材料的RGB负型色阻工艺，可以通过涂布/曝光/显影形成图形，能很好与TFT-LCD(薄膜晶体管液晶显示器)厂很好衔接，无需在涂布钝化涂层工艺之前将玻璃基板切成小片进行作业，能够极大提升生产效率。
优选的，钝化涂层的厚度小于10微米。较小厚度的钝化涂层可减少成本，同时具有80%以上较高的反射率，能够提高背光板的光学品味。
本申请实施例的Mini LED背光板的制作方法中，通过在基板100一侧的表面上罩上面罩900来覆盖基板100一侧的表面上除去多个标记区130的其他区域，采用亲水性材料在裸露在外的多个标记区130上形成一层薄膜，移开面罩900并在基板100一侧的整个表面上涂布疏水性的钝化涂层，由于多个标记区130上形成的亲水性薄膜可使疏水性的钝化涂层在涂布时难以成膜而将金属标记物140露出，从而可以对曝光机准确定位，能够形成设定图案的钝化涂层；同时，基板100的表面除去多个标记区130的其他区域均可涂布钝化涂层，能够实现基板100最大利用率，降低产品成本。
请参阅图15，图15为本申请实施例提供的另一种Mini LED背光板的制作方法的流程框图。本申请实施例中，Mini LED背光板的制作方法包括如下步骤：
步骤10’，结合图2所示，提供基板100，基板100一侧的表面上划分有多个显示区110，基板100一侧的表面上除去多个显示区110的其他区域为非显示区120，非显示区120内划分有将任意相邻两个显示区110分隔开的多条切割区150。
步骤20’，结合图14所示，在基板100一侧的表面上罩上面罩900，面罩900覆盖基板100一侧的表面的多个显示区110和部分非显示区120，以使多条切割区150裸露在外，采用亲水性材料在多条切割区150上形成一层薄膜。
步骤30’，移开面罩900，在基板100一侧的整个表面上涂布疏水性的材料形成钝化涂层。
步骤40’，将基板100沿着多条切割区150切割形成单片的背光板。
本申请实施例的Mini LED背光板的制作方法中，由于疏水性的钝化涂层在切割区150上无法成膜，而将多条切割区150露出，能够避免将基板100切割形成单片的背光板时切割到钝化涂层，不会出现背光板边缘的钝化涂层出线龟裂脱落的状况。
一些实施例中，亲水性材料为聚甲基丙烯酸甲酯。
一些实施例中，采用蒸汽喷雾方式或喷淋方式将亲水性材料在多条切割区150上形成薄膜。
一些实施例中，步骤10’中，非显示区120内还划分有多个标记区130，多个标记区130分别与多个显示区110一一对应设置，每个标记区130上设置有金属标记物140；步骤20’中，面罩覆盖基板100一侧的表面的多个显示区110和部分非显示区120，以使多个标记区130和多条切割区150裸露在外，采用亲水性材料在多个标记区130和多条切割区150上形成一层薄膜。
一些实施例中，疏水性的钝化涂层的材料为WPR；步骤30’与步骤40’之间还包括如下步骤：对基板100依次进行第一次烘烤、曝光、显影和第二次烘烤处理。
本申请实施例还提供一种MINI LED背光板，采用如上所述制作方法制成。
以上对本申请实施例提供的Mini LED背光板的制作方法及Mini LED背光板进行了详细介绍。本文中应用了具体个例对本申请的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本申请。同时，对于本领域的技术人员，依据本申请的思想，在具体实施方式及应用范围上均会有改变之处，综上，本说明书内容不应理解为对本申请的限制。

Claims (20)

  1. 一种Mini LED背光板的制作方法，其中，包括如下步骤：
    提供基板，所述基板一侧的表面上划分有至少一个显示区，所述基板一侧的表面上除去所述至少一个显示区的其他区域为非显示区，所述非显示区内划分有至少一个标记区，所述标记区上设置有金属标记物；
    在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述至少一个显示区和部分所述非显示区，以使所述至少一个标记区裸露在外，采用亲水性材料在所述至少一个标记区上形成一层薄膜；
    移开所述面罩，在所述基板一侧的整个表面上涂布疏水性的材料形成钝化涂层。
  2. 根据权利要求1所述的Mini LED背光板的制作方法，其中，提供基板，所述基板一侧的表面上划分有至少一个显示区，所述基板一侧的表面上除去所述至少一个显示区的其他区域为非显示区，所述非显示区内划分有至少一个标记区，所述标记区上设置有金属标记物的步骤包括：
    所述基板一侧的表面上划分有呈矩形阵列排布的多个显示区，所述非显示区内划分有多个标记区，所述多个标记区分别与所述多个显示区一一对应设置，所述非显示区内还划分有将任意相邻两个所述显示区分隔开的多条切割区。
  3. 根据权利要求2所述的Mini LED背光板的制作方法，其中，在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述至少一个显示区和部分所述非显示区，以使所述至少一个标记区裸露在外，采用亲水性材料在所述至少一个标记区上形成一层薄膜的步骤包括：
    所述面罩覆盖所述基板一侧的表面的所述多个显示区和部分所述非显示区，以使所述多个标记区和多条切割区裸露在外，采用亲水性材料在所述多个标记区和多条切割区上形成一层薄膜。
  4. 根据权利要求3所述的Mini LED背光板的制作方法，其中，移开所述面罩，在所述基板一侧的表面上涂布疏水性的材料形成钝化涂层的步骤之后还包括如下步骤：
    将所述基板沿着所述多条切割区切割形成单片的背光板。
  5. 根据权利要求4所述的Mini LED背光板的制作方法，其中，所述钝化涂层的材料为WPR；
    移开所述面罩，在所述基板一侧的表面上涂布疏水性的材料形成钝化涂层的步骤与将所述基板沿着所述多条切割区切割形成单片的背光板的步骤之间还包括如下步骤：
    对所述基板依次进行第一次烘烤、曝光、显影和第二次烘烤处理。
  6. 根据权利要求5所述的Mini LED背光板的制作方法，其中，所述钝化涂层的厚度小于10微米。
  7. 根据权利要求5所述的Mini LED背光板的制作方法，其中，所述亲水性材料为聚甲基丙烯酸甲酯。
  8. 根据权利要求7所述的Mini LED背光板的制作方法，其中，采用蒸汽喷雾方式或喷淋方式将所述亲水性材料在所述多个标记区和多条切割区上形成所述薄膜。
  9. 一种Mini LED背光板的制作方法，其中，包括如下步骤：
    提供基板，所述基板一侧的表面上划分有多个显示区，所述基板一侧的表面上除去所述多个显示区的其他区域为非显示区，所述非显示区内划分有将任意相邻两个所述显示区分隔开的多条切割区；
    在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述多个显示区和部分所述非显示区，以使所述多条切割区裸露在外，采用亲水性材料在所述多条切割区上形成一层薄膜；
    移开所述面罩，在所述基板一侧的整个表面上涂布疏水性的材料形成钝化涂层；
    将所述基板沿着所述多条切割区切割形成单片的背光板。
  10. 根据权利要求9所述的Mini LED背光板的制作方法，其中，提供基板，所述基板一侧的表面上划分有多个显示区，所述基板一侧的表面上除去所述多个显示区的其他区域为非显示区，所述非显示区内划分有将任意相邻两个所述显示区分隔开的多条切割区的步骤包括：
    所述非显示区内还划分有多个标记区，所述多个标记区分别与所述多个显示区一一对应设置，所述标记区上设置有金属标记物。
  11. 根据权利要求10所述的Mini LED背光板的制作方法，其中，
    在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述多个显示区和部分所述非显示区，以使所述多条切割区裸露在外，采用亲水性材料在所述多条切割区上形成一层薄膜的步骤包括：
    所述面罩覆盖所述基板一侧的表面的所述多个显示区和部分所述非显示区，以使所述多个标记区和多条切割区裸露在外，采用亲水性材料在所述多个标记区和多条切割区上形成一层薄膜。
  12. 根据权利要求9所述的Mini LED背光板的制作方法，其中，所述钝化涂层的材料为WPR；
    移开所述面罩，在所述基板一侧的表面上涂布疏水性的材料形成钝化涂层的步骤与将所述基板沿着所述多条切割区切割形成单片的背光板的步骤之间还包括如下步骤：
    对所述基板依次进行第一次烘烤、曝光、显影和第二次烘烤处理。
  13. 一种MINI LED背光板，其中，制作形成所述MINI LED背光板的方法包括：
    提供基板，所述基板一侧的表面上划分有至少一个显示区，所述基板一侧的表面上除去所述至少一个显示区的其他区域为非显示区，所述非显示区内划分有至少一个标记区，所述标记区上设置有金属标记物；
    在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述至少一个显示区和部分所述非显示区，以使所述至少一个标记区裸露在外，采用亲水性材料在所述至少一个标记区上形成一层薄膜；
    移开所述面罩，在所述基板一侧的整个表面上涂布疏水性的材料形成钝化涂层。
  14. 根据权利要求13所述的MINI LED背光板，其中，制作形成所述MINI LED背光板的方法中，提供基板，所述基板一侧的表面上划分有至少一个显示区，所述基板一侧的表面上除去所述至少一个显示区的其他区域为非显示区，所述非显示区内划分有至少一个标记区，所述标记区上设置有金属标记物的步骤包括：
    所述基板一侧的表面上划分有呈矩形阵列排布的多个显示区，所述非显示区内划分有多个标记区，所述多个标记区分别与所述多个显示区一一对应设置，所述非显示区内还划分有将任意相邻两个所述显示区分隔开的多条切割区。
  15. 根据权利要求14所述的MINI LED背光板，其中，制作形成所述MINI LED背光板的方法中，在所述基板一侧的表面上罩上面罩，所述面罩覆盖所述基板一侧的表面的所述至少一个显示区和部分所述非显示区，以使所述至少一个标记区裸露在外，采用亲水性材料在所述至少一个标记区上形成一层薄膜的步骤包括：
    所述面罩覆盖所述基板一侧的表面的所述多个显示区和部分所述非显示区，以使所述多个标记区和多条切割区裸露在外，采用亲水性材料在所述多个标记区和多条切割区上形成一层薄膜。
  16. 根据权利要求15所述的MINI LED背光板，其中，制作形成所述MINI LED背光板的方法中，移开所述面罩，在所述基板一侧的表面上涂布疏水性的材料形成钝化涂层的步骤之后还包括如下步骤：
    将所述基板沿着所述多条切割区切割形成单片的背光板。
  17. 根据权利要求16所述的MINI LED背光板，其中，制作形成所述MINI LED背光板的方法中，所述钝化涂层的材料为WPR；
    移开所述面罩，在所述基板一侧的表面上涂布疏水性的材料形成钝化涂层的步骤与将所述基板沿着所述多条切割区切割形成单片的背光板的步骤之间还包括如下步骤：
    对所述基板依次进行第一次烘烤、曝光、显影和第二次烘烤处理。
  18. 根据权利要求17所述的MINI LED背光板，其中，所述钝化涂层的厚度小于10微米。
  19. 根据权利要求17所述的MINI LED背光板，其中，所述亲水性材料为聚甲基丙烯酸甲酯。
  20. 根据权利要求19所述的MINI LED背光板，其中，采用蒸汽喷雾方式或喷淋方式将所述亲水性材料在所述多个标记区和多条切割区上形成所述薄膜。
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