WO2022160527A1 - 显示面板及其制作方法 - Google Patents

显示面板及其制作方法 Download PDF

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Publication number
WO2022160527A1
WO2022160527A1 PCT/CN2021/095913 CN2021095913W WO2022160527A1 WO 2022160527 A1 WO2022160527 A1 WO 2022160527A1 CN 2021095913 W CN2021095913 W CN 2021095913W WO 2022160527 A1 WO2022160527 A1 WO 2022160527A1
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WO
WIPO (PCT)
Prior art keywords
led chip
display panel
sacrificial layer
array substrate
manufacturing
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PCT/CN2021/095913
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English (en)
French (fr)
Inventor
刘俊领
Original Assignee
深圳市华星光电半导体显示技术有限公司
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Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US17/419,731 priority Critical patent/US11908983B2/en
Publication of WO2022160527A1 publication Critical patent/WO2022160527A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/56—Materials, e.g. epoxy or silicone resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape

Definitions

  • the present application relates to the field of display technology, and in particular, to a display panel and a manufacturing method thereof.
  • Mini LED Mini Light Emitting Diode, sub-millimeter light-emitting diode
  • Micro LED Micro LED
  • Light Emitting Diode (miniature light-emitting diode) display panels have been widely developed for direct display or as a backlight source for display devices. and the current LCD (Liquid Crystal Display, liquid crystal display), OLED (Organic Compared with Light-Emitting Diode, organic light-emitting diode) display panels, it has the advantages of fast response, high color gamut, high PPI, and low energy consumption.
  • Mini LED and Micro LED technology has many difficulties and complex technology, especially its key technology mass transfer technology and LED particle miniaturization have become technical bottlenecks.
  • Mini-LED display panel is a technology that transfers LED chips to the backplane, and the backplane itself or the transferred device drives the LED chips to emit light. This type of product can be used as a backlight to play the role of partition control, and can also be used as a direct display Mini LED display panel, that is, direct display. When Mini When an LED product is used as a direct display product, it has higher requirements on its contrast ratio.
  • Embodiments of the present application provide a display panel and a manufacturing method thereof, which are used to improve the contrast ratio of the display panel.
  • An embodiment of the present application provides a method for manufacturing a display panel, comprising the following steps:
  • An array substrate is provided, the array substrate has a first surface and a second surface arranged oppositely;
  • An LED chip with a sacrificial layer is formed on the first surface, the LED chip is disposed on the array substrate, and the sacrificial layer is disposed on the side of the LED chip away from the array substrate;
  • the black glue material and the sacrificial layer are heated at a preset temperature, the black glue material is cured to form a black glue layer, and the sacrificial layer is decomposed.
  • the method before the step of forming the LED chip with the sacrificial layer on the first surface, the method further includes:
  • the material of the sacrificial layer is coated on the LED chip to form the LED chip having the sacrificial layer.
  • the material of the sacrificial layer is citric acid colloid.
  • the method before the step of forming the LED chip with the sacrificial layer on the first surface, the method further includes:
  • the LED chip is placed in a vacuum drying oven and dried at a temperature of 80 degrees Celsius to 120 degrees Celsius to form the LED chip with the sacrificial layer.
  • the step of forming an LED chip with a sacrificial layer on the first surface includes:
  • the LED chip with the sacrificial layer is formed on the first surface by a die-solid suction and release process, a die-spinning process or a laser transfer process.
  • the method further includes:
  • the side of the LED chip away from the array substrate is cleaned and air-dried.
  • the method further includes:
  • a transparent adhesive layer is formed on the side of the black adhesive layer away from the array substrate, and the transparent adhesive layer covers the LED chip.
  • the steps of cleaning and air-drying the side of the LED chip away from the array substrate include:
  • a blower is used to air dry the cleaning agent remaining on the array substrate.
  • the preset temperature is greater than 140 degrees Celsius.
  • the thickness of the sacrificial layer is between 1 micrometer and 120 micrometers.
  • the coating thickness of the black glue material is less than three times the thickness of the sacrificial layer.
  • An embodiment of the present application also provides a method for manufacturing a display panel, comprising the following steps:
  • An array substrate is provided, the array substrate has a first surface and a second surface arranged oppositely;
  • a material of a sacrificial layer is coated on an LED chip to form the LED chip with the sacrificial layer, the LED chip is disposed on the array substrate, and the sacrificial layer is disposed on the LED chip away from the array one side of the substrate;
  • the black glue material is cured to form a black glue layer, and the sacrificial layer is decomposed;
  • a transparent adhesive layer is formed on the side of the black adhesive layer away from the array substrate, and the transparent adhesive layer covers the LED chip.
  • the material of the sacrificial layer is citric acid colloid.
  • the step of forming an LED chip with a sacrificial layer on the first surface includes:
  • the LED chip with the sacrificial layer is formed on the first surface by a die-solid suction and release process, a die-spinning process or a laser transfer process.
  • the preset temperature is greater than 140 degrees Celsius.
  • the thickness of the sacrificial layer is between 1 micrometer and 120 micrometers.
  • the coating thickness of the black glue material is less than three times the thickness of the sacrificial layer.
  • the preset temperature is greater than 140 degrees Celsius.
  • the embodiment of the present application further provides a display panel, the display panel is manufactured by the above-mentioned manufacturing method of the display panel, and the display panel includes an array substrate, an LED chip and a black glue layer;
  • the array substrate has a first surface and a second surface arranged oppositely;
  • the LED chip is arranged on the first surface
  • the black glue layer is arranged on the first side.
  • the display panel further includes a transparent adhesive layer, and the transparent adhesive layer is disposed on a side of the black adhesive layer away from the array substrate.
  • Embodiments of the present application provide a display panel and a manufacturing method thereof.
  • the manufacturing method of the display panel provided by the embodiments of the present application, first, an LED chip having a sacrificial layer is formed on a first surface of an array substrate, wherein the sacrificial layer is Set on the side of the LED chip away from the array substrate, then coat the black glue material on the first surface of the array substrate, and finally, cure the black glue material at a preset temperature to form a black glue layer, and in the process of heating and curing , the sacrificial layer is decomposed.
  • the manufacturing method of the display panel provided by the embodiment of the present application can be used to improve the contrast ratio of the display panel.
  • FIG. 1 is a schematic structural diagram of a display panel provided by an embodiment of the present application.
  • FIG. 2 is a flowchart of steps of a method for manufacturing a display panel provided by an embodiment of the present application
  • FIG. 3 is a schematic diagram of step B101 of the method for manufacturing a display panel provided by an embodiment of the present application
  • FIG. 4 is a schematic diagram of step B102 of the method for fabricating a display panel provided by an embodiment of the present application
  • FIG. 5 is a schematic diagram of step B103 of the method for fabricating a display panel provided by an embodiment of the present application.
  • FIG. 6 is a schematic diagram of step B104 of the method for fabricating a display panel provided by an embodiment of the present application.
  • the display panel 100 includes an array substrate 10 , an LED chip 20 , a black glue layer 30 and a transparent glue layer 40 .
  • the array substrate 10 has a first surface 10a and a second surface 10b disposed opposite to each other.
  • the LED chip 20 is disposed on the first surface 10a, and the black glue layer 30 is disposed on the first surface 10a.
  • the transparent adhesive layer 40 is disposed on the side of the black adhesive layer 30 away from the array substrate 10 .
  • the array substrate 10 includes a base layer 101 , a thin film transistor 102 , a gate insulating layer 103 , an interlayer dielectric layer 104 , a conductive pad 105 , a first passivation layer 106 , a first electrode 107 and a second passivation layer 108 .
  • the base layer 101 may include a first flexible substrate layer, a silicon dioxide layer, a second flexible substrate layer, and a buffer layer that are stacked in sequence.
  • the material of the second flexible substrate layer is the same as that of the first flexible substrate, which may include PI (polyimide), PET (polyethylene dicarboxylate), and PEN (polyethylene naphthalate) At least one of , PC (polycarbonate), PES (polyethersulfone), PAR (aromatic fluorotoluene containing polyarylate) or PCO (polycyclic olefin).
  • the buffer layer is composed of one or two or more stacked structures of silicon-containing nitride, silicon-containing oxide or silicon-containing oxynitride.
  • the thin film transistor 102 includes an active layer 102a, a gate electrode 102b, a source electrode 102c and a drain electrode 102d.
  • the active layer 102a is disposed on the base layer 101, the active layer 102a includes a channel region and a doping region, and the doping regions are located on both sides of the channel region.
  • the active layer 102a may be an oxide active layer or a low temperature polysilicon active layer.
  • the material of the active layer 102a is indium tin oxide, Ln-IZO, ITZO, ITGZO, HIZO, IZO(InZnO), ZnO:F, In 2 O 3 :Sn, In 2 can also be used O3 :Mo, Cd2SnO4 , ZnO:Al, TiO2 : Nb, Cd-Sn-O or other metal oxides.
  • the doping region may be a P-type doping region or an N-type doping region. When the doping region is a P-type doping region, the doping element of the doping region is one or a mixture of boron and indium. When the doping region is an N-type doping region, the doping element of the doping region is one or a mixture of phosphorus, arsenic and antimony.
  • the gate insulating layer 103 covers the active layer 102 a and the base layer 101 .
  • the material of the gate insulating layer 103 may be one of silicon nitride, silicon oxide, silicon oxynitride or aluminum oxide or any combination thereof.
  • the gate 102b is disposed on the gate insulating layer 103, and the orthographic projection of the gate 102b on the base layer 101 is completely covered by the orthographic projection of the active layer 102a on the base layer 101.
  • the material of the gate 102b can be selected from metals or alloys such as Cr, W, Ti, Ta, Mo, Al, Cu, etc., and the gate metal layer composed of multiple layers of metals can also meet the requirements.
  • the interlayer dielectric layer 104 covers the gate insulating layer 103 and the gate electrode 102b, wherein the interlayer dielectric layer 104 can be selected from oxides or oxygen-nitrogen compounds.
  • the source electrode 102c and the drain electrode 102d are respectively electrically connected to the doped regions on both sides of the channel region.
  • the source electrode 102c and the drain electrode 102d can be selected from metals or alloys such as Cr, W, Ti, Ta, Mo, Al, Cu, etc.
  • the gate metal layer composed of multiple layers of metals can also meet the requirements.
  • the conductive pad 105 is electrically connected to the drain electrode 102d.
  • the first passivation layer 106 is disposed on the side of the interlayer dielectric layer 104 away from the gate insulating layer 103 , and the first passivation layer 106 covers the interlayer dielectric layer 104 , the source electrode 102 c and the drain electrode 102 d and the conductive pad 105 .
  • the first electrode 107 is connected to the conductive pad 105 through a via hole.
  • the second passivation layer 108 covers the first electrode 107 and the first passivation layer 106 and exposes the first electrode 107 .
  • the materials of the first passivation layer 106 and the second passivation layer 108 may be inorganic non-metallic film materials of SiO x , SiO x /SiN x stack or SiO x /SiN x /Al 2 O 3 stack.
  • the display panel 100 provided in the embodiment of the present application may be used for direct display, or the display panel 100 may be used as a backlight source of a liquid crystal display device.
  • an LED chip having a sacrificial layer is formed on the first surface of the array substrate, wherein the sacrificial layer is disposed on the side of the LED chip away from the array substrate, and then, coating is applied on the first surface of the array substrate. Finally, the black glue material is cured at a preset temperature to form a black glue layer, and in the process of heating and curing, the sacrificial layer is decomposed. Since the LED chips of the display panel provided by the embodiment of the present application are not covered by the black glue material on the side of the LED chip away from the array substrate, the display panel of the embodiment of the present application can be used to improve the contrast ratio of the display panel.
  • an embodiment of the present application further provides a method for fabricating a display panel, including the following steps:
  • Step B101 Provide an array substrate, the array substrate has a first surface and a second surface disposed opposite to each other.
  • Step B101 includes:
  • a metal oxide layer is deposited on the base layer 101, and the metal oxide layer is patterned to form the active layer 102a.
  • a physical vapor sputtering method may be used to deposit a metal oxide layer, and then a photolithography process may be used to process the metal oxide layer to form the active layer 102a.
  • the material of the active layer 102a includes metal oxides, such as indium gallium zinc oxide, indium gallium tin oxide, indium gallium zinc tin oxide.
  • the thickness of the active layer 102a is between 400 angstroms and 800 angstroms, including 400 angstroms and 800 angstroms.
  • the gate insulating layer 103 is formed by chemical vapor deposition.
  • the gate insulating layer 103 covers the base layer 101 and the active layer 102a.
  • the material of the gate insulating layer 103 can be SiO x , SiO x /SiN x stack or SiO x /SiN x /Al 2 O 3 stack, and its thickness is between 2000 angstroms and 5000 angstroms, including 2000 angstroms and 5000 angstroms. Egypt.
  • a metal layer is deposited on the gate insulating layer 103 using a chemical vapor method.
  • the metal layer is patterned by a wet etching process or a metal lift-off process to form the gate electrode 102b.
  • an interlayer dielectric layer 104 is formed on the gate insulating layer 103 and the gate electrode 102b.
  • the interlayer dielectric layer 104 may be formed by chemical vapor deposition.
  • the second metal layer includes a source electrode 102c , a drain electrode 102d , and a conductive pad 105 .
  • the source electrode 102c and the drain electrode 102d are respectively electrically connected to the active layer 102a through via holes.
  • the conductive pad 105 is electrically connected to the drain electrode 102d. Among them, the conductive pads 105 are used for binding the LED chips.
  • a first passivation layer 106, a first electrode 107, and a second passivation layer 108 are sequentially formed on the second metal layer to form the array substrate 10.
  • the second passivation layer 108 is provided with openings, and the openings are exposed The first electrode 107 .
  • the array substrate 10 has a first surface 10a and a second surface 10b disposed opposite to each other.
  • Step B102 forming an LED chip with a sacrificial layer on the first surface, the LED chip is disposed on the array substrate, and the sacrificial layer is disposed on the side of the LED chip away from the array substrate.
  • an LED chip 20 having a sacrificial layer 109 is formed in the opening of the first surface 10a, and one side of the LED chip 20 is disposed in the opening and is electrically connected to the first electrode 107.
  • the sacrificial layer 109 is disposed on the side of the LED chip 20 away from the array substrate 10 .
  • the step of forming the LED chip 20 with the sacrificial layer 109 on the first side 10a includes:
  • the LED chip 20 having the sacrificial layer 109 is formed on the first surface 10a by a die-bonding suction and release process, a die-stinging process or a laser transfer process.
  • the LED chip 20 is set by the solid crystal suction and release, crystal sting or laser transfer process, which has high assembly density, small size and light weight of electronic products, high reliability, strong vibration resistance, low solder joint defect rate and good high frequency characteristics. This method reduces electromagnetic and radio frequency interference, is easy to automate, improves production efficiency, reduces costs, and saves materials, energy, equipment, manpower, and time.
  • Mass transfer includes electrostatic force transfer, van der Waals force transfer, magnetic force transfer, etc.
  • the LED chips 20 are arranged in a mass transfer method, and the brightness and arrangement uniformity are very consistent.
  • the method before the step of forming the LED chip with the sacrificial layer 109 on the first surface 10 a, the method further includes coating the material of the sacrificial layer 109 on the LED chip 20 to form the LED chip 20 with the sacrificial layer 109 .
  • the material of the sacrificial layer 109 is citric acid colloid.
  • the material of the sacrificial layer 109 may also be other organic acid colloids, for example, terpolymeric acid colloids and the like.
  • the thickness of the sacrificial layer 109 is between 1 micron and 120 microns.
  • the thickness of the sacrificial layer 109 is any one of 1 micron, 5 microns, 10 microns, 25 microns, 40 microns, 60 microns, 80 microns, 100 microns or 120 microns.
  • the steps of forming the LED chip 20 with the sacrificial layer 109 include:
  • the precursor liquid of citric acid colloid comprises at least one of magnesium chloride, nickel chloride and manganese chloride, a mixture of citric acid, ethanol and water
  • citric acid has strong complexation in solution, and the metal cations in the solution are complexed by citric acid molecules to form a stable network structure with uniform distribution of cations.
  • the citric acid gel method is to use multiple hydroxyl groups of citric acid to complex with metal ions to form a citrate sol, and without the action of multifunctional alcohol, it is directly dehydrated and dried into a foam-like xerogel.
  • 30% by mass of magnesium chloride and 70% by mass of citric acid are dissolved in an appropriate amount of mixed solution of ethanol and water, and stirred at a temperature of 60 to 70 degrees Celsius until lemon The acid and magnesium chloride are completely dissolved to form the precursor liquid of citric acid colloid. Then, the precursor liquid of citric acid colloid is coated on the LED chip, and then the LED chip is placed in a vacuum drying oven, and ethanol and water are dried at 80 degrees Celsius to 120 degrees Celsius to form citric acid colloid.
  • the LED chip 20 with the sacrificial layer 109 in order to make the LED chip have a suitable size, after the LED chip 20 with the sacrificial layer 109 is formed, it also includes patterning according to the size of the LED chip.
  • the LED chips 20 are patterned to form LED chips 20 of suitable dimensions.
  • Step B103 coating a black glue material on the array substrate, the black glue material covers the first side and the side of the sacrificial layer away from the array substrate.
  • a black glue material 110 is coated on the first surface 10 a of the array substrate 10 and the side of the sacrificial layer 109 away from the LED chip 20 , wherein the black glue material 110 may be silicone or epoxy glue.
  • this embodiment adopts the coating method of the black rubber material 110 in a small amount and multiple times to form a black rubber material layer with a uniform thickness.
  • the coating thickness of the black glue material 110 is less than three times the thickness of the sacrificial layer 109 . This arrangement prevents the black glue material 110 from covering the sides of the LED chip 20 , which is beneficial for the black glue material 110 on the LED chip 20 to fall off when the black glue material 110 and the sacrificial layer 109 are subsequently heated.
  • Step B104 heating the black glue material and the sacrificial layer at a preset temperature, the black glue material is cured to form a black glue layer, and the sacrificial layer is decomposed.
  • a heating device to heat the black glue material 110 and the sacrificial layer 109 .
  • the black glue material is cured to form the black glue layer 30 , and the sacrificial layer 109 is break down.
  • the citric acid colloid when the heating temperature is greater than the decomposition temperature of the citric acid colloid, the citric acid colloid is decomposed into acetone dicarboxylic acid, hydrogen and carbon dioxide, and then, in the process of continuing heating, Acetone is decomposed into carbon dioxide and water vapor. As a result, the citric acid colloid is decomposed, and the black glue material 110 on the citric acid colloid also falls off, so that the side of the LED chip 20 away from the array substrate 10 is not covered by the black glue material 110, and the contrast ratio of the display panel is improved. .
  • the preset temperature is greater than 140 degrees Celsius, eg, the preset temperature is 140 degrees Celsius, 160 degrees Celsius, 180 degrees Celsius, or 200 degrees Celsius. That is to say, in this embodiment, the preset temperature is greater than the decomposition temperature of the sacrificial layer 109 .
  • the purpose is to decompose the sacrificial layer 109 with a preset temperature during its curing.
  • step B104 after step B104 , it further includes cleaning and air-drying the side of the LED chip 20 away from the array substrate 10 , so as to clean the residue of the sacrificial layer 109 remaining on the LED chip 20 and adhering to the LED chip. Vinyl material 110 on 20. Specifically, the array substrate 10 is cleaned by spraying, and then the cleaning agent remaining on the array substrate 10 is air-dried by a blower.
  • the steps further include:
  • a transparent adhesive layer 40 is formed on the side of the black adhesive layer 30 away from the array substrate 10 , and the transparent adhesive layer 40 covers the LED chip 20 .
  • the transparent adhesive layer 40 is used to transmit the light emitted by the LED chip 20 , so that the light emitted by the LED chip 20 is visible to the human eye.
  • Embodiments of the present application provide a display panel and a manufacturing method thereof.
  • the manufacturing method of the display panel provided by the embodiments of the present application, first, an LED chip having a sacrificial layer is formed on a first surface of an array substrate, wherein the sacrificial layer is Set on the side of the LED chip away from the array substrate, then coat the black glue material on the first surface of the array substrate, and finally, cure the black glue material at a preset temperature to form a black glue layer, and in the process of heating and curing , the sacrificial layer is decomposed.
  • the manufacturing method of the display panel provided by the embodiment of the present application can be used to improve the contrast ratio of the display panel.
  • the manufacturing method of the display panel provided by the embodiment of the present application can also avoid the problem that the gap between the black glue layer and the LED chip due to poor process affects the optical effect of the display panel.
  • the problem of affecting the reliability of the display panel due to damage to the LED chip caused by the grinding process can also be avoided.

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Abstract

一种显示面板及其制作方法，显示面板的制作方法包括以下步骤：提供一阵列基板10，阵列基板（10）具有相对设置的第一面（10a）和第二面（10b）；在第一面（10a）上形成具有牺牲层（109）的LED芯片（20），LED芯片（20）设置在阵列基板（10）上，牺牲层（109）设置在LED芯片（20）远离阵列基板（10）的一面；在阵列基板（10）上涂布黑胶材料（110），黑胶材料（110）覆盖第一面（10a）以及覆盖牺牲层（109）远离阵列基板（10）的一面；在预设温度下加热黑胶材料（110）和牺牲层（109），黑胶材料（110）固化形成黑胶层（30），且牺牲层（109）被分解。

Description

显示面板及其制作方法 技术领域
本申请涉及显示技术领域，尤其涉及一种显示面板及其制作方法。
 背景技术
Mini LED（Mini Light Emitting Diode，次毫米发光二极管）显示面板或Micro LED（Micro Light Emitting Diode，微型发光二极管）显示面板用于直接显示或将其作为显示装置的背光源得到了广泛发展。和目前的LCD（Liquid Crystal Display，液晶显示器）、OLED（Organic Light-Emitting Diode，有机发光二极管）显示面板相比，具有反应快、高色域、高PPI、低能耗等优势。
但Mini LED和Micro LED技术难点多且技术复杂，特别是其关键技术巨量转移技术、LED颗粒微型化成为技术瓶颈。Mini-LED显示面板是将LED芯片转移到背板，背板自身或转移上去的器件驱动LED芯片发光的技术。该类产品可以作为背光，起到分区控制的作用，另外可作为直接显示的Mini LED显示面板，即直显。当Mini LED产品作为直接显示的产品时，对其对比度具有较高的要求。
故，有必要提出一种新的技术方案，以改善现有的显示面板对比度较低的技术问题。
 技术问题
本申请实施例提供一种显示面板及其制作方法，用于提高显示面板的对比度。
 技术解决方案
本申请实施例提供一种显示面板的制作方法，包括以下步骤：
提供一阵列基板，所述阵列基板具有相对设置的第一面和第二面；
在所述第一面上形成具有牺牲层的LED芯片，所述LED芯片设置在所述阵列基板上，所述牺牲层设置在所述LED芯片远离所述阵列基板的一面；
在所述阵列基板上涂布黑胶材料，所述黑胶材料覆盖所述第一面以及覆盖所述牺牲层远离所述阵列基板的一面；
在预设温度下加热所述黑胶材料和牺牲层，所述黑胶材料固化形成黑胶层，且所述牺牲层被分解。
在本申请实施例提供的显示面板的制作方法中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤之前，还包括：
在所述LED芯片上涂布所述牺牲层的材料，以形成具有所述牺牲层的所述LED芯片。
在本申请实施例提供的显示面板的制作方法中，所述牺牲层的材料为柠檬酸胶体。
在本申请实施例提供的显示面板的制作方法中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤之前，还包括：
在所述LED芯片上涂布柠檬酸胶体的前驱液；
将所述LED芯片放置于真空干燥箱内，在80摄氏度至120摄氏度之间烘干以形成具有所述牺牲层的所述LED芯片。
在本申请实施例提供的显示面板的制作方法中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤包括：
利用固晶吸放、刺晶或激光转移工艺在所述第一面上形成具有牺牲层的所述LED芯片。
在本申请实施例提供的显示面板的制作方法中，所述在预设温度下加热所述黑胶材料的步骤之后，还包括：
对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理。
在本申请实施例提供的显示面板的制作方法中，所述对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理的步骤之后，还包括：
在所述黑胶层远离所述阵列基板的一面形成透明胶层，所述透明胶层覆盖所述LED芯片。
在本申请实施例提供的显示面板的制作方法中，所述对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理的步骤包括：
采用喷淋的方式对所述阵列基板进行清洗；
采用鼓风机风干残留于所述阵列基板上的清洗剂。
在本申请实施例提供的显示面板的制作方法中，所述预设温度大于140摄氏度。
在本申请实施例提供的显示面板的制作方法中，所述牺牲层的厚度介于1微米至120微米之间。
在本申请实施例提供的显示面板的制作方法中，所述黑胶材料的涂布厚度小于所述牺牲层的厚度的三倍。
本申请实施例还提供一种显示面板的制作方法，包括以下步骤：
提供一阵列基板，所述阵列基板具有相对设置的第一面和第二面；
在LED芯片上涂布牺牲层的材料，以形成具有所述牺牲层的所述LED芯片，所述LED芯片设置在所述阵列基板上，所述牺牲层设置在所述LED芯片远离所述阵列基板的一面；
在所述阵列基板上涂布黑胶材料，所述黑胶材料覆盖所述第一面以及覆盖所述牺牲层远离所述阵列基板的一面；
在预设温度下加热所述黑胶材料和牺牲层，所述黑胶材料固化形成黑胶层，且所述牺牲层被分解；
对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理；
在所述黑胶层远离所述阵列基板的一面形成透明胶层，所述透明胶层覆盖所述LED芯片。
在本申请实施例提供的显示面板的制作方法中，所述牺牲层的材料为柠檬酸胶体。
在本申请实施例提供的显示面板的制作方法中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤包括：
利用固晶吸放、刺晶或激光转移工艺在所述第一面上形成具有牺牲层的所述LED芯片。
在本申请实施例提供的显示面板的制作方法中，所述预设温度大于140摄氏度。
在本申请实施例提供的显示面板的制作方法中，所述牺牲层的厚度介于1微米至120微米之间。
在本申请实施例提供的显示面板的制作方法中，所述黑胶材料的涂布厚度小于所述牺牲层的厚度的三倍。
在本申请实施例提供的显示面板的制作方法中，所述预设温度大于140摄氏度。
本申请实施例还提供一种显示面板，所述显示面板由上述的显示面板的制作方法制成，所述显示面板包括阵列基板、LED芯片以及黑胶层；
所述阵列基板具有相对设置的第一面和第二面；
所述LED芯片设置在所述第一面；
所述黑胶层设置在第一面上。
在本申请实施例提供的显示面板中，所述显示面板还包括透明胶层，所述透明胶层设置在所述黑胶层远离所述阵列基板的一面上。
 有益效果
本申请实施例提供一种显示面板及其制作方法，在本申请实施例提供的显示面板的制作方法中，首先，在阵列基板的第一面上形成具有牺牲层的LED芯片，其中，牺牲层设置在LED芯片远离阵列基板的一面，然后，在阵列基板的第一面涂布黑胶材料，最后，在预设温度下固化黑胶材料以形成黑胶层，并且，在加热固化的过程中，牺牲层被分解。由于本申请实施例的显示面板的LED芯片远离阵列基板一面的LED芯片不被黑胶材料覆盖，因此，本申请实施例提供的显示面板的制作方法可以用于提高显示面板的对比度。
 附图说明
为了更清楚地说明本申请实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请实施例提供的显示面板的结构示意图；
图2为本申请实施例提供的显示面板的制作方法的步骤流程图；
图3为本申请实施例提供的显示面板的制作方法的步骤B101的示意图；
图4为本申请实施例提供的显示面板的制作方法的步骤B102的示意图；
图5为本申请实施例提供的显示面板的制作方法的步骤B103的示意图；
图6为本申请实施例提供的显示面板的制作方法的步骤B104的示意图。
 本发明的实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地详细描述，请参照附图中的图式，其中相同的组件符号代表相同的组件，以下的说明是基于所示的本申请具体实施例，其不应被视为限制本申请未在此详述的其他具体实施例。本说明书所使用的词语“实施例”意指实例、示例或例证。
请参阅图1，本申请实施例提供一种显示面板，显示面板100包括阵列基板10、LED芯片20、黑胶层30以及透明胶层40。
阵列基板10具有相对设置的第一面10a和第二面10b。LED芯片20设置在第一面10a，黑胶层30设置在第一面10a上。透明胶层40设置在黑胶层30远离阵列基板10的一面上。
具体的，阵列基板10包括基底层101、薄膜晶体管102、栅极绝缘层103、层间介质层104、导电垫105、第一钝化层106、第一电极107以及第二钝化层108。
在一些实施例中，基底层101可以包括依次层叠设置的第一柔性衬底层、二氧化硅层、第二柔性衬底层、缓冲层。其中，第二柔性衬底层和第一柔性衬底的材料相同，其可以包括PI（聚酰亚胺）、PET（聚二甲酸乙二醇酯）、PEN（聚萘二甲酸乙二醇脂）、PC（聚碳酸酯）、PES（聚醚砜）、PAR（含有聚芳酯的芳族氟甲苯）或PCO（多环烯烃）中的至少一种。缓冲层由含硅的氮化物、含硅的氧化物或含硅的氮氧化物中的一种或两种及以上的堆栈结构组成。
薄膜晶体管102包括有源层102a、栅极102b、源极102c和漏极102d。其中，有源层102a设置在所述基底层101上，有源层102a包括沟道区和掺杂区，掺杂区位于沟道区的两侧。有源层102a可以是氧化物有源层或低温多晶硅有源层。例如，在一些实施例中，有源层102a的材料为氧化铟锡，也可以采用Ln-IZO、ITZO、ITGZO、HIZO、IZO(InZnO)、ZnO:F、In 2O 3:Sn、In 2O 3:Mo、Cd 2SnO 4、ZnO:Al、TiO 2:Nb、Cd-Sn-O或其他金属氧化物。掺杂区可以是P型掺杂区或N型掺杂区，当掺杂区为P型掺杂区时，掺杂区的掺杂元素为硼、铟中的一种或两种的混合。当掺杂区为N型掺杂区时，掺杂区的掺杂元素为磷、砷和锑中的一种或几种的混合。
栅极绝缘层103覆盖有源层102a和基底层101。其中，栅极绝缘层103的材料可以是氮化硅、氧化硅、氮氧化硅或三氧化二铝中的一种或其任意组合。
栅极102b设置在栅极绝缘层103上，并且，栅极102b在基底层101上的正投影被有源层102a在基底层101上的正投影完全覆盖。其中，栅极102b的材料可以选用Cr、W、Ti、Ta、Mo、Al、Cu等金属或合金，由多层金属组成的栅金属层也能满足需要。
层间介质层104覆盖栅极绝缘层103及栅极102b，其中，层间介质层104可以选用氧化物或者氧氮化合物。
源极102c和漏极102d分别与位于沟道区两侧的所述掺杂区电性连接。源极102c和漏极102d可以选用Cr、W、Ti、Ta、Mo、Al、Cu等金属或合金，由多层金属组成的栅金属层也能满足需要。
导电垫105与漏极102d电性连接。第一钝化层106设置在层间介质层104远离栅极绝缘层103的一面，且第一钝化层106覆盖层间介质层104、源极102c和漏极102d以及导电垫105。第一电极107通过过孔与导电垫105连接。
第二钝化层108覆盖第一电极107和第一钝化层106，且裸露第一电极107。
第一钝化层106和第二钝化层108的材质可以为SiO x、SiO x/SiN x叠层或SiO x/SiN x/Al 2O 3叠层的无机非金属膜层材料。
需要说明的是，本申请实施例提供的显示面板100可以用于直接显示，或者，显示面板100可以当做液晶显示装置的背光源。
本申请实施例提供的显示面板通过在阵列基板的第一面上形成具有牺牲层的LED芯片，其中，牺牲层设置在LED芯片远离阵列基板的一面，然后，在阵列基板的第一面涂布黑胶材料，最后，在预设温度下固化黑胶材料以形成黑胶层，并且，在加热固化的过程中，牺牲层被分解。由于本申请实施例提供的显示面板的LED芯片远离阵列基板一面的LED芯片不被黑胶材料覆盖，因此，本申请实施例的显示面板可以用于提高显示面板的对比度。
请参考图2，本申请实施例还提供一种显示面板的制作方法，包括以下步骤：
步骤B101：提供一阵列基板，阵列基板具有相对设置的第一面和第二面。
具体的，请参阅图3，图3为本申请实施例的显示面板的制作方法中步骤B101的示意图。步骤B101包括：
首先，在基底层101上沉积一金属氧化物层，并图案化金属氧化物层形成有源层102a。具体的，可采用物理气相溅射法沉积一金属氧化物层，随后采用光刻工艺处理金属氧化物层形成有源层102a。在一些实施例中，有源层102a的材料包括金属氧化物，比如铟镓锌氧化物、铟镓锡氧化物、铟镓锌锡氧化物。有源层102a厚度介于400埃-800埃之间，包含400埃和800埃。
其次，采用化学气相法沉积形成栅极绝缘层103。栅极绝缘层103覆盖基底层101和有源层102a。栅极绝缘层103的材质可为SiO x、SiO x/SiN x叠层或SiO x/SiN x/Al 2O 3叠层，其厚度介于2000埃-5000埃之间，包含2000埃和5000埃。
随后，采用化学气相法在栅极绝缘层103上沉积金属层。采用湿法蚀刻工艺或金属剥离工艺图案化该金属层形成栅极102b。
接下来，在栅极绝缘层103和栅极102b上形成层间介质层104。在一些实施例中，可以采用化学气相法沉积形成层间介质层104。
然后，在基底层101上形成第二金属层。第二金属层包括源极102c、漏极102d、导电垫105。源极102c和漏极102d分别通过过孔与有源层102a电性连接。导电垫105电性连接于漏极102d。其中，导电垫105用于绑定LED芯片。
最后，在第二金属层上依次形成第一钝化层106、第一电极107、第二钝化层108，以形成阵列基板10，第二钝化层108上开设有开孔，开孔裸露第一电极107。阵列基板10具有相对设置的第一面10a和第二面10b。
步骤B102：在第一面上形成具有牺牲层的LED芯片，LED芯片设置在阵列基板上，牺牲层设置在LED芯片远离阵列基板的一面。
具体的，请参阅图4，在第一面10a的开孔内形成具有牺牲层109的LED芯片20，LED芯片20的一面设置在开孔内，并与第一电极107电性连接，牺牲层109设置在LED芯片20远离阵列基板10的一面上。
在一些实施例中，在第一面10a上形成具有牺牲层109的LED芯片20的步骤包括：
利用固晶吸放、刺晶或激光转移工艺在第一面10a上形成具有牺牲层109的LED芯片20。采用固晶吸放、刺晶或激光转移工艺设置LED芯片20，组装密度高、电子产品体积小、重量轻，可靠性高、抗振能力强、焊点缺陷率低、高频特性好。这种方法减少了电磁和射频干扰，易于实现自动化，提高生产效率、降低成本，节省材料、能源、设备、人力、时间。巨量转移包括静电力转移、范德华力转移及磁力转移等，以巨量转移的方法设置LED芯片20，亮度、排列整齐度都非常一致。
在一些实施例中，在第一面10a形成具有牺牲层109的LED芯片的步骤之前，还包括在LED芯片20上涂布牺牲层109的材料，以形成具有牺牲层109的LED芯片20。其中，牺牲层109的材料为柠檬酸胶体。
在一些实施例中，牺牲层109的材料还可以是其他有机酸胶体，例如，三元聚酸酸胶体等。
在一些实施例中，牺牲层109的厚度介于1微米至120微米之间。例如，牺牲层109的厚度为1微米、5微米、10微米、25微米、40微米、60微米、80微米、100微米或120微米中的任意一者。
例如，在一具体实施方式中，形成具有牺牲层109的LED芯片20的步骤包括：
在具有大量LED芯片的蓝膜上涂布柠檬酸胶体的前驱液，其中，柠檬酸胶体的前驱液包括氯化镁、氯化镍和氯化锰中的至少一种、柠檬酸、乙醇和水的混合溶液，柠檬酸在溶液中具有很强的络合性，溶液中的金属阳离子被柠檬酸分子络合，形成一种稳定的阳离子均匀分布的网状结构。柠檬酸凝胶法就是利用柠檬酸的多个羟基与金属离子络合形成柠檬酸盐溶胶，并在无多功能团醇的作用下，直接脱水，干燥成泡沫状干凝胶。具体的，本申请实施例将质量百分比为30%的氯化镁和质量百分比为70%的柠檬酸溶解于适量的乙醇和水的混合溶液中，在温度为60摄氏度至70摄氏度下进行搅拌，直至柠檬酸和氯化镁完全溶解，形成柠檬酸胶体的前驱液。然后，将柠檬酸胶体的前驱液涂布至LED芯片上，再将LED芯片放置于真空干燥箱内，在80摄氏度至120摄氏度之间烘干乙醇和水，形成柠檬酸胶体。
在一些实施例中，为了使得LED芯片具备适合的尺寸，在形成具有牺牲层109的LED芯片20之后，还包括按照LED芯片尺寸进行图案化处理，例如，可以按黄光制程或者切割的方式将LED芯片20图案化，以形成具有适合尺寸的LED芯片20。
步骤B103：在阵列基板上涂布黑胶材料，黑胶材料覆盖第一面以及覆盖牺牲层远离阵列基板的一面。
具体的，请参阅图5，在阵列基板10的第一面10a和牺牲层109远离LED芯片20的一面涂布黑胶材料110，其中，黑胶材料110可以是硅胶或环氧胶。
在一实施例中，为了保证涂布的黑胶材料厚度的均一性，本实施例采用少量多次的黑胶材料110的涂布方法进行涂布，以形成厚度均匀的黑胶材料层。
在一些实施例中，黑胶材料110的涂布厚度小于牺牲层109的厚度的三倍。该设置方式使得黑胶材料110不能覆盖LED芯片20的侧边，有利于在后续加热黑胶材料110和牺牲层109时，LED芯片20上的黑胶材料110脱落。
步骤B104：在预设温度下加热黑胶材料和牺牲层，黑胶材料固化形成黑胶层，且牺牲层被分解。
具体的，请结合图5和图6，在预设温度下，使用加热装置加热黑胶材料110和牺牲层109，在加热过程中，黑胶材料固化形成黑胶层30，且牺牲层109被分解。
以牺牲层109的材料为柠檬酸胶体为例，当加热的温度大于柠檬酸胶体的分解温度时，柠檬酸胶体被分解为丙酮二羧酸、氢气和二氧化碳，然后，在继续加热的过程中，丙酮二羧酸被分解为二氧化碳和水蒸气。由此，柠檬酸胶体被分解，位于柠檬酸胶体上的黑胶材料110也随之脱落，从而实现了LED芯片20远离阵列基板10的一面不被黑胶材料110覆盖，提高了显示面板的对比度。
在一些实施例中，预设温度大于140摄氏度，例如，预设温度为140摄氏度、160摄氏度、180摄氏度或200摄氏度。也就是说，在本实施例中，预设温度大于牺牲层109的分解温度。其目的是在其固化过程中利用预设温度将牺牲层109分解。
在一些实施例中，在步骤B104后，还包括对LED芯片20远离阵列基板10的一面进行清洗处理和风干处理，以清洗残留于LED芯片20上的牺牲层109的残留物和附着于LED芯片20上的黑胶材料110。具体的，采用喷淋的方式对阵列基板10进行清洗，然后，采用鼓风机风干残留于阵列基板10上清洗剂。
请参考图1，在一些实施例中，对LED芯片20远离阵列基板10的一面进行清洗处理和风干处理的步骤之后，还包括：
在黑胶层30远离阵列基板10的一面形成透明胶层40，透明胶层40覆盖LED芯片20。其中，透明胶层40用于透过LED芯片20发出的光，便于LED芯片20发出的光线使人眼可见。
本申请实施例提供一种显示面板及其制作方法，在本申请实施例提供的显示面板的制作方法中，首先，在阵列基板的第一面上形成具有牺牲层的LED芯片，其中，牺牲层设置在LED芯片远离阵列基板的一面，然后，在阵列基板的第一面涂布黑胶材料，最后，在预设温度下固化黑胶材料以形成黑胶层，并且，在加热固化的过程中，牺牲层被分解。由于本申请实施例的显示面板的LED芯片远离阵列基板一面的LED芯片不被黑胶材料覆盖，因此，本申请实施例提供的显示面板的制作方法可以用于提高显示面板的对比度。
另外，本申请实施例提供的显示面板的制作方法还可以避免因工艺差导致黑胶层与LED芯片间有缝隙影响显示面板的光学效果的问题。还可以避免因研磨工艺导致的LED芯片损伤而影响显示面板的可靠性的问题。
综上所述，虽然本申请已以优选实施例揭露如上，但上述优选实施例并非用以限制本申请，本领域的普通技术人员，在不脱离本申请的精神和范围内，均可作各种更动与润饰，因此本申请的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种显示面板的制作方法，其包括以下步骤：
    提供一阵列基板，所述阵列基板具有相对设置的第一面和第二面；
    在所述第一面上形成具有牺牲层的LED芯片，所述LED芯片设置在所述阵列基板上，所述牺牲层设置在所述LED芯片远离所述阵列基板的一面；
    在所述阵列基板上涂布黑胶材料，所述黑胶材料覆盖所述第一面以及覆盖所述牺牲层远离所述阵列基板的一面；
    在预设温度下加热所述黑胶材料和牺牲层，所述黑胶材料固化形成黑胶层，且所述牺牲层被分解。
  2. 根据权利要求1所述的显示面板的制作方法，其中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤之前，还包括：
    在所述LED芯片上涂布所述牺牲层的材料，以形成具有所述牺牲层的所述LED芯片。
  3. 根据权利要求2所述的显示面板的制作方法，其中，所述牺牲层的材料为柠檬酸胶体。
  4. 根据权利要求3所述的显示面板的制作方法，其中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤之前，还包括：
    在所述LED芯片上涂布柠檬酸胶体的前驱液；
    将所述LED芯片放置于真空干燥箱内，在80摄氏度至120摄氏度之间烘干以形成具有所述牺牲层的所述LED芯片。
  5. 根据权利要求1所述的显示面板的制作方法，其中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤包括：
    利用固晶吸放、刺晶或激光转移工艺在所述第一面上形成具有牺牲层的所述LED芯片。
  6. 根据权利要求1所述的显示面板的制作方法，其中，所述在预设温度下加热所述黑胶材料的步骤之后，还包括：
    对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理。
  7. 根据权利要求6所述的显示面板的制作方法，其中，所述对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理的步骤之后，还包括：
    在所述黑胶层远离所述阵列基板的一面形成透明胶层，所述透明胶层覆盖所述LED芯片。
  8. 根据权利要求6所述的显示面板的制作方法，其中，所述对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理的步骤包括：
    采用喷淋的方式对所述阵列基板进行清洗；
    采用鼓风机风干残留于所述阵列基板上的清洗剂。
  9. 根据权利要求1所述的显示面板的制作方法，其中，所述预设温度大于140摄氏度。
  10. 根据权利要求1所述的显示面板的制作方法，其中，所述牺牲层的厚度介于1微米至120微米之间。
  11. 根据权利要求10所述的显示面板的制作方法，其中，所述黑胶材料的涂布厚度小于所述牺牲层的厚度的三倍。
  12. 一种显示面板的制作方法，其包括以下步骤：
    提供一阵列基板，所述阵列基板具有相对设置的第一面和第二面；
    在LED芯片上涂布牺牲层的材料，以形成具有所述牺牲层的所述LED芯片，所述LED芯片设置在所述阵列基板上，所述牺牲层设置在所述LED芯片远离所述阵列基板的一面；
    在所述阵列基板上涂布黑胶材料，所述黑胶材料覆盖所述第一面以及覆盖所述牺牲层远离所述阵列基板的一面；
    在预设温度下加热所述黑胶材料和牺牲层，所述黑胶材料固化形成黑胶层，且所述牺牲层被分解；
    对所述LED芯片远离所述阵列基板的一面进行清洗处理和风干处理；
    在所述黑胶层远离所述阵列基板的一面形成透明胶层，所述透明胶层覆盖所述LED芯片。
  13. 根据权利要求12所述的显示面板的制作方法，其中，所述牺牲层的材料为柠檬酸胶体。
  14. 根据权利要求12所述的显示面板的制作方法，其中，所述在所述第一面上形成具有牺牲层的LED芯片的步骤包括：
    利用固晶吸放、刺晶或激光转移工艺在所述第一面上形成具有牺牲层的所述LED芯片。
  15. 根据权利要求12所述的显示面板的制作方法，其中，所述预设温度大于140摄氏度。
  16. 根据权利要求12所述的显示面板的制作方法，其中，所述牺牲层的厚度介于1微米至120微米之间。
  17. 根据权利要求16所述的显示面板的制作方法，其中，所述黑胶材料的涂布厚度小于所述牺牲层的厚度的三倍。
  18. 根据权利要求12所述的显示面板的制作方法，其中，所述预设温度大于140摄氏度。
  19. 一种显示面板，其中，所述显示面板由权利要求1所述的显示面板的制作方法制成，所述显示面板包括阵列基板、LED芯片以及黑胶层；
    所述阵列基板具有相对设置的第一面和第二面；
    所述LED芯片设置在所述第一面；
    所述黑胶层设置在第一面上。
  20. 根据权利要求19所述的显示面板，其中，所述显示面板还包括透明胶层，所述透明胶层设置在所述黑胶层远离所述阵列基板的一面上。
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