WO2022142865A1 - Flip chip structure and method for preparation thereof - Google Patents

Flip chip structure and method for preparation thereof Download PDF

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Publication number
WO2022142865A1
WO2022142865A1 PCT/CN2021/132273 CN2021132273W WO2022142865A1 WO 2022142865 A1 WO2022142865 A1 WO 2022142865A1 CN 2021132273 W CN2021132273 W CN 2021132273W WO 2022142865 A1 WO2022142865 A1 WO 2022142865A1
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layer
metal
substrate
seed layer
chip structure
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PCT/CN2021/132273
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French (fr)
Chinese (zh)
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陈浩
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颀中科技(苏州)有限公司
合肥颀中科技股份有限公司
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Publication of WO2022142865A1 publication Critical patent/WO2022142865A1/en

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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16Coating processes; Apparatus therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

Definitions

  • the invention relates to the technical field of semiconductor manufacturing, in particular to a flip chip structure and a preparation method thereof.
  • FC Flip-chip
  • FC Flip-Chip
  • WB Wire Bonding
  • TAB Tape Automated Bonding
  • bumps are the core process of FC technology.
  • a metal seed layer (UBM) and bumps are sequentially prepared on metal pads.
  • the metal seed layer can be fabricated by sputtering, and the bumps can be fabricated by electroplating.
  • the Au plating solution is often due to the The aggressiveness of the product leads to the penetration of the product.
  • the factors that cause the penetration also include high water pressure and strong washing before electroplating, and the spray of the plating solution during electroplating.
  • the wall S makes it easy for the plating solution to underflow between the bump T and the photoresist to the bottom UBM, resulting in seepage plating, thereby affecting the product quality.
  • the technical problem solved by the present invention is to provide a flip-chip structure and a preparation method thereof, so as to improve the problem of underflow of the plating solution along the sidewall of the photoresist layer in the prior art, thereby avoiding or reducing the occurrence of seepage plating.
  • the present invention provides a flip-chip structure, including a substrate, a metal pad disposed on the substrate, and a metal seed layer in contact with the metal pad; the flip-chip structure further includes a The bumps on the metal seed layer are arranged gradually increasing along the direction away from the metal seed layer.
  • the bump has an inverted trapezoidal cross-section perpendicular to the surface of the substrate.
  • the included angle between the side wall surface of the bump and the plane where the substrate is located is set to be 60-80 degrees.
  • the bump includes at least two metal layers stacked on the metal seed layer in sequence.
  • the bump includes a copper metal layer, a nickel metal layer, and a gold metal layer that are sequentially stacked on the metal seed layer.
  • the present invention also provides a preparation method of a flip-chip structure, which mainly includes:
  • a substrate is provided, a metal pad and a passivation layer are arranged on the substrate, and a window is formed on the passivation layer, so that a part of the surface of the metal pad is exposed in the window;
  • a photoresist layer is prepared on the surface of the metal seed layer
  • a groove is formed on the photoresist layer to expose a predetermined area of the metal seed layer to the outside, and the groove is gradually increased along the direction away from the metal seed layer;
  • the bumps are formed by electroplating in the grooves.
  • grooves are arranged in a bell mouth shape.
  • the groove has an inclined inner side surface, and the included angle between the inner side surface and the surface of the substrate is set to be 60-80 degrees.
  • the preparation process of the bump specifically includes cleaning the inside of the groove; and then sequentially preparing a copper metal layer, a nickel metal layer and a gold metal layer in the groove to form a bump.
  • the photoresist layer and the metal seed layer around the predetermined area are sequentially removed.
  • the grooves of the photoresist layer are arranged to gradually increase along the opening direction, so that the bumps prepared on the inner side also have correspondingly inclined grooves.
  • the sidewall surface, the inclined sidewall surface of the bump and the inclined inner surface of the photoresist layer can form a good bonding force between the two, especially under the action of cleaning before electroplating and punching of the plating solution, a sealed opposing force can be formed. It is avoided that the plating solution infiltrates along the sidewall surface of the bump and causes abnormal infiltration plating.
  • Fig. 1 is the structure schematic diagram when seepage plating occurs in the bump making process in the prior art
  • FIG. 2 is a schematic diagram of the flip-chip structure of the present invention.
  • FIG. 3 is a schematic diagram of the anti-seepage plating of the flip-chip structure according to the present invention.
  • FIG. 4 is a schematic process diagram of the method for fabricating the flip-chip structure according to the present invention.
  • the present invention provides a flip-chip structure, which includes a substrate 10 , a metal pad 20 formed on the surface of the substrate 10 , and a passivation covering both the surface of the substrate 10 and the surface of the metal pad 20 .
  • layer 30 a metal seed layer 40 covering the surface of the metal pad 20 and the passivation layer 30 , and bumps 50 formed above the metal seed layer 40 .
  • the passivation layer 30 covers a part of the surface of the metal liner 20 but does not completely cover it. Specifically, a window is opened on the passivation layer 30 to expose part of the surface of the metal liner 20 In the window, that is, the surface of the central area of the metal pad 20 is not covered with the passivation layer 30 and is exposed in the window, while the surface of the peripheral portion of the metal pad 20 is covered with the passivation layer Layer 30.
  • the top surface of the metal pad 20 is lower than the surface of the passivation layer 30 to form a concave structure 21 .
  • the metal seed layer 40 is directly formed on the surface of the metal pad 20 and the surface of the passivation layer 30 through a sputtering process, and is interposed between the metal pad 20 and the bump 50 .
  • the bumps 50 are gradually increased along the direction away from the metal seed layer 40 , and have an inverted trapezoidal cross-section perpendicular to the surface of the substrate 10 ; in other words, the projections of the bumps 50 on a plane perpendicular to the substrate 10 It is an inverted trapezoid with inclined sidewall surfaces 51 .
  • the bump 50 is formed on the metal pad 20 by an electroplating process, and includes a plurality of metal layers, specifically including: a copper metal layer, a nickel metal layer, and a gold metal layer. The copper metal layer, the nickel metal layer, and the gold metal layer are stacked sequentially from bottom to top.
  • the bottom of the copper metal layer is directly formed on the surface of the metal pad 20 , and the bottom of the copper metal layer is located on the surface of the metal pad 20 . Inside the recessed structure 21 , the rest of the copper metal layer is directly formed on the metal seed layer 40 around the recessed structure 21 .
  • the bump 50 is in an inverted trapezoid shape, that is to say, the surface area of the gold metal layer at the uppermost position is the largest, and gradually decreases to the nickel metal layer and the copper metal layer below.
  • the nickel metal layer is located on the gold metal layer. between the gold metal layer and the copper metal layer, and in direct contact with the gold metal layer and the copper metal layer. It is worth mentioning that, the angle between the inclined side wall surface 51 and the surface of the substrate 10 is preferably set to be 60-80 degrees.
  • the present invention also provides a preparation method of the flip-chip structure, comprising:
  • a substrate is provided, a metal pad and a passivation layer are arranged on the substrate, and a window is formed on the passivation layer, so that a part of the surface of the metal pad is exposed in the window;
  • a photoresist layer is prepared on the surface of the metal seed layer
  • a groove is formed on the photoresist layer to expose a predetermined area of the metal seed layer to the outside, and the groove is gradually increased along the direction away from the metal seed layer;
  • the bumps are formed by electroplating in the grooves.
  • the preparation method at least comprises the following steps:
  • step S30 it specifically includes: performing photoresist coating on the metal seed layer 40 to form an initial photoresist layer covering the surface of the metal seed layer 40 , and the thickness of the initial photoresist layer is usually set to exceed the bump 50 The height is 5-10 ⁇ m; the initial photoresist layer is exposed and developed to obtain the photoresist layer 60 whose inner side surface 61 is inclined. It is worth mentioning that the inclination angle of the inner side surface 61 of the photoresist layer 60 is controlled at 60-80 degrees (compared to the surface of the substrate 10 ). In the preferred solution of the present invention, the grooves on the inner side of the photoresist layer 60 The grooves 70 are bell-shaped, so that the grooves 70 are gradually increased along the direction away from the metal seed layer 40 .
  • the step S40 specifically includes: cleaning the grooves 70 ; and preparing copper-nickel-gold (CuNiAu) bumps 50 in the grooves 70 by using a plating solution.
  • the cleaning of the grooves 70 may be completed by using a QDR (Quick Dump Rinse) process.
  • the inner side surface 61 of the photoresist layer 60 is arranged in an inclined structure, so that the groove 70 on the inner side of the photoresist layer 60 also forms a corresponding inverted trapezoidal structure.
  • the bump 50 is preferably an inverted trapezoid, which can form a good bonding force with the inclined inner side 61 of the photoresist layer 60 on both sides of the groove 70, so as to prevent the plating solution from seeping down along the side wall 51 of the bump 50 Causes infiltration plating abnormalities.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Wire Bonding (AREA)

Abstract

Provided by the present invention are a flip chip structure and a method for preparation thereof; the flip chip structure comprises a substrate, a metal pad disposed on the substrate, a metal seed layer, and bumps; the bumps gradually become larger along the direction away from the metal seed layer. In the present invention, by means of the arrangement of the inclined inner side face of a photoresist layer and the inclined side wall face of the bumps, the two can be better combined, and the plating bath is prevented from seeping down along the side wall surface of the bumps, resulting in the abnormality of plating seepage.

Description

倒装芯片结构及其制备方法Flip chip structure and method of making the same 技术领域technical field
本发明涉及半导体制造技术领域,尤其涉及一种倒装芯片结构及其制备方法。The invention relates to the technical field of semiconductor manufacturing, in particular to a flip chip structure and a preparation method thereof.
背景技术Background technique
倒装芯片(FC,Flip-Chip)结构是目前半导体封装领域常用的一种封装技术,其主要是在芯片的焊块上制作凸块(Bump),然后将芯片带元器件的一面朝下“倒扣”,直接与基板进行组装。上述倒装芯片结构通过凸块直接与基板连接,相较于引线键合(WB,Wire Bonding)、载带自动焊(TAB,Tape Automated Bonding)技术,FC技术能够提供最高的封装密度、最小的封装尺寸、最好的高频性能。Flip-chip (FC, Flip-Chip) structure is a commonly used packaging technology in the field of semiconductor packaging. "Upside down", assemble directly with the base plate. The above flip-chip structure is directly connected to the substrate through bumps. Compared with wire bonding (WB, Wire Bonding) and tape automated bonding (TAB, Tape Automated Bonding) technologies, FC technology can provide the highest packaging density and the smallest packaging density. package size, best high frequency performance.
凸块的制作是FC技术的核心工艺,通常是在金属衬垫上依次制备出金属种子层(UBM)与凸块,金属种子层可采用溅射工艺制作,凸块可采用电镀法制作。对于电镀法制作凸块的工艺来说,尤其要注意电镀液的渗镀问题,现有技术中,如图1所示,对于CuNiAu结构的凸块T来说,Au镀液往往因为氰基的攻击性而导致产品出现渗镀,造成渗镀的因素还包括电镀前高水压强力冲洗、电镀时镀液的喷流等,上述凸块T制备过程中,垂直于基板设置的光阻层侧壁S使得镀液容易沿凸块T与光阻之间下溢至底部UBM上,产生渗镀,从而影响产品质量。The fabrication of bumps is the core process of FC technology. Usually, a metal seed layer (UBM) and bumps are sequentially prepared on metal pads. The metal seed layer can be fabricated by sputtering, and the bumps can be fabricated by electroplating. For the process of making bumps by electroplating, special attention should be paid to the problem of infiltration of the electroplating solution. In the prior art, as shown in Figure 1, for the bump T of the CuNiAu structure, the Au plating solution is often due to the The aggressiveness of the product leads to the penetration of the product. The factors that cause the penetration also include high water pressure and strong washing before electroplating, and the spray of the plating solution during electroplating. The wall S makes it easy for the plating solution to underflow between the bump T and the photoresist to the bottom UBM, resulting in seepage plating, thereby affecting the product quality.
因此,有必要提供一种新的倒装芯片结构及其制备方法。Therefore, it is necessary to provide a new flip-chip structure and a manufacturing method thereof.
发明内容SUMMARY OF THE INVENTION
本发明所解决的技术问题在于提供一种倒装芯片结构及其制备方 法,以改善现有技术中镀液沿光阻层侧壁下溢的问题,进而避免或减少渗镀的发生。The technical problem solved by the present invention is to provide a flip-chip structure and a preparation method thereof, so as to improve the problem of underflow of the plating solution along the sidewall of the photoresist layer in the prior art, thereby avoiding or reducing the occurrence of seepage plating.
为解决上述技术问题,本发明提供一种倒装芯片结构,包括基板、设置在基板上的金属衬垫及与所述金属衬垫相接触的金属种子层;所述倒装芯片结构还包括设置在所述金属种子层上的凸块,所述凸块沿背离所述金属种子层的方向呈逐渐增大设置。In order to solve the above technical problems, the present invention provides a flip-chip structure, including a substrate, a metal pad disposed on the substrate, and a metal seed layer in contact with the metal pad; the flip-chip structure further includes a The bumps on the metal seed layer are arranged gradually increasing along the direction away from the metal seed layer.
进一步地,所述凸块具有垂直于所述基板表面的倒梯形截面。Further, the bump has an inverted trapezoidal cross-section perpendicular to the surface of the substrate.
进一步地,所述凸块的侧壁面相对所述基板所在平面的夹角设置为60-80度。Further, the included angle between the side wall surface of the bump and the plane where the substrate is located is set to be 60-80 degrees.
进一步地,所述凸块包括依次层叠设置在所述金属种子层上的至少两个金属层。Further, the bump includes at least two metal layers stacked on the metal seed layer in sequence.
进一步地,所述凸块包括依次层叠设置在所述金属种子层上的铜质金属层、镍质金属层及金质金属层。Further, the bump includes a copper metal layer, a nickel metal layer, and a gold metal layer that are sequentially stacked on the metal seed layer.
为解决上述技术问题,本发明还提供一种倒装芯片结构的制备方法,主要包括:In order to solve the above-mentioned technical problems, the present invention also provides a preparation method of a flip-chip structure, which mainly includes:
提供基板,所述基板上设置有金属衬垫及钝化层,所述钝化层开设有窗口,以使所述金属衬垫的部分表面暴露于窗口内;a substrate is provided, a metal pad and a passivation layer are arranged on the substrate, and a window is formed on the passivation layer, so that a part of the surface of the metal pad is exposed in the window;
在所述基板表面制备金属种子层;preparing a metal seed layer on the surface of the substrate;
在金属种子层表面制备光阻层;A photoresist layer is prepared on the surface of the metal seed layer;
对所述光阻层开设凹槽,以使金属种子层的既定区域向外暴露,且所述凹槽沿背离所述金属种子层的方向呈逐渐增大设置;A groove is formed on the photoresist layer to expose a predetermined area of the metal seed layer to the outside, and the groove is gradually increased along the direction away from the metal seed layer;
在所述凹槽内电镀制得凸块。The bumps are formed by electroplating in the grooves.
进一步地,所述凹槽设置呈喇叭口状。Further, the grooves are arranged in a bell mouth shape.
进一步地,所述凹槽具有倾斜的内侧面,该内侧面相对基板表面的夹角设置为60-80度。Further, the groove has an inclined inner side surface, and the included angle between the inner side surface and the surface of the substrate is set to be 60-80 degrees.
进一步地,所述凸块的制备过程具体包括对所述凹槽内部进行清洗;再于所述凹槽内依次制备铜质金属层、镍质金属层及金质金属层,形成 凸块。Further, the preparation process of the bump specifically includes cleaning the inside of the groove; and then sequentially preparing a copper metal layer, a nickel metal layer and a gold metal layer in the groove to form a bump.
进一步地,在完成所述凸块的制备后,依次去除所述光阻层以及所述既定区域周围的金属种子层。Further, after the preparation of the bumps is completed, the photoresist layer and the metal seed layer around the predetermined area are sequentially removed.
本申请的有益效果:采用本发明倒装芯片结构及其制备方法,通过将光阻层的凹槽沿开口方向设置呈逐渐增大,使得在其内侧制备出的凸块也具有相应的倾斜的侧壁面,凸块的倾斜侧壁面和光阻层的倾斜内侧面,两者之间可以形成较好的结合力,尤其在电镀前清洗及镀液的冲压作用下,可形成密封的相向的力,避免了镀液沿着凸块的侧壁面下渗而造成渗镀异常。Beneficial effects of the present application: By adopting the flip-chip structure and the preparation method of the present invention, the grooves of the photoresist layer are arranged to gradually increase along the opening direction, so that the bumps prepared on the inner side also have correspondingly inclined grooves. The sidewall surface, the inclined sidewall surface of the bump and the inclined inner surface of the photoresist layer can form a good bonding force between the two, especially under the action of cleaning before electroplating and punching of the plating solution, a sealed opposing force can be formed. It is avoided that the plating solution infiltrates along the sidewall surface of the bump and causes abnormal infiltration plating.
附图说明Description of drawings
图1为现有技术中凸块制作过程中出现渗镀时的结构示意图;Fig. 1 is the structure schematic diagram when seepage plating occurs in the bump making process in the prior art;
图2为本发明所述倒装芯片结构的简要示意图;FIG. 2 is a schematic diagram of the flip-chip structure of the present invention;
图3为本发明所述倒装芯片结构的防渗镀原理图;3 is a schematic diagram of the anti-seepage plating of the flip-chip structure according to the present invention;
图4为本发明所述倒装芯片结构的制备方法的过程示意图。FIG. 4 is a schematic process diagram of the method for fabricating the flip-chip structure according to the present invention.
具体实施方式Detailed ways
以下将结合附图所示的实施方式对本申请进行详细描述。但该实施方式并不限制本申请,本领域的普通技术人员根据该实施方式所做出的结构、方法、或功能上的变换均包含在本申请的保护范围内。The present application will be described in detail below with reference to the embodiments shown in the accompanying drawings. However, this embodiment does not limit the present application, and the structural, method, or functional transformations made by those of ordinary skill in the art according to this embodiment are all included in the protection scope of the present application.
请参阅图2和图3所示,本发明提供一种倒装芯片结构,其包括基板10、成型于基板10表面的金属衬垫20、同时覆盖基板10表面和金属衬垫20表面的钝化层30、覆盖于所述金属衬垫20和钝化层30表面的金属种子层40以及形成于所述金属种子层40上方的凸块50。Referring to FIGS. 2 and 3 , the present invention provides a flip-chip structure, which includes a substrate 10 , a metal pad 20 formed on the surface of the substrate 10 , and a passivation covering both the surface of the substrate 10 and the surface of the metal pad 20 . layer 30 , a metal seed layer 40 covering the surface of the metal pad 20 and the passivation layer 30 , and bumps 50 formed above the metal seed layer 40 .
其中,所述钝化层30覆盖住所述金属衬垫20的部分表面,未完全 覆盖,具体来说,所述钝化层30上开设有窗口,以使得所述金属衬垫20的部分表面暴露该窗口内,即所述金属衬垫20的中央区域的表面未覆盖所述钝化层30而暴露于所述窗口内,而金属衬垫20的外围部分的表面上则覆盖有所述钝化层30。所述金属衬垫20的顶表面低于所述钝化层30表面,形成凹陷状结构21。所述金属种子层40通过溅射工艺直接形成于所述金属衬垫20的表面以及钝化层30的表面,其介于所述金属衬垫20和所述凸块50之间。Wherein, the passivation layer 30 covers a part of the surface of the metal liner 20 but does not completely cover it. Specifically, a window is opened on the passivation layer 30 to expose part of the surface of the metal liner 20 In the window, that is, the surface of the central area of the metal pad 20 is not covered with the passivation layer 30 and is exposed in the window, while the surface of the peripheral portion of the metal pad 20 is covered with the passivation layer Layer 30. The top surface of the metal pad 20 is lower than the surface of the passivation layer 30 to form a concave structure 21 . The metal seed layer 40 is directly formed on the surface of the metal pad 20 and the surface of the passivation layer 30 through a sputtering process, and is interposed between the metal pad 20 and the bump 50 .
所述凸块50沿背离金属种子层40的方向呈逐渐增大设置,其具有垂直于基板10表面的倒梯形截面;换言之,所述凸块50在垂直于所述基板10的平面上的投影呈倒梯形,其具有倾斜的侧壁面51。所述凸块50采用电镀工艺形成在所述金属衬垫20上,其包含有多个金属层,具体包括:铜质金属层、镍质金属层和金质金属层。所述铜质金属层、镍质金属层、金质金属层自下而上依次叠加,所述铜质金属层的底部直接形成于所述金属衬垫20表面,且铜质金属层的底部位于所述凹陷状结构21内,而所述铜质金属层的其余部分直接形成于所述凹陷状结构21周围的金属种子层40上。The bumps 50 are gradually increased along the direction away from the metal seed layer 40 , and have an inverted trapezoidal cross-section perpendicular to the surface of the substrate 10 ; in other words, the projections of the bumps 50 on a plane perpendicular to the substrate 10 It is an inverted trapezoid with inclined sidewall surfaces 51 . The bump 50 is formed on the metal pad 20 by an electroplating process, and includes a plurality of metal layers, specifically including: a copper metal layer, a nickel metal layer, and a gold metal layer. The copper metal layer, the nickel metal layer, and the gold metal layer are stacked sequentially from bottom to top. The bottom of the copper metal layer is directly formed on the surface of the metal pad 20 , and the bottom of the copper metal layer is located on the surface of the metal pad 20 . Inside the recessed structure 21 , the rest of the copper metal layer is directly formed on the metal seed layer 40 around the recessed structure 21 .
由于所述凸块50呈倒梯形,就是说,位于最上层位置的金质金属层的表面积最大,并逐步递减至下方的镍质金属层和铜质金属层,所述镍质金属层位于金质金属层和铜质金属层之间,并与所述金质金属层和铜质金属层直接接触。值得一提的是,所述倾斜的侧壁面51相较于基板10表面的夹角优选设置为60-80度。Since the bump 50 is in an inverted trapezoid shape, that is to say, the surface area of the gold metal layer at the uppermost position is the largest, and gradually decreases to the nickel metal layer and the copper metal layer below. The nickel metal layer is located on the gold metal layer. between the gold metal layer and the copper metal layer, and in direct contact with the gold metal layer and the copper metal layer. It is worth mentioning that, the angle between the inclined side wall surface 51 and the surface of the substrate 10 is preferably set to be 60-80 degrees.
针对上述倒装芯片结构,本发明还提供一种倒装芯片结构的制备方 法,其包括:For the above-mentioned flip-chip structure, the present invention also provides a preparation method of the flip-chip structure, comprising:
提供基板,所述基板上设置有金属衬垫及钝化层,所述钝化层开设有窗口,以使所述金属衬垫的部分表面暴露于窗口内;a substrate is provided, a metal pad and a passivation layer are arranged on the substrate, and a window is formed on the passivation layer, so that a part of the surface of the metal pad is exposed in the window;
在所述基板表面制备金属种子层;preparing a metal seed layer on the surface of the substrate;
在金属种子层表面制备光阻层;A photoresist layer is prepared on the surface of the metal seed layer;
对所述光阻层开设凹槽,以使金属种子层的既定区域向外暴露,且所述凹槽沿背离所述金属种子层的方向呈逐渐增大设置;A groove is formed on the photoresist layer to expose a predetermined area of the metal seed layer to the outside, and the groove is gradually increased along the direction away from the metal seed layer;
在所述凹槽内电镀制得凸块。The bumps are formed by electroplating in the grooves.
为了更好的阐述所述倒装芯片结构的制备方法,以下结合具体的应用实施例进行进一步地说明,详述基于上述制备方法制得倒装芯片结构的完整制备过程,请结合图4所示,在该实施例中,所述制备方法至少包括如下步骤:In order to better explain the preparation method of the flip-chip structure, the following is a further explanation in conjunction with specific application examples, and the complete preparation process of the flip-chip structure based on the above preparation method is described in detail, please refer to FIG. 4 . , in this embodiment, the preparation method at least comprises the following steps:
S10:在基板10上依次制备出金属衬垫20及钝化层30;S10 : sequentially preparing the metal pad 20 and the passivation layer 30 on the substrate 10 ;
S20:在金属衬垫20和钝化层30表面制备金属种子层40;S20: preparing a metal seed layer 40 on the surface of the metal liner 20 and the passivation layer 30;
S30:在金属种子层40表面形成光阻层(PR,Photo Resist)60,并在光阻层60上开槽以形成凹槽70并使金属种子层40的既定区域暴露在该凹槽70内,且使光阻层60面向凹槽70的内侧面61呈倾斜状;S30 : forming a photoresist layer (PR, Photo Resist) 60 on the surface of the metal seed layer 40 , and opening a groove on the photoresist layer 60 to form a groove 70 and exposing a predetermined area of the metal seed layer 40 in the groove 70 , and the inner side surface 61 of the photoresist layer 60 facing the groove 70 is inclined;
S40:在凹槽70内制备出凸块50,以使凸块50的侧壁面51呈倾斜状;S40: preparing the bump 50 in the groove 70, so that the side wall surface 51 of the bump 50 is inclined;
S50:去除凸块50外围的光阻层60及金属种子层40,具体来说,依次去除光阻层60及所述既定区域周围的金属种子层40。S50 : removing the photoresist layer 60 and the metal seed layer 40 around the bump 50 , specifically, sequentially removing the photoresist layer 60 and the metal seed layer 40 around the predetermined area.
其中,步骤S30中,具体包括:在金属种子层40上进行光阻涂布, 形成覆盖于金属种子层40表面的初始光阻层,所述初始光阻层厚度通常设置超出所述凸块50高度5-10μm;对所述初始光阻层进行曝光和显影操作,得到内侧面61呈倾斜状的所述光阻层60。值得一提的是,所述光阻层60的内侧面61的倾斜角度控制在60-80度(相较于基板10表面),在本发明优选方案中,该光阻层60内侧的凹槽70呈喇叭口状,因此,使得所述凹槽70沿背离所述金属种子层40的方向呈逐渐增大设置。Wherein, in step S30 , it specifically includes: performing photoresist coating on the metal seed layer 40 to form an initial photoresist layer covering the surface of the metal seed layer 40 , and the thickness of the initial photoresist layer is usually set to exceed the bump 50 The height is 5-10 μm; the initial photoresist layer is exposed and developed to obtain the photoresist layer 60 whose inner side surface 61 is inclined. It is worth mentioning that the inclination angle of the inner side surface 61 of the photoresist layer 60 is controlled at 60-80 degrees (compared to the surface of the substrate 10 ). In the preferred solution of the present invention, the grooves on the inner side of the photoresist layer 60 The grooves 70 are bell-shaped, so that the grooves 70 are gradually increased along the direction away from the metal seed layer 40 .
其中,步骤S40中,具体包括:对凹槽70进行清洗;利用镀液在凹槽70内制备出铜镍金(CuNiAu)凸块50。优选地,所述凹槽70清洗具体可采用QDR(Quick Dump Rinse)工艺完成冲洗。The step S40 specifically includes: cleaning the grooves 70 ; and preparing copper-nickel-gold (CuNiAu) bumps 50 in the grooves 70 by using a plating solution. Preferably, the cleaning of the grooves 70 may be completed by using a QDR (Quick Dump Rinse) process.
本发明通过将光阻层60的内侧面61设置呈倾斜状结构,而使得其内侧的凹槽70也形成相应的倒梯形结构,这种结构使得凹槽70内可以成形出下窄上宽(优选倒梯形)的凸块50,其可与凹槽70两侧的光阻层60的倾斜状内侧面61形成较好的结合力,避免电镀液沿着凸块50的侧壁面51下渗而造成渗镀异常。In the present invention, the inner side surface 61 of the photoresist layer 60 is arranged in an inclined structure, so that the groove 70 on the inner side of the photoresist layer 60 also forms a corresponding inverted trapezoidal structure. The bump 50 is preferably an inverted trapezoid, which can form a good bonding force with the inclined inner side 61 of the photoresist layer 60 on both sides of the groove 70, so as to prevent the plating solution from seeping down along the side wall 51 of the bump 50 Causes infiltration plating abnormalities.
应当理解,虽然本说明书按照实施方式加以描述,但并非每个实施方式仅包含一个独立的技术方案,说明书的这种叙述方式仅仅是为清楚起见,本领域技术人员应当将说明书作为一个整体,各实施方式中的技术方案也可以经适当组合,形成本领域技术人员可以理解的其他实施方式。It should be understood that although this specification is described in terms of embodiments, not every embodiment only includes an independent technical solution, and this description in the specification is only for the sake of clarity, and those skilled in the art should take the specification as a whole, and each The technical solutions in the embodiments can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
上文所列出的一系列的详细说明仅仅是针对本申请的可行性实施方式的具体说明,它们并非用以限制本申请的保护范围,凡未脱离本申请技艺精神所作的等效实施方式或变更均应包含在本申请的保护范围之 内。The series of detailed descriptions listed above are only specific descriptions for the feasible embodiments of the present application, and they are not used to limit the protection scope of the present application. Changes should be included within the scope of protection of this application.

Claims (10)

  1. 一种倒装芯片结构,包括基板、设置在基板上的金属衬垫及与所述金属衬垫相接触的金属种子层,其特征在于:所述倒装芯片结构还包括设置在所述金属种子层上的凸块,所述凸块沿背离所述金属种子层的方向呈逐渐增大设置。A flip-chip structure, comprising a substrate, a metal pad disposed on the substrate, and a metal seed layer in contact with the metal pad, characterized in that the flip-chip structure further comprises a metal seed layer disposed on the metal seed The bumps on the layer are arranged in a gradually increasing manner along the direction away from the metal seed layer.
  2. 根据权利要求1所述的倒装芯片结构,其特征在于:所述凸块具有垂直于所述基板表面的倒梯形截面。The flip-chip structure of claim 1, wherein the bump has an inverted trapezoidal cross-section perpendicular to the surface of the substrate.
  3. 根据权利要求1所述的倒装芯片结构,其特征在于:所述凸块的侧壁面相对所述基板所在平面的夹角设置为60-80度。The flip-chip structure according to claim 1, wherein the included angle between the sidewall surface of the bump and the plane where the substrate is located is set to be 60-80 degrees.
  4. 根据权利要求1所述的倒装芯片结构,其特征在于:所述凸块包括依次层叠设置在所述金属种子层上的至少两个金属层。The flip-chip structure of claim 1, wherein the bump comprises at least two metal layers stacked on the metal seed layer in sequence.
  5. 根据权利要求1所述的倒装芯片结构,其特征在于:所述凸块包括依次层叠设置在所述金属种子层上的铜质金属层、镍质金属层及金质金属层。The flip-chip structure of claim 1, wherein the bump comprises a copper metal layer, a nickel metal layer, and a gold metal layer stacked on the metal seed layer in sequence.
  6. 一种倒装芯片结构的制备方法,其特征在于:A preparation method of a flip-chip structure, characterized in that:
    提供基板,所述基板上设置有金属衬垫及钝化层,所述钝化层开设有窗口,以使所述金属衬垫的部分表面暴露于窗口内;a substrate is provided, a metal pad and a passivation layer are arranged on the substrate, and a window is formed on the passivation layer, so that a part of the surface of the metal pad is exposed in the window;
    在所述基板表面制备金属种子层;preparing a metal seed layer on the surface of the substrate;
    在金属种子层表面制备光阻层;A photoresist layer is prepared on the surface of the metal seed layer;
    对所述光阻层开设凹槽,以使金属种子层的既定区域向外暴露,且所述凹槽沿背离所述金属种子层的方向呈逐渐增大设置;A groove is formed on the photoresist layer to expose a predetermined area of the metal seed layer to the outside, and the groove is gradually increased along the direction away from the metal seed layer;
    在所述凹槽内电镀制得凸块。The bumps are formed by electroplating in the grooves.
  7. 如权利要求6所述的制备方法,其特征在于:所述凹槽设置呈喇叭口状。The preparation method according to claim 6, wherein the groove is arranged in a bell mouth shape.
  8. 如权利要求6所述的制备方法,其特征在于:所述凹槽具有倾斜的内侧面,该内侧面相对基板表面的夹角设置为60-80度。The preparation method according to claim 6, wherein the groove has an inclined inner side surface, and the included angle between the inner side surface and the surface of the substrate is set to be 60-80 degrees.
  9. 如权利要求6所述的制备方法,其特征在于:所述凸块的制备过程具体包括对所述凹槽内部进行清洗;再于所述凹槽内依次制备铜质金属层、镍质金属层及金质金属层,形成凸块。The preparation method according to claim 6, wherein: the preparation process of the bump specifically includes cleaning the inside of the groove; and then sequentially preparing a copper metal layer and a nickel metal layer in the groove and the gold metal layer to form bumps.
  10. 如权利要求6所述的制备方法,其特征在于:在完成所述凸块的 制备后,依次去除所述光阻层以及所述既定区域周围的金属种子层。The preparation method according to claim 6, wherein after the preparation of the bumps is completed, the photoresist layer and the metal seed layer around the predetermined area are sequentially removed.
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