TWI718964B - Conductive pillar bump and manufacturing method therefore - Google Patents

Abstract

A conductive pillar bump includes a first conductive portion and a second conductive portion. The second conductive portion is located on the first conductive portion. A sidewall of the second conductive portion has at least one trench. The trench extends from a top portion of the second conductive portion to a bottom portion of the second conductive portion. The trench exposes a portion of a top surface of the first conductive portion.

Description

Conductive pillar bump and manufacturing method thereof

The present invention relates to a semiconductor component and a manufacturing method thereof, and more particularly to a conductive pillar bump and a manufacturing method thereof.

Currently, there are several die attach methods for flip chip bonding technology. Among them, controlling the bump bonding condition in the flip chip bonding process is the key to controlling the yield. For example, in the flip chip bonding process, the solder will be squeezed by bumps (such as copper pillar bumps). When the amount of solder (such as tin) is too much, It will lead the solder to extrude too much, and cause the problem of bridging between adjacent solders. In addition, when the amount of solder is too small, it is easy to cause empty soldering, or bump cracks due to the lack of solder buffer in the subsequent reliability test process.

The invention provides a conductive pillar bump and a manufacturing method thereof, which can better control the combination of the bumps to improve the yield.

The present invention provides a conductive pillar bump, which includes a first conductive portion and a second conductive portion. The second conductive part is on the first conductive part. The sidewall of the second conductive part has at least one trench. The trench extends from the top of the second conductive part to the bottom of the second conductive part. The trench exposes part of the top surface of the first conductive part.

The present invention provides a method for manufacturing conductive pillar bumps, which may include the following steps. Provide base structure. A first patterned photoresist layer is formed on the base structure. The first patterned photoresist layer has a first opening exposing the base structure. A first conductive portion is formed on the base structure exposed by the first opening. Remove the first patterned photoresist layer. A second patterned photoresist layer is formed on the base structure. The second patterned photoresist layer has a second opening exposing the first conductive part. The second patterned photoresist layer includes at least one protrusion. The protruding part covers a part of the top surface of the first conductive part. A second conductive portion is formed on the first conductive portion exposed by the second opening. The sidewall of the second conductive part has at least one trench. The trench extends from the top of the second conductive part to the bottom of the second conductive part. The second patterned photoresist layer is removed, so that the trench exposes part of the top surface of the first conductive portion.

The present invention provides another method for manufacturing conductive pillar bumps, which may include the following steps. Provide base structure. 3D printing is used to form conductive pillar bumps on the base structure. The conductive pillar bump includes a first conductive portion and a second conductive portion. The second conductive part is on the first conductive part. The sidewall of the second conductive part has at least one trench. The trench extends from the top of the second conductive part to the bottom of the second conductive part. The trench exposes part of the top surface of the first conductive part.

Based on the above, in the conductive pillar bump and the manufacturing method thereof proposed in the present invention, the sidewall of the second conductive portion has a trench, and the trench exposes a part of the top surface of the first conductive portion. Therefore, in the flip-chip bonding process, the grooves on the second conductive portion can provide more solder attachment area, thereby reducing solder extrusion. In addition, a part of the top surface of the first conductive portion exposed by the trench can be used as a blocking portion for blocking the solder. Therefore, the part of the top surface of the first conductive portion exposed by the groove can be used to determine the adhesion height of the solder, so that the solder extrusion condition can be further controlled. In this way, the bonding of the bumps can be better controlled to improve the yield rate.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

100: base structure

102: Base

104: pad

106: protective layer

108: Metal under bump

110, 112: Patterned photoresist layer

112a: protrusion

200: grain

202: Solder

BP: bottom

BS: bottom surface

CP: conductive pillar bump

D1, D2: Maximum diameter

OP1, OP2: opening

P1, P2: conductive part

T: groove

TP: top

TS: top surface

1A to 1F are cross-sectional views of a manufacturing process of a conductive pillar bump according to an embodiment of the present invention.

2A to 2F are top views of the patterned photoresist layer and/or conductive part in FIGS. 1A to 1F, respectively.

FIG. 3 is a top view of a conductive pillar bump according to another embodiment of the present invention.

4 is a perspective view of the conductive pillar bump in FIG. 1F.

FIG. 5 is a schematic diagram of a flip chip bonding process according to an embodiment of the invention.

1A to 1F are cross-sectional views of a manufacturing process of a conductive pillar bump according to an embodiment of the present invention. 2A to 2F are top views of the patterned photoresist layer and/or conductive part in FIGS. 1A to 1F, respectively. Figs. 1A to 1F are cross-sectional views taken along the line I-I' in Figs. 2A to 2F. FIG. 3 is a top view of a conductive pillar bump according to another embodiment of the present invention. 4 is a perspective view of the conductive pillar bump in FIG. 1F.

1A and 2A, a base structure 100 is provided. For example, the base structure 100 may be a die. The base structure 100 may include a substrate 102, and may further include at least one of a pad 104, a passivation layer 106, and an under bump metallization (UBM) layer 108, but the present invention does not Not limited to this. The substrate 102 may be a semiconductor substrate, such as a silicon substrate. In addition, a required semiconductor device (for example, an active device or a passive device) (not shown) and an interconnect structure (not shown) electrically connected to the semiconductor device can be formed on the substrate 102 according to requirements. The pad 104 can be located on the substrate 102 and can be electrically connected to the semiconductor device through the interconnect structure. The material of the pad 104 may include aluminum. The protective layer 106 may be located on the substrate 102. The material of the protective layer 106 may include polyimide (PI) or polybenzoxazole (PBO). In addition, the protective layer 106 may cover a part of the pad 104, that is, the protective layer 106 may expose a part of the pad 104. The under-bump metal layer 108 can be located on the pad 104 and the protective layer 106. The material of the under-bump metal layer 108 may include aluminum, titanium, copper, nickel, tungsten, chromium, gold, tungsten titanide, lead tin, vanadium nickel and/or alloys thereof.

Next, a patterned photoresist layer 110 is formed on the base structure 100. The patterned photoresist layer 110 has an opening OP1 exposing the base structure 100. In this embodiment, the opening OP1 can expose the under-bump metal layer 108 of the base structure 100, but the present invention Not limited to this. The patterned photoresist layer 110 can be formed by a photolithography process.

1B and 2B, a conductive portion P1 is formed on the base structure 100 exposed by the opening OP1. In this embodiment, the conductive portion P1 is formed on the under-bump metal layer 108 of the base structure 100 as an example, but the invention is not limited to this. The conductive portion P1 has a maximum diameter D1 (FIG. 2B). The material of the conductive part P1 may include copper, silver, gold or alloys thereof. The method of forming the conductive portion P1 is, for example, an electrochemical plating (ECP) method, an evaporation method, an electroplating method, or a printing method.

Please refer to FIG. 1C and FIG. 2C to remove the patterned photoresist layer 110. The method for removing the patterned photoresist layer 110 is, for example, a dry photoresist removal method or a wet photoresist removal method.

1D and 2D, a patterned photoresist layer 112 is formed on the base structure 100. The patterned photoresist layer 112 has an opening OP2 exposing the conductive portion P1. The patterned photoresist layer 112 includes at least one protrusion 112a. The protruding portion 112a covers a part of the top surface TS of the conductive portion P1. In this embodiment, the number of protrusions 112a is multiple as an example, but as long as the number of protrusions 112a is at least one, it belongs to the scope of the present invention. The patterned photoresist layer 112 can be formed by a photolithography process.

1E and 2E, a conductive portion P2 is formed on the conductive portion P1 exposed by the opening OP2. For example, the bottom BP of the conductive portion P2 may be located on the top surface TS of the conductive portion P1. The sidewall of the conductive portion P2 has at least one trench T. The trench T extends from the top TP of the conductive portion P2 to the bottom BP of the conductive portion P2. In this embodiment, the number of trenches T is multiple as an example, but as long as the number of trenches T is at least one, it belongs to the scope of the present invention. The plurality of grooves T may be symmetrically arranged or asymmetrically arranged.

In this embodiment, the conductive portion P1 and the conductive portion P2 may be independent components. That is, the conductive portion P1 and the conductive portion P2 are formed by different processes instead of being formed continuously, but the present invention is not limited to this. The conductive portion P1 and the conductive portion P2 may be the same material or different materials. The material of the conductive part P2 may include copper, silver, gold or alloys thereof. The method of forming the conductive portion P2 is, for example, an electrochemical plating method, an evaporation method, an electroplating method, or a printing method.

In addition, the conductive portion P2 has a maximum diameter D2 (FIG. 2E). The maximum diameter D2 of the conductive part P2 may be less than or equal to the maximum diameter D1 of the conductive part P1 (FIG. 2B ). In this embodiment, the maximum diameter D2 of the conductive portion P2 is equal to the maximum diameter D1 of the conductive portion P1 as an example, but the present invention is not limited to this. In other embodiments, as shown in FIG. 3, the maximum diameter D2 of the conductive portion P2 may be smaller than the maximum diameter D1 of the conductive portion P1. In addition, according to product requirements, the shape and size of the conductive portion P1 and the conductive portion P2 can be adjusted by the opening OP1 of the patterned photoresist layer 110 and the opening OP2 of the patterned photoresist layer 112, and are not limited to those depicted in the drawings. The state shown.

1F and 2F, the patterned photoresist layer 112 is removed, so that the trench T exposes part of the top surface TS of the conductive portion P1. The method for removing the patterned photoresist layer 112 is, for example, a dry photoresist method or a wet photoresist method.

Then, a part of the under bump metal layer 108 that is not covered by the conductive portion P1 can be removed by using the conductive portion P1 as a mask layer, that is, only the under bump metal layer 108 located under the conductive portion P1 is left. Part of the under-bump metal layer 108 can be removed by an etching process such as wet etching. In this embodiment, the under-bump metal layer 108 covers a part of the top surface of the protective layer 106, but the invention is not limited to this. In other real In an embodiment, the under-bump metal layer 108 may not cover the top surface of the protective layer 106. The shape and size of the under-bump metal layer 108 can be determined by the shape and size of the conductive portion P1 as the mask layer. In another embodiment, a part of the under-bump metal layer 108 that is not covered by the conductive portion P1 can be removed by additionally forming a mask layer. In this case, the shape and size of the under-bump metal layer 108 can be formed by another Determined by the shape and size of the mask layer.

Hereinafter, the conductive pillar bump CP of this embodiment will be described with reference to FIG. 1F, FIG. 2F and FIG. 4. In addition, although the method for forming the conductive pillar bump CP is described by taking the above-mentioned method as an example, the present invention is not limited to this. In other embodiments, a three-dimensional printing method may be used to form conductive pillar bumps CP on the base structure 100. In the case where the conductive pillar bump CP is formed by a three-dimensional printing method, the conductive portion P1 and the conductive portion P2 can be integrally formed. That is, the conductive portion P1 and the conductive portion P2 can be continuously formed by the same three-dimensional printing process.

Referring to FIG. 1F, FIG. 2F and FIG. 4, the conductive pillar bump CP includes a conductive portion P1 and a conductive portion P2. The conductive portion P2 is located on the conductive portion P1. The sidewall of the conductive portion P2 has at least one trench T. The trench T extends from the top TP of the conductive portion P2 to the bottom BP of the conductive portion P2. The trench T exposes a part of the top surface TS of the conductive portion P1. In this embodiment, the bottom surface BS of the conductive portion P1 is a convex surface as an example (FIG. 1F ), but the invention is not limited to this. In other embodiments, the bottom surface BS of the conductive portion P1 may be a flat surface. In addition, the materials, arrangement and formation methods of the components in the conductive pillar bump CP have been described in detail in the above-mentioned embodiment, and will not be described here.

FIG. 5 is a schematic diagram of a flip chip bonding process according to an embodiment of the invention.

Hereinafter, using FIG. 5 to illustrate the use of the conductive pillar bump CP for flip chip Example of bonding process. Referring to FIG. 5, during the flip chip bonding process, the base structure 100 (die) and the die 200 are aligned first. In addition, conductive pillar bumps CP are provided on the base structure 100, and solder 202 is provided on the die 200. Next, the conductive pillar bump CP and the solder 202 are combined.

Based on the above embodiment, it can be known that in the conductive pillar bump CP, the sidewall of the conductive portion P2 has a trench T, and the trench T exposes a part of the top surface TS of the conductive portion P1. Therefore, in the flip-chip bonding process, the trench T on the conductive portion P2 can provide more attachment area for the solder 202, so that the extrusion of the solder 202 can be reduced. In addition, a part of the top surface TS of the conductive portion P1 exposed by the trench T can be used as a blocking portion for blocking the solder 202. Therefore, the part of the top surface TS of the conductive portion P1 exposed by the trench T can be used to determine the adhesion height of the solder 202, so that the extrusion condition of the solder 202 can be further controlled. In this way, the bonding of the bumps can be better controlled to improve the yield rate.

To sum up, in the conductive pillar bumps and the manufacturing method thereof of the above embodiments, since the conductive pillar bumps have grooves and blocking portions, the grooves can reduce the solder extrusion condition and can block The part further controls the solder extrusion condition, and thus can better control the bump bonding condition to improve the yield.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.

BP: bottom

BS: bottom surface

CP: conductive pillar bump

P1, P2: conductive part

T: groove

TP: top

TS: top surface

Claims (20)

A conductive pillar bump includes: a first conductive portion; and a second conductive portion located on the first conductive portion, wherein a sidewall of the second conductive portion has at least one groove, and the at least one groove It extends from the top of the second conductive part to the bottom of the second conductive part, and the at least one groove exposes a part of the top surface of the first conductive part. The conductive pillar bump according to claim 1, wherein the maximum diameter of the second conductive portion is less than or equal to the maximum diameter of the first conductive portion. The conductive pillar bump according to claim 1, wherein the first conductive portion and the second conductive portion are separate components or integrally formed. The conductive pillar bump according to claim 1, wherein the first conductive portion and the second conductive portion are made of the same material. The conductive pillar bump according to claim 1, wherein the first conductive portion and the second conductive portion are made of different materials. The conductive pillar bump according to claim 1, wherein the materials of the first conductive portion and the second conductive portion include copper, silver, gold or alloys thereof. The conductive pillar bump according to claim 1, wherein the number of the at least one trench is multiple, and the at least one trench is symmetrically arranged. The conductive pillar bump according to claim 1, wherein the number of the at least one trench is multiple, and the at least one trench is configured asymmetrically. A method for manufacturing conductive pillar bumps includes: Providing a base structure; forming a first patterned photoresist layer on the base structure, wherein the first patterned photoresist layer has a first opening exposing the base structure; Forming a first conductive portion on the base structure; removing the first patterned photoresist layer; forming a second patterned photoresist layer on the base structure, wherein the second patterned photoresist layer has Exposing the second opening of the first conductive part, the second patterned photoresist layer includes at least one protrusion, and at least one protrusion covers a part of the top surface of the first conductive part; A second conductive portion is formed on the first conductive portion exposed by the opening, wherein a sidewall of the second conductive portion has at least one groove, and the at least one groove extends from the top of the second conductive portion To the bottom of the second conductive part; and removing the second patterned photoresist layer, so that the at least one trench exposes a part of the top surface of the first conductive part. The method for manufacturing a conductive pillar bump according to claim 9, wherein the method for forming the first conductive portion includes an electrochemical plating method, an evaporation method, an electroplating method, or a printing method. The method for manufacturing a conductive pillar bump according to claim 9, wherein the method for removing the first patterned photoresist layer includes a dry photoresist removal method or a wet photoresist removal method. The method for manufacturing a conductive pillar bump according to claim 9, wherein the method for forming the second conductive portion includes an electrochemical plating method, an evaporation method, an electroplating method, or a printing method. The method for manufacturing a conductive pillar bump according to claim 9, wherein the method for removing the second patterned photoresist layer includes a dry photoresist removal method or a wet photoresist removal method. The method for manufacturing a conductive pillar bump according to claim 9, wherein the maximum diameter of the second conductive portion is less than or equal to the maximum diameter of the first conductive portion. The method for manufacturing a conductive pillar bump according to claim 9, wherein the materials of the first conductive portion and the second conductive portion include copper, silver, gold or alloys thereof. The method for manufacturing a conductive pillar bump according to claim 9, wherein the first conductive portion and the second conductive portion are independent components. A method for manufacturing a conductive pillar bump includes: providing a base structure; and forming a conductive pillar bump on the base structure by a three-dimensional printing method, wherein the conductive pillar bump includes: a first conductive portion; and a second The conductive portion is located on the first conductive portion, wherein the sidewall of the second conductive portion has at least one groove, and the at least one groove extends from the top of the second conductive portion to the second conductive portion And the at least one groove exposes a part of the top surface of the first conductive part. The method for manufacturing a conductive pillar bump according to claim 17, wherein the maximum diameter of the second conductive portion is less than or equal to the maximum diameter of the first conductive portion. The method for manufacturing a conductive pillar bump according to claim 17, wherein the materials of the first conductive portion and the second conductive portion include copper, silver, gold or alloys thereof. The method for manufacturing a conductive pillar bump according to claim 17, wherein the first conductive portion and the second conductive portion are integrally formed.

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