WO2022142119A1 - 显示面板及其制备方法 - Google Patents

显示面板及其制备方法 Download PDF

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Publication number
WO2022142119A1
WO2022142119A1 PCT/CN2021/097299 CN2021097299W WO2022142119A1 WO 2022142119 A1 WO2022142119 A1 WO 2022142119A1 CN 2021097299 W CN2021097299 W CN 2021097299W WO 2022142119 A1 WO2022142119 A1 WO 2022142119A1
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WO
WIPO (PCT)
Prior art keywords
hole
wiring
insulating layer
display area
layer
Prior art date
Application number
PCT/CN2021/097299
Other languages
English (en)
French (fr)
Inventor
陈方甫
Original Assignee
深圳市华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电半导体显示技术有限公司 filed Critical 深圳市华星光电半导体显示技术有限公司
Priority to US17/427,056 priority Critical patent/US11982911B2/en
Publication of WO2022142119A1 publication Critical patent/WO2022142119A1/zh

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods

Definitions

  • the present invention relates to the field of display devices, in particular to a display panel and a preparation method thereof.
  • the design of the product periphery is usually as shown in Figure 1. It is necessary to connect the vertical gate line (V-Gate) 1 to the fan-out line (Fanout line) through the transfer hole 4 and the transfer line 3. line), and then connect to the COF through the fanout line 2 to start the device.
  • V-Gate vertical gate line
  • Fan-out line fan-out line
  • COF COF through the fanout line 2 to start the device.
  • the current ultra-narrow frame needs to use a three-layer metal circuit process, and the gate insulating layers 5 and 6 need two layers.
  • the patch cord 3 due to the two-layer insulating layer climbing in the hole, there will be a two-segment angle phenomenon as indicated by the dotted box in Figure 2, which makes the patch cord 3 easy to have problems such as poor contact when it is overlapped.
  • the purpose of the present invention is to provide a display panel and a method for preparing the same, so as to solve the problem that when the transfer hole for connecting the vertical gate line and the fan-out line is etched in the prior art, there is a two-stage angle phenomenon in the climbing slope in the hole. When the patch cord is overlapped, it is easy to have poor contact.
  • the present invention provides a display panel having a display area and a non-display area surrounding the display area.
  • the display panel further includes a first metal layer, a first insulating layer, a second metal layer, a second insulating layer, a third metal layer and a bridge layer.
  • the first metal layer has at least one first wire extending from the display area to the non-display area.
  • the first insulating layer is disposed in the display area and the non-display area and covers the first metal layer, the first insulating layer has at least one first through hole, and the first through hole penetrates the first through hole The insulating layer extends to the surface of one of the first wires.
  • the second metal layer has at least one second wiring, and each second wiring is disposed on the first insulating layer of the non-display area and is correspondingly connected to a first wiring through a first through hole.
  • the second insulating layer is disposed in the display area and the non-display area and covers the first insulating layer and the first metal layer.
  • the second insulating layer has at least one second through hole, which penetrates the second insulating layer and extends to the surface of one of the second wirings.
  • the third metal layer has at least one third wiring, and each third wiring is arranged on the second insulating layer of the non-display area.
  • the bridge layer has at least one bridge wiring, and each bridge wiring extends from a second wiring in the second through hole to a third wiring corresponding to the second wiring.
  • the display panel further includes a passivation layer, the passivation layer is disposed between the second insulating layer and the bridge layer, and covers the third metal layer.
  • the passivation layer has at least one third through hole and at least one fourth through hole.
  • the third through hole penetrates the passivation layer and corresponds to a second through hole.
  • the fourth through hole penetrates the passivation layer and extends to the surface of a third wiring.
  • the bridging traces pass through the third through holes from the second traces in the second through holes and extend to the third traces in the fourth through holes.
  • the third through holes and the fourth through holes are located at one end of the non-display area close to the display area, and the third through holes and the fourth through holes are arranged in a line shape at intervals.
  • the first insulating layer further has at least one fifth through hole, which penetrates the first insulating layer and extends to the surface of a first wiring.
  • the second metal layer also has at least one fourth wiring, each fourth wiring is arranged on the first insulating layer of the display area, and each fourth wiring is correspondingly connected through a fifth through hole to the first trace corresponding to the fifth through hole.
  • the material of the bridge wiring includes indium tin oxide.
  • the present invention also provides a method for preparing a display panel for preparing the above-mentioned display panel, which includes the following steps:
  • a substrate is provided, the substrate has a display area and a non-display area surrounding the display area; a first metal layer is formed on the substrate, and at least one first wire is formed in the first metal layer, so that the first wiring extends from the display area to the non-display area; a first insulating layer is formed on the substrate and the first metal layer, and at least one first insulating layer is formed in the first insulating layer through holes, each first through hole corresponds to one of the first wires; a second metal layer is formed on the first insulating layer, and at least one second metal layer is formed in the second metal layer of the non-display area wiring, the second wiring is connected to a first wiring through a first through hole; a second insulating layer is formed on the first insulating layer and the second metal layer, and a second insulating layer is formed on the second At least one second through hole is formed in the insulating layer, and each first through hole corresponds to one of the second wirings; a third metal layer is formed on the second insul
  • the manufacturing method of the display panel further includes forming a passivation layer on the second insulating layer and the third metal layer.
  • the manufacturing method of the display panel further includes forming at least one third through hole and at least one fourth through hole in the passivation layer, each third through hole corresponds to a first through hole, and each A fourth through hole corresponds to a third trace.
  • the step of forming a first insulating layer on the substrate and the first metal layer further includes: forming at least one fifth through hole in the first insulating layer, and the fifth through hole corresponds to on a first line.
  • the step of forming the second metal layer on the first insulating layer further includes forming at least one fourth wiring on the first insulating layer of the display area while forming the second wiring, and the The fourth wire is connected to the first wire corresponding to the fifth through hole through a fifth through hole.
  • the advantages of the present invention are: in the display panel provided by the present invention, a second wiring is added between the two insulating layers, so that the first wiring and the bridge wiring are overlapped by the second wiring, preventing the
  • the problem of the etching process leads to the problem of a two-stage angle between the first insulating layer and the second insulating layer, so as to prevent problems such as poor contact between the bridge traces and make the bridge between the first trace and the third trace more stable. , thereby improving the reliability of the display panel.
  • the method for manufacturing the display panel can add a second wiring between the first insulating layer and the second insulating layer without adding a new manufacturing step, which improves the yield of the product and reduces the manufacturing cost.
  • FIG. 1 is a schematic diagram of wiring arrangement of a display panel in the prior art
  • Fig. 2 is a kind of sectional structure schematic diagram of the display panel shown in Fig. 1 along AA' cutting line;
  • FIG. 3 is a schematic diagram of wiring arrangement of a display panel according to an embodiment of the present invention.
  • Fig. 4 is the cross-sectional structure schematic diagram of the display panel shown in Fig. 3 along AA' cutting line;
  • Fig. 5 is the cross-sectional structure schematic diagram of the display panel shown in Fig. 3 along BB' cutting line;
  • FIG. 6 is a schematic flowchart of a method for fabricating a display panel according to an embodiment of the present invention.
  • FIG. 7 is a schematic cross-sectional structure diagram of the display panel in step S40 according to an embodiment of the present invention.
  • step S80 is a schematic cross-sectional structure diagram of the display panel in step S80 according to an embodiment of the present invention.
  • FIG. 9 is a schematic cross-sectional structure diagram of the display panel in step S90 according to an embodiment of the present invention.
  • substrate 10 first metal layer 20; first wiring 21;
  • the first insulating layer 30 the first through hole 31; the fifth through hole 32;
  • passivation layer 70 third through hole 71; fourth through hole 72;
  • Bridge layer 80 Bridge line 81;
  • Gate insulating layers 5 and 6 are provided.
  • An embodiment of the present invention provides a display panel 100.
  • the display panel 100 has a display area 101 and a non-display area 102 connected to the display area 101.
  • the display area 101 is used for To display an image
  • the non-display area 102 is used for arranging wires and connecting corresponding driving circuits.
  • the display panel 100 further includes a substrate 10 , a first metal layer 20 , a first insulating layer 30 , a second metal layer 40 , a second insulating layer 50 , a The third metal layer 60 , a passivation layer 70 and a bridge layer 80 .
  • the substrate 10 is an insulating substrate, such as a glass substrate, a quartz substrate, or the like.
  • the first metal layer 20 is disposed on a surface of the substrate 10 and has a plurality of first traces 21 . As shown in FIG. 3 , the first wires 21 extend from the display area 101 to the non-display area 102 of the display panel 100 , and two adjacent first wires 21 are insulated from each other.
  • the first insulating layer 30 is disposed on the substrate 10 and covers the first metal layer 20, and is used for insulating and protecting the wirings in the first metal layer 20, preventing short circuits between the wirings, and at the same time. Water and oxygen are prevented from invading and corroding the first metal layer 20 .
  • the first insulating layer 30 has a plurality of first through holes 31 , and the first through holes 31 penetrate through the first insulating layer 30 and extend to one of the first metal layers 20 . on the surface of the first trace 21 .
  • the first through holes 31 are located in the non-display area 102 , and one end of each of the first traces 21 located in the non-display area 102 is correspondingly provided with a first through hole 31 .
  • the first insulating layer 30 further includes a plurality of fifth through holes 32 , and the fifth through holes 32 penetrate the first insulating layer 30 and also extend to a portion of the first metal layer 20 . on the surface of the first trace 21 .
  • the fifth through hole 32 is located in the display area 101 , and one end of each first trace 21 located in the display area 101 is correspondingly provided with a fifth through hole 32 .
  • the second metal layer 40 is disposed on a surface of the first insulating layer 30 away from the first metal layer 20 , and has a plurality of second wires 41 and a plurality of fourth wires 42 .
  • the second wiring 41 is located in the non-display area 102 of the display panel 100
  • the fourth wiring 42 is located in the display area 101 of the display panel 100 .
  • Two adjacent second wires 41 are insulated from each other, and two adjacent fourth wires 42 are insulated from each other.
  • One end of the first trace 21 located in the non-display area 102 is connected to a second trace 41 in the second metal layer 40
  • one end of the first trace 21 located in the display area 101 is connected to the second trace 41 in the second metal layer 40 .
  • a fourth trace 42 in the metal layer 40 is connected.
  • the second wiring 41 is connected to a first wiring 21 in the first metal layer 20 through a corresponding first through hole 31 .
  • the fourth wiring 42 is connected to a first wiring 21 in the first metal layer 20 through a corresponding fifth through hole 32 .
  • the second insulating layer 50 is disposed on the first insulating layer 30 and covers the second metal layer 40 , which is used to insulate and protect the wirings in the second metal layer 40 to prevent occurrences between the wirings.
  • the short circuit also prevents water and oxygen from invading and corroding the second metal layer 40 .
  • the second insulating layer 50 has a plurality of second through holes 51 , and the second through holes 51 penetrate through the second insulating layer 50 and extend to one of the second metal layers 40 . on the surface of the second trace 41 .
  • the second through hole 51 is located at one end of the non-display area 102 close to the display area 101 , and each second wiring 41 has a corresponding second through hole 51 .
  • the third metal layer 60 is disposed on a surface of the second insulating layer 50 away from the second metal layer 40 , and has a plurality of third wirings 61 . As shown in FIG. 3 , the third wires 61 are located in the non-display area 102 of the display panel 100 , and two adjacent third wires 61 are insulated from each other.
  • the passivation layer 70 is disposed on the second metal layer 40 and covers the third metal layer 60 to insulate and protect the wires in the third metal layer 60 to prevent short circuits between wires. It also prevents water and oxygen from invading and corroding the third metal layer 60 .
  • the passivation layer 70 has several third through holes 71 and several fourth through holes 72 therein.
  • the third through hole 71 penetrates through the passivation layer 70 and communicates with a second through hole 51 in the second insulating layer 50 , and forms a deep hole in combination with the second through hole 51 .
  • the fourth through hole 72 penetrates through the passivation layer 70 and extends to the surface of the third metal layer 60 .
  • the third through holes 71 and the fourth through holes 72 are arranged in a line at one end of the non-display area 102 close to the display area 101 , and the third through holes 71 and the fourth through holes 72 are arranged at intervals.
  • the bridging layer 80 is disposed on the passivation layer 70, and is provided with a plurality of bridging traces.
  • the bridging traces are made of transparent conductive materials such as indium tin oxide, which are used to connect the first trace 21 and the third trace. Line 61 is electrically connected.
  • the bridge wiring is located at one end of the non-display area 102 close to the display area 101 .
  • One end of the bridging trace is connected to a second trace 41 in the second metal layer 40 through a deep hole formed by a combination of a second through hole 51 and a third through hole 71 , and the other end is connected to a second trace 41 in the second metal layer 40 .
  • a fourth through hole 72 adjacent to the third through hole 71 is connected to a third wire 61 in a third metal layer 60 , and two adjacent bridge wires are insulated from each other.
  • one end of the bridging trace passes through the second through hole 51 and the third through hole 71 and is connected to the corresponding second trace 41 in the second metal layer 40 .
  • the other end is connected to the corresponding third wiring 61 in the third metal layer 60 through the fourth through hole 72 .
  • the first wiring 21 is a gate driving line
  • the second wiring 41 is a metal connecting line
  • the third wiring 61 is a fan-out wiring
  • the fourth wiring 42 is a gate wiring.
  • One end of the first wiring 21 is electrically connected to the second wiring 41, and the other end thereof is electrically connected to one end of the third wiring 61 through the second wiring 41 and the bridge wiring.
  • the other end of 61 is connected to the gate drive circuit.
  • the gate driving circuit inputs the scan voltage to each of the first traces 21 through the third trace 61 , and the first trace 21 then inputs the scan voltage to the corresponding fourth trace 42 to perform By scanning line by line, the thin film transistors in the display panel 100 are turned on line by line, thereby controlling the light emission of the display panel 100 to realize the display of the picture.
  • An embodiment of the present invention further provides a display device, the display device has the above-mentioned display panel 100, and the display panel 100 is used to provide a display image for the display device.
  • the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, and a notebook computer.
  • the first traces 21 and the bridge traces are overlapped by the second traces 41 , thereby reducing the gap between the first insulating layer 30 and the second insulating layer 50
  • the depth of the deep hole prevents the problem of two-stage angle between the first insulating layer 30 and the second insulating layer 50 due to the problem of the etching process, so as to prevent the bridge wiring from having poor contact and other problems, so that the first wiring
  • the bridge between 21 and the third wiring 61 is more stable, thereby improving the reliability of the display panel 100 .
  • the present invention also provides a method for preparing the display panel 100, which is used to prepare the above-mentioned display panel 100.
  • the preparation process is shown in FIG. 6, which includes the following preparation steps:
  • Step S10 providing a substrate 10 : the substrate 10 is an insulating substrate having a display area 101 and a non-display area 102 surrounding the display area 101 .
  • Step S20 forming a first metal layer 20 : depositing a layer of metal material on a surface of the substrate 10 to form the first metal layer 20 .
  • the first metal layer 20 is patterned to form a plurality of first wires 21 in the display area 101 , and the first wires 21 extend from the display area 101 to the non-display area 102 .
  • Step S30 forming a first insulating layer 30 : depositing a layer of inorganic material, such as silicon oxide, silicon nitride, etc. on the substrate 10 , and making the inorganic material layer cover the first layer of the first metal layer 20 .
  • Line 21 to form the first insulating layer 30 the first insulating layer 30 is exposed through a mask and then etched to be patterned, and a plurality of first insulating layers 30 are formed in the non-display area 102 of the first insulating layer 30
  • the through holes 31 and a plurality of fifth through holes 32 are formed in the display area 101 of the first insulating layer 30 , and a first through hole 31 and a fifth through hole are respectively corresponding to both ends of each first trace 21 32.
  • Step S40 forming the second metal layer 40 : depositing a layer of metal material on a surface of the first insulating layer 30 away from the first metal layer 20 , and filling each layer of the first insulating layer 30 with the metal material.
  • a plurality of second wires 41 are formed on the 30 (as shown in FIG.
  • each second wire 41 passes through a first The through hole 31 is connected to a corresponding first wire 21
  • each fourth wire 42 is connected to a corresponding first wire 21 through a fifth through hole 32 .
  • Step S50 forming a second insulating layer 50 : depositing a layer of inorganic material, such as silicon oxide, silicon nitride, etc., on the first insulating layer 30 , and making the inorganic material layer cover the second metal layer 40 .
  • the second wiring 41 and the fourth wiring 42 form the second insulating layer 50 .
  • Step S60 forming a third metal layer 60 : depositing a layer of metal material on a surface of the second insulating layer 50 away from the second metal layer 40 to form the third metal layer 60 ;
  • the metal layer 60 is patterned, and a plurality of third wirings 61 are formed on the second insulating layer 50 in the non-display area 102 , and the third wirings 61 are close to the display area 101 from the non-display area 102 .
  • One side extends to the side of the display area 101 away from the display.
  • Step S80 forming the second through hole 51 , the third through hole 71 and the fourth through hole 72 : as shown in FIG. 9 , a plurality of third through holes are etched in the passivation layer 70 in the non-display area 102 through an etching process Through holes 71 and a plurality of fourth through holes 72, and a plurality of second through holes 51 are etched in the second insulating layer 50; wherein, the second through holes 51 and the third through holes 71 are concentric holes , and both the second through hole 51 and the third through hole 71 correspond to a second trace 41 in the second metal layer 40 , and the fourth through hole 72 corresponds to the third metal layer 40 A third trace 61 in the layer 60 is provided.
  • Step S90 forming a bridge layer 80 : depositing a layer of indium tin oxide on the passivation layer 70 to form the bridge layer 80 ; patterning the bridge layer 80 in the non-display area 102 of the display panel 100 A plurality of bridging traces are formed therein, and the bridging traces extend from the surface of the second trace 41 corresponding to the second through hole 51 to the surface of the third trace 61 corresponding to the fourth through hole 72 , and finally the display panel 100 as shown in FIG. 4 is formed.
  • the display panel 100 prepared by the manufacturing method provided in the embodiment of the present invention by adding the second wiring 41 on the second insulating layer 50, the reliability of the display panel 100 is increased without increasing the manufacturing process and equipment. , the yield of the display panel 100 is improved, and the manufacturing cost is reduced.

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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本发明提供了一种显示面板及其制备方法。所述显示面板在第一绝缘层和第二绝缘层之间增加了第二走线,使第一走线和桥接走线通过第二走线搭接,防止由于蚀刻工艺的问题而导致第一绝缘层和第二绝缘层之间出现二段角的问题,从而防止桥接走线出现接触不良等问题,使第一走线与第三走线之间桥接更加稳定。

Description

显示面板及其制备方法
本申请要求于2021年1月4日提交中国国家知识产权局、申请号为202110004087X、发明名称为“显示面板及其制备方法”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及显示设备领域,特别是一种显示面板及其制备方法。
背景技术
随着液晶面板4K、8K超解析及超窄边框(边框宽度小于或等于0.9mm)新技术产品开发及普及,传统面板设计已经不能满足高规格需求,为满足超窄边框及高解析规格达成,业界正开发将显示面板行驱动设置在显示面板的源极边框上(GOA in Source Board)以及将栅极线柔性电路板设置在显示面板的源极边框上(Gate COF in Source Board),这样显示面板的栅极边框和底边宽可以达成待遇等于0.9mm需求。
开发此技术为满足现有制程机台能力,产品外围的设计通常如图1所示,需把垂直栅极线(V-Gate)1通过转接孔4和转接线3连接到扇出线(Fanout line)上,再通过扇出线2连接至COF 启动器件。如图2所示,现超窄边框需要使用三层金属线路工艺,栅极绝缘层5、6需要两层,若使用现有的蚀刻工艺蚀刻转接垂直栅极线1与扇出线2的转接孔时,由于具有两层绝缘层孔内爬坡会出现如图2虚线框中所标识出的二段角现象,使转接线3搭接时容易出现接触不良等问题。
技术问题
本发明的目的是提供一种显示面板及其制备方法,以解决现有技术中蚀刻转接垂直栅极线与扇出线的转接孔时,孔内爬坡存在二段角现象,从而造成的转接线搭接时容易接触不良的问题。
技术解决方案
为实现上述目的,本发明提供一种显示面板,所述显示面板具有显示区和围绕所述显示区的非显示区。
所述显示面板中还包括第一金属层、第一绝缘层、第二金属层、第二绝缘层、第三金属层以及桥接层。
所述第一金属层具有至少一第一走线,所述第一走线从所述显示区延伸至所述非显示区。所述第一绝缘层设于所述显示区和非显示区且覆盖所述第一金属层,所述第一绝缘层具有至少一第一通孔,所述第一通孔贯穿所述第一绝缘层并延伸至其中一第一走线的表面。所述第二金属层具有至少一第二走线,每一第二走线设于所述非显示区的第一绝缘层上且对应地通过一第一通孔连接至一第一走线。所述第二绝缘层设于所述显示区和非显示区且覆盖第一绝缘层和所述第一金属层。所述第二绝缘层具有至少一第二通孔,贯穿所述第二绝缘层并延伸至其中一第二走线的表面。所述第三金属层具有至少一第三走线,每一第三走线设于所述非显示区的第二绝缘层上。所述桥接层具有至少一桥接走线,每一桥接走线从所述第二通孔中的第二走线上延伸至该第二走线所对应的第三走线上。
进一步地,所述显示面板中还包括钝化层,所述钝化层设于所述第二绝缘层和所述桥接层之间,并覆盖所述第三金属层。
进一步地,所述钝化层中具有至少一第三通孔以及至少一第四通孔。所述第三通孔贯穿所述钝化层,并对应于一第二通孔。所述第四通孔贯穿所述钝化层并延伸至一第三走线的表面上。所述桥接走线从所述第二通孔中的第二走线上穿过所述第三通孔并延伸至所述第四通孔中的第三走线上。
进一步地,所述第三通孔和所述第四通孔位于所述非显示区靠近所述显示区的一端,且所述第三通孔与所述第四通孔间隔排列成一字型。
进一步地,所述第一绝缘层中还具有至少一第五通孔,贯穿所述第一绝缘层并延伸至一第一走线的表面。所述第二金属层中还具有至少一第四走线,每一第四走线设于所述显示区的第一绝缘层上,每一第四走线对应地通过一第五通孔连接至与所述第五通孔对应的第一走线。
进一步的,所述桥接走线的材料中包含氧化铟锡。
本发明中还提供了一种显示面板的制备方法,用以制备如上所述的显示面板,其包括以下步骤:
提供一基板,所述基板具有显示区和围绕所述显示区的非显示区;在一基板的上形成第一金属层,并在所述第一金属层中形成至少一第一走线,所述第一走线从所述显示区延伸至所述非显示区;在所述基板和所述第一金属层上形成第一绝缘层,并在所述第一绝缘层中形成至少一第一通孔,每一第一通孔对应于其中一第一走线;在所述第一绝缘层上形成第二金属层,并在所述非显示区的第二金属层中形成至少一第二走线,所述第二走线通过一第一通孔连接至一第一走线;在所述第一绝缘层和所述第二金属层上形成第二绝缘层,并在所述第二绝缘层中形成至少一第二通孔,每一第一通孔对应于其中一第二走线;在所述非显示区的第二绝缘层上形成第三金属层,并在所述第三金属层中形成至少一第三走线;在所述第二绝缘层上形成桥接层,并在所述桥接层中形成至少一桥接走线,所述桥接走线从所述第二通孔中的第二走线上延伸至该第二走线所对应的第三走线上。
进一步地,所述显示面板的制备方法中还包括在所述第二绝缘层和所述第三金属层上形成钝化层。
进一步地,所述显示面板的制备方法中还包括在所述钝化层中形成至少一第三通孔和至少一第四通孔,每一第三通孔对应于一第一通孔,每一第四通孔对应于一第三走线。
进一步地, 所述在所述基板和所述第一金属层上形成第一绝缘层步骤中还包括:在所述第一绝缘层形成第至少一第五通孔,所述第五通孔对应于一第一走线。所述在所述第一绝缘层上形成第二金属层步骤中还包括在形成所述第二走线的同时在所述显示区的第一绝缘层上形成至少一第四走线,所述第四走线通过一第五通孔连接至与所述第五通孔对应的第一走线。
有益效果
本发明的优点是:本发明中所提供的一种显示面板,在两层绝缘层之间增加了第二走线,使第一走线和桥接走线通过第二走线搭接,防止由于蚀刻工艺的问题而导致第一绝缘层与第二绝缘层之间出现二段角的问题,从而防止桥接走线出现接触不良等问题,使第一走线与第三走线之间桥接更加稳定,进而提高显示面板的可靠性。并且,所述显示面板的制备方法无需增加新的制备步骤就可以在第一绝缘层与第二绝缘层之间增加第二走线,提高了产品的良品率,减少了制备成本。
附图说明
图1为现有技术中显示面板的走线排布示意图;
图2为图1所示的显示面板沿AA’切割线的一种剖面结构示意图;
图3为本发明实施例中显示面板的走线排布示意图;
图4为图3所示的显示面板沿AA’切割线的剖面结构示意图;
图5为图3所示的显示面板沿BB’切割线的剖面结构示意图;
图6为本发明实施例中显示面板制备方法的流程示意图;
图7为本发明实施例中步骤S40中显示面板的剖面结构示意图;
图8为本发明实施例中步骤S80中显示面板的剖面结构示意图;
图9为本发明实施例中步骤S90中显示面板的剖面结构示意图。
图中部件表示如下:
显示面板100;
显示区101;非显示区102;
基板10;第一金属层20;第一走线21;
第一绝缘层30;第一通孔31;第五通孔32;
第二金属层40;第二走线41;第四走线42;
第二绝缘层50;第二通孔51;
第三金属层60;第三走线61;
钝化层70;第三通孔71;第四通孔72;
桥接层80;桥接线81;
垂直栅极线1;扇出线2
转接线3;转接孔4;
栅极绝缘层5、6。
本发明的实施方式
以下参考说明书附图介绍本发明的优选实施例,证明本发明可以实施,所述发明实施例可以向本领域中的技术人员完整介绍本发明,使其技术内容更加清楚和便于理解。本发明可以通过许多不同形式的发明实施例来得以体现,本发明的保护范围并非仅限于文中提到的实施例。
本发明实施例中提供了一种显示面板100,如图3所示,所述显示面板100具有一显示区101以及与所述显示区101连接的非显示区102,所述显示区101用以显示图像,所述非显示区102用于排布走线并连接相应的驱动电路。如图4及图5所示,所述显示面板100中还包括一基板10、一第一金属层20、一第一绝缘层30、一第二金属层40、一第二绝缘层50、一第三金属层60、一钝化层70以及一桥接层80。
所述基板10为绝缘基板,例如玻璃基板、石英基板等。
所述第一金属层20设于所述基板10的一表面上,其具有若干第一走线21。如图3所示,所述第一走线21从所述显示面板100的显示区101延伸至所述非显示区102,相邻的两根第一走线21之间绝缘设置。
所述第一绝缘层30设于基板10上并覆盖在所述第一金属层20,其用于绝缘保护所述第一金属层20中的走线,防止走线之间发生短路,同时也防止水氧入侵腐蚀第一金属层20。
如图4所示,所述第一绝缘层30中具有若干第一通孔31,所述第一通孔31贯穿所述第一绝缘层30,并延伸至所述第一金属层20中一第一走线21的表面上。所述第一通孔31位于所述非显示区102内,并且每一条第一走线21位于非显示区102的一端都对应设有一第一通孔31。
如图5所示,所述第一绝缘层30中还具有若干第五通孔32,所述第五通孔32贯穿的第一绝缘层30并也延伸至所述第一金属层20的一第一走线21的表面上。所述第五通孔32位于所述显示区101内,并且每一条第一走线21位于所述显示区101的一端都对应设有一第五通孔32。
所述第二金属层40设于所述第一绝缘层30远离所述第一金属层20的一表面上,其具有若干第二走线41和若干第四走线42。
如图3所示,所述第二走线41位于所述显示面板100的非显示区102内,所述第四走线42位于所述显示面板100的显示区101内。相邻的两根第二走线41之间互相绝缘设置,相邻的两根第四走线42之间互相绝缘设置。所述第一走线21位于所述非显示区102内的一端与所述第二金属层40中的一第二走线41连接,其位于所述显示区101内的一端与所述第二金属层40中的一第四走线42连接。
如图4所示,所述第二走线41通过对应的第一通孔31与所述第一金属层20中的一第一走线21连接。如图5所示,所述第四走线42通过对应的第五通孔32与所述第一金属层20中的一第一走线21连接。
所述第二绝缘层50设于所述第一绝缘层30上并覆盖所述第二金属层40,其用于绝缘保护所述第二金属层40中的走线,防止走线之间发生短路,同时也防止水氧入侵腐蚀第二金属层40。
如图4所示,所示第二绝缘层50中具有若干第二通孔51,所述第二通孔51贯穿所述第二绝缘层50,并延伸至所述第二金属层40中一第二走线41的表面上。所述第二通孔51位于所述非显示区102靠近所述显示区101的一端,并且每一第二走线41上都对应设有一第二通孔51。
所述第三金属层60设于所述第二绝缘层50远离所述第二金属层40地一表面上,其具有若干第三走线61。如图3所示,所述第三走线61位于所述显示面板100的非显示区102内,并且相邻的两根第三走线61之间绝缘设置。
所述钝化层70设于所述第二金属层40并覆盖所述第三金属层60,用于绝缘保护所述第三金属层60中的走线,防止走线之间发生短路,同时也防止水氧入侵腐蚀第三金属层60。
如图4所述,所述钝化层70中具有若干第三通孔71和若干第四通孔72。所述第三通孔71贯穿所述钝化层70并与所述第二绝缘层50中一第二通孔51连通,且与所述第二通孔51组合形成一深孔。所述第四通孔72贯穿所述钝化层70,并延伸至所述第三金属层60的表面上。如图3所示,所述第三通孔71和所述第四通孔72呈一字型排列在所述非显示区102靠近所述显示区101的一端,并且所述第三通孔71和所述第四通孔72一隔一间隔排列。
所述桥接层80设于所述钝化层70上,其设有若干桥接走线,所述桥接走线采用氧化铟锡等透明导电材,其用于将第一走线21和第三走线61电连接。
如图3所示,所述桥接走线位于所述非显示区102靠近所述显示区101的一端。所述桥接走线的一端与通过一第二通孔51和第三通孔71所组合形成的深孔与所述第二金属层40中的一第二走线41连接,其另一端通过与所述第三通孔71相邻的一第四通孔72连接至一第三金属层60中的一第三走线61上,并且相邻的两根桥接走线之间绝缘设置。
如图4所示,所述桥接走线的一端穿过所述第二通孔51和所述第三通孔71与所述第二金属层40中所对应的第二走线41连接,其另一端穿过所述第四通孔72与所述第三金属层60中所对应的第三走线61连接。
所述第一走线21为栅极驱动线,所述第二走线41为金属连接线,所述第三走线61为扇出走线,所述第四走线42为栅极走线。所述第一走线21的一端与第二走线41电连接,其另一端通过第二走线41和桥接走线与所述第三走线61的一端电连接,所述第三走线61的另一端与栅极驱动电路连接。当显示面板100工作时,栅极驱动电路输通过第三走线61向每一条第一走线21输入扫描电压,第一走线21再将扫描电压输入对应的第四走线42中,进行逐行扫描,从而逐行打开显示面板100中的薄膜晶体管,进而控制显示面板100的发光,实现画面的显示。
本发明实施例还提供一种显示装置,所述显示装置中具有如上所述显示面板100,所述显示面板100用于为所述显示装置提供显示画面。所述显示装置可以为手机、平板电脑、笔记本电脑等任何具有显示功能的产品或者部件。
在本发明实施例中所提供的显示面板100中,通过第二走线41将第一走线21与桥接走线之间搭接,减小了第一绝缘层30与第二绝缘层50中深孔的深度,防止由于蚀刻工艺的问题而导致第一绝缘层30与第二绝缘层50之间中出现二段角的问题,从而防止桥接走线出现接触不良等问题,使第一走线21与第三走线61之间桥接更加稳定,进而提高显示面板100的可靠性。
本发明中还提供一种显示面板100的制备方法,用以制备如上所述的显示面板100,其制备流程如图6所示,其包括以下制备步骤:
步骤S10)提供一基板10:所述基板10为绝缘基板,其具有显示区101和围绕所述显示区101的非显示区102。
步骤S20)形成第一金属层20:在所述基板10的一表面上沉积一层金属材料,形成所述第一金属层20。将所述第一金属层20图案化,在所述显示区101形成若干第一走线21,并且所述第一走线21从所述显示区101延伸至所述非显示区102。
步骤S30)形成第一绝缘层30:在所述基板10上沉积一层无机材料,例如氧化硅、氮化硅等,并使该无机材料层覆盖所述第一金属层20中的第一走线21,形成所述第一绝缘层30;将所述第一绝缘层30通过光罩曝光后并蚀刻,使其图案化,在所述第一绝缘层30的非显示区102形成若干第一通孔31以及在所述第一绝缘层30的显示区101形成若干第五通孔32,并且每一条第一走线21的两端分别对应设有一第一通孔31和一第五通孔32。
步骤S40)形成第二金属层40:在所述第一绝缘层30远离所述第一金属层20的一表面上沉积一层金属材料,并使该层金属材料填充第一绝缘层30中每一第一通孔31和第五通孔32,形成所述第二金属层40;通过黄光制程使所述第二金属层40图案化,在所述非显示区102内的第一绝缘层30上形成若干第二走线41(如图7所示),在所述显示区101内的第一绝缘层30上形成若干第四走线42;每一第二走线41通过一第一通孔31与所对应的一第一走线21连接,每一第四走线42通过一第五通孔32与所对应的一第一走线21连接。
步骤S50)形成第二绝缘层50:在所述第一绝缘层30上沉积一层无机材料,例如氧化硅、氮化硅等,并使该无机材料层覆盖所述第二金属层40中的第二走线41和第四走线42,形成所述第二绝缘层50。
步骤S60)形成第三金属层60:在所述第二绝缘层50远离所述第二金属层40的一表面上沉积一层金属材料,形成所述第三金属层60;将所述第三金属层60图案化,在所述非显示区102内的第二绝缘层50上形成若干第三走线61,所述第三走线61从所述非显示区102靠近所述显示区101的一侧往所述显示区101远离所述显示的一侧延伸。
步骤S70)形成钝化层70:如图8所示,在所述第二绝缘层50上沉积一层无机材料,并使该无机材料层覆盖所述第三金属中的第三走线61,形成所述钝化层70。
步骤S80)形成第二通孔51、第三通孔71和第四通孔72:如图9所示,通过蚀刻工艺在所述非显示区102内的钝化层70中蚀刻出若干第三通孔71和若干第四通孔72,并在所述第二绝缘层50中蚀刻出若干第二通孔51;其中,所述第二通孔51与所述第三通孔71为同心孔,且所述第二通孔51和所述第三通孔71都对应于所述第二金属层40中的一第二走线41,所述第四通孔72对应于所述第三金属层60中一第三走线61。
步骤S90)形成桥接层80:在所述钝化层70上沉积一层氧化铟锡,形成所述桥接层80;将所述桥接层80图案化,在所述显示面板100的非显示区102内形成若干桥接走线,所述桥接走线从一第二通孔51中所对应的第二走线41的表面延伸至一第四通孔72中所对应的第三走线61的表面上,最终形成如图4中所示的显示面板100。
本发明实施例中提供的制备方法所制备出的显示面板100,通过在第二绝缘层50上增设第二走线41,在不增加制备流程和设备的同时,增加了显示面板100的可靠性,提高了显示面板100的良品率,减低了制备成本。
虽然在本文中参照了特定的实施方式来描述本发明,但是应该理解的是,这些实施例仅仅是本发明的原理和应用的示例。因此应该理解的是,可以对示例性的实施例进行许多修改,并且可以设计出其他的布置,只要不偏离所附权利要求所限定的本发明的精神和范围。应该理解的是,可以通过不同于原始权利要求所描述的方式来结合不同的从属权利要求和本文中所述的特征。还可以理解的是,结合单独实施例所描述的特征可以使用在其他所述实施例中。

Claims (10)

  1. 一种显示面板,其具有显示区和围绕所述显示区的非显示区,所述显示面板包括:
    第一金属层,具有至少一第一走线,所述第一走线从所述显示区延伸至所述非显示区;
    第一绝缘层,设于所述显示区和非显示区且覆盖所述第一金属层,所述第一绝缘层具有至少一第一通孔,贯穿所述第一绝缘层并延伸至其中一第一走线的表面;
    第二金属层,具有至少一第二走线,每一第二走线设于所述非显示区的第一绝缘层上且对应地通过一第一通孔连接至一第一走线;
    第二绝缘层,设于所述显示区和非显示区且覆盖第一绝缘层和所述第一金属层;所述第二绝缘层具有至少一第二通孔,贯穿所述第二绝缘层并延伸至其中一第二走线的表面;
    第三金属层,具有至少一第三走线,每一第三走线设于所述非显示区的第二绝缘层上;
    桥接层,具有至少一桥接走线,每一桥接走线从所述第二通孔中的第二走线上延伸至该第二走线所对应的第三走线上。
  2. 如权利要求1所述的显示面板,其还包括:
    钝化层,设于所述第二绝缘层和所述桥接层之间,并覆盖所述第三金属层。
  3. 如权利要求2所述的显示面板,其中,所述钝化层中具有:
    至少一第三通孔,贯穿所述钝化层,并对应于一第二通孔;
    至少一第四通孔,贯穿所述钝化层并延伸至一第三走线的表面上;
    所述桥接走线从所述第二通孔中的第二走线上穿过所述第三通孔并延伸至所述第四通孔中的第三走线上。
  4. 如权利要求3所述的显示面板,其中,所述第三通孔和所述第四通孔位于所述非显示区靠近所述显示区的一端,且所述第三通孔与所述第四通孔间隔排列成一字型。
  5. 如权利要求1所述的显示面板,其中,
    所述第一绝缘层中还具有至少一第五通孔,贯穿所述第一绝缘层并延伸至一第一走线的表面;
    所述第二金属层中还具有至少一第四走线,每一第四走线设于所述显示区的第一绝缘层上,每一第四走线对应地通过一第五通孔连接至与所述第五通孔对应的第一走线。
  6. 如权利要求1所述的显示面板,其中,所述桥接走线的材料中包含氧化铟锡。
  7. 一种显示面板的制备方法,其包括以下步骤:
    提供一基板,所述基板具有显示区和围绕所述显示区的非显示区;
    在一基板的上形成第一金属层,并在所述第一金属层中形成至少一第一走线,所述第一走线从所述显示区延伸至所述非显示区;
    在所述基板和所述第一金属层上形成第一绝缘层,并在所述第一绝缘层中形成至少一第一通孔,每一第一通孔对应于其中一第一走线;
    在所述第一绝缘层上形成第二金属层,并在所述非显示区的第二金属层中形成至少一第二走线,所述第二走线通过一第一通孔连接至一第一走线;
    在所述第一绝缘层和所述第二金属层上形成第二绝缘层,并在所述第二绝缘层中形成至少一第二通孔,每一第一通孔对应于其中一第二走线;
    在所述非显示区的第二绝缘层上形成第三金属层,并在所述第三金属层中形成至少一第三走线;
    在所述第二绝缘层上形成桥接层,并在所述桥接层中形成至少一桥接走线,所述桥接走线从所述第二通孔中的第二走线上延伸至该第二走线所对应的第三走线上。
  8. 如权利要求7所述的显示面板制备方法,其还包括以下步骤:
    在所述第二绝缘层和所述第三金属层上形成钝化层。
  9. 如权利要求8所述的显示面板制备方法,其还包括以下步骤:
    在所述钝化层中形成至少一第三通孔和至少一第四通孔,每一第三通孔对应于一第一通孔,每一第四通孔对应于一第三走线。
  10. 如权利要求7所述的显示面板制备方法,其中,
    所述在所述基板和所述第一金属层上形成第一绝缘层步骤中还包括:
    在所述第一绝缘层形成第至少一第五通孔,所述第五通孔对应于一第一走线;
    所述在所述第一绝缘层上形成第二金属层步骤中还包括:
    在形成所述第二走线的同时在所述显示区的第一绝缘层上形成至少一第四走线,所述第四走线通过一第五通孔连接至与所述第五通孔对应的第一走线。
PCT/CN2021/097299 2021-01-04 2021-05-31 显示面板及其制备方法 WO2022142119A1 (zh)

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