WO2022142113A1 - 腔室装置、晶片输送设备和晶片处理方法 - Google Patents

腔室装置、晶片输送设备和晶片处理方法 Download PDF

Info

Publication number
WO2022142113A1
WO2022142113A1 PCT/CN2021/096749 CN2021096749W WO2022142113A1 WO 2022142113 A1 WO2022142113 A1 WO 2022142113A1 CN 2021096749 W CN2021096749 W CN 2021096749W WO 2022142113 A1 WO2022142113 A1 WO 2022142113A1
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
pressure environment
cavity
wafers
housing
Prior art date
Application number
PCT/CN2021/096749
Other languages
English (en)
French (fr)
Inventor
蒋磊
Original Assignee
中科晶源微电子技术（北京）有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中科晶源微电子技术（北京）有限公司 filed Critical 中科晶源微电子技术（北京）有限公司
Priority to US17/907,578 priority Critical patent/US20230129809A1/en
Publication of WO2022142113A1 publication Critical patent/WO2022142113A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67184—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the presence of more than one transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67742—Mechanical parts of transfer devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process

Definitions

  • the present disclosure relates to the field of semiconductor technology, and in particular, to a chamber apparatus, a wafer conveying apparatus, and a wafer processing method using the wafer conveying apparatus; more particularly, to a A chamber apparatus for transferring wafers between two pressure environments, a wafer conveying apparatus, and a wafer processing method using the wafer conveying apparatus.
  • a vacuum interlocking chamber between the working chamber of the electron beam inspection equipment and the wafer cassette in the atmospheric environment.
  • the volume of the working chamber of the electron beam detection equipment is relatively large, and the time required for pumping to a high vacuum is relatively long.
  • the vacuum interlocking chamber has a more compact design and is much smaller than the working chamber volume, so that it takes much less time to pump to a high vacuum state, thereby increasing the productivity of the electron beam inspection equipment.
  • it is necessary to avoid damage and contamination of the wafer during the inspection process that is, to ensure the safety of the wafer during the inspection process. Therefore, there is an urgent need in the art for a vacuum interlocking chamber, which not only has a small volume, but also is equipped with a device for detecting the state of the wafer.
  • embodiments of the present disclosure provide a chamber apparatus, a wafer transport apparatus, and a wafer processing method using the same.
  • a chamber apparatus for transferring wafers between a first pressure environment and a second pressure environment, comprising: a housing defining a cavity inside; a first valve disposed in a first side of the housing and configured to switch between a closed state and an open state; a switching device fixed to the housing and configured to connect the first valve to the first pressure environment or the second pressure environment the inlet is aligned with the inlet, a second valve is provided on a second side of the housing opposite the first side and is configured to communicate or disconnect the cavity from the first pressure environment, and a pressure regulating device is provided on the housing
  • the body is in communication with the cavity and is configured to regulate the pressure within the cavity to substantially the same pressure as the first pressure environment or the second pressure environment.
  • the chamber device further includes a wafer support device disposed inside the cavity, the wafer support device including a multi-layer support structure, each layer of the multi-layer support structure is respectively configured to support all the components in a one-to-one correspondence. multiple wafers.
  • the multi-layer support structure includes a first support half and a second support half.
  • the first support half includes: a first standoff secured to a bottom inner surface of the housing and at an inner wall of a third side intersecting both the first side and the second side; and A plurality of first struts protruding from the first support toward the cavity.
  • the second support half includes: a second seat fixed to the bottom inner surface of the housing and at the inner wall of the fourth side opposite the third side; and protruding from the second seat toward the cavity of multiple second pillars.
  • respective first and second struts in any layer of the multi-layer support structure collectively support a respective one of the plurality of wafers to be supported in that layer, with respective axes parallel to The bottom surface of the housing is coplanar.
  • the distance between the first pillars of the adjacent layers and the distance between the second pillars of the adjacent layers are each greater than the wafer thickness.
  • the chamber apparatus further includes a first wafer inspection apparatus including: a first light source mounted to the housing and configured to emit into the cavity a first illumination beam; a plurality of sets of first sensors mounted to the housing and disposed in at least partial alignment with the layers of the multi-layer support structure in a one-to-one relationship and configured to sense the first illumination a light beam, which in turn generates a plurality of first electrical signals based on the sensing results; and a processing circuit electrically connected to the plurality of sets of first sensors and configured to receive the plurality of first electrical signals and based on the plurality of first electrical signals The plurality of first electrical signals are used to determine whether each layer of the multi-layer support structure corresponding to each group of first sensors supports a corresponding wafer.
  • a first wafer inspection apparatus including: a first light source mounted to the housing and configured to emit into the cavity a first illumination beam; a plurality of sets of first sensors mounted to the housing and disposed in at least partial alignment with the layers of the multi-layer support structure in a one-
  • each set of first sensors is configured to generate a first electrical signal having one of a high level and a low level as the first magnitude without receiving the first illumination beam, and at generating a first electrical signal having the other of a high level and a low level as a second magnitude while at least partially receiving the first illumination beam; and based on the Either layer is at least partially aligned in a one-to-one relationship with a respective first electrical signal output by a respective set of first sensors, the processing circuit being configured to determine in response to the respective first electrical signal having a first magnitude
  • the layer supports the corresponding wafer, and the layer is determined not to support the corresponding wafer in response to the corresponding first electrical signal having the second magnitude.
  • the chamber apparatus further includes a second wafer inspection apparatus including: a plurality of second light sources mounted on one of the top side and the bottom side of the housing and arranged to define a virtual circle having a center that coincides with the intended position of the centers of the plurality of wafers, the plurality of light sources are arranged at equal angular intervals in the circumferential direction of the virtual circle, and are configured and a plurality of second sensors disposed on the top side and the bottom side of the housing at different sides from the plurality of second light sources, and in a one-to-one manner The corresponding relationship is substantially aligned with the plurality of second light sources and configured to respectively sense second illumination beams from the plurality of second light sources to generate a plurality of second electrical signals.
  • a second wafer inspection apparatus including: a plurality of second light sources mounted on one of the top side and the bottom side of the housing and arranged to define a virtual circle having a center that coincides with the intended position of the centers of the plurality of wafers, the plurality
  • the plurality of second light sources are arranged such that the difference between the distance between the respective centers and the center of the virtual circle and the radius of the wafer to be placed is smaller than a predetermined tolerance of the offset of the wafer center; the processing circuit further electrically connected to the plurality of second sensors and configured to receive the plurality of second electrical signals and to determine, based on the plurality of second electrical signals, whether any of the plurality of wafers are centered off their intended Location.
  • each second sensor is configured to generate a second electrical signal having one of a high level and a low level as the first magnitude without receiving the second illumination beam, and at generating a second electrical signal having the other of a high level and a low level as a second magnitude upon at least partial reception of the second illumination beam; and based on the respective output from the plurality of second sensors a plurality of second electrical signals, the processing circuit configured to determine that the center of the at least one wafer of the plurality of wafers is offset from the corresponding second electrical signal having the first magnitude from any one of the second sensors expected location.
  • the chamber apparatus further includes a photoelectric conversion-based distance sensor disposed concentrically and immediately adjacent to the second light source with respect to the center of the virtual circle, the distance sensor configured to be based on the received slave wafer The reflected second illumination beam determines the distance between the corresponding second light source and the wafer where the emission occurs. And, in the event that the processing circuit determines that the center of at least one wafer is deviated from its intended position, the processing circuit is further configured to determine, based on the distance measured by the distance sensor, which layer of wafers has a deviated center of the circle its intended location.
  • the distance between the first pillars on the same layer is set as the longitudinal direction, in the transverse direction orthogonal to the longitudinal direction, the distance between the first pillars on the same layer is The lateral distance and the lateral distance between the second struts on the same layer are both defined as not higher than a maximum lateral threshold, which is defined as the center-to-center distance of the plurality of second light sources adjacent in the lateral direction.
  • the wavelength ranges of the second illumination beams received by the plurality of second sensors and the wavelength ranges of the first illumination beams received by the plurality of groups of first sensors do not overlap with each other.
  • a wafer transport apparatus comprising: the chamber apparatus according to the foregoing; a first robot arm disposed in the first pressure environment and adjacent to the first valve, and configured to transfer a wafer between a first pressure environment and the chamber device via a first valve; and a second robotic arm disposed in the second pressure environment and adjacent to the second valve and configured to transfer the wafer The wafer is transferred between the second pressure environment and the chamber arrangement via the second valve.
  • a wafer processing method using the aforementioned wafer transport apparatus comprising:
  • the first valve is closed and the cavity is evacuated to substantially the same degree of vacuum as the second pressure environment
  • a second valve is opened to transfer the plurality of wafers from the cavity to the second pressure environment by the second robotic arm.
  • the wafer processing method further includes:
  • the plurality of wafers are transferred into the cavity by the second robotic arm and loaded onto respective layers of the multi-layer support structure, respectively on, and adjust the wafer position to be at the desired position according to the output of the processing circuit;
  • a first valve is opened to transfer the plurality of wafers out of the cavity to the first pressure environment by the first robotic arm.
  • an electron beam inspection apparatus comprising: the wafer transport apparatus according to the foregoing; and a second housing defining a vacuum chamber as the second pressure environment, the vacuum chamber
  • An electron beam detection device is installed in the room, and the electron beam detection device includes a scanning electron microscope.
  • FIG. 1A and FIG. 1B respectively schematically illustrate a perspective structural view of a chamber device for transferring wafers between a first pressure environment and a second pressure environment according to an embodiment of the present disclosure
  • FIG. 2 shows a schematic structural diagram of the multi-layer support structure in the chamber device as shown in FIG. 1;
  • FIG. 3 shows the structure of the first wafer inspection device, and a schematic diagram of the relative positioning relationship of the first wafer inspection device with respect to the multilayer support structure and the wafer;
  • FIG. 4 shows the structure of the second wafer inspection device, and a schematic diagram of the relative positioning relationship of the second wafer inspection device with respect to the multilayer support structure and the wafer;
  • FIG. 5 shows a schematic structural diagram of a wafer conveying apparatus according to an embodiment of the present disclosure
  • FIG. 6 shows a flowchart of a wafer processing method using a wafer transport apparatus
  • FIG. 7 shows a schematic structural diagram of an electron beam detection apparatus according to an embodiment of the present disclosure.
  • FIGS. 1A and 1B schematically illustrate perspective structural views of a chamber apparatus 1 for transferring wafers between a first pressure environment and a second pressure environment according to an embodiment of the present disclosure, respectively, from different perspectives.
  • FIG. 1 shows a schematic structural diagram of a wafer locking mechanism for locking wafers according to an embodiment of the present disclosure
  • FIG. 2 shows a cross-sectional view of the wafer locking mechanism shown in FIG. 1 along line A-A.
  • a method for use in a first pressure environment (for example, an atmospheric environment, or an atmospheric environment A chamber device for transferring wafers between a wafer cassette in a wafer box) and a second pressure environment (such as a vacuum chamber for performing wafer inspection), comprising: a housing 10, the interior of which defines a cavity 10a; a first valve 11, provided with on a first side of the housing 10 and configured to switch between a closed state and an open state communicating to either the first pressure environment or the second pressure environment, and an open state that allows wafers to be loaded into and removed from the cavity cavity removed, which acts as a wafer transfer valve; switching device, fixed to the housing 10 and configured to align the first valve 11 with the inlet of the first or second pressure environment, the second valve 12 , which is arranged on the second side of the housing opposite to the first side, and is configured so that the cavity
  • the first valve 11 is a transfer valve for connecting the outside world with the chamber device 1 .
  • the second valve 12 is an atmospheric valve, which is used to isolate and communicate the atmospheric environment and the chamber device 1 .
  • the switching device is a moving device, such as a rotating device (eg, a turntable), which connects the first valve 11 with the first pressure environment or the first pressure environment by rotating the housing 10 .
  • the inlets of the two pressure environments are aligned; or a translation device, such as a linear motor or a two-dimensional table, aligns the first valve 11 with the inlet of the first pressure environment or the second pressure environment by translating the housing 10 .
  • the pressure regulating device of the chamber device 1 specifically includes: an inflation port 181, which is connected to a gas source or a first pressure environment, and is configured to inflate the cavity 10a to a level similar to that of the first pressure environment.
  • the first pressure environment is substantially equalized pressure
  • the pumping port 182 is connected to a vacuum source or a second pressure environment, and is configured to evacuate the cavity to a degree of vacuum set by the processing circuit 163 or evacuating to substantially the same degree of vacuum as the second pressure environment
  • a vacuum gauge 19 in communication with the cavity 10a and configured to measure the degree of vacuum of the air.
  • the evacuation of cavity 10a via evacuation port 182 is controlled based on measurements from vacuum gauge 19 .
  • the chamber device 1 further includes a wafer support device disposed inside the cavity 10a, the wafer support device includes a multi-layer support structure 13, and the multi-layer support structure 13 has The layers are respectively configured to support the plurality of wafers in a one-to-one correspondence.
  • each layer of the multi-layer support structure 13 is configured to support a corresponding one of the plurality of wafers.
  • the wafer support device is capable of supporting multiple wafers, the use of the cavity device of embodiments of the present disclosure may improve efficiency.
  • FIG. 2 shows a schematic structural diagram of the multi-layer support structure 13 in the chamber device 1 as shown in FIG. 1 .
  • the multilayer support structure 13 includes a first support half 14 and a second support half 15 as an example.
  • the first support half 14 includes: a first support 141 fixed to the bottom inner surface of the housing 10 and connected to the first side and the At the inner wall of the third side portion where both of the second side portions meet; and a plurality of first struts 142 protruding from the first support 141 toward the cavity 10a.
  • the second support half 15 includes: a second seat 151 fixed to the bottom inner surface of the housing 10 and the inner wall of the fourth side opposite the third side; A plurality of second pillars 152 protruding from the two supports 151 toward the cavity 10a.
  • respective first pillars 142 and respective second pillars 152 in any layer of the multi-layer support structure 13 collectively support a respective one of the plurality of wafers to be supported in that layer, and
  • the respective axes are parallel to the bottom surface of the housing 10 and coplanar.
  • a plurality of wafers are supported in layers, with the first pillar 142 and the second pillar 152 of each layer in the multi-layer support structure 13 collectively supporting a respective wafer.
  • a layered wafer support is achieved with a simplified structure.
  • each first pillar 142 and/or each second pillar 152 facing the interior of the cavity 10a is covered with a wafer anti-skid sleeve, generally using a non-slip material such as fluorine rubber, so as to utilize its larger The coefficient of friction prevents the supported wafer from slipping as much as possible or at all.
  • a wafer anti-skid sleeve generally using a non-slip material such as fluorine rubber
  • the first support 141 and the second support 151 are fixed to the inner wall of the housing 10, for example, by means of a screw connection, or are joined to the inner wall of the housing 10 by a form-fitting snap, for example, a pre-formed in the pocket and mounted in place by means of, for example, an interference fit.
  • each of the first pillars 142 and each of the second pillars 152 are formed with external threads, and the first support 141 and the second support 151 are used to mount the first support 142 accordingly. and the positions of the second struts 152 are, for example, formed with holes, such as clear holes or threaded holes with internal threads, so that the bases of the first and second struts 142 and 152 are screwed into and fixed into these respective holes and securely fixed in place.
  • the multi-layer support structure 13 securely mounted to the inner wall of the housing 10 is ensured for stably supporting the wafer.
  • the first support 141 includes: two first blocks 1411 fixed at intervals on the inner wall of the third side portion; and a first rib 1412 , is connected between the two first blocks 1411 , and the first ribs 1412 are fixed to the bottom inner surface of the housing 10 .
  • the second support 151 includes: two second blocks 1511 fixed to the inner wall of the fourth side part at intervals; and second ribs 1512 connected to the two second blocks Between the bodies 1511 , the second ribs 1512 are fixed to the bottom inner surface of the housing 10 .
  • first rib 1412 and the two first blocks 1411 are respectively formed and then bonded, or assembled together by snapping or screwing, or integrally formed.
  • second rib 1512 and the two second blocks 1511 are respectively formed and then bonded, or assembled together by snapping or screwing, or integrally formed. There is no specific restriction here.
  • the distance between the first pillars 142 of the adjacent layers and the distance between the second pillars 152 of the adjacent layers are each greater than the thickness of the wafer, thereby ensuring that the wafer can be smoothly placed in the phase in the gaps between the struts of the adjacent layers.
  • the axial direction of the first pillar 142 and the second pillar 152 is set as the longitudinal direction, in the lateral direction orthogonal to the longitudinal direction, the same
  • the lateral distance between the first struts 142 of the layer, and the lateral distance between the second struts 152 of the same layer are defined as not less than a minimum lateral threshold defined for the multi-layer support structure 13
  • each layer of the multi-layer support structure 13 only includes: two first pillars 142 , which are respectively positioned on the two first blocks 1411 , and two second pillars 152, respectively positioned on the two second blocks 1511; and in all layers of the multi-layer support structure 13, respectively arranged on the first pillars on the same block of the two first blocks 1411
  • the axes of the respective axes 142 are coplanar, and/or the axes of the second struts 152 respectively arranged on the same block of the two second blocks 1511 are coplanar.
  • a total of 16 pillars can be divided into four groups, each group of 4 pillars carrying the same wafer coplanarly, thereby carrying four stacked wafers.
  • the wafers After the wafers are placed on the multi-layer support structure 13, they directly contact the anti-skid sleeves provided by the free ends of the pillars of the corresponding group, thereby minimizing the risk of wafer deflection.
  • FIG. 3 is a schematic diagram showing the structure of the first wafer inspection device 16 and the relative positioning relationship of the first wafer inspection device 16 with respect to the multi-layer support structure 13 and the wafer.
  • the chamber device 1 further includes a first wafer inspection device 16, and the first wafer inspection device 16 includes: a first light source 161 mounted to the housing 10 and configured to A first illumination beam is emitted into the cavity 10a; a plurality of groups of first sensors 162 are mounted to the housing 10 and at least partially aligned with the layers of the multi-layer support structure 13 in a one-to-one correspondence , and configured to sense the first illumination beam, and then generate a plurality of first electrical signals based on the sensing results; and a processing circuit 163 electrically connected to the plurality of sets of first sensors 162, and is configured to receive the plurality of first electrical signals and determine, based on the plurality of first electrical signals, whether a corresponding wafer is supported in each layer of the multi-layer support structure 13 corresponding to each set of first sensors 162 .
  • a first light source 161 mounted to the housing 10 and configured to A first illumination beam is emitted into the cavity 10a
  • a plurality of groups of first sensors 162 are mounted to the housing
  • each set of first sensors 162 is configured to generate a first light having one of a high level and a low level as the first magnitude without receiving the first illumination beam at all an electrical signal, and a first electrical signal having the other of a high level and a low level as a second magnitude is generated upon at least partially receiving the first illumination beam.
  • the processing circuit 163 is configured to The layer is determined to support the corresponding wafer in response to the respective first electrical signal having the first magnitude, and the layer is determined not to support the respective wafer in response to the respective first electrical signal having the second magnitude.
  • the first magnitude of the first electrical signal indicates that the corresponding group of first sensors 162 does not receive the first illumination beam, ie the optical path of the first illumination beam to the corresponding group of first sensors 162 is blocked, eg by the layer If the supported wafer is blocked, it is determined that there must be a wafer in the layer. In this case, there is no need to additionally perform the step of additionally loading the wafer with the layer.
  • the second magnitude of the first electrical signal indicates that the first illumination beam of the corresponding group is received by the first sensor 162, ie the optical path of the first illumination beam to the first sensor 162 of the corresponding group is not blocked, that is, the layer is not blocked.
  • a wafer is present (or the layer has a wafer but the wafer is not properly seated, eg, its center is off from the expected center position, thus requiring additional determination, such as described further below).
  • the layer may be unused, ie, space may be required to accommodate supplementary loaded wafers.
  • the first wafer inspection device 16 acts as a "wafer presence detector".
  • the first support 141 is provided with a notch that is open toward the upper surface of the housing 10 , and the third side portion is formed with a through first window, the first window at least partially overlap with the notch.
  • the first light source 161 is arranged in alignment with the first window and is configured to emit a first illumination beam into the cavity 10a via the first window.
  • the first illumination beam emitted by the first light source 161 can thus pass unhindered into the cavity 10a by this arrangement of the recess aligned with the first window.
  • the first light source 161 includes: a laser, an LED, or a hybrid light source of a laser and an LED.
  • the first light source 161 includes, for example, only a single light source. Additionally or alternatively, for example, the first light source 161 includes a plurality of light emitting devices arranged in an array, and the plurality of groups of first sensors 162 include a plurality of light emitting devices arranged in an array and in a one-to-one correspondence with the plurality of light emitting devices A plurality of first sensors 162 that are at least partially aligned.
  • the first sensor 162 is a photosensitive sensor, such as a photoelectric sensor or transducer that converts a light signal of a specific wavelength (laser, LED light, or mixed light of laser and LED) into a corresponding electrical signal.
  • a photosensitive sensor such as a photoelectric sensor or transducer that converts a light signal of a specific wavelength (laser, LED light, or mixed light of laser and LED) into a corresponding electrical signal.
  • FIG. 4 shows the structure of the second wafer inspection device 17 and a schematic diagram of the relative positioning relationship of the second wafer inspection device 17 with respect to the multilayer support structure 13 and the wafer.
  • the chamber device 1 further includes a second wafer inspection device 17
  • the second wafer inspection device 17 includes: a plurality of second light sources 171 installed on the housing 10 . one of the top side and the bottom side and arranged to define a virtual circle having a center that coincides with the intended location of the centers of the plurality of wafers, the plurality of light sources in the circumferential direction of the virtual circle are arranged at the same angular interval and are configured to emit second illumination beams into the air, respectively; and a plurality of second sensors 172 arranged in the top and bottom sides of the housing 10 and the plurality of first sensors 172 .
  • the two light sources 171 are located on different sides and are substantially aligned with the plurality of second light sources 171 in a one-to-one relationship, and are configured to respectively sense the second illumination beams from the plurality of second light sources 171 to generate a plurality of second electrical signals.
  • the plurality of second light sources 171 are arranged such that the distance between the respective centers and the center of the virtual circle (ie, the radius of the virtual circle) is the same as that of the wafer to be placed.
  • the difference in radii is less than a predetermined tolerance for the offset of the wafer center, whereby the coverage of the virtual circle defined by the light source should be slightly larger than the area of the wafer.
  • the predetermined tolerance is, for example, a length threshold value pre-stored in the processing circuit 163 for defining whether or not a length threshold can be ignored for an additional external device, such as a robotic arm, to correct the wafer position offset.
  • the processing circuit 163 is also electrically connected to the plurality of second sensors 172 and is configured to receive the plurality of second electrical signals and determine the plurality of wafers based on the plurality of second electrical signals Whether the center of any wafer is deviated from its expected position.
  • each second sensor 172 is configured to generate a second electrical energy having one of a high level and a low level as the first magnitude without receiving the second illumination beam signal, and generating a second electrical signal having the other of a high level and a low level as a second magnitude upon at least partial reception of the second illumination beam.
  • the processing circuit 163 is configured to be responsive to a respective second electrical signal having a first magnitude from any one of the second sensors 172 to determine that the center of at least one of the plurality of wafers deviates from its expected position.
  • the wafer is normally accurately seated and the expected placement position, and its center does not deviate from the expected center position, the light path from the second light source 171 to the corresponding second sensor 172 will not be blocked; If the optical path of the corresponding second sensor 172 is blocked, it can be determined that the center of the wafer deviates from the expected center position.
  • the chamber device 1 further comprises a photoelectric conversion-based distance sensor arranged concentrically and immediately adjacent to the second light source 171 with respect to the center of the virtual circle, the distance sensor being configured to be based on the received The second illumination beam reflected back from the wafer determines the distance between the corresponding second light source 171 and the wafer where the emission occurs, eg a laser ranging device.
  • the processing circuit 163 determines that the center of the at least one wafer deviates from its expected position, and when the processing circuit 163 determines that the center of the at least one wafer deviates from its expected position, the processing circuit 163 is also configured to determine, based on the distances measured by the distance sensors, which layers of placed wafers have their centers deviated from their intended positions.
  • the measured distance measured by the distance sensor is substantially close to the distance from the second light source 171 to a certain layer, it can be inferred that the center of the wafer on which the layer is placed is deviated.
  • the first wafer detection device 16 detects the second magnitude of the first electrical signal, there may be no wafers in the layer, or the wafers may not be properly placed but are displaced from the expected position.
  • the measured distance of the distance sensor is substantially equal to the distance from the second light source 171 to a certain layer, it can be inferred that the center of the wafer on which the layer is placed is deviated, then by This determines that the layer is not in fact idle (ie, although a wafer is placed, the optical path of the first illumination beam is at least partially blocked, but not completely blocked due to wafer offset), and Depending on which layer of wafer is determined to be displaced, corrective actions may be performed by an external device, such as a robotic arm, to bring the wafer back into the desired position.
  • an external device such as a robotic arm
  • the layer is actually idle (no wafer is placed), and the layer can be used for Holds supplemental loaded wafers.
  • part of the first irradiation beam detected by the first wafer inspection device 16 may actually be caused by, for example, a false trigger signal or scattered light, requiring maintenance of the wafer inspection device and the chamber device 1 itself.
  • the second wafer detection device 17 functions as a "wafer center position deviation detector".
  • the side where the plurality of second light sources 171 are installed among the top and bottom sides of the housing 10 is formed with a plurality of second windows passing through, and the plurality of second windows are respectively Aligned with the plurality of second light sources 171 so that the second illumination beams emitted by the plurality of second light sources 171 enter the cavity 10a through the plurality of second windows.
  • the second light source 171 is arranged in alignment with the second window and configured to emit a second illumination beam into the cavity 10a via the second window.
  • the second illumination beam emitted by the second light source 171 can pass into the cavity 10a unhindered.
  • each second light source 171 includes a laser, an LED, or a hybrid light source of a laser and an LED.
  • the second sensor 172 (and possibly a distance sensor) is a photosensor, such as a photosensor that converts an optical signal of a specific wavelength (laser, LED light, or a mixture of laser and LED) into a corresponding electrical signal or transducer.
  • a photosensor such as a photosensor that converts an optical signal of a specific wavelength (laser, LED light, or a mixture of laser and LED) into a corresponding electrical signal or transducer.
  • the axial direction of the first pillar 142 and the second pillar 152 is set as the longitudinal direction, then in the transverse direction orthogonal to the longitudinal direction, between the first pillars 142 on the same layer and the lateral distance between the second pillars 152 of the same layer are both limited to be not higher than the maximum lateral threshold, and the maximum lateral threshold is defined as the distance between the plurality of second light sources 171 adjacent in the lateral direction Center distance.
  • the light beams emitted by the first light source 161 and the second light source 171 will not cross and interfere with each other.
  • the wavelength range of the second illumination beams received by the plurality of second sensors 172 is the same as the wavelength range of the first illumination beams received by the plurality of groups of first sensors 162 wavelength ranges do not overlap with each other.
  • the sensor is a photosensitive sensor, such as a photoelectric sensor that converts a light signal of a specific wavelength into an electrical signal, such as a photodiode, the first sensor 162 and the second sensor 172 receive light beams of different wavelengths for the object.
  • the wavelength range of the second illumination beams emitted by the plurality of second light sources 171 is different from the wavelength range of the first illumination beams emitted by the first light sources 161 . More preferably, for example, the wavelength range of the second illumination beams emitted by the plurality of second light sources 171 does not overlap with the wavelength range of the first illumination beams emitted by the first light sources 161 .
  • FIG. 5 shows a schematic structural diagram of a wafer transport apparatus 20 according to an embodiment of the present disclosure.
  • a wafer conveying apparatus 20 comprising: the chamber device 1 according to the foregoing; a first robot arm 21 arranged in the first pressure environment in and adjacent to the first valve 11 and configured to transfer wafers via the first valve 11 between a first pressure environment and the chamber device 1; and a second robot arm 22 arranged at the second pressure environment and adjacent to the second valve 12 and configured to transfer wafers between the second pressure environment and the chamber arrangement 1 via the second valve 12 .
  • the wafer conveying apparatus 20 includes the aforementioned chamber device 1, and the corresponding specific structures and corresponding technical effects are similar, and details are not described herein again.
  • FIG. 6 shows a flowchart of a wafer processing method using a wafer transfer apparatus.
  • a wafer processing method using the aforementioned wafer conveying device including:
  • the wafer processing method further includes:
  • the wafer processing method uses the aforementioned chamber device 1 and the aforementioned wafer conveying device, and the corresponding specific solutions and corresponding technical effects are similar, and will not be repeated here.
  • FIG. 7 shows a schematic structural diagram of an electron beam detection apparatus 30 according to an embodiment of the present disclosure.
  • an electron beam inspection apparatus 30 including: the wafer conveying apparatus 20 according to the foregoing; and a second housing 31 defining a vacuum chamber as the In the second pressure environment, an electron beam detection device 32 is installed in the vacuum chamber, and the electron beam detection device 32 includes a scanning electron microscope.
  • the electron beam inspection apparatus 30 includes the aforementioned chamber device 1 and the aforementioned wafer conveying apparatus 20 , and the corresponding specific structures and corresponding technical effects are similar, and will not be repeated here.
  • the embodiment of the present disclosure proposes a chamber device 1 to serve as a transition chamber or a vacuum interlock chamber between different pressure environments (eg, atmosphere and vacuum chamber), wherein a chamber device 1 is also provided for supporting multiple A multi-layer support structure 13 for layer wafers, and two sets of detectors are provided on the housing 10, which act as "wafer presence detectors" and "wafer center position deviation detectors” respectively, thereby facilitating the measurement of the multi-layer support structure.
  • contamination and damage of the wafer during the inspection process are avoided.
  • With a small chamber volume a simplified structure and a non-destructive and pollution-free wafer existence and accurate center positioning detection in the transition chamber.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Robotics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

本公开提供一种腔室装置，包括：壳体，其内部限定有空腔；第一阀，设置于壳体的第一侧部，且配置成在关闭状态与连通至第一压力环境或第二压力环境的开启状态之间切换；切换装置，固定至所述壳体，且配置成将所述第一阀与第一压力环境或第二压力环境的入口对准，第二阀，设置于壳体的与第一侧部相对的第二侧部，且配置成使得空腔与第一压力环境连通或断开，和压力调节装置，设置在壳体上与空腔连通，且配置成将空腔内的压强调节为与第一压力环境或第二压力环境实质上相同的压强，所述腔室装置还包括设置于空腔内部的晶片支撑装置，所述晶片支撑装置包括多层支撑结构，所述多层支撑结构的各层分别被配置用于以一一对应的方式支撑所述多个晶片。

Description

腔室装置、晶片输送设备和晶片处理方法
相关申请的交叉引用
本公开实施例要求于2020年12月31日递交中国专利局的、申请号为202011639567.5的中国专利申请的权益，该申请的全部内容以引用方式并入本文。
技术领域
本公开涉及半导体技术领域，尤其涉及一种腔室装置、一种晶片输送设备、以及一种使用所述晶片输送装置的晶片处理方法；更特别地涉及一种用于在第一压力环境与第二压力环境之间传递晶片的腔室装置、一种晶片输送设备、以及一种使用所述晶片输送装置的晶片处理方法。
背景技术
近年来，在半导体产业中，通常需要在高真空环境中利用电子束检测设备执行对晶片诸如硅晶片的检测过程。
为了提高在高真空条件下运行的电子束检测设备的产率，一般都需要在电子束检测设备的工作腔与处于大气环境的晶片盒之间增加一个真空互锁腔体。电子束检测设备的工作腔容积较大，抽到高真空所需的时间比较长。而真空互锁腔体设计比较紧凑，比工作腔容积要小得多，这样在抽到高真空状态时，所需的时间就要少得多，从而可以增加电子束检测设备的产率。此外，在半导体晶片检测领域，要避免晶片在检测环节受到损伤和污染，也就是保证晶片在检测过程中的安全。因此，本领域亟需一种真空互锁腔体，不仅容积较小，而且配备了晶片状态检测的装置。
发明内容
为至少部分地克服上述相关技术中的缺陷和/或不足，本公开的实施例提供了腔室装置、晶片输送设备、以及使用所述晶片输送装置的晶片处理方法。
本公开的实施例提供技术方案如下：
根据本公开的一方面，提供了一种用于在第一压力环境与第二压力环境之间传递晶片的腔室装置，包括：壳体，其内部限定有空腔；第一阀，设置于壳体的第一侧部，且配置成在关闭状态与开启状态之间切换；切换装置，固定至所述壳体，且配置成将 所述第一阀与第一压力环境或第二压力环境的入口对准，第二阀，设置于壳体的与第一侧部相对的第二侧部，且配置成使得空腔与第一压力环境连通或断开，和压力调节装置，设置在壳体上与空腔连通，且配置成将空腔内的压强调节为与第一压力环境或第二压力环境实质上相同的压强。所述腔室装置还包括设置于空腔内部的晶片支撑装置，所述晶片支撑装置包括多层支撑结构，所述多层支撑结构的各层分别被配置用于以一一对应的方式支撑所述多个晶片。
根据本公开的实施例，所述多层支撑结构包括第一支撑半部和第二支撑半部。第一支撑半部包括：第一支座，固定至壳体的底部内表面、以及与所述第一侧部和所述第二侧部两者均相交的第三侧部的内壁处；以及从第一支座向空腔突伸的多个第一支柱。第二支撑半部包括：第二支座，固定至壳体的底部内表面、以及与所述第三侧部相对的第四侧部的内壁处；以及从第二支座向空腔突伸的多个第二支柱。并且，位于所述多层支撑结构中的任一层中的相应第一支柱和相应第二支柱共同支撑所述多个晶片中的待支撑于该层中的一相应晶片，且各自轴线平行于壳体的底表面且呈共面设置。
根据本公开的实施例，相邻层的第一支柱之间的距离、以及相邻层的第二支柱之间的距离各自大于晶片厚度。
根据本公开的实施例，所述的腔室装置还包括第一晶片检测装置，所述第一晶片检测装置包括：第一光源，安装至所述壳体且配置成向所述空腔内发射第一照射光束；多组第一传感器，安装至所述壳体且与所述多层支撑结构的各层以一一对应关系至少部分地对准设置，且配置成感测所述第一照射光束、继而基于感测结果来产生多个第一电信号；和处理电路，所述处理电路与所述多组第一传感器电连接，并且配置成接收所述多个第一电信号并且基于所述多个第一电信号来判断与各组第一传感器对应的所述多层支撑结构的各层中是否支撑有相应晶片。
根据本公开的实施例，每组第一传感器配置成在没有接收到所述第一照射光束的情况下产生具有高电平和低电平之一作为第一量值的第一电信号，且在至少部分地接收到所述第一照射光束的情况下产生具有高电平和低电平中的另一种作为第二量值的第一电信号；且基于由与所述多层支撑结构中的任一层以一一对应关系至少部分地对准设置的相应组第一传感器所输出的相应第一电信号，所述处理电路配置成响应于具有第一量值的该相应第一电信号判定该层支撑有相应晶片，且响应于具有第二量值的该相应第一电信号判定该层没有支撑相应晶片。
根据本公开的实施例，所述腔室装置还包括第二晶片检测装置，所述第二晶片检 测装置包括：多个第二光源，安装于所述壳体的顶侧和底侧中的一侧、且布置成限定了具有与所述多个晶片的圆心的预期位置相重合的圆心的一个虚拟圆，所述多个光源在所述虚拟圆的圆周方向上以相同角度间隔设置，且配置成分别向所述空气内发射第二照射光束；和多个第二传感器，设置于所述壳体的顶侧和底侧中的与所述多个第二光源不同侧处，且以一一对应的关系与所述多个第二光源实质上对准，且配置成分别感测来自所述多个第二光源的第二照射光束来产生多个第二电信号。其中，所述多个第二光源布置成使得各自中心与所述虚拟圆的圆心之间距离与所述待放置的晶片的半径之差小于晶片中心偏移的预定容差；所述处理电路还与所述多个第二传感器电连接，并且配置成接收所述多个第二电信号并且基于所述多个第二电信号来确定所述多个晶片中是否有晶片的圆心偏离了其预期位置。
根据本公开的实施例，每个第二传感器配置成在没有接收到所述第二照射光束的情况下产生具有高电平和低电平之一作为第一量值的第二电信号，且在至少部分接收到所述第二照射光束的情况下产生具有高电平和低电平中的另一种作为第二量值的第二电信号；且基于由所述多个第二传感器分别输出的多个第二电信号，所述处理电路配置成响应于来自任一个第二传感器的具有第一量值的相应第二电信号来判定了所述多个晶片中的至少一个晶片的圆心偏离其预期位置。
根据本公开的实施例，所述腔室装置还包括相对于虚拟圆的圆心与所述第二光源同心地紧邻布置的基于光电转换的距离传感器，所述距离传感器配置成基于所接收的从晶片反射回的第二照射光束来确定进行相应第二光源与发生发射处的晶片之间距离。并且，在所述处理电路判定了至少一个晶片的圆心偏离其预期位置的情况下，所述处理电路还配置成基于由所述距离传感器所测量的距离，来确定哪层放置的晶片的圆心偏离其预期位置。
根据本公开的实施例，在设定以所述第一支柱和第二自主的轴线方向为纵向的情况下，则在与所述纵向正交的横向上，同层的第一支柱之间的横向距离、以及同层的第二支柱之间的横向距离均被限定为不高于最大横向阈值，所述最大横向阈值被限定为在横向相邻的所述多个第二光源的中心距。
根据本公开的实施例，所述多个第二传感器接收的所述第二照射光束的波长范围与所述多组第一传感器接收的所述第一照射光束的波长范围彼此不重叠。
另外，根据本公开的另一方面，提供了一种晶片输送设备，包括：根据前述的腔室装置；第一机械臂，布置于所述第一压力环境中且与第一阀相邻，且配置成将晶片 经由第一阀在第一压力环境与所述腔室装置之间传递；和第二机械臂，布置于所述第二压力环境中且与第二阀相邻，且配置成将晶片经由第二阀在第二压力环境与所述腔室装置之间传递。
另外，根据本公开的又一方面，提供了一种使用根据前述的晶片输送装置的晶片处理方法，包括：
开启第一阀，使得第一压力环境和所述空腔处于实质上相同的压强，通过所述第一机械臂将所述多个晶片分别加载至所述多层支撑结构的相应层上，并且根据处理电路的输出调整晶片位置处于预期位置；
当所述多个晶片被加载至所述多层支撑结构之后，切断第一阀，将所述空腔抽真空至与第二压力环境处于实质上相同的真空度；和
开启第二阀，通过所述第二机械臂将所述多个晶片从所述空腔转移至所述第二压力环境。
根据本公开的实施例，所述晶片处理方法还包括：
在所述多个晶片在第二压力环境中完成后续过程之后，通过所述第二机械臂将所述多个晶片转移至所述空腔中且分别加载至所述多层支撑结构的相应层上，并且根据所述处理电路的输出调整晶片位置处于预期位置；
切断第二阀，对所述空腔充气至与所述第一压力环境实质上相同的压强；以及
开启第一阀，通过所述第一机械臂将所述多个晶片转移出所述空腔至所述第一压力环境。
另外，根据本公开的再一方面，提供了一种电子束检测设备，包括：根据前述的晶片输送设备；和第二壳体，限定真空腔室作为所述第二压力环境，所述真空腔室内安装有电子束检测装置，所述电子束检测装置包括扫描电镜。
附图说明
现在参照随附的示意性附图，仅以举例的方式，描述本公开的实施例，其中，在附图中相应的附图标记表示相应的部件。附图的简要描述如下：
图1A和图1B分别以不同视角示意性示出根据本公开实施例用于在第一压力环境与第二压力环境之间传递晶片的腔室装置的立体结构图；
图2示出如图1所示的所述腔室装置中的多层支撑结构的结构示意图；
图3示出所述第一晶片检测装置的结构，以及第一晶片检测装置相对于多层支撑 结构和晶片的相对定位关系的示意图；
图4示出所述第二晶片检测装置的结构，以及第二晶片检测装置相对于多层支撑结构和晶片的相对定位关系的示意图；
图5示出根据本公开实施例的晶片输送设备的结构示意图；
图6示出使用晶片输送装置的晶片处理方法的流程图；
图7示出根据本公开实施例的电子束检测设备的结构示意图。
具体实施方式
下面将对本公开的技术方案通过实施例结合附图的方式进行进一步的详细解释。在说明书中，相同或相似的附图标记和字母指示相同或相似的部件。参照附图对本公开实施例的以下说明旨在对本公开的总体发明构思进行解释，不应当理解为对本公开的一种限制。
附图被用于说明本公开的内容。附图中各部件尺寸和形状不反映腔室装置、晶片输送设备的部件的真实比例。
图1A和1B分别以不同视角示意性示出根据本公开实施例用于在第一压力环境与第二压力环境之间传递晶片的腔室装置1的立体结构图。
图1示出根据本公开实施例的用于锁定晶片的晶片锁定机构的结构示意图；图2示出如图1所示的所述晶片锁定机构的沿A-A线的剖视图。
由此，根据本公开实施例的总体技术构思，如图1和2所示，在本公开实施例的一方面中，提出了一种用于在第一压力环境(例如大气环境，或大气环境中的晶片盒)与第二压力环境(例如用于执行晶片检测的真空腔)之间传递晶片的腔室装置，包括：壳体10，其内部限定有空腔10a；第一阀11，设置于壳体10的第一侧部，且配置成在关闭状态与连通至第一压力环境或第二压力环境的开启状态之间切换，且在开启状态可允许晶片加载到空腔内和从空腔移除，其充当晶片传输阀；切换装置，固定至所述壳体10，且配置成将所述第一阀11与第一压力环境或第二压力环境的入口对准，第二阀12，设置于壳体的与第一侧部相对的第二侧部，且配置成使得空腔与第一压力环境连通或断开，和压力调节装置，设置在壳体10上与空腔10a连通，且配置成将空腔10a内的压强调节为与第一压力环境或第二压力环境实质上相同的压强。
例如，所述第一阀11是传输阀，用于连接外界与该腔室装置1。
并且，例如所述第二阀12是大气阀门，用于隔断和沟通大气环境与该腔室装置1。
在本公开的具体实施例中，例如，所述切换装置是运动装置，诸如是旋转装置(例如转盘)，其通过旋转所述壳体10将所述第一阀11与第一压力环境或第二压力环境的入口对准；或者是平移装置，例如直线电机或二维工作台，通过平移壳体10所述第一阀11与第一压力环境或第二压力环境的入口对准。
在本公开的具体实施例中，例如，所述腔室装置1的压力调节装置具体包括：充气端口181，连接到气源或第一压力环境，且配置成对所述空腔10a充气至与所述第一压力环境实质上压力均衡的压强；抽气端口182，连接至真空源或第二压力环境，且配置成对所述空腔抽真空至由所述处理电路163设定的真空度或抽真空至与所述第二压力环境实质上相同的真空度；和真空计19，与所述空腔10a相连通，并且配置成测量所述空气的真空度。作为示例，基于真空计19的测量结果来控制经由抽气端口182对空腔10a的抽真空。
在本公开的实施例中，作为示例，所述腔室装置1还包括设置于空腔10a内部的晶片支撑装置，所述晶片支撑装置包括多层支撑结构13，所述多层支撑结构13的各层分别被配置用于以一一对应的方式支撑所述多个晶片。换言之，所述多层支撑结构13的每层被配置用于支撑所述多个晶片中的一相应晶片。
由于晶片支撑装置能够支撑多个晶片，因而使用本公开实施例的空腔装置可以提高效率。
图2示出如图1所示的所述腔室装置1中的多层支撑结构13的结构示意图。
在本公开的实施例中，作为示例，所述多层支撑结构13包括第一支撑半部14和第二支撑半部15。如图2所示，更具体地，例如，所述第一支撑半部14，包括：第一支座141，固定至壳体10的底部内表面、以及与所述第一侧部和所述第二侧部两者均相交的第三侧部的内壁处；以及从第一支座141向空腔10a突伸的多个第一支柱142。并且例如，所述第二支撑半部15包括：第二支座151，固定至壳体10的底部内表面、以及与所述第三侧部相对的第四侧部的内壁处；以及从第二支座151向空腔10a突伸的多个第二支柱152。
作为示例，位于所述多层支撑结构13中的任一层中的相应第一支柱142和相应第二支柱152共同支撑所述多个晶片中的待支撑于该层中的一相应晶片，且各自轴线平行于壳体10的底表面且呈共面设置。由此，分层地支撑了多个晶片，所述多层支撑结构13中的每层的第一支柱142和第二支柱152共同支撑一个相应晶片。从而以简化的结构实现了分层的晶片支撑。
优选地，例如，每个第一支柱142和/或每个第二支柱152的朝向空腔10a内部的自由端套设有晶片防滑套，一般使用氟橡胶等防滑材料，从而利用其较大的摩擦系数尽可能防止或完全避免所支撑的晶片发生滑移。
优选地，例如，所述第一支座141和第二支座151例如利用螺纹连接而固定至壳体10内壁，或者通过形状配合的卡合而接合至壳体10的内壁的例如预先形成的凹窝中，并且借助于例如过盈配合而安装就位。
替代地或另外地，例如，每个第一支柱142和每个第二支柱152的基部形成有外螺纹，并且第一支座141和第二支座151的用于相应地安装第一支柱142和第二支柱152的位置例如形成有孔，诸如光孔或带有内螺纹的螺纹孔，从而第一支柱142和第二支柱152的基部旋拧进入并且固定到这些相应孔内并且牢固地固定就位。
通过以上设置，确保了牢固安装至壳体10内壁的多层支撑结构13以用于稳固支撑晶片。
作为进一步的实施例，如图2所示，例如，所述第一支座141包括：两个第一块体1411，间隔地固定于所述第三侧部的内壁处；和第一肋1412，连接于所述两个第一块体1411之间，所述第一肋1412固定至壳体10的底部内表面。并且，例如，所述第二支座151包括：两个第二块体1511，间隔地固定于所述第四侧部的内壁处；和第二肋1512，连接于所述两个第二块体1511之间，所述第二肋1512固定至壳体10的底部内表面。
作为示例，所述第一肋1412与所述两个第一块体1411分别形成之后继而粘合或者通过卡合或螺纹连接而装配到一起、或者一体地形成。作为示例，所述第二肋1512与所述两个第二块体1511体分别形成之后继而粘合或者通过卡合或螺纹连接而装配到一起、或者一体形成。在此不做具体限制。
在本公开的实施例中，例如，相邻层的第一支柱142之间的距离、以及相邻层的第二支柱152之间的距离各自大于晶片厚度，从而确保晶片可以顺利地置入相邻层的支柱之间的间隙内。
另外，在本公开的进一步实施例中，例如，在设定以所述第一支柱142和第二支柱152的轴线方向为纵向的情况下，则在与所述纵向正交的横向上，同层的第一支柱142之间的横向距离、以及同层的第二支柱152之间的横向距离均被限定为不低于最小横向阈值，所述最小横向阈值被限定为所述多层支撑结构13能够支撑的不同规格晶片中最小尺寸规格晶片的直径，从而便利了兼容地支撑多种形状或尺寸规格的晶片。
并且，例如，如图2所示，在所述多层支撑结构13的每层仅具备：两个第一支柱142，分别定位于所述两个第一块体1411，以及两个第二支柱152，分别定位于所述两个第二块体1511；并且在所述多层支撑结构13的所有层中，分别布置于所述两个第一块体1411中同一块体上的第一支柱142各自轴线共面设置，和/或分别布置于所述两个第二块体1511中同一块体上的第二支柱152各自轴线共面设置。从而例如总共16个支柱，可以分为四组，每组4个支柱共面地承载同一晶片，由此承载四个叠置的晶片。晶片放置到多层支撑结构13之后，分别直接地接触相应组的支柱的自由端所套设的防滑套，由此最小化晶片发生偏移的风险。
图3示出所述第一晶片检测装置16的结构，以及第一晶片检测装置16相对于多层支撑结构13和晶片的相对定位关系的示意图。
在本公开的实施例中，例如，所述腔室装置1还包括第一晶片检测装置16，所述第一晶片检测装置16包括：第一光源161，安装至所述壳体10且配置成向所述空腔10a内发射第一照射光束；多组第一传感器162，安装至所述壳体10且与所述多层支撑结构13的各层以一一对应关系至少部分地对准设置，且配置成感测所述第一照射光束、继而基于感测结果来产生多个第一电信号；和处理电路163，所述处理电路163与所述多组第一传感器162电连接，并且配置成接收所述多个第一电信号并且基于所述多个第一电信号来判断与各组第一传感器162对应的所述多层支撑结构13的各层中是否支撑有相应晶片。
在更具体的实施例中，例如，每组第一传感器162配置成在完全没有接收到所述第一照射光束的情况下产生具有高电平和低电平之一作为第一量值的第一电信号，且在至少部分地接收到所述第一照射光束的情况下产生具有高电平和低电平中的另一种作为第二量值的第一电信号。并且，基于由与所述多层支撑结构13中的任一层以一一对应关系至少部分地对准设置的相应组第一传感器162所输出的相应第一电信号，所述处理电路163配置成响应于具有第一量值的该相应第一电信号而判定该层支撑有相应晶片，且响应于具有第二量值的该相应第一电信号判定该层没有支撑相应晶片。
换言之，第一电信号的第一量值表示相应组的第一传感器162没有接收到第一照射光束，即第一照射光束至相应组的第一传感器162的光路被阻断，例如由该层所承载的晶片所阻断，即判定该层必定存在有晶片。在这种情况下，不需要另行执行向该层补充加载晶片的步骤。
相反，第一电信号的第二量值表示相应组的第一传感器162接收到第一照射光束， 即第一照射光束至相应组的第一传感器162的光路没有被阻断，即该层不存在晶片(或该层虽然有晶片但晶片没能正常放置就位，例如存在其中心偏离了预期的中心位置的现象，因此需要额外的判定，例如下文所进一步描述的)。在这种情况下，该层可能闲置，即可能需要用于容纳补充加载晶片的空间。
通过上述第一晶片检测装置16的简单设置，可以判定所述多层支撑结构13中某特定层必定存在有晶片的情况，从而在该情况下，无需执行额外向该层补充加载晶片的操作。即第一晶片检测装置16充当“晶片存在性检测器”。
作为具体示例，例如，所述第一支座141具备朝所述壳体10的上表面敞开的凹口，且所述第三侧部形成有贯通的第一窗，所述第一窗至少部分地与所述凹口重叠。并且相应地，所述第一光源161布置成与所述第一窗对准且配置成发射第一照射光束经由所述第一窗进入所述空腔10a。
从而通过这种凹口与第一窗对准的布置，由第一光源161所发射的第一照射光束可以无阻碍地传递进入所述空腔10a。
例如，所述第一光源161包括：激光器，LED，或激光器与LED的混合光源。
作为示例，所述第一光源161例如仅包括单一光源。另外地或替代地，例如，所述第一光源161包括呈阵列布置的多个发光器件，且所述多组第一传感器162包括呈阵列布置且以一一对应关系与所述多个发光器件至少部分对准的多个第一传感器162。
相应地，例如，第一传感器162为光敏传感器，例如将特定波长的光信号(激光、LED光、或激光与LED的混合光)转变为相应电信号的光电传感器或换能器。
图4示出所述第二晶片检测装置17的结构，以及第二晶片检测装置17相对于多层支撑结构13和晶片的相对定位关系的示意图。
在本公开的实施例中，例如，所述腔室装置1还包括第二晶片检测装置17，所述第二晶片检测装置17包括：多个第二光源171，安装于所述壳体10的顶侧和底侧中的一侧、且布置成限定了具有与所述多个晶片的圆心的预期位置相重合的圆心的一个虚拟圆，所述多个光源在所述虚拟圆的圆周方向上以相同角度间隔设置，且配置成分别向所述空气内发射第二照射光束；和多个第二传感器172，设置于所述壳体10的顶侧和底侧中的与所述多个第二光源171不同侧处，且以一一对应的关系与所述多个第二光源171实质上对准，且配置成分别感测来自所述多个第二光源171的第二照射光束来产生多个第二电信号。
在更具体的实施例中，例如，所述多个第二光源171布置成使得各自中心与所述 虚拟圆的圆心之间距离(即所述虚拟圆的半径)与所述待放置的晶片的半径之差小于晶片中心偏移的预定容差，由此，即光源所限定的虚拟圆的覆盖范围应略微大于晶片的面积。从而一旦晶片准确地就位于其预期放置位置，则不会阻挡第二光源171至相应第二传感器172的光路。
作为示例，该预定容差例如是处理电路163中预先存储的用于界定是否可以忽略掉可供额外的外部装置诸如机械臂来校正晶片位置偏移的长度阈值。
作为示例，所述处理电路163还与所述多个第二传感器172电连接，并且配置成接收所述多个第二电信号并且基于所述多个第二电信号来确定所述多个晶片中是否有晶片的圆心偏离了其预期位置。
在更具体的实施例中，例如，每个第二传感器172配置成在没有接收到所述第二照射光束的情况下产生具有高电平和低电平之一作为第一量值的第二电信号，且在至少部分接收到所述第二照射光束的情况下产生具有高电平和低电平中的另一种作为第二量值的第二电信号。并且，基于由所述多个第二传感器172分别输出的多个第二电信号，所述处理电路163配置成响应于来自任一个第二传感器172的具有第一量值的相应第二电信号来判定了所述多个晶片中的至少一个晶片的圆心偏离其预期位置。
换言之，如果晶片正常地准确就位与预期放置位置，其圆心没有偏离预期的圆心位置，则不会阻断从第二光源171至相应第二传感器172的光路；但如果从第二光源171至相应第二传感器172的光路被阻断，则可以判定晶片的圆心偏离了预期的圆心位置。
在进一步的实施例中，例如，腔室装置1还包括相对于虚拟圆的圆心与所述第二光源171同心地紧邻布置的基于光电转换的距离传感器，所述距离传感器配置成基于所接收的从晶片反射回的第二照射光束来确定进行相应第二光源171与发生发射处的晶片之间距离，例如激光测距装置。由此，在所述处理电路163判定了至少一个晶片的圆心存在偏离其预期位置的情况下，在所述处理电路163判定了至少一个晶片的圆心偏离其预期位置的情况下，所述处理电路163还配置成基于由所述距离传感器所测量的距离，来确定哪层放置的晶片的圆心偏离其预期位置。
例如，如果距离传感器测出的实测距离基本上接近于从第二光源171至某层的距离，则可以推断出该层所放置的晶片的圆心发生偏离。
进一步地，考虑在之前第一晶片检测装置16检测到第一电信号的第二量值时，即可能该层闲置没有晶片，也可能晶片没能正常放置就位而是从预期位置移位。
在这种情况下，一方面，如果所述距离传感器的实测距离基本上等于接近于从第二光源171至某层的距离，则可以推断出该层所放置的晶片的圆心发生偏离，则由此可判定，实际上该层并未闲置(即虽然放置有晶片，但是由于晶片偏移而至少部分阻断第一照射光束的光路、但并未完全阻断第一照射光束的光路)，并且可根据确定出的哪层晶片发生偏移，可以由外部装置诸如机械臂执行校正动作以使得晶片重新就位于预期位置。
另一方面，如果所述距离传感器的实测距离仍然为从第二光源171至第二传感器172的距离，则由此可判定，实际上该层确实闲置(没有放置晶片)，该层可以用于容纳补充加载的晶片。此时，第一晶片检测装置16所检测到的部分第一照射光束实际上可能由于例如错误触发信号或散射光而导致，需要对晶片检测装置和腔室装置1本身执行维护保养。
由此，通过上述第二晶片检测装置17的简单设置，可以判定所述多层支撑结构13中存在有晶片的情况，从而在该情况下，无需执行额外向该层补充加载晶片的操作。即第二晶片检测装置17充当“晶片中心位置偏差检测器”。
作为具体示例，例如，所述壳体10的顶侧和底侧中的安装有所述多个第二光源171的一侧形成有贯通的多个第二窗，所述多个第二窗分别与所述多个第二光源171对准，使得所述多个第二光源171发射的第二照射光束经由所述多个第二窗进入所述空腔10a。并且相应地，所述第二光源171布置成与所述第二窗对准且配置成发射第二照射光束经由所述第二窗进入所述空腔10a。
从而通过这种布置，由第二光源171所发射的第二照射光束可以无阻碍地传递进入所述空腔10a。
例如，每个第二光源171包括：激光器，LED，或激光器与LED的混合光源。
相应地，例如，第二传感器172(以及可能的距离传感器)为光敏传感器，例如将特定波长的光信号(激光、LED光、或激光与LED的混合光)转变为相应电信号的光电传感器或换能器。
另外，在本公开的进一步实施例中，为了实现第一照射光束与第二照射光束之间的彼此干扰，存在不同的实施方式。
作为一种示例，在设定以所述第一支柱142和第二支柱152的轴线方向为纵向的情况下，则在与所述纵向正交的横向上，同层的第一支柱142之间的横向距离、以及同层的第二支柱152之间的横向距离均被限定为不高于最大横向阈值，所述最大横向 阈值被限定为在横向相邻的所述多个第二光源171的中心距。
从而通过这种在空间上彼此分离开的设置，第一光源161与第二光源171各自发射的光束之间不会发生交叉和相互干扰。
作为另一种示例，替代地或补充地，例如，所述多个第二传感器172接收的所述第二照射光束的波长范围与所述多组第一传感器162接收的所述第一照射光束的波长范围彼此不重叠。由于传感器为光敏传感器，例如将特定波长的光信号转变为电信号的光电传感器，例如光电二极管，从而第一传感器162和第二传感器172接收对象为不同的波长的光束。
优选地，例如，所述多个第二光源171发射的所述第二照射光束的波长范围不同于与所述第一光源161发射的所述第一照射光束的波长范围。更优选地，例如，所述多个第二光源171发射的所述第二照射光束的波长范围与所述第一光源161发射的所述第一照射光束的波长范围不重叠。
从而通过在第一检测晶片检测装置和第二晶片检测装置17所针对的照射束的不同波长，来确保了不会发生相互干扰。
图5示出根据本公开实施例的晶片输送设备20的结构示意图。
在本公开实施例的另一方面中，如图5所示，提出了一种晶片输送设备20，包括：根据前述的腔室装置1；第一机械臂21，布置于所述第一压力环境中且与第一阀11相邻，且配置成将晶片经由第一阀11在第一压力环境与所述腔室装置1之间传递；和第二机械臂22，布置于所述第二压力环境中且与第二阀12相邻，且配置成将晶片经由第二阀12在第二压力环境与所述腔室装置1之间传递。
所述晶片输送设备20包括前述腔室装置1，且相应地具体构造和相应的技术效果类似，在此不再赘述。
图6示出使用晶片输送装置的晶片处理方法的流程图。
在本公开实施例的又一方面中，如图6所示，提出了一种使用根据前述的晶片输送装置的晶片处理方法，包括：
S101：开启第一阀11，使得第一压力环境和所述空腔10a处于实质上相同的压强，通过所述第一机械臂21将所述多个晶片分别加载至所述多层支撑结构13的相应层上，并且根据处理电路163的输出调整晶片位置处于预期位置；
S102：当所述多个晶片被加载至所述多层支撑结构13之后，切断第一阀11，将所述空腔10a抽真空至与第二压力环境处于实质上相同的真空度；
S103：开启第二阀12，通过所述第二机械臂22将所述多个晶片从所述空腔10a转移至所述第二压力环境。
进一步地，作为示例，如图所示，所述的晶片处理方法还包括：
S104：在所述多个晶片在第二压力环境中完成后续过程之后，通过所述第二机械臂22将所述多个晶片转移至所述空腔10a中且分别加载至所述多层支撑结构13的相应层上，并且根据所述处理电路163的输出调整晶片位置处于预期位置；
S105：切断第二阀12，对所述空腔10a充气至与所述第一压力环境实质上相同的压强；以及
S106：开启第一阀11，通过所述第一机械臂21将所述多个晶片转移出所述空腔10a至所述第一压力环境。
所述晶片处理方法使用前述腔室装置1和前述晶片输送装置，且相应地具体方案和相应的技术效果类似，在此不再赘述。
图7示出根据本公开实施例的电子束检测设备30的结构示意图。
在本公开实施例的再一方面中，如图7所示，提出了一种电子束检测设备30，包括：根据前述的晶片输送设备20；和第二壳体31，限定真空腔室作为所述第二压力环境，所述真空腔室内安装有电子束检测装置32，所述电子束检测装置32包括扫描电镜。
所述电子束检测设备30包括前述腔室装置1和前述晶片输送设备20，且相应地具体构造和相应的技术效果类似，在此不再赘述。
由此，本公开实施例具备如下优越的技术效果：
本公开实施例提出了一种腔室装置1来充当介于不同压力环境(例如大气与真空腔室)之间的过渡腔室或称为真空互锁腔室，其中设置也了用于支撑多层晶片的多层支撑结构13，并且在壳体10上设置了两组检测器，分别充当“晶片存在性检测器”和“晶片中心位置偏差检测器”，由此便利了测量多层支撑结构13中某层的晶片存在性、以及晶片存在情况下晶片的中心是否发生了相对于预期中心位置的偏移。同时避免了晶片在检测环节受污染和损伤。以较小的腔室容积、简化的结构和来实现在过渡腔室中无损无污染的晶片存在性与中心是否精确定位的检测。
另外，根据前述的本公开实施例可以理解，经由任意两种或两种以上的组合的任何技术方案，也落入本公开的保护范围内。
需要理解的是，本公开的说明书中方位术语，例如“上”、“下”、“左”、“右”等，是用来解释附图所示的方位关系。这些方位术语不应解释为对本公开保护范围的限制。
本公开的实施例采用递进的方式描述，每个实施例重点说明的都是与其他实施例的不同之处，各实施例之间相同相似的部分互相参见即可。
以上所述仅为本公开的较佳实施例，并不用以限制本公开，凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (20)

  1. 一种用于在第一压力环境与第二压力环境之间传递晶片的腔室装置，包括：
    壳体，其内部限定有空腔；
    第一阀，设置于壳体的第一侧部，且配置成在关闭状态与连通至第一压力环境或第二压力环境的开启状态之间切换；
    切换装置，固定至所述壳体，且配置成将所述第一阀与第一压力环境或第二压力环境的入口对准，
    第二阀，设置于壳体的与第一侧部相对的第二侧部，且配置成使得空腔与第一压力环境连通或断开，和
    压力调节装置，设置在壳体上与空腔连通，且配置成将空腔内的压强调节为与第一压力环境或第二压力环境实质上相同的压强，
    其中，所述腔室装置还包括设置于空腔内部的晶片支撑装置，所述晶片支撑装置包括多层支撑结构，所述多层支撑结构的各层分别被配置用于以一一对应的方式支撑所述多个晶片。
  2. 根据权利要求1所述的腔室装置，其中，所述多层支撑结构包括：
    第一支撑半部，包括：
    第一支座，固定至壳体的底部内表面、以及与所述第一侧部和所述第二侧部两者均相交的第三侧部的内壁处；以及
    从第一支座向空腔突伸的多个第一支柱，
    第二支撑半部，包括：
    第二支座，固定至壳体的底部内表面、以及与所述第三侧部相对的第四侧部的内壁处；以及
    从第二支座向空腔突伸的多个第二支柱，并且
    其中，位于所述多层支撑结构中的任一层中的相应第一支柱和相应第二支柱共同支撑所述多个晶片中的待支撑于该层中的一相应晶片，且各自轴线平行于壳体的底表面且呈共面设置。
  3. 根据权利要求2所述的腔室装置，其中，
    所述第一支座包括：
    两个第一块体，间隔地固定于所述第三侧部的内壁处；和
    第一肋，连接于所述两个第一块体之间，所述第一肋固定至壳体的底部内表面，以及
    所述第二支座包括：
    两个第二块体，间隔地固定于所述第四侧部的内壁处；和
    第二肋，连接于所述两个第二块体之间，所述第二肋固定至壳体的底部内表面。
  4. 根据权利要求2所述的腔室装置，其中，相邻层的第一支柱之间的距离、以及相邻层的第二支柱之间的距离各自大于晶片厚度；并且
    在设定以所述第一支柱和第二自主的轴线方向为纵向的情况下，则在与所述纵向正交的横向上，同层的第一支柱之间的横向距离、以及同层的第二支柱之间的横向距离均被限定为不低于最小横向阈值，所述最小横向阈值被限定为所述多层支撑结构能够支撑的不同规格晶片中最小尺寸规格晶片的直径。
  5. 根据权利要求3所述的腔室装置，其中，在所述多层支撑结构的每层仅具备：两个第一支柱，分别定位于所述两个第一块体，以及两个第二支柱，分别定位于所述两个第二块体；并且
    在所述多层支撑结构的所有层中，分别布置于所述两个第一块体中同一块体上的第一支柱各自轴线共面设置，和/或分别布置于所述两个第二块体中同一块体上的第二支柱各自轴线共面设置。
  6. 根据权利要求3所述的腔室装置，其中，所述第一肋与所述两个第一块体一体形成，和/或所述第二肋与所述两个第二块体一体形成。
  7. 根据权利要求2所述的腔室装置，还包括第一晶片检测装置，所述第一晶片检测装置包括：
    第一光源，安装至所述壳体且配置成向所述空腔内发射第一照射光束；
    多组第一传感器，安装至所述壳体且与所述多层支撑结构的各层以一一对应关系至少部分地对准设置，且配置成感测所述第一照射光束、继而基于感测结果来产生多个第一电信号；和
    处理电路，所述处理电路与所述多组第一传感器电连接，并且配置成接收所述多个第一电信号并且基于所述多个第一电信号来判断与各组第一传感器对应的所述多层支撑结构的各层中是否支撑有相应晶片。
  8. 根据权利要求7所述的腔室装置，其中，每组第一传感器配置成在没有接收到所述第一照射光束的情况下产生具有高电平和低电平之一作为第一量值的第一电信号， 且在至少部分地接收到所述第一照射光束的情况下产生具有高电平和低电平中的另一种作为第二量值的第一电信号；且
    基于由与所述多层支撑结构中的任一层以一一对应关系至少部分地对准设置的相应组第一传感器所输出的相应第一电信号，所述处理电路配置成响应于具有第一量值的该相应第一电信号判定该层支撑有相应晶片，且响应于具有第二量值的该相应第一电信号判定该层没有支撑相应晶片。
  9. 根据权利要求7所述的腔室装置，其中，所述第一支座具备朝所述壳体的上表面敞开的凹口，且所述第三侧部形成有贯通的第一窗，所述第一窗至少部分地与所述凹口重叠；并且
    所述第一光源布置成与所述第一窗对准且配置成发射第一照射光束经由所述第一窗进入所述空腔。
  10. 根据权利要求7或8所述的腔室装置，还包括第二晶片检测装置，所述第二晶片检测装置包括：
    多个第二光源，安装于所述壳体的顶侧和底侧中的一侧、且布置成限定了具有与所述多个晶片的圆心的预期位置相重合的圆心的一个虚拟圆，所述多个光源在所述虚拟圆的圆周方向上以相同角度间隔设置，且配置成分别向所述空气内发射第二照射光束；和
    多个第二传感器，设置于所述壳体的顶侧和底侧中的与所述多个第二光源不同侧处，且以一一对应的关系与所述多个第二光源实质上对准，且配置成分别感测来自所述多个第二光源的第二照射光束来产生多个第二电信号；
    其中，所述多个第二光源布置成使得各自中心与所述虚拟圆的圆心之间距离与所述待放置的晶片的半径之差小于晶片中心偏移的预定容差，
    所述处理电路还与所述多个第二传感器电连接，并且配置成接收所述多个第二电信号并且基于所述多个第二电信号来确定所述多个晶片中是否有晶片的圆心偏离了其预期位置。
  11. 根据权利要求10所述的腔室装置，其中，每个第二传感器配置成在没有接收到所述第二照射光束的情况下产生具有高电平和低电平之一作为第一量值的第二电信号，且在至少部分接收到所述第二照射光束的情况下产生具有高电平和低电平中的另一种作为第二量值的第二电信号；且
    基于由所述多个第二传感器分别输出的多个第二电信号，所述处理电路配置成响 应于来自任一个第二传感器的具有第一量值的相应第二电信号来判定了所述多个晶片中的至少一个晶片的圆心偏离其预期位置。
  12. 根据权利要求11所述的腔室装置，还包括相对于虚拟圆的圆心与所述第二光源同心地紧邻布置的基于光电转换的距离传感器，所述距离传感器配置成基于所接收的从晶片反射回的第二照射光束来确定进行相应第二光源与发生发射处的晶片之间距离，并且
    在所述处理电路判定了至少一个晶片的圆心偏离其预期位置的情况下，所述处理电路还配置成基于由所述距离传感器所测量的距离，来确定哪层放置的晶片的圆心偏离其预期位置。
  13. 根据权利要求10所述的腔室装置，其中，所述壳体的顶侧和底侧中的安装有所述多个第二光源的一侧形成有贯通的多个第二窗，所述多个第二窗分别与所述多个第二光源对准，使得所述多个第二光源发射的第二照射光束经由所述多个第二窗进入所述空腔。
  14. 根据权利要求10所述的腔室装置，其中，在设定以所述第一支柱和第二自主的轴线方向为纵向的情况下，则在与所述纵向正交的横向上，同层的第一支柱之间的横向距离、以及同层的第二支柱之间的横向距离均被限定为不高于最大横向阈值，所述最大横向阈值被限定为在横向相邻的所述多个第二光源的中心距。
  15. 根据权利要求10或14所述的腔室装置，其中，所述多个第二传感器接收的所述第二照射光束的波长范围与所述多组第一传感器接收的所述第一照射光束的波长范围彼此不重叠。
  16. 根据权利要求7或10所述的腔室装置，其中，所述压力调节装置包括：
    充气端口，连接到气源或第一压力环境，且配置成对所述空腔充气至与所述第一压力环境实质上压力均衡的压强；
    抽气端口，连接至真空源或第二压力环境，且配置成对所述空腔抽真空至由所述处理电路设定的真空度或抽真空至与所述第二压力环境实质上相同的真空度；和
    真空计，与所述空腔相连通，并且配置成测量所述空气的真空度，
    其中，基于真空计的测量结果来控制经由抽气端口对空腔的抽真空。
  17. 一种晶片输送设备，包括：
    根据权利要求12所述的腔室装置；
    第一机械臂，布置于所述第一压力环境中且与第一阀相邻，且配置成将晶片经由 第一阀在第一压力环境与所述腔室装置之间传递；和
    第一机械臂，布置于所述第二压力环境中且与第二阀相邻，且配置成将晶片经由第二阀在第二压力环境与所述腔室装置之间传递。
  18. 一种使用根据权利要求17所述的晶片输送装置的晶片处理方法，包括：
    开启第一阀，使得第一压力环境和所述空腔处于实质上相同的压强，通过所述第一机械臂将所述多个晶片分别加载至所述多层支撑结构的相应层上，并且根据处理电路的输出调整晶片位置处于预期位置；
    当所述多个晶片被加载至所述多层支撑结构之后，切断第一阀，将所述空腔抽真空至与第二压力环境处于实质上相同的真空度；和
    开启第二阀，通过所述第二机械臂将所述多个晶片从所述空腔转移至所述第二压力环境。
  19. 根据权利要求18所述的晶片处理方法，还包括：
    在所述多个晶片在第二压力环境中完成后续过程之后，通过所述第二机械臂将所述多个晶片转移至所述空腔中且分别加载至所述多层支撑结构的相应层上，并且根据所述处理电路的输出调整晶片位置处于预期位置；
    切断第二阀，对所述空腔充气至与所述第一压力环境实质上相同的压强；以及
    开启第一阀，通过所述第一机械臂将所述多个晶片转移出所述空腔至所述第一压力环境。
  20. 一种电子束检测设备，包括：
    根据权利要求17所述的晶片输送设备；和
    第二壳体，限定真空腔室作为所述第二压力环境，所述真空腔室内安装有电子束检测装置，所述电子束检测装置包括扫描电镜。
PCT/CN2021/096749 2020-12-31 2021-05-28 腔室装置、晶片输送设备和晶片处理方法 WO2022142113A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/907,578 US20230129809A1 (en) 2020-12-31 2021-05-28 Chamber device, wafer handling apparatus and method for processing wafer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202011639567.5A CN113035758B (zh) 2020-12-31 2020-12-31 腔室装置、晶片输送设备和晶片处理方法
CN202011639567.5 2020-12-31

Publications (1)

Publication Number Publication Date
WO2022142113A1 true WO2022142113A1 (zh) 2022-07-07

Family

ID=76459131

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2021/096749 WO2022142113A1 (zh) 2020-12-31 2021-05-28 腔室装置、晶片输送设备和晶片处理方法

Country Status (3)

Country Link
US (1) US20230129809A1 (zh)
CN (1) CN113035758B (zh)
WO (1) WO2022142113A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009182235A (ja) * 2008-01-31 2009-08-13 Tokyo Electron Ltd ロードロック装置および基板冷却方法
CN102414809A (zh) * 2009-08-29 2012-04-11 东京毅力科创株式会社 负载锁定装置和处理系统
CN105097601A (zh) * 2014-04-17 2015-11-25 北京北方微电子基地设备工艺研究中心有限责任公司 晶片校准装置以及半导体加工设备
CN105702607A (zh) * 2016-03-17 2016-06-22 东方晶源微电子科技（北京）有限公司 机械臂和检查系统
CN107275249A (zh) * 2016-04-08 2017-10-20 东方晶源微电子科技（北京）有限公司 真空腔体装置和处理硅片的方法
US20190214225A1 (en) * 2017-02-23 2019-07-11 Hermes Microvision, Inc. Load lock system for charged particle beam imaging

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009182235A (ja) * 2008-01-31 2009-08-13 Tokyo Electron Ltd ロードロック装置および基板冷却方法
CN102414809A (zh) * 2009-08-29 2012-04-11 东京毅力科创株式会社 负载锁定装置和处理系统
CN105097601A (zh) * 2014-04-17 2015-11-25 北京北方微电子基地设备工艺研究中心有限责任公司 晶片校准装置以及半导体加工设备
CN105702607A (zh) * 2016-03-17 2016-06-22 东方晶源微电子科技（北京）有限公司 机械臂和检查系统
CN107275249A (zh) * 2016-04-08 2017-10-20 东方晶源微电子科技（北京）有限公司 真空腔体装置和处理硅片的方法
US20190214225A1 (en) * 2017-02-23 2019-07-11 Hermes Microvision, Inc. Load lock system for charged particle beam imaging

Also Published As

Publication number Publication date
US20230129809A1 (en) 2023-04-27
CN113035758A (zh) 2021-06-25
CN113035758B (zh) 2022-06-24

Similar Documents

Publication Publication Date Title
JP2020524915A (ja) ウエハ位置検出装置を有する気相腐食キャビティ
KR101009092B1 (ko) 이동중인 기판의 오정렬 및 기판 파손을 동적으로 탐지하기위한 센서
US10766056B2 (en) Purge device, purge stocker, and method for feeding purge gas
KR20130105237A (ko) 반도체 웨이퍼 제조 공정을 제어하는 시스템 및 방법
TW201523762A (zh) 具有即時基板定心的處理裝置
JP4961893B2 (ja) 基板搬送装置及び基板搬送方法
KR20160001649U (ko) 로봇 장착식 관통-빔 기판 검출기
JP2013171872A (ja) 基板処理装置及び基板処理方法
WO2022142113A1 (zh) 腔室装置、晶片输送设备和晶片处理方法
JP2007227781A (ja) 基板の位置ずれ検査機構，処理システム及び基板の位置ずれ検査方法
US7832353B2 (en) Semiconductor manufacturing apparatus equipped with wafer inspection device and inspection techniques
WO2013121919A1 (ja) 基板処理装置及び基板処理方法
KR20160066824A (ko) 기판 이송 방법
JP2020087960A (ja) 搬送ロボットシステム、教示方法、及びウエハ収容容器
TWI807764B (zh) 基板轉移裝置以及具有基板轉移裝置的基板處理設備
JP5473820B2 (ja) 基板保持具及び基板搬送システム
TW202131436A (zh) 搬運之系統及方法
US11933826B2 (en) Execution device and execution method
US20210391195A1 (en) Execution device and execution method
JP2002270671A (ja) 基板処理装置
US20220341844A1 (en) Calibration apparatus and calibration method
US20230019109A1 (en) Sonar sensor in processing chamber
TWI835078B (zh) 基片對準裝置、基片處理系統及傳送機構位置調整方法
WO2023279514A1 (zh) 量测装置、量测补偿系统、量测方法及量测补偿方法
US20240014060A1 (en) Sensor module and substrate processing apparatus using the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 21912874

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 20/10/2023)