WO2022139088A1 - Élément passif de diode à barrière de schottky et son procédé de fabrication - Google Patents

Élément passif de diode à barrière de schottky et son procédé de fabrication Download PDF

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Publication number
WO2022139088A1
WO2022139088A1 PCT/KR2021/007839 KR2021007839W WO2022139088A1 WO 2022139088 A1 WO2022139088 A1 WO 2022139088A1 KR 2021007839 W KR2021007839 W KR 2021007839W WO 2022139088 A1 WO2022139088 A1 WO 2022139088A1
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WIPO (PCT)
Prior art keywords
semiconductor substrate
schottky
barrier diode
manufacturing
schottky barrier
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PCT/KR2021/007839
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English (en)
Korean (ko)
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이완규
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한국과학기술원
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66143—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes

Definitions

  • the present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a Schottky barrier diode passive device, which is a high-speed and high-performance semiconductor passive device for a terahertz communication system, and a method for manufacturing the same.
  • the 6G mobile communication system which is expected to arrive in the next 10 years, is expected to be able to accommodate at least 100 Gbps of traffic per cell.
  • the conventional R&D data and results have disadvantages that the device is large, very heavy, and very expensive because it generates, restores, and transmits a THz signal based on photonics, which limits commercialization of the device.
  • a Schottky barrier diode passive device which is a high-speed, high-performance semiconductor passive device for a terahertz communication system, and a method for manufacturing the same.
  • the method comprising: providing a semiconductor substrate; forming an insulating film on the semiconductor substrate; forming a contact hole penetrating the insulating layer; forming a Schottky metal film deposited on the insulating film while filling the contact hole; and forming a Schottky metal pattern by patterning the Schottky metal layer.
  • the insulating layer has a larger area compared to the Schottky metal pattern and a boundary of the Schottky metal pattern so as not to damage the semiconductor substrate in the process of patterning the Schottky metal layer
  • the insulating layer may be present.
  • the Schottky metal layer may be made of a metal having a work function satisfying a range of 4.25 to 4.45 eV.
  • the semiconductor substrate may include at least two regions in which distributions of impurities are vertically different.
  • the at least two regions may include an upper region having a relatively low concentration of n-type impurities and a lower region having a relatively high concentration of n-type impurities.
  • a bottom surface of the contact hole may be located in the upper region of the semiconductor substrate.
  • the method of manufacturing the Schottky barrier diode passive device may further include forming an air bridge by removing a portion of the insulating layer between the Schottky metal pattern and the semiconductor substrate.
  • the forming of the air bridge may be implemented by removing a portion of the insulating layer so that the Schottky metal pattern is exposed but the semiconductor substrate is not exposed.
  • the method of manufacturing the Schottky barrier diode passive device may further include bonding a copper layer or a copper lead frame to a lower surface of a semiconductor substrate.
  • the method of manufacturing the Schottky barrier diode passive device may further include: before the bonding step, grinding the lower surface of the semiconductor substrate to make it thinner.
  • a semiconductor substrate an insulating film formed on the semiconductor substrate and having a through hole; a schottky metal pattern formed on the insulating layer while filling the through hole; and an air bridge comprising a space formed by removing a portion of the insulating layer between the Schottky metal pattern and the semiconductor substrate.
  • the air bridge may be implemented by removing a portion of the insulating layer so that the Schottky metal pattern is exposed but the semiconductor substrate is not exposed.
  • the semiconductor substrate includes at least two regions having different distributions of impurities vertically, wherein the at least two regions include an upper region having a relatively low concentration of n-type impurity and an n-type impurity.
  • a lower region having a relatively high concentration may be included, and a bottom surface of the contact hole may be located in the upper region of the semiconductor substrate.
  • 1 to 7 are cross-sectional views illustrating a method of manufacturing a Schottky barrier diode passive device according to an embodiment of the present invention.
  • FIG. 8 is a perspective view illustrating a Schottky barrier diode passive device according to an embodiment of the present invention.
  • FIG. 9 is a diagram illustrating a stacked structure constituting a Schottky barrier diode passive device according to a comparative example of the present invention.
  • FIG. 10 is a perspective view illustrating a Schottky barrier diode passive device according to another comparative example of the present invention.
  • the speed and performance of the detector are highly likely to deteriorate significantly.
  • another factor that determines the high performance and high speed of the detector is the technology of manufacturing the device in the form of an 'air bridge', which is not a problem at all in manufacturing it using the silicon integrated process technology. Therefore, among the two main factors that determine the high-speed performance of a solid-state electronic device, the fabrication of an 'air bridge type' can be implemented in the same way even using a silicon substrate. It can be obtained in the same way as in the case of using it.
  • the present invention is to solve various problems including the above problems, and a high-speed and high-performance SBD device or a module and parts thereof having a specification that can be used for 6G terahertz frequency, and a method for manufacturing the same is intended to provide
  • 1 to 7 are cross-sectional views illustrating a method of manufacturing a Schottky barrier diode passive device according to an embodiment of the present invention.
  • a method of manufacturing a Schottky barrier diode passive device includes providing a semiconductor substrate; forming an insulating film on the semiconductor substrate; forming a contact hole penetrating the insulating layer; forming a Schottky metal film deposited on the insulating film while filling the contact hole; and forming a Schottky metal pattern by patterning the Schottky metal layer.
  • a method of manufacturing a Schottky barrier diode passive device includes providing a semiconductor substrate 10 .
  • the semiconductor substrate 10 may include at least two regions in which distributions of impurities are vertically different.
  • the at least two regions may include an upper region 10b having a relatively low concentration of n-type impurities and a lower region 10a having a relatively high concentration of n-type impurities.
  • the upper region 10b in which the concentration of the n-type impurity is relatively low may be understood as, for example, a drift layer.
  • the semiconductor substrate 10 may not be a compound semiconductor substrate, but may be, for example, a silicon substrate or a germanium substrate.
  • a silicon substrate or a germanium substrate is advantageous compared to a compound substrate in that it is inexpensive and has a large area.
  • the semiconductor substrate 10 may include, for example, a single crystal silicon substrate.
  • the substrate cost is very low, the substrate has a large area, and there is no epitaxial layer growth (buffer epitaxial layer, ohmic epitaxial layer, Schottky epi layer), so the manufacturing cost is can be drastically reduced.
  • the semiconductor substrate 10 may include an arrangement of impurities having different distributions of impurities in a vertical direction (distribution of impurities that do not create regions in which impurities are different in a horizontal direction).
  • the distribution of impurities according to the depth in the vertical direction is largely composed of two layers, the concentration of the n-type impurity in the upper layer is in the concentration range of n-, and the concentration of the n-type impurity in the lower layer is in the concentration range of n+.
  • the doping of these impurities may be formed by various methods. For example, it may be completed using a traditional diffusion furnace, heat treatment after ion implantation of impurities, or alternatively, it may be formed using epi-growth to have low concentration (N-) impurities.
  • a method of manufacturing a Schottky barrier diode passive device includes forming an insulating layer 20 on the semiconductor substrate 10 .
  • the insulating film 20 may include, for example, an oxide film.
  • the oxide film may be a silicon oxide film (SiO 2 ).
  • the method of manufacturing a Schottky barrier diode passive device includes forming a contact hole 30 penetrating the insulating layer 20 .
  • the bottom surface of the contact hole 30 may be the surface of the upper region 10b of the semiconductor substrate 10 or the inside of the upper region 10b.
  • a Schottky metal film ( 40) to form in the method of manufacturing a Schottky barrier diode passive device according to an embodiment of the present invention, a Schottky metal film ( 40) to form.
  • a method of simultaneously filling the contact hole 30 of the Schottky metal and depositing the wiring metal may include a method of forming a physical vapor deposition method, a chemical vapor deposition method, or a combination of a physical vapor deposition method and a chemical vapor deposition method.
  • the cleaning process before deposition of the Schottky metal may include etching the silicon substrate through RF sputtering. As the size of the contact hole 30 decreases and the depth increases (as the aspect ratio increases), the chemical vapor deposition method or the chemical vapor deposition method may be first applied and the physical vapor deposition method may be sequentially combined.
  • a portion of the Schottky metal layer 40 that fills the contact hole 30 may be referred to as a contact pattern 45 , and a region in which the contact pattern 45 and the semiconductor substrate 10 contact the Schottky metal and n It can be understood as a Schottky junction region of -type silicon.
  • junction surface (Schottky metal/semiconductor substrate) of the Schottky metal having a vertical depth on the surface or the surface of the upper surface of the semiconductor substrate 10 is the top of the two layers of the concentration depth in the vertical direction constituting the semiconductor substrate 10 . It can be located only on the region 10b or only on the surface of the upper region 10b.
  • the Schottky metal that fills the contact hole 30 and forms the Schottky metal layer 40 formed on the insulating layer 20 has a Schottky barrier of less than 0.4 eV in order to satisfy the characteristics required for SBD for communication.
  • a Schottky barrier of less than 0.4 eV in order to satisfy the characteristics required for SBD for communication.
  • an appropriate metal having a work function in the range of 4.25 to 4.45 eV may be selected.
  • the Schottky metal may include titanium or titanium nitride.
  • the method of manufacturing a Schottky barrier diode passive device includes the step of forming a Schottky metal pattern 50 by patterning the Schottky metal film 40 .
  • a junction of a Schottky metal and n-type silicon and a junction metal simultaneously form an upper electrode, and the upper electrode is patterned to form an SBD The device is implemented.
  • the insulating layer 20 has a larger area than the Schottky metal pattern 50 and the Schottky metal pattern ( The insulating layer 20 may exist at the boundary of 50 .
  • the SBD device since the Schottky metal makes in advance only the place where the semiconductor substrate 10 will contact and makes contact, and the insulating film 20 blocks the contact with the semiconductor substrate 10 in the remaining zero region, the SBD device to be viewed directly in the present invention. leads to an improvement in the conductance of Accordingly, the SBD device can be ultra-high-speed and high-performance.
  • a portion of the insulating layer 20 between the Schottky metal pattern 50 and the semiconductor substrate 10 is removed. to form an air bridge 70 that is an empty space.
  • the air bridge 70 may be formed after the formation of the upper electrode (anode electrode) after the Schottky metal/silicon substrate bonding is formed.
  • the process of removing a portion of the insulating layer 20 positioned between the semiconductor substrate 10 and the Schottky metal pattern 50 may include a dry etching process.
  • the air bridge 70 it is possible to improve the RC delay phenomenon in the signal transmission process.
  • the forming of the air bridge 70 may be implemented by removing a portion of the insulating layer so that the schottky metal pattern 50 is exposed but the semiconductor substrate 10 is not exposed. That is, the remaining part 25 of the insulating layer remains under the air bridge 70 , so that the semiconductor substrate 10 is not exposed.
  • a process of removing a portion of the insulating layer 20 to implement the air bridge 70 may include a dry etching process using plasma.
  • a thin layer may remain on the surface of the semiconductor substrate 10 .
  • the semiconductor substrate 10 is a silicon substrate
  • the thin insulating film 25 left on the silicon does not expose the silicon surface, which is the surface of the semiconductor substrate 10 , and thus does not form an additional energy level where electric charges can be located. Due to this, the unexposed silicon substrate can contribute to high speed and high performance by increasing the conductance of the SBD device.
  • the lower surface (bottom surface) of the semiconductor substrate 10 doped with impurities may be directly used as a cathode of the SBD passive device.
  • the Schottky metal pattern 50 is used as the upper anode and the lower surface of the semiconductor substrate 10 is arranged as the lower cathode, the lower electrode is automatically formed without separately forming the lower electrode, thereby simplifying the process. Accordingly, the manufacturing cost can be lowered due to this, and the size of the chip is miniaturized, thereby further reducing the manufacturing cost.
  • the cathode disposed on the lower surface of the semiconductor substrate may be additionally metal-bonded or soldered, and copper or Cu lead frame may be used to advantageously dissipate heat as necessary.
  • a copper layer or a copper lead frame 90 as a lower electrode (cathode) on the lower surface of the semiconductor substrate 10 optionally ) may further comprise the step of bonding.
  • the method may further include grinding the lower surface of the semiconductor substrate 10 to make it thinner before the bonding step.
  • a junction of a Schottky metal and n-type silicon and a junction metal simultaneously form an upper electrode, and the upper electrode is patterned to form an SBD Formation of the device has already been described.
  • a bonding metal or soldering 80 may be interposed between the semiconductor substrate 10 and the copper layer or the copper lead frame 90 .
  • a Schottky diode and a resistor symbol representing an electrical circuit are displayed.
  • the above-mentioned bonding metal, soldering, and copper leadframe are not only the electrical contact of the cathode, but also a dissipation area for heat dissipation.
  • Materials with a high heat transfer coefficient are deposited on the back side of the semiconductor substrate through a thin film or thick film process to prevent heat dissipation and electrical contact.
  • the resistance can be made even lower.
  • graphene, a diamond thin film, or a diamond-like material may be used.
  • Mechanical polishing (grinding) of the semiconductor substrate 10 can be formed to a thickness (eg, 80 ⁇ m or a lower thickness of 50 ⁇ m) that is not particularly inconvenient in subsequent products and modularization processes.
  • the thickness of the substrate may be reduced to a thickness of 400 ⁇ m or less, and preferably, grinding may be performed to a thickness of 200 ⁇ m or less. This reduces the distance through which electric charges are transported, that is, reduces the resistance R, thereby increasing the amount of current that is the output of the diode.
  • Another effect is to increase the electric field strength, which is an increase in the strength of the electric field, because it shortens the distance to which the voltage is applied.
  • This value is often expressed as an on-current increase.
  • the thickness reduction increases the strength of the electric field applied to the Schottky diode, a larger amount of current is generated with the same voltage.
  • the conductance of the Schottky diode becomes very high. This is directly related to the high-speed and high-performance Schottky diode.
  • dI/dV which is a responsivity
  • FIG. 8 is a perspective view illustrating a Schottky barrier diode passive device according to an embodiment of the present invention.
  • a Schottky barrier diode passive device includes a semiconductor substrate 10 ; an insulating film 20 formed on the semiconductor substrate 10 and having a through hole; a schottky metal pattern 50 formed on the insulating film 20 while filling the through hole; and an air bridge 70 formed by removing a portion of the insulating layer between the Schottky metal pattern 50 and the semiconductor substrate 10 .
  • a residual insulating layer 25 implemented by removing a portion of the insulating layer so that the Schottky metal pattern 50 is exposed but not the semiconductor substrate 10 is provided on the air bridge 70 .
  • the semiconductor substrate 10 includes at least two regions in which an impurity distribution is vertically different, and the at least two regions include an upper region having a relatively low concentration of n-type impurities and a lower region having a relatively high concentration of n-type impurities. region, and a bottom surface of the contact hole may be located in the upper region of the semiconductor substrate 10 .
  • a region in which the semiconductor substrate 10 contacts the contact pattern 45 which is implemented by filling the contact hole with a Schottky metal, may be understood as a Schottky junction region between the Schottky metal and n-type silicon.
  • the Schottky metal pattern 50 may include a thin horizontal line 50_1 and a metal pad 50_2 having a wide rectangular shape connected to an end (right side of FIG. 8 ) of the horizontal line. The other end (left side of FIG. 8 ) of the thin horizontal line 50_1 descends vertically to contact the semiconductor substrate 10 to form a so-called Schottky metal/semiconductor Schottky diode. Due to the presence of the insulating layer 20 deposited between the semiconductor substrate 10 and the Schottky metal pattern 50 , the Schottky metal can contact the semiconductor substrate 10 only through the contact hole from the time of deposition.
  • the finished shape of the chip disclosed in FIG. 8 implemented by the above-described manufacturing method has a three-dimensional shape, and the so-called parasitic capacitance can be minimized to increase the signal transmission speed.
  • FIG. 9 is a diagram illustrating a stacked structure constituting a Schottky barrier diode passive device according to a comparative example of the present invention.
  • the compound substrate was epitaxially grown on an upper portion of the compound substrate without directly using the compound semiconductor, and a buffer layer epitaxial growth (InP buffer) method for preparing the active layer (Ohmic layer & Schottky layer) epitaxial growth (InP buffer) method, and up to InP cap Four layers of epi-growth are additionally required.
  • the silicon substrate does not need this operation, and only a silicon substrate on which impurity doping is completed or a surface layer on which a diffusion layer with controlled impurity doping is formed is required.
  • this surface layer can be formed in several ways. For example, it can be completed using a traditional diffusion furnace, or heat treatment can be performed after ion implantation of impurities. Of course, in another embodiment of the present invention, it may be formed using epi-growth to have a low concentration (N-) impurity.
  • the Schottky metal when the Schottky metal is deposited and contacted with the substrate and then removed through patterning, diffusion of the Schottky metal into the substrate and this Formation of an additional energy level of electric charge due to metal impurities formed on the compound substrate due to the formation of an additional energy level due to the formation of an additional energy level by the generation of defects in the compound substrate due to plasma damage that occurs when metal unnecessary by patterning is removed by dry etching process source can be blocked.
  • FIG. 10 is a perspective view illustrating a Schottky barrier diode passive device according to another comparative example of the present invention.
  • the conventional SBD passive device two or more ohmic layers and a Schottky layer are epi-grown on a compound substrate, the epi layers are exposed through patterning, respectively, and the SBD passive device is configured by Schottky metal deposition and patterning. and a three-dimensional structure was fabricated by etching the epitaxial layer at the bottom of the bipolar finger.
  • the technical idea presented by the present invention makes it possible to simultaneously secure high-speed characteristics and low-cost manufacturing while using a silicon substrate.
  • the silicon substrate surface as a Schottky layer and the bottom as an ohmic layer
  • the two electrodes have a vertical arrangement, i) simplifying the ohmic layer to be automatically formed without separate metal deposition or patterning, ii) a Schottky layer on the compound substrate , the ohmic layer and the buffer layer were not epitaxially grown. Accordingly, patterning for separate separation of the ohmic layer and the schottky layer may be omitted. Due to the omission of patterning, plasma damage of the Schottky layer formed at the boundary was blocked.
  • an air bridge is formed by digging out the SiO 2 layer, which is an insulating film, instead of the etching process of digging deep down to remove the epi layer, which is the active layer of the device, but the silicon substrate, which is the Schottky active layer, has no effect. Made to avoid damage. Therefore, it is possible to start a manufacturing method with high speed, high performance and very low manufacturing cost by preventing damage to the active layer where charges can be trapped and minimizing parasitic capacitance as in the conventional method. Low cost factors include process simplification, simplification of the mask step, omission of epitaxial layer growth, and finally, a very inexpensive silicon substrate.
  • silicon substrates have a large area of 8 inches, so the manufacturing cost per chip can be minimized.
  • the formation of the air bridge is formed very widely on a plane perpendicular to a plane or an inclined plane, the deterioration of the performance formed at this time is prevented from the source. Therefore, the present invention can achieve the purpose of achieving high speed and high performance and at the same time low-cost manufacturing.
  • a silicon semiconductor substrate an insulating film is laid on the upper surface of the semiconductor substrate, and a Schottky metal fills the hole through a vertical hole, and at the same time, the same Schottky metal is applied to the top of the substrate with an upper electrode (anode) to form An air bridge is formed by removing a portion of the insulating film between the Schottky electrode and the substrate.
  • a high-speed, high-performance SBD passive device for a THz communication system and a method for manufacturing the same, in which a cathode is electrically connected to, or connected to, a lead frame of junction metal or copper is placed on the lower surface of the semiconductor substrate.
  • the SBD passive element is a diode, and the SBD passive element may include a plurality of passive elements and related circuit units.
  • the SBD passive device may be automatically formed under the semiconductor substrate without any process for forming a cathode.
  • the arrangement of the anode/diode/cathode is a device of a vertical structure formed in a vertical direction. Air bridge formation does not completely remove the Schottky metal and the insulating film placed on the surface of the substrate, but partially removes it in both the horizontal and vertical directions. A residual film may not be left at the bottom of the key metal as much as possible.
  • the ultra-high-speed, high-performance SBD passive device is subjected to thin grinding of the silicon substrate to a predetermined thickness or less before packaging and bonding metal or soldering to the surface, or additionally, a copper lead frame can be attached to the lower surface of the soldering.
  • the silicon substrate is a substrate having a high concentration of n-type impurity (N++), and a substrate having a low concentration of n-type impurity (N-) thereon, preferably a schottky metal in a silicon layer containing n-type impurities. It can be manufactured by joining.
  • the contact hole forming the junction may be formed in a circular shape as much as possible so that the density of the electric field acting when the device operates may be concentrated.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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Abstract

La présente invention concerne un élément passif de diode à barrière de Schottky comprenant : un substrat semi-conducteur ; une couche isolante formée sur le substrat semi-conducteur et ayant un trou traversant ; un motif métallique de Schottky formé sur la couche isolante tout en remplissant le trou traversant ; et un pont d'air comprenant un espace formé par retrait d'une partie de la couche isolante entre le motif métallique de Schottky et le substrat semi-conducteur.
PCT/KR2021/007839 2020-12-22 2021-06-22 Élément passif de diode à barrière de schottky et son procédé de fabrication WO2022139088A1 (fr)

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KR10-2020-0180837 2020-12-22
KR1020200180837A KR102437528B1 (ko) 2020-12-22 2020-12-22 쇼트키 배리어 다이오드 수동소자 및 그 제조 방법

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KR20110013675A (ko) * 2009-08-03 2011-02-10 주식회사 케이이씨 쇼트키 배리어 다이오드 및 그 제조 방법
KR20160045969A (ko) * 2014-10-17 2016-04-28 에스케이이노베이션 주식회사 반도체 소자의 제조방법
KR101667669B1 (ko) * 2015-05-29 2016-10-28 전자부품연구원 쇼트키 배리어 다이오드 및 그 제조방법

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WO2005065385A2 (fr) * 2003-12-30 2005-07-21 Fairchild Semiconductor Corporation Dispositifs d'energie a semi-conducteurs et procedes de fabrication associes
KR100773513B1 (ko) 2006-03-23 2007-11-06 박일관 온라인망을 기반으로 하는 방송 프로그램 협찬상품 안내시스템
KR20190106254A (ko) * 2018-03-08 2019-09-18 주식회사 시지트로닉스 밴드갭과 도핑 변조를 이용한 고전압 쇼트키 배리어 다이오드 및 그 제조방법

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5445985A (en) * 1990-11-02 1995-08-29 Ail Systems, Inc. Method of forming integrated limiter and amplifying devices
KR20100047822A (ko) * 2007-08-31 2010-05-10 스미토모덴키고교가부시키가이샤 쇼트키 배리어 다이오드
KR20110013675A (ko) * 2009-08-03 2011-02-10 주식회사 케이이씨 쇼트키 배리어 다이오드 및 그 제조 방법
KR20160045969A (ko) * 2014-10-17 2016-04-28 에스케이이노베이션 주식회사 반도체 소자의 제조방법
KR101667669B1 (ko) * 2015-05-29 2016-10-28 전자부품연구원 쇼트키 배리어 다이오드 및 그 제조방법

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