WO2022111464A1 - Procédé de détection et circuit de détection - Google Patents

Procédé de détection et circuit de détection Download PDF

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Publication number
WO2022111464A1
WO2022111464A1 PCT/CN2021/132390 CN2021132390W WO2022111464A1 WO 2022111464 A1 WO2022111464 A1 WO 2022111464A1 CN 2021132390 W CN2021132390 W CN 2021132390W WO 2022111464 A1 WO2022111464 A1 WO 2022111464A1
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Prior art keywords
voltage
turned
field effect
power field
effect transistor
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PCT/CN2021/132390
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English (en)
Chinese (zh)
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李志坚
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中兴通讯股份有限公司
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Publication of WO2022111464A1 publication Critical patent/WO2022111464A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/36—Overload-protection arrangements or circuits for electric measuring instruments
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • G01R19/16571—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing AC or DC current with one threshold, e.g. load current, over-current, surge current or fault current
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16566—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533
    • G01R19/16576—Circuits and arrangements for comparing voltage or current with one or several thresholds and for indicating the result not covered by subgroups G01R19/16504, G01R19/16528, G01R19/16533 comparing DC or AC voltage with one threshold
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices

Definitions

  • the present disclosure relates to the field of circuits, and in particular, to a detection method and a detection circuit.
  • MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor
  • ZVS Zero Voltage Switch, zero voltage switching
  • the use of ZVS can improve the efficiency of the converter.
  • ZVS is usually turned on in the body diode of the MOSFET or in parallel.
  • the voltage of the MOSFET can be clamped at about 1V, the voltage is small enough, it can be considered as the zero voltage point, and the turn-on loss at the zero voltage point is close to zero.
  • the ZVS circuit can not always realize zero-voltage turn-on.
  • the driving signals of the upper and lower switch tubes of the circuit bridge arm must have sufficient dead time.
  • the dead time generally depends on experience to design a fixed value. If it is small, the dead time will be larger. Due to the difference of circuit parameters, the dead time designed by experience is not the best. In high-voltage applications, sometimes the switch can be turned on when the voltage of the switch tube reaches more than 10V to 50V or even higher. tube, to avoid too long dead time to affect the output and efficiency.
  • An embodiment of the present disclosure provides a detection method, including:
  • the drain-source voltage detection circuit connected to the power field effect transistor is used to detect the drain-source voltage of the power field effect transistor that has been turned on ;
  • the circuit-connected comparison circuit compares the first divided voltage with the first preset reference voltage, and determines whether an overcurrent event occurs in the turned-on power field effect transistor according to the comparison result, and then determines whether the power field effect transistor has an overcurrent event.
  • the control circuit connected to the comparison circuit controls the turned-on power field effect transistor to be turned off.
  • Embodiments of the present disclosure also provide a detection circuit, including:
  • a drain-source voltage detection circuit which is connected to the power field effect transistor, and is configured to detect the leakage of the power field effect transistor that has been turned on when the power field effect transistor is controlled to be turned on by the control circuit connected thereto. source voltage;
  • a voltage divider circuit which is connected to the drain-source voltage detection circuit and is configured to divide the voltage of the drain-source electrodes of the turned-on power field effect transistors to obtain a first divided voltage
  • a comparison circuit connected to the voltage dividing circuit, configured to compare the first divided voltage with a first preset reference voltage, and determine whether an overcurrent event occurs in the turned-on power FET according to the comparison result , when it is determined that an overcurrent event occurs in the power field effect transistor, the control circuit connected to the comparison circuit controls the turned-on power field effect transistor to turn off.
  • FIG. 1 is a schematic flowchart of a detection method provided by an embodiment of the present disclosure
  • Fig. 2 is another schematic flow chart of the detection method provided by an embodiment of the present disclosure
  • FIG. 3 is a structural block diagram of a detection circuit provided by an embodiment of the present disclosure.
  • FIG. 4 is a circuit diagram for MOSFET overcurrent protection and zero voltage turn-on provided by an example embodiment of the present disclosure
  • Fig. 5 is the software logic processing flow chart of the example embodiment shown in Fig. 4 when VT1 is turned on;
  • FIG. 6 is a timing diagram of the example embodiment shown in FIG. 4 when VT1 is turned on;
  • FIG. 7 is a flowchart of software logic processing of the exemplary embodiment shown in FIG. 4 when VT1 is turned off;
  • FIG. 8 is a timing diagram of the example embodiment shown in FIG. 4 when VT1 is turned off;
  • FIG. 9 is a schematic diagram of a detection circuit provided by an embodiment of the present disclosure.
  • FIG. 10 is another schematic diagram of a detection circuit provided by an embodiment of the present disclosure.
  • FIG. 1 is a schematic flowchart of a detection method provided by an embodiment of the present disclosure. As shown in FIG. 1 , the detection method may include the following steps S101 to S103 .
  • Step S101 when the power field effect transistor is turned on under the control of the control circuit connected to it, use a drain-source voltage detection circuit connected to the power field effect transistor to detect the drain of the power field effect transistor that has been turned on. source voltage.
  • Step S102 Use a voltage divider circuit connected to the drain-source voltage detection circuit to divide the voltage of the drain-source electrodes of the turned-on power field effect transistors to obtain a first divided voltage.
  • Step S103 Using a comparison circuit connected to the voltage divider circuit to compare the first divided voltage with a first preset reference voltage, and determine whether the turned-on power FET has overcurrent according to the comparison result event, when it is determined that an overcurrent event occurs in the power field effect transistor, the control circuit connected to the comparison circuit controls the turned-on power field effect transistor to turn off.
  • control circuit controls the power field effect transistor to be turned on or off through a drive circuit.
  • the drain-source voltage detection circuit detects the drain-source voltage (or saturation voltage) of the power field effect transistor when it is turned on, and then judges whether an overcurrent event occurs in the circuit.
  • the detection speed is fast, and the power field can be effectively protected. effect tube.
  • FIG. 2 is another schematic flowchart of the detection method provided by the embodiment of the present disclosure.
  • the detection method further includes the following steps S201 to S203.
  • Step S201 when the power field effect transistor is turned off, use the drain-source voltage detection circuit to detect the drain-source voltage of the power field effect transistor that has been turned off.
  • Step S202 Use the voltage divider circuit to divide the voltage of the drain-source electrode of the power field effect transistor that has been turned off to obtain a second divided voltage.
  • Step S203 Using the comparison circuit to compare the second divided voltage with the second preset reference voltage, and determine whether the power field effect transistor that has been turned off meets the zero-voltage turn-on condition according to the comparison result. When the turned-off power field effect transistor satisfies the zero-voltage turn-on condition, the control circuit controls the turned-off power field effect transistor to be turned on.
  • the drain-source voltage of the power field effect transistor when the power field effect transistor is turned off is detected by the drain-source voltage detection circuit to determine whether the power field effect transistor meets the zero voltage turn-on condition, so that the power field effect transistor meets the zero voltage
  • the power field effect transistor is controlled to be turned on, which realizes flexible adjustment of dead time and prevents complete hard opening.
  • zero-voltage detection is further realized.
  • the simple detection circuits of the drain-source voltage detection circuit, the voltage divider circuit and the comparison circuit realize overcurrent detection (or saturation voltage detection) and ZVS detection.
  • the drain-source voltage detection circuit includes a first diode, the cathode of the first diode is connected to the drain of the power field effect transistor, and the anode of the first diode is connected to the voltage divider circuit .
  • the voltage dividing circuit includes: a first voltage dividing branch, including a second diode and a third resistor connected in parallel, and a cathode of the second diode is connected to the working power supply through the first resistor; And a second voltage dividing branch, including a first capacitor connected in parallel, a fifth resistor, and one or more series branches consisting of a fourth resistor and a detection switch, one end of which is connected to the anode of the second diode and the The other end of the comparison circuit is grounded.
  • the comparison circuit includes: a comparator whose forward input terminal is connected to a preset reference voltage, and whose reverse input terminal is connected to the first divided voltage when the power field effect transistor is turned on, and When the power field effect transistor is turned off, the second divided voltage is connected.
  • the first preset reference voltage and the second preset reference voltage are both the preset reference voltages.
  • the control circuit controls the power field effect transistor to be turned on through the drive circuit, it controls the detection switch to be turned off, and the fourth resistor connected in series with the detection switch does not participate in the voltage division. If the drain-source voltage of the power field effect transistor is small, the first divided voltage input to the reverse input terminal of the comparator after voltage division is smaller than the preset reference voltage connected to the forward input terminal. If the voltage of the drain-source of the power field effect transistor increases continuously, the first divided voltage input to the reverse input terminal of the comparator after voltage division is greater than that connected to the forward input terminal. When the preset reference voltage is input, the comparator outputs a high level, indicating that overcurrent has occurred.
  • the control circuit controls the power field effect transistor to be turned off through the drive circuit, it controls the detection switch to be turned on, and the fourth resistor connected in series with the detection switch participates in the voltage division. If the second voltage divided by the drain-source voltage of the power field effect transistor and input to the reverse input terminal of the comparator is greater than the preset reference voltage connected to the forward input terminal, the comparator outputs a high level , indicating that the zero-voltage turn-on condition is not met; if the drain-source voltage of the power FET is continuously reduced so that the second divided voltage input to the reverse input terminal of the comparator after the voltage division is smaller than the voltage connected to the forward input terminal When the preset reference voltage is used, the comparator outputs a low level, indicating that the zero-voltage turn-on condition is satisfied.
  • the control circuit controls the turned-off power field effect transistor (ie, the low-side transistor) to be turned on through the drive circuit to improve efficiency.
  • the control circuit can include a processing chip or a control chip. On the one hand, it can output driving pulses PWM1 and PWM2 to be respectively sent to the driving circuit and the detection switch of the power field effect transistor, thereby respectively controlling the power field effect transistor and the detection switch. On and off; on the other hand, when the power field effect transistor is turned on, it can output the drive pulse PWM1 or Logic Out2 used to control the power field effect transistor to turn off when the output result of the comparator indicates overcurrent to power
  • the drive circuit of the FET turns off the power FET; in the scenario where the power FET is turned off, the output can be used to control the power FET when the output result of the comparator indicates that the zero-voltage turn-on condition is met.
  • the turned-on drive pulse PWM1 or Logic Out2 is sent to the drive circuit of the power field effect transistor, so that the power field effect transistor is turned on.
  • the voltage dividing circuit includes: a first voltage dividing branch, including a second diode and a third resistor connected in parallel, and a cathode of the second diode is connected to the working power supply through the first resistor;
  • the second voltage dividing branch includes a first capacitor, a fourth resistor and a fifth resistor connected in parallel, one end of which is connected to the anode of the second diode and the comparison circuit, and the other end of which is grounded.
  • the comparison circuit includes: a comparator whose positive input terminal is connected to a first switch for accessing the first preset reference voltage and a second switch for accessing the second preset reference voltage a switch, the reverse input terminal of which is connected to the first divided voltage when the power field effect transistor is turned on, and is connected to the second divided voltage when the power field effect transistor is turned off.
  • control circuit controls the power field effect transistor to be turned on through the drive circuit, it controls the first switch to be closed, and the second switch is turned off, which is connected to the positive input terminal of the comparator. the first preset reference voltage. If the drain-source voltage of the power field effect transistor is small, the first divided voltage input to the reverse input terminal of the comparator after voltage division is smaller than the first preset reference voltage connected to the forward input terminal.
  • the comparator When the comparator outputs a low level, it means that there is no overcurrent; if the drain-source voltage of the power FET continues to increase so that the first divided voltage input to the reverse input terminal of the comparator after the voltage division is greater than the forward input When the first preset reference voltage connected to the terminal is connected, the comparator outputs a high level, indicating that overcurrent has occurred.
  • the control circuit controls the power field effect transistor to be turned off through the drive circuit, it controls the first switch to be turned off, and the second switch to be turned on, which is the positive input end of the comparator Access the second preset reference voltage. If the second voltage divided by the drain-source voltage of the power FET and input to the inverting input terminal of the comparator is greater than the second preset reference voltage connected to the non-inverting input terminal, the comparator output is high level, indicating that the zero-voltage turn-on condition is not met; if the drain-source voltage of the power FET is continuously reduced so that the second divided voltage input to the reverse input terminal of the comparator after voltage division is smaller than the forward input terminal connection When the second preset reference voltage is input, the comparator outputs a low level, indicating that the zero-voltage turn-on condition is satisfied.
  • the control circuit controls the turned-off power field effect transistor (ie, the low-side transistor) to be turned on through the drive circuit to improve efficiency.
  • the control circuit can include a processing chip or a control chip. On the one hand, it can output the driving pulse PWM1 to be sent to the driving circuit of the power field effect transistor, so as to control the on-off of the power field effect transistor; on the other hand, in the power field In the case where the effect tube is turned on, it can output the drive pulse PWM1 or Logic Out2 used to control the power field effect tube to turn off to the drive circuit of the power field effect tube when the output result of the comparator indicates an overcurrent, so that the power field effect tube is turned off.
  • MOSFET is turned off; when the power FET is turned off, it can output the driving pulse PWM1 or Logic Out2 used to control the conduction of the power MOSFET to supply power when the output result of the comparator indicates that the zero-voltage turn-on condition is met.
  • the drive circuit of the field effect transistor makes the power field effect transistor conduct.
  • the voltage dividing circuit includes: a first voltage dividing branch, including a second diode and a third resistor connected in parallel, and a cathode of the second diode is connected to the working power supply through the first resistor;
  • the second voltage dividing branch includes a first capacitor, a fourth resistor and a fifth resistor connected in parallel, one end of which is connected to the anode of the second diode and the comparison circuit, and the other end of which is grounded.
  • the comparison circuit includes: a first comparator whose forward input terminal is connected to the first preset reference voltage, and whose reverse input terminal is connected to the first comparator when the power field effect transistor is turned on a divided voltage, and the second divided voltage is connected when the power FET is turned off; the second comparator, whose forward input terminal is connected to the second preset reference voltage, whose reverse The input terminal is connected to the first divided voltage when the power field effect transistor is turned on, and is connected to the second divided voltage when the power field effect transistor is turned off.
  • the control circuit controls the power field effect transistor to be turned on through the drive circuit
  • the voltage is divided and then input to the first comparator to reverse the voltage.
  • the first divided voltage to the input terminal is smaller than the first preset reference voltage connected to the positive input terminal, and the first comparator outputs a low level at this time, indicating that there is no overcurrent; if the leakage of the power FET
  • the source voltage is continuously increased so that the first divided voltage input to the reverse input terminal of the first comparator after the voltage division is greater than the first preset reference voltage connected to the forward input terminal, the output of the first comparator is high. level, indicating overcurrent.
  • the control circuit controls the power field effect transistor to turn off through the drive circuit
  • the drain-source voltage of the power field effect transistor is divided and input to the second comparator of the reverse input terminal of the second comparator
  • the two-division voltage is greater than the second preset reference voltage connected to the forward input terminal, and the second comparator outputs a high level, indicating that the zero-voltage turn-on condition is not satisfied
  • the drain-source of the power FET is The second comparator outputs a low level when the voltage is continuously reduced so that the second divided voltage input to the reverse input terminal of the second comparator after the voltage division is smaller than the second preset reference voltage connected to the forward input terminal , indicating that the zero-voltage turn-on condition is satisfied.
  • the control circuit controls the turned-off power field effect transistor (ie, the low-side transistor) to be turned on through the drive circuit to improve efficiency.
  • the control circuit can include a processing chip or a control chip. On the one hand, it can output the driving pulse PWM1 to be sent to the driving circuit of the power field effect transistor, so as to control the on-off of the power field effect transistor; on the other hand, in the power field In the scenario where the effect transistor is turned on, it can output the drive pulse PWM1 or Logic Out2 used to control the power field effect transistor to turn off to the drive circuit of the power field effect transistor when the output result of the first comparator indicates an overcurrent, so that The power field effect transistor is turned off; in the scenario where the power field effect transistor is turned off, when the output result of the second comparator indicates that the zero-voltage turn-on condition is satisfied, it can output the driving pulse PWM1 used to control the conduction of the power field effect transistor Or Logic Out2 to the drive circuit of the power field effect tube, so that the power field effect tube is turned on. That is to say, in this embodiment, although the first comparator and the second comparator are both connected to the first divided voltage and the second divided voltage
  • FIG. 3 is a structural block diagram of a detection circuit provided by an embodiment of the present disclosure. As shown in FIG. 3 , the detection circuit includes a drain-source voltage detection circuit 101 , a voltage divider circuit 102 , and a comparison circuit 103 .
  • the drain-source voltage detection circuit 101 is connected to the power field effect transistor 100, and is configured to detect the turned-on power field effect transistor when the power field effect transistor 100 is controlled to be turned on by the control circuit 104 connected thereto. 100 drain to source voltage.
  • the voltage divider circuit 102 is connected to the drain-source voltage detection circuit 101, and is configured to divide the voltage of the drain-source electrodes of the power field effect transistor 100 that has been turned on to obtain a first divided voltage.
  • the comparison circuit 103 is connected to the voltage dividing circuit 102, and is configured to compare the first divided voltage with the first preset reference voltage, and determine whether the turned-on power field effect transistor 100 has an overcurrent according to the comparison result event, when it is determined that an overcurrent event occurs in the power field effect transistor 100 , the control circuit 104 connected to the comparison circuit 103 controls the turned on power field effect transistor 100 to be turned off.
  • the drain-source voltage detection circuit 101 detects the drain-source voltage (or saturation voltage) of the power field effect transistor 100 when it is turned on, and then judges whether an overcurrent event occurs in the circuit. The detection speed is fast, and the power field can be effectively protected. Effect tube 100.
  • the drain-source voltage detection circuit 101 is further configured to detect the drain-source voltage of the power field effect transistor 100 that has been turned off when the power field effect transistor 100 is turned off; accordingly, the The voltage divider circuit 102 is further configured to divide the drain-source voltage of the power field effect transistor 100 that has been turned off to obtain a second divided voltage; and the comparison circuit 103 is further configured to compare the second divided voltage voltage and the second preset reference voltage, and determine whether the power field effect transistor 100 that has been turned off meets the zero-voltage turn-on condition according to the comparison result. When conditions are met, the power field effect transistor 100 that has been turned off is controlled by the control circuit 104 to be turned on.
  • the drain-source voltage detection circuit 101 detects the drain-source voltage of the power field effect transistor 100 when it is turned off, and determines whether the power field effect transistor 100 meets the zero-voltage turn-on condition, so that when the power field effect transistor 100 is turned off When the zero-voltage turn-on condition is met, the power field effect transistor 100 is controlled to be turned on, so as to realize flexible adjustment of dead time and prevent complete hard turn-on.
  • control circuit 104 controls the power field effect transistor 100 to be turned on or off through the driving circuit 105 .
  • the specific circuit structure and connection relationship of the drain-source voltage detection circuit 101 , the voltage divider circuit 102 , and the comparison circuit 103 may refer to the specific circuit structure and connection relationship described in the foregoing detection method, and will not be repeated here. Repeat.
  • FIG. 4 is a circuit diagram for MOSFET overcurrent protection and zero-voltage turn-on provided by an example embodiment of the present disclosure.
  • MOSFET VT1 is a low-side switch tube of a half-bridge circuit (equivalent to the above-mentioned power FET), as shown in FIG. 4 , the circuit includes a drain-source voltage detection circuit 1 (equivalent to the above-mentioned detection circuit), a signal processing and PWM generation circuit 2 (including a control chip or a high-speed processor, equivalent to the above-mentioned control circuit), and a drive circuit 3 (including a drive circuit The chip and the logic AND gate are equivalent to the drive circuit of the above-mentioned power FET).
  • the drain-source voltage detection circuit 1 equivalently detects the saturation voltage drop when the MOSFET VT1 is turned on through the first diode D1 and judges whether the voltage meets the zero-voltage turn-on condition when the MOSFET VT1 is about to be turned on, and the voltage at point X is clamped.
  • the voltage divider is compared with the preset reference voltage Vref input from the positive input terminal of the comparator D3 to obtain the result.
  • the second resistor R2 is an optional component, and the circuit composed of the fourth resistor R4 and the detection switch VT2 can be one or more.
  • the fourth resistor R4 is connected in parallel with the fifth resistor R5 to change the voltage at the reverse input terminal of the comparator D3; after the signal processing and PWM generation circuit 2 receives the output signal of the comparator D3, it is determined by logic whether to send a switch off.
  • the drive signal is turned off or turned on, so as to realize overcurrent protection or ZVS turn-on; and the drive circuit 3 receives the drive signal sent by the signal processing and PWM generation circuit 2 to switch the MOSFET VT1.
  • the first resistor R1 is much larger than the second resistor R2, and is clamped by the first diode D1
  • the voltage at point X is approximately equal to the voltage drop of the MOSFET VT1, but Vx ⁇ Vcc, select the appropriate
  • the third resistor R3, the fourth resistor R4, and the fifth resistor R5 divide the voltage. After the voltage division, the divided voltage is input to the inverting input terminal (ie, the inverting input terminal) of the comparator D3, so as to be the same as the non-inverting input terminal of the comparator D3.
  • the preset reference voltage Vref remains unchanged, and the voltage division is changed by controlling the on-off of the detection switch VT2 by the driving pulse PWM2, which is equivalent to changing the detection voltage.
  • signal processing and PWM generation circuit 2 including high-speed processor
  • logic judgment and sequence control can achieve fast response speed, thereby realizing timely protection of the circuit.
  • the second diode D2 is used to rapidly discharge the charge stored in the first capacitor C1.
  • This exemplary embodiment uses a simple circuit to realize saturation voltage detection and ZVS detection. Compared with the related art, the circuit structure is simple, which is beneficial to reduce costs. In addition, in power converters (especially power converters greater than 10kW), The circuit can be applied to the drive control circuit of the power converter, which can improve the efficiency of the power converter and flexibly control the dead time.
  • Fig. 5 is a flowchart of software logic processing when VT1 is turned on in the exemplary embodiment shown in Fig. 4 , as shown in Fig. 5 , the following steps S301 to S303 may be included.
  • Step S301 The signal processing and PWM generation circuit 2 sends a drive pulse PWM1 to the drive circuit 3, so that the drive circuit 3 drives the MOSFET VT1 to turn on.
  • Step S302 The signal processing and PWM generation circuit 2 turns off the detection switch VT2 by sending the driving pulse PWM2 to the detection switch VT2. At this time, the voltage at point X is divided by the voltage and compared with the preset reference voltage Vref. If the output of the comparator D3 is low If the comparator D3 outputs a high level, it means that the MOSFET VT1 is overcurrent, and the timings of the driving pulses PWM1 and PWM2 are reversed.
  • Step S303 If the MOSFET VT1 is overcurrent, the signal processing and PWM generation circuit 2 sends a drive pulse PWM1 to the drive circuit 3, so that the drive circuit 3 drives the MOSFET VT1 to turn off.
  • Fig. 6 is a timing diagram of the example embodiment shown in Fig. 4 when MOSFET VT1 is turned on. As shown in Fig. 6, the timing sequence of driving pulse PWM1 and PWM2 is inverse, and when driving pulse PWM1 is high, MOSFET VT1 is turned on, According to the output characteristic curve of the switch MOSFET VT1, it can be known that the drain-source voltage of the switch MOSFET VT1 increases with the current.
  • the signal processing and PWM generation circuit 2 can output Logic Out2 or drive pulse PWM1, and directly turn off the switch MOSFET VT1, as shown in Figure 6, the MOSFET VT1 is turned on at t1, the overcurrent event starts at t2, and the time t3 Turn off MOSFET VT1.
  • FIG. 7 is a flowchart of software logic processing when the VT1 is turned off in the exemplary embodiment shown in FIG. 4 . As shown in FIG. 7 , the following steps S401 to S404 may be included.
  • Step S401 The signal processing and PWM generation circuit 2 sends the drive pulse PWM1 to the drive circuit 3, so that the drive circuit 3 drives the MOSFET VT1 to turn off, and sends the drive pulse PWM2 to the detection switch VT2, so that the detection switch VT2 is turned on.
  • Step S402 setting the maximum dead time Tdeadmax driven by the upper and lower switch tubes.
  • Step S403 The high-side MOSFET is turned off when the high-side driving pulse is detected.
  • Step S404 The voltage at point X is divided by the voltage and compared with the preset reference voltage Vref. If the comparator D3 outputs a low level, it means that the MOSFET VT1 can be turned on at zero voltage. If the comparator D3 still outputs after the maximum dead time Tdeadmax High level, then the signal processing and PWM generation circuit 2 sends the drive pulse PWM1 to the drive circuit 3, so that the drive circuit 3 drives the MOSFET VT1 to conduct.
  • the detection switch VT2 is turned on to connect the fourth resistor R4 with the first
  • the five resistors R5 are connected in parallel to increase the detection voltage threshold. If the current of the MOSFET VT1 begins to flow through its body diode, its drain-source voltage decreases. For example, when the drain-source voltage detection threshold is 30V, and Logic Out1 changes from high level to low level, it is judged that MOSFET VT1 can be turned on, Logic Out2 and driving pulse PWM1 are turned to high level, and the dead zone is realized.
  • the present disclosure can set the maximum dead time Tdeadmax to prevent the situation that the output power of the power converter is small and cannot achieve ZVS, and can also set the minimum dead time Tdeadmin to prevent the upper and lower switches from being turned on at the same time.
  • Tdeadmax the maximum dead time
  • Tdeadmin the minimum dead time
  • This example embodiment provides a dual-purpose circuit that can detect the saturation voltage of the MOSFET when it is turned on on the one hand, and detect the drain-source voltage of the MOSFET on the other hand to adjust the dead time.
  • the detected saturation voltage is a low voltage below 10V.
  • the relationship between the voltage and current when the MOSFET is turned on it can be known that if the saturation voltage of the MOSFET is below 10V, it can be judged whether the MOSFET is overcurrent.
  • the latter to achieve ZVS, in high-voltage applications, when the drain-source voltage of the MOSFET is at any point below 50V, it can be considered as zero-voltage switch-on. Compared with hard switch-on, the loss is still much smaller.
  • the present disclosure realizes both saturation voltage detection and ZVS detection, using the simple circuit shown in FIG. 4 , using the first diode D1 to detect the drain-source voltage of the MOSFET, and by controlling the detection switch VT2 to connect the fourth resistor R4 to the fifth Resistor R5 is connected in parallel, changing the voltage division of the resistor, quickly changing the voltage at the reverse input terminal of the comparator D3, the forward input terminal of the comparator D3 is given a preset reference voltage Vref, when the MOSFET VT1 is turned on, the detection switch VT2 is turned off, and the MOSFET VT1 When turned off, the detection switch VT2 is turned on, which can equivalently detect whether different drain-source voltages exceed the set value, which solves the different problems of saturation voltage detection and ZVS detection.
  • the detection circuit of the present disclosure can be applied to power converters, and is generally used in high-voltage (greater than 400V) occasions.
  • a half-bridge circuit using MOSFETs for power switches it is connected in parallel with the drain-source electrodes of the MOSFETs and connected in the half-bridge circuit.
  • the impedance of the resonant network is inductive, and the output voltage leads the output current, which can realize ZVS.
  • FIG. 9 is a schematic diagram of a detection circuit provided by an embodiment of the present disclosure, which can be used as an alternative to the drain-source voltage detection circuit 1 in the exemplary embodiment shown in FIG. 4 .
  • the detection circuit no longer uses a detection switch VT2 to change the equivalent reference voltage, but to change the preset reference voltage of the forward input terminal of the comparator D3, the change of the preset reference voltage is synchronized with the timing of the driving pulse PWM1.
  • FIG. 10 is another schematic diagram of the detection circuit provided by the embodiment of the present disclosure, which can be used as another alternative to the drain-source voltage detection circuit 1 in the example embodiment shown in FIG. 4 .
  • the detection circuit is no longer Use the detection switch VT2 to change the equivalent reference voltage, but use two comparators D4 and D5 to access different preset reference voltages, namely the first preset reference voltage Vref1 and the second preset reference voltage Vref2, two The output signals of the comparators D4 and D5 are processed by the signal processing and PWM generation circuit 2 (including the control chip), and can also achieve the functions of saturation voltage detection and zero-voltage turn-on.
  • the circuit for detecting the drain-source voltage of the power field effect transistor to determine whether the power field effect transistor is overcurrent and adjusting the dead time to realize zero-voltage turn-on can be used for the overcurrent protection of the power field effect transistor and the dead time of the driving signal. Adjustment to achieve zero-voltage turn-on, involving resonant soft-switching circuits in the field of power electronics, and can be used in inverters, rectifiers, switching power supplies and other circuits.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electronic Switches (AREA)
  • Power Conversion In General (AREA)

Abstract

Procédé de détection et circuit de détection. Le procédé de détection consiste : lorsqu'un transistor à effet de champ de puissance est mis sous tension, à détecter une tension drain-source du transistor à effet de champ de puissance mis sous tension à l'aide d'un circuit de détection de tension drain-source (S101) ; à diviser la tension drain-source du transistor à effet de champ de puissance mis sous tension à l'aide d'un circuit diviseur de tension de façon à obtenir une première tension divisée (S102) ; et à comparer la première tension divisée à une première tension de référence prédéfinie à l'aide d'un circuit de comparaison, et à déterminer, en fonction d'un résultat de comparaison, si un événement de surintensité se produit dans le transistor à effet de champ de puissance mis sous tension, et lorsque l'occurrence d'un événement de surintensité est déterminée dans le transistor à effet de champ de puissance, à commander, par le circuit de commande, la mise hors tension du transistor à effet de champ de puissance mis sous tension (S103).
PCT/CN2021/132390 2020-11-25 2021-11-23 Procédé de détection et circuit de détection WO2022111464A1 (fr)

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